Maxim Integrated / OneWire

1-Wire® library for mbed. Complete 1-Wire library that supports our silicon masters along with a bit-bang master on the MAX32600MBED platform with one common interface for mbed. Slave support has also been included and more slaves will be added as time permits.

Dependents:   MAXREFDES131_Qt_Demo MAX32630FTHR_iButton_uSD_Logger MAX32630FTHR_DS18B20_uSD_Logger MAXREFDES130_131_Demo ... more

Superseded by MaximInterface.

Masters/DS2465/DS2465.cpp@73:2cecc1372acc, 2016-05-12 (annotated)

Committer:
IanBenzMaxim
Date:
Thu May 12 14:38:16 2016 -0500
Revision:
73:2cecc1372acc
Parent:
OneWire_Masters/DS2465/DS2465.cpp@72:6892702709ee
Child:
74:23be10c32fa3
Added namespaces. Renamed files and directories for consistency. Use <stdint.h> instead of <cstdint> since it is not supported by C++98.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
IanBenzMaxim 73:2cecc1372acc 1 #include "DS2465.h"
IanBenzMaxim 73:2cecc1372acc 2 #include "I2C.h"
IanBenzMaxim 73:2cecc1372acc 3 #include "wait_api.h"
IanBenzMaxim 21:00c94aeb533e 4
IanBenzMaxim 21:00c94aeb533e 5 #define I2C_WRITE 0
IanBenzMaxim 21:00c94aeb533e 6 #define I2C_READ 1
IanBenzMaxim 21:00c94aeb533e 7
IanBenzMaxim 21:00c94aeb533e 8 // DS2465 commands
IanBenzMaxim 21:00c94aeb533e 9 #define CMD_1WMR 0xF0
IanBenzMaxim 21:00c94aeb533e 10 #define CMD_WCFG 0xD2
IanBenzMaxim 21:00c94aeb533e 11 #define CMD_CHSL 0xC3
IanBenzMaxim 21:00c94aeb533e 12 #define CMD_SRP 0xE1
IanBenzMaxim 21:00c94aeb533e 13
IanBenzMaxim 21:00c94aeb533e 14 #define CMD_1WRS 0xB4
IanBenzMaxim 21:00c94aeb533e 15 #define CMD_1WWB 0xA5
IanBenzMaxim 21:00c94aeb533e 16 #define CMD_1WRB 0x96
IanBenzMaxim 21:00c94aeb533e 17 #define CMD_1WSB 0x87
IanBenzMaxim 21:00c94aeb533e 18 #define CMD_1WT 0x78
IanBenzMaxim 21:00c94aeb533e 19 #define CMD_1WTB 0x69
IanBenzMaxim 21:00c94aeb533e 20 #define CMD_1WRF 0xE1
IanBenzMaxim 21:00c94aeb533e 21 #define CMD_CPS 0x5A
IanBenzMaxim 21:00c94aeb533e 22 #define CMD_CSS 0x4B
IanBenzMaxim 21:00c94aeb533e 23 #define CMD_CSAM 0x3C
IanBenzMaxim 21:00c94aeb533e 24 #define CMD_CSWM 0x2D
IanBenzMaxim 21:00c94aeb533e 25 #define CMD_CNMS 0x1E
IanBenzMaxim 21:00c94aeb533e 26 #define CMD_SPR 0x0F
IanBenzMaxim 21:00c94aeb533e 27
IanBenzMaxim 21:00c94aeb533e 28 // DS2465 status bits
IanBenzMaxim 21:00c94aeb533e 29 #define STATUS_1WB 0x01
IanBenzMaxim 21:00c94aeb533e 30 #define STATUS_PPD 0x02
IanBenzMaxim 21:00c94aeb533e 31 #define STATUS_SD 0x04
IanBenzMaxim 21:00c94aeb533e 32 #define STATUS_LL 0x08
IanBenzMaxim 21:00c94aeb533e 33 #define STATUS_RST 0x10
IanBenzMaxim 21:00c94aeb533e 34 #define STATUS_SBR 0x20
IanBenzMaxim 21:00c94aeb533e 35 #define STATUS_TSB 0x40
IanBenzMaxim 21:00c94aeb533e 36 #define STATUS_DIR 0x80
IanBenzMaxim 21:00c94aeb533e 37
IanBenzMaxim 73:2cecc1372acc 38 using OneWire::Masters::OneWireMaster;
IanBenzMaxim 73:2cecc1372acc 39 using OneWire::Masters::DS2465;
IanBenzMaxim 73:2cecc1372acc 40 using OneWire::Authenticators::ISha256MacCoproc;
IanBenzMaxim 73:2cecc1372acc 41
IanBenzMaxim 21:00c94aeb533e 42 static const int I2C_WRITE_OK = 0;
IanBenzMaxim 21:00c94aeb533e 43
IanBenzMaxim 73:2cecc1372acc 44 uint8_t DS2465::Config::readByte() const
IanBenzMaxim 24:8942d8478d68 45 {
IanBenzMaxim 73:2cecc1372acc 46 uint8_t config = 0;
IanBenzMaxim 71:562f5c702094 47 if (get1WS())
IanBenzMaxim 24:8942d8478d68 48 config |= 0x08;
IanBenzMaxim 71:562f5c702094 49 if (getSPU())
IanBenzMaxim 24:8942d8478d68 50 config |= 0x04;
IanBenzMaxim 71:562f5c702094 51 if (getPDN())
IanBenzMaxim 24:8942d8478d68 52 config |= 0x02;
IanBenzMaxim 71:562f5c702094 53 if (getAPU())
IanBenzMaxim 24:8942d8478d68 54 config |= 0x01;
IanBenzMaxim 24:8942d8478d68 55 return config;
IanBenzMaxim 24:8942d8478d68 56 }
IanBenzMaxim 24:8942d8478d68 57
IanBenzMaxim 73:2cecc1372acc 58 uint8_t DS2465::Config::writeByte() const
IanBenzMaxim 24:8942d8478d68 59 {
IanBenzMaxim 73:2cecc1372acc 60 uint8_t config = readByte();
IanBenzMaxim 24:8942d8478d68 61 return ((~config << 4) | config);
IanBenzMaxim 24:8942d8478d68 62 }
IanBenzMaxim 24:8942d8478d68 63
IanBenzMaxim 24:8942d8478d68 64 void DS2465::Config::reset()
IanBenzMaxim 24:8942d8478d68 65 {
IanBenzMaxim 71:562f5c702094 66 set1WS(false);
IanBenzMaxim 71:562f5c702094 67 setSPU(false);
IanBenzMaxim 71:562f5c702094 68 setPDN(false);
IanBenzMaxim 71:562f5c702094 69 setAPU(true);
IanBenzMaxim 24:8942d8478d68 70 }
IanBenzMaxim 24:8942d8478d68 71
IanBenzMaxim 73:2cecc1372acc 72 DS2465::DS2465(mbed::I2C & I2C_interface, uint8_t I2C_address)
IanBenzMaxim 21:00c94aeb533e 73 : m_I2C_interface(I2C_interface), m_I2C_address(I2C_address)
IanBenzMaxim 21:00c94aeb533e 74 {
IanBenzMaxim 21:00c94aeb533e 75
IanBenzMaxim 21:00c94aeb533e 76 }
IanBenzMaxim 21:00c94aeb533e 77
IanBenzMaxim 21:00c94aeb533e 78 OneWireMaster::CmdResult DS2465::OWInitMaster()
IanBenzMaxim 21:00c94aeb533e 79 {
IanBenzMaxim 47:307dc45952db 80 OneWireMaster::CmdResult result;
IanBenzMaxim 47:307dc45952db 81
IanBenzMaxim 47:307dc45952db 82 // reset DS2465
IanBenzMaxim 47:307dc45952db 83 result = reset();
IanBenzMaxim 47:307dc45952db 84 if (result != OneWireMaster::Success)
IanBenzMaxim 47:307dc45952db 85 return result;
IanBenzMaxim 47:307dc45952db 86
IanBenzMaxim 47:307dc45952db 87 // write the default configuration setup
IanBenzMaxim 47:307dc45952db 88 Config defaultConfig;
IanBenzMaxim 47:307dc45952db 89 result = writeConfig(defaultConfig, true);
IanBenzMaxim 47:307dc45952db 90 return result;
IanBenzMaxim 21:00c94aeb533e 91 }
IanBenzMaxim 21:00c94aeb533e 92
IanBenzMaxim 33:a4c015046956 93 OneWireMaster::CmdResult DS2465::computeNextMasterSecret(bool swap, unsigned int pageNum, PageRegion region)
IanBenzMaxim 21:00c94aeb533e 94 {
IanBenzMaxim 73:2cecc1372acc 95 uint8_t command[2] = { CMD_CNMS, (uint8_t)(swap ? (0xC8 | (pageNum << 4) | region) : 0xBF) };
IanBenzMaxim 34:11fffbe98ef9 96 return writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 97 }
IanBenzMaxim 21:00c94aeb533e 98
IanBenzMaxim 33:a4c015046956 99 OneWireMaster::CmdResult DS2465::computeWriteMac(bool regwrite, bool swap, unsigned int pageNum, unsigned int segmentNum) const
IanBenzMaxim 21:00c94aeb533e 100 {
IanBenzMaxim 73:2cecc1372acc 101 uint8_t command[2] = { CMD_CSWM, (uint8_t)((regwrite << 7) | (swap << 6) | (pageNum << 4) | segmentNum) };
IanBenzMaxim 34:11fffbe98ef9 102 return cWriteMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 103 }
IanBenzMaxim 21:00c94aeb533e 104
IanBenzMaxim 33:a4c015046956 105 OneWireMaster::CmdResult DS2465::computeAuthMac(bool swap, unsigned int pageNum, PageRegion region) const
IanBenzMaxim 21:00c94aeb533e 106 {
IanBenzMaxim 73:2cecc1372acc 107 uint8_t command[2] = { CMD_CSAM, (uint8_t)(swap ? (0xC8 | (pageNum << 4) | region) : 0xBF) };
IanBenzMaxim 34:11fffbe98ef9 108 return cWriteMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 109 }
IanBenzMaxim 21:00c94aeb533e 110
IanBenzMaxim 33:a4c015046956 111 OneWireMaster::CmdResult DS2465::computeSlaveSecret(bool swap, unsigned int pageNum, PageRegion region)
IanBenzMaxim 21:00c94aeb533e 112 {
IanBenzMaxim 73:2cecc1372acc 113 uint8_t command[2] = { CMD_CSS, (uint8_t)(swap ? (0xC8 | (pageNum << 4) | region) : 0xBF) };
IanBenzMaxim 34:11fffbe98ef9 114 return writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 115 }
IanBenzMaxim 21:00c94aeb533e 116
IanBenzMaxim 73:2cecc1372acc 117 ISha256MacCoproc::CmdResult DS2465::setMasterSecret(const Secret & masterSecret)
IanBenzMaxim 21:00c94aeb533e 118 {
IanBenzMaxim 21:00c94aeb533e 119 OneWireMaster::CmdResult result;
IanBenzMaxim 48:6f9208ae280e 120 result = writeMemory(ADDR_SPAD, masterSecret, masterSecret.length);
IanBenzMaxim 21:00c94aeb533e 121 if (result == OneWireMaster::Success)
IanBenzMaxim 47:307dc45952db 122 result = copyScratchpadToSecret();
IanBenzMaxim 21:00c94aeb533e 123 if (result == OneWireMaster::Success)
IanBenzMaxim 47:307dc45952db 124 wait_ms(eepromPageWriteDelayMs);
IanBenzMaxim 73:2cecc1372acc 125 return (result == OneWireMaster::Success ? ISha256MacCoproc::Success : ISha256MacCoproc::OperationFailure);
IanBenzMaxim 21:00c94aeb533e 126 }
IanBenzMaxim 21:00c94aeb533e 127
IanBenzMaxim 73:2cecc1372acc 128 ISha256MacCoproc::CmdResult DS2465::computeWriteMac(const WriteMacData & writeMacData, Mac & mac) const
IanBenzMaxim 21:00c94aeb533e 129 {
IanBenzMaxim 21:00c94aeb533e 130 OneWireMaster::CmdResult result;
IanBenzMaxim 21:00c94aeb533e 131 // Write input data to scratchpad
IanBenzMaxim 34:11fffbe98ef9 132 result = writeScratchpad(writeMacData, writeMacData.length);
IanBenzMaxim 21:00c94aeb533e 133 // Compute MAC
IanBenzMaxim 21:00c94aeb533e 134 if (result == OneWireMaster::Success)
IanBenzMaxim 47:307dc45952db 135 result = computeWriteMac(false);
IanBenzMaxim 21:00c94aeb533e 136 if (result == OneWireMaster::Success)
IanBenzMaxim 21:00c94aeb533e 137 {
IanBenzMaxim 34:11fffbe98ef9 138 wait_ms(shaComputationDelayMs);
IanBenzMaxim 21:00c94aeb533e 139 // Read MAC from register
IanBenzMaxim 34:11fffbe98ef9 140 result = readMemory(ADDR_MAC_READ, mac, mac.length, true);
IanBenzMaxim 21:00c94aeb533e 141 }
IanBenzMaxim 73:2cecc1372acc 142 return (result == OneWireMaster::Success ? ISha256MacCoproc::Success : ISha256MacCoproc::OperationFailure);
IanBenzMaxim 21:00c94aeb533e 143 }
IanBenzMaxim 21:00c94aeb533e 144
IanBenzMaxim 73:2cecc1372acc 145 ISha256MacCoproc::CmdResult DS2465::computeAuthMac(const DevicePage & devicePage, const DeviceScratchpad & challenge, const AuthMacData & authMacData, Mac & mac) const
IanBenzMaxim 21:00c94aeb533e 146 {
IanBenzMaxim 21:00c94aeb533e 147 OneWireMaster::CmdResult result;
IanBenzMaxim 21:00c94aeb533e 148 int addr = ADDR_SPAD;
IanBenzMaxim 21:00c94aeb533e 149 // Write input data to scratchpad
IanBenzMaxim 34:11fffbe98ef9 150 result = cWriteMemory(addr, devicePage, devicePage.length);
IanBenzMaxim 21:00c94aeb533e 151 if (result == OneWireMaster::Success)
IanBenzMaxim 21:00c94aeb533e 152 {
IanBenzMaxim 33:a4c015046956 153 addr += devicePage.length;
IanBenzMaxim 34:11fffbe98ef9 154 result = cWriteMemory(addr, challenge, challenge.length);
IanBenzMaxim 21:00c94aeb533e 155 }
IanBenzMaxim 21:00c94aeb533e 156 if (result == OneWireMaster::Success)
IanBenzMaxim 21:00c94aeb533e 157 {
IanBenzMaxim 33:a4c015046956 158 addr += challenge.length;
IanBenzMaxim 34:11fffbe98ef9 159 result = cWriteMemory(addr, authMacData, authMacData.length);
IanBenzMaxim 21:00c94aeb533e 160 }
IanBenzMaxim 21:00c94aeb533e 161 // Compute MAC
IanBenzMaxim 21:00c94aeb533e 162 if (result == OneWireMaster::Success)
IanBenzMaxim 47:307dc45952db 163 result = computeAuthMac();
IanBenzMaxim 21:00c94aeb533e 164 if (result == OneWireMaster::Success)
IanBenzMaxim 21:00c94aeb533e 165 {
IanBenzMaxim 34:11fffbe98ef9 166 wait_ms(shaComputationDelayMs * 2);
IanBenzMaxim 21:00c94aeb533e 167 // Read MAC from register
IanBenzMaxim 34:11fffbe98ef9 168 result = readMemory(ADDR_MAC_READ, mac, mac.length, true);
IanBenzMaxim 21:00c94aeb533e 169 }
IanBenzMaxim 73:2cecc1372acc 170 return (result == OneWireMaster::Success ? ISha256MacCoproc::Success : ISha256MacCoproc::OperationFailure);
IanBenzMaxim 21:00c94aeb533e 171 }
IanBenzMaxim 21:00c94aeb533e 172
IanBenzMaxim 73:2cecc1372acc 173 ISha256MacCoproc::CmdResult DS2465::computeSlaveSecret(const DevicePage & devicePage, const DeviceScratchpad & deviceScratchpad, const SlaveSecretData & slaveSecretData)
IanBenzMaxim 21:00c94aeb533e 174 {
IanBenzMaxim 21:00c94aeb533e 175 OneWireMaster::CmdResult result;
IanBenzMaxim 21:00c94aeb533e 176 int addr = ADDR_SPAD;
IanBenzMaxim 21:00c94aeb533e 177 // Write input data to scratchpad
IanBenzMaxim 34:11fffbe98ef9 178 result = writeMemory(addr, devicePage, devicePage.length);
IanBenzMaxim 21:00c94aeb533e 179 if (result == OneWireMaster::Success)
IanBenzMaxim 21:00c94aeb533e 180 {
IanBenzMaxim 33:a4c015046956 181 addr += devicePage.length;
IanBenzMaxim 34:11fffbe98ef9 182 result = writeMemory(addr, deviceScratchpad, deviceScratchpad.length);
IanBenzMaxim 21:00c94aeb533e 183 }
IanBenzMaxim 21:00c94aeb533e 184 if (result == OneWireMaster::Success)
IanBenzMaxim 21:00c94aeb533e 185 {
IanBenzMaxim 33:a4c015046956 186 addr += deviceScratchpad.length;
IanBenzMaxim 34:11fffbe98ef9 187 result = writeMemory(addr, slaveSecretData, slaveSecretData.length);
IanBenzMaxim 21:00c94aeb533e 188 }
IanBenzMaxim 21:00c94aeb533e 189 // Compute secret
IanBenzMaxim 21:00c94aeb533e 190 if (result == OneWireMaster::Success)
IanBenzMaxim 47:307dc45952db 191 result = computeSlaveSecret();
IanBenzMaxim 21:00c94aeb533e 192 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 193 wait_ms(shaComputationDelayMs * 2);
IanBenzMaxim 73:2cecc1372acc 194 return (result == OneWireMaster::Success ? ISha256MacCoproc::Success : ISha256MacCoproc::OperationFailure);
IanBenzMaxim 21:00c94aeb533e 195 }
IanBenzMaxim 21:00c94aeb533e 196
IanBenzMaxim 73:2cecc1372acc 197 OneWireMaster::CmdResult DS2465::copyScratchpad(bool destSecret, unsigned int pageNum, bool notFull, unsigned int segmentNum)
IanBenzMaxim 21:00c94aeb533e 198 {
IanBenzMaxim 73:2cecc1372acc 199 uint8_t command[2] = { CMD_CPS, (uint8_t)(destSecret ? 0 : (0x80 | (pageNum << 4) | (notFull << 3) | segmentNum)) };
IanBenzMaxim 34:11fffbe98ef9 200 return writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 201 }
IanBenzMaxim 21:00c94aeb533e 202
IanBenzMaxim 34:11fffbe98ef9 203 OneWireMaster::CmdResult DS2465::configureLevel(OWLevel level)
IanBenzMaxim 26:a361e3f42ba5 204 {
IanBenzMaxim 26:a361e3f42ba5 205 OneWireMaster::CmdResult result;
IanBenzMaxim 71:562f5c702094 206 if (m_curConfig.getSPU() != (level == LEVEL_STRONG))
IanBenzMaxim 26:a361e3f42ba5 207 {
IanBenzMaxim 35:5d23395628f6 208 Config newConfig = m_curConfig;
IanBenzMaxim 71:562f5c702094 209 newConfig.setSPU(level == LEVEL_STRONG);
IanBenzMaxim 35:5d23395628f6 210 result = writeConfig(newConfig, true);
IanBenzMaxim 21:00c94aeb533e 211 }
IanBenzMaxim 26:a361e3f42ba5 212 else
IanBenzMaxim 26:a361e3f42ba5 213 {
IanBenzMaxim 26:a361e3f42ba5 214 result = OneWireMaster::Success;
IanBenzMaxim 26:a361e3f42ba5 215 }
IanBenzMaxim 21:00c94aeb533e 216 return result;
IanBenzMaxim 21:00c94aeb533e 217 }
IanBenzMaxim 21:00c94aeb533e 218
IanBenzMaxim 32:bce180b544ed 219 OneWireMaster::CmdResult DS2465::OWSetLevel(OWLevel new_level)
IanBenzMaxim 21:00c94aeb533e 220 {
IanBenzMaxim 32:bce180b544ed 221 if (new_level == LEVEL_STRONG)
IanBenzMaxim 27:d5aaefa252f1 222 return OneWireMaster::OperationFailure;
IanBenzMaxim 27:d5aaefa252f1 223
IanBenzMaxim 34:11fffbe98ef9 224 return configureLevel(new_level);
IanBenzMaxim 21:00c94aeb533e 225 }
IanBenzMaxim 21:00c94aeb533e 226
IanBenzMaxim 32:bce180b544ed 227 OneWireMaster::CmdResult DS2465::OWSetSpeed(OWSpeed new_speed)
IanBenzMaxim 21:00c94aeb533e 228 {
IanBenzMaxim 27:d5aaefa252f1 229 // Requested speed is already set
IanBenzMaxim 71:562f5c702094 230 if (m_curConfig.get1WS() == (new_speed == SPEED_OVERDRIVE))
IanBenzMaxim 27:d5aaefa252f1 231 return OneWireMaster::Success;
IanBenzMaxim 27:d5aaefa252f1 232
IanBenzMaxim 27:d5aaefa252f1 233 // set the speed
IanBenzMaxim 35:5d23395628f6 234 Config newConfig = m_curConfig;
IanBenzMaxim 71:562f5c702094 235 newConfig.set1WS(new_speed == SPEED_OVERDRIVE);
IanBenzMaxim 21:00c94aeb533e 236
IanBenzMaxim 27:d5aaefa252f1 237 // write the new config
IanBenzMaxim 35:5d23395628f6 238 return writeConfig(newConfig, true);
IanBenzMaxim 21:00c94aeb533e 239 }
IanBenzMaxim 21:00c94aeb533e 240
IanBenzMaxim 73:2cecc1372acc 241 OneWireMaster::CmdResult DS2465::OWTriplet(SearchDirection & search_direction, uint8_t & sbr, uint8_t & tsb)
IanBenzMaxim 21:00c94aeb533e 242 {
IanBenzMaxim 21:00c94aeb533e 243 // 1-Wire Triplet (Case B)
IanBenzMaxim 21:00c94aeb533e 244 // S AD,0 [A] 1WT [A] SS [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 21:00c94aeb533e 245 // \--------/
IanBenzMaxim 21:00c94aeb533e 246 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 21:00c94aeb533e 247 // [] indicates from slave
IanBenzMaxim 21:00c94aeb533e 248 // SS indicates byte containing search direction bit value in msbit
IanBenzMaxim 24:8942d8478d68 249
IanBenzMaxim 24:8942d8478d68 250 OneWireMaster::CmdResult result;
IanBenzMaxim 73:2cecc1372acc 251 uint8_t command[2] = { CMD_1WT, (uint8_t)((search_direction == DIRECTION_WRITE_ONE) ? 0x80 : 0x00) };
IanBenzMaxim 34:11fffbe98ef9 252 result = writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 24:8942d8478d68 253 if (result == OneWireMaster::Success)
IanBenzMaxim 32:bce180b544ed 254 {
IanBenzMaxim 73:2cecc1372acc 255 uint8_t status;
IanBenzMaxim 34:11fffbe98ef9 256 result = pollBusy(&status);
IanBenzMaxim 32:bce180b544ed 257 if (result == OneWireMaster::Success)
IanBenzMaxim 32:bce180b544ed 258 {
IanBenzMaxim 32:bce180b544ed 259 // check bit results in status byte
IanBenzMaxim 32:bce180b544ed 260 sbr = ((status & STATUS_SBR) == STATUS_SBR);
IanBenzMaxim 32:bce180b544ed 261 tsb = ((status & STATUS_TSB) == STATUS_TSB);
IanBenzMaxim 32:bce180b544ed 262 search_direction = ((status & STATUS_DIR) == STATUS_DIR) ? DIRECTION_WRITE_ONE : DIRECTION_WRITE_ZERO;
IanBenzMaxim 32:bce180b544ed 263 }
IanBenzMaxim 32:bce180b544ed 264 }
IanBenzMaxim 24:8942d8478d68 265 return result;
IanBenzMaxim 21:00c94aeb533e 266 }
IanBenzMaxim 21:00c94aeb533e 267
IanBenzMaxim 73:2cecc1372acc 268 OneWireMaster::CmdResult DS2465::OWReadBlock(uint8_t *rx_buf, uint8_t rx_len)
IanBenzMaxim 21:00c94aeb533e 269 {
IanBenzMaxim 21:00c94aeb533e 270 // 1-Wire Receive Block (Case A)
IanBenzMaxim 21:00c94aeb533e 271 // S AD,0 [A] ADDR_CMD_REG [A] 1WRF [A] PR [A] P
IanBenzMaxim 21:00c94aeb533e 272 // [] indicates from slave
IanBenzMaxim 21:00c94aeb533e 273 // PR indicates byte containing parameter
IanBenzMaxim 21:00c94aeb533e 274
IanBenzMaxim 24:8942d8478d68 275 OneWireMaster::CmdResult result;
IanBenzMaxim 73:2cecc1372acc 276 uint8_t command[2] = { CMD_1WRF, rx_len };
IanBenzMaxim 24:8942d8478d68 277
IanBenzMaxim 34:11fffbe98ef9 278 result = writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 24:8942d8478d68 279 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 280 result = pollBusy();
IanBenzMaxim 24:8942d8478d68 281 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 282 result = readMemory(ADDR_SPAD, rx_buf, rx_len, false);
IanBenzMaxim 21:00c94aeb533e 283
IanBenzMaxim 24:8942d8478d68 284 return result;
IanBenzMaxim 21:00c94aeb533e 285 }
IanBenzMaxim 21:00c94aeb533e 286
IanBenzMaxim 73:2cecc1372acc 287 OneWireMaster::CmdResult DS2465::OWWriteBlock(const uint8_t *tran_buf, uint8_t tran_len)
IanBenzMaxim 21:00c94aeb533e 288 {
IanBenzMaxim 21:00c94aeb533e 289 return OWWriteBlock(false, tran_buf, tran_len);
IanBenzMaxim 21:00c94aeb533e 290 }
IanBenzMaxim 21:00c94aeb533e 291
IanBenzMaxim 47:307dc45952db 292 OneWireMaster::CmdResult DS2465::OWWriteBlockMac()
IanBenzMaxim 47:307dc45952db 293 {
IanBenzMaxim 47:307dc45952db 294 return OWWriteBlock(true, NULL, 0);
IanBenzMaxim 47:307dc45952db 295 }
IanBenzMaxim 47:307dc45952db 296
IanBenzMaxim 73:2cecc1372acc 297 OneWireMaster::CmdResult DS2465::OWWriteBlock(bool tx_mac, const uint8_t *tran_buf, uint8_t tran_len)
IanBenzMaxim 21:00c94aeb533e 298 {
IanBenzMaxim 21:00c94aeb533e 299 OneWireMaster::CmdResult result;
IanBenzMaxim 73:2cecc1372acc 300 uint8_t command[2] = { CMD_1WTB, (uint8_t)(tx_mac ? 0xFF : tran_len) };
IanBenzMaxim 21:00c94aeb533e 301
IanBenzMaxim 24:8942d8478d68 302 if (!tx_mac)
IanBenzMaxim 21:00c94aeb533e 303 {
IanBenzMaxim 21:00c94aeb533e 304 // prefill scratchpad with required data
IanBenzMaxim 34:11fffbe98ef9 305 result = writeMemory(ADDR_SPAD, tran_buf, tran_len);
IanBenzMaxim 21:00c94aeb533e 306 if (result != OneWireMaster::Success)
IanBenzMaxim 21:00c94aeb533e 307 return result;
IanBenzMaxim 21:00c94aeb533e 308 }
IanBenzMaxim 21:00c94aeb533e 309
IanBenzMaxim 21:00c94aeb533e 310 // 1-Wire Transmit Block (Case A)
IanBenzMaxim 21:00c94aeb533e 311 // S AD,0 [A] ADDR_CMD_REG [A] 1WTB [A] PR [A] P
IanBenzMaxim 21:00c94aeb533e 312 // [] indicates from slave
IanBenzMaxim 21:00c94aeb533e 313 // PR indicates byte containing parameter
IanBenzMaxim 24:8942d8478d68 314
IanBenzMaxim 34:11fffbe98ef9 315 result = writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 24:8942d8478d68 316
IanBenzMaxim 24:8942d8478d68 317 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 318 result = pollBusy();
IanBenzMaxim 21:00c94aeb533e 319
IanBenzMaxim 24:8942d8478d68 320 return result;
IanBenzMaxim 21:00c94aeb533e 321 }
IanBenzMaxim 21:00c94aeb533e 322
IanBenzMaxim 73:2cecc1372acc 323 OneWireMaster::CmdResult DS2465::OWReadByteSetLevel(uint8_t & recvbyte, OWLevel after_level)
IanBenzMaxim 21:00c94aeb533e 324 {
IanBenzMaxim 24:8942d8478d68 325 // 1-Wire Read Bytes (Case C)
IanBenzMaxim 24:8942d8478d68 326 // S AD,0 [A] ADDR_CMD_REG [A] 1WRB [A] Sr AD,1 [A] [Status] A [Status] A
IanBenzMaxim 24:8942d8478d68 327 // \--------/
IanBenzMaxim 24:8942d8478d68 328 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 24:8942d8478d68 329 // Sr AD,0 [A] SRP [A] E1 [A] Sr AD,1 [A] DD A\ P
IanBenzMaxim 24:8942d8478d68 330 //
IanBenzMaxim 24:8942d8478d68 331 // [] indicates from slave
IanBenzMaxim 24:8942d8478d68 332 // DD data read
IanBenzMaxim 26:a361e3f42ba5 333
IanBenzMaxim 69:f915c4c59a69 334 OneWireMaster::CmdResult result;
IanBenzMaxim 73:2cecc1372acc 335 uint8_t buf;
IanBenzMaxim 69:f915c4c59a69 336
IanBenzMaxim 34:11fffbe98ef9 337 result = configureLevel(after_level);
IanBenzMaxim 26:a361e3f42ba5 338 if (result != OneWireMaster::Success)
IanBenzMaxim 26:a361e3f42ba5 339 return result;
IanBenzMaxim 24:8942d8478d68 340
IanBenzMaxim 24:8942d8478d68 341 buf = CMD_1WRB;
IanBenzMaxim 34:11fffbe98ef9 342 result = writeMemory(ADDR_CMD_REG, &buf, 1);
IanBenzMaxim 21:00c94aeb533e 343
IanBenzMaxim 24:8942d8478d68 344 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 345 result = pollBusy();
IanBenzMaxim 24:8942d8478d68 346
IanBenzMaxim 24:8942d8478d68 347 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 348 result = readMemory(ADDR_DATA_REG, &buf, 1);
IanBenzMaxim 21:00c94aeb533e 349
IanBenzMaxim 24:8942d8478d68 350 if (result == OneWireMaster::Success)
IanBenzMaxim 24:8942d8478d68 351 recvbyte = buf;
IanBenzMaxim 21:00c94aeb533e 352
IanBenzMaxim 24:8942d8478d68 353 return result;
IanBenzMaxim 21:00c94aeb533e 354 }
IanBenzMaxim 21:00c94aeb533e 355
IanBenzMaxim 73:2cecc1372acc 356 OneWireMaster::CmdResult DS2465::OWWriteByteSetLevel(uint8_t sendbyte, OWLevel after_level)
IanBenzMaxim 24:8942d8478d68 357 {
IanBenzMaxim 21:00c94aeb533e 358 // 1-Wire Write Byte (Case B)
IanBenzMaxim 21:00c94aeb533e 359 // S AD,0 [A] ADDR_CMD_REG [A] 1WWB [A] DD [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 21:00c94aeb533e 360 // \--------/
IanBenzMaxim 21:00c94aeb533e 361 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 21:00c94aeb533e 362 // [] indicates from slave
IanBenzMaxim 21:00c94aeb533e 363 // DD data to write
IanBenzMaxim 24:8942d8478d68 364
IanBenzMaxim 24:8942d8478d68 365 OneWireMaster::CmdResult result;
IanBenzMaxim 26:a361e3f42ba5 366
IanBenzMaxim 34:11fffbe98ef9 367 result = configureLevel(after_level);
IanBenzMaxim 26:a361e3f42ba5 368 if (result != OneWireMaster::Success)
IanBenzMaxim 26:a361e3f42ba5 369 return result;
IanBenzMaxim 26:a361e3f42ba5 370
IanBenzMaxim 73:2cecc1372acc 371 uint8_t command[2] = { CMD_1WWB, sendbyte };
IanBenzMaxim 24:8942d8478d68 372
IanBenzMaxim 34:11fffbe98ef9 373 result = writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 24:8942d8478d68 374 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 375 result = pollBusy();
IanBenzMaxim 21:00c94aeb533e 376
IanBenzMaxim 24:8942d8478d68 377 return result;
IanBenzMaxim 21:00c94aeb533e 378 }
IanBenzMaxim 21:00c94aeb533e 379
IanBenzMaxim 73:2cecc1372acc 380 OneWireMaster::CmdResult DS2465::OWTouchBitSetLevel(uint8_t & sendrecvbit, OWLevel after_level)
IanBenzMaxim 21:00c94aeb533e 381 {
IanBenzMaxim 21:00c94aeb533e 382 // 1-Wire bit (Case B)
IanBenzMaxim 21:00c94aeb533e 383 // S AD,0 [A] ADDR_CMD_REG [A] 1WSB [A] BB [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 21:00c94aeb533e 384 // \--------/
IanBenzMaxim 21:00c94aeb533e 385 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 21:00c94aeb533e 386 // [] indicates from slave
IanBenzMaxim 21:00c94aeb533e 387 // BB indicates byte containing bit value in msbit
IanBenzMaxim 21:00c94aeb533e 388
IanBenzMaxim 24:8942d8478d68 389 OneWireMaster::CmdResult result;
IanBenzMaxim 26:a361e3f42ba5 390
IanBenzMaxim 34:11fffbe98ef9 391 result = configureLevel(after_level);
IanBenzMaxim 26:a361e3f42ba5 392 if (result != OneWireMaster::Success)
IanBenzMaxim 26:a361e3f42ba5 393 return result;
IanBenzMaxim 26:a361e3f42ba5 394
IanBenzMaxim 73:2cecc1372acc 395 uint8_t command[2] = { CMD_1WSB, (uint8_t)(sendrecvbit ? 0x80 : 0x00) };
IanBenzMaxim 73:2cecc1372acc 396 uint8_t status;
IanBenzMaxim 24:8942d8478d68 397
IanBenzMaxim 34:11fffbe98ef9 398 result = writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 399
IanBenzMaxim 24:8942d8478d68 400 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 401 result = pollBusy(&status);
IanBenzMaxim 21:00c94aeb533e 402
IanBenzMaxim 24:8942d8478d68 403 if (result == OneWireMaster::Success)
IanBenzMaxim 24:8942d8478d68 404 sendrecvbit = (status & STATUS_SBR);
IanBenzMaxim 24:8942d8478d68 405
IanBenzMaxim 24:8942d8478d68 406 return result;
IanBenzMaxim 21:00c94aeb533e 407 }
IanBenzMaxim 21:00c94aeb533e 408
IanBenzMaxim 73:2cecc1372acc 409 OneWireMaster::CmdResult DS2465::cWriteMemory(uint8_t addr, const uint8_t * buf, size_t bufLen) const
IanBenzMaxim 21:00c94aeb533e 410 {
IanBenzMaxim 21:00c94aeb533e 411 int i;
IanBenzMaxim 21:00c94aeb533e 412
IanBenzMaxim 21:00c94aeb533e 413 // Write SRAM (Case A)
IanBenzMaxim 21:00c94aeb533e 414 // S AD,0 [A] VSA [A] DD [A] P
IanBenzMaxim 21:00c94aeb533e 415 // \-----/
IanBenzMaxim 21:00c94aeb533e 416 // Repeat for each data byte
IanBenzMaxim 21:00c94aeb533e 417 // [] indicates from slave
IanBenzMaxim 21:00c94aeb533e 418 // VSA valid SRAM memory address
IanBenzMaxim 21:00c94aeb533e 419 // DD memory data to write
IanBenzMaxim 21:00c94aeb533e 420
IanBenzMaxim 21:00c94aeb533e 421 m_I2C_interface.start();
IanBenzMaxim 32:bce180b544ed 422 if (m_I2C_interface.write((m_I2C_address | I2C_WRITE)) != I2C_WRITE_OK)
IanBenzMaxim 21:00c94aeb533e 423 {
IanBenzMaxim 21:00c94aeb533e 424 m_I2C_interface.stop();
IanBenzMaxim 21:00c94aeb533e 425 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 21:00c94aeb533e 426 }
IanBenzMaxim 32:bce180b544ed 427 if (m_I2C_interface.write(addr) != I2C_WRITE_OK)
IanBenzMaxim 21:00c94aeb533e 428 {
IanBenzMaxim 21:00c94aeb533e 429 m_I2C_interface.stop();
IanBenzMaxim 21:00c94aeb533e 430 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 21:00c94aeb533e 431 }
IanBenzMaxim 21:00c94aeb533e 432 // loop to write each byte
IanBenzMaxim 21:00c94aeb533e 433 for (i = 0; i < bufLen; i++)
IanBenzMaxim 21:00c94aeb533e 434 {
IanBenzMaxim 21:00c94aeb533e 435 if (m_I2C_interface.write(buf[i]) != I2C_WRITE_OK)
IanBenzMaxim 21:00c94aeb533e 436 {
IanBenzMaxim 21:00c94aeb533e 437 m_I2C_interface.stop();
IanBenzMaxim 21:00c94aeb533e 438 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 21:00c94aeb533e 439 }
IanBenzMaxim 21:00c94aeb533e 440 }
IanBenzMaxim 21:00c94aeb533e 441 m_I2C_interface.stop();
IanBenzMaxim 21:00c94aeb533e 442
IanBenzMaxim 47:307dc45952db 443 return OneWireMaster::Success;
IanBenzMaxim 21:00c94aeb533e 444 }
IanBenzMaxim 21:00c94aeb533e 445
IanBenzMaxim 73:2cecc1372acc 446 OneWireMaster::CmdResult DS2465::readMemory(uint8_t addr, uint8_t * buf, size_t bufLen, bool skipSetPointer) const
IanBenzMaxim 21:00c94aeb533e 447 {
IanBenzMaxim 47:307dc45952db 448 int i;
IanBenzMaxim 21:00c94aeb533e 449
IanBenzMaxim 47:307dc45952db 450 // Read (Case A)
IanBenzMaxim 47:307dc45952db 451 // S AD,0 [A] MA [A] Sr AD,1 [A] [DD] A [DD] A\ P
IanBenzMaxim 47:307dc45952db 452 // \-----/
IanBenzMaxim 47:307dc45952db 453 // Repeat for each data byte, NAK last byte
IanBenzMaxim 47:307dc45952db 454 // [] indicates from slave
IanBenzMaxim 47:307dc45952db 455 // MA memory address
IanBenzMaxim 47:307dc45952db 456 // DD memory data read
IanBenzMaxim 21:00c94aeb533e 457
IanBenzMaxim 47:307dc45952db 458 m_I2C_interface.start();
IanBenzMaxim 47:307dc45952db 459 if (!skipSetPointer)
IanBenzMaxim 47:307dc45952db 460 {
IanBenzMaxim 47:307dc45952db 461 if (m_I2C_interface.write((m_I2C_address | I2C_WRITE)) != I2C_WRITE_OK)
IanBenzMaxim 47:307dc45952db 462 {
IanBenzMaxim 47:307dc45952db 463 m_I2C_interface.stop();
IanBenzMaxim 47:307dc45952db 464 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 47:307dc45952db 465 }
IanBenzMaxim 47:307dc45952db 466 if (m_I2C_interface.write(addr) != I2C_WRITE_OK)
IanBenzMaxim 47:307dc45952db 467 {
IanBenzMaxim 47:307dc45952db 468 m_I2C_interface.stop();
IanBenzMaxim 47:307dc45952db 469 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 47:307dc45952db 470 }
IanBenzMaxim 47:307dc45952db 471 m_I2C_interface.start();
IanBenzMaxim 47:307dc45952db 472 }
IanBenzMaxim 21:00c94aeb533e 473
IanBenzMaxim 47:307dc45952db 474 if (m_I2C_interface.write((m_I2C_address | I2C_READ)) != I2C_WRITE_OK)
IanBenzMaxim 47:307dc45952db 475 {
IanBenzMaxim 47:307dc45952db 476 m_I2C_interface.stop();
IanBenzMaxim 47:307dc45952db 477 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 47:307dc45952db 478 }
IanBenzMaxim 47:307dc45952db 479 // loop to read each byte, NAK last byte
IanBenzMaxim 47:307dc45952db 480 for (i = 0; i < bufLen; i++)
IanBenzMaxim 47:307dc45952db 481 {
IanBenzMaxim 73:2cecc1372acc 482 buf[i] = m_I2C_interface.read((i == (bufLen - 1)) ? mbed::I2C::NoACK : mbed::I2C::ACK);
IanBenzMaxim 47:307dc45952db 483 }
IanBenzMaxim 47:307dc45952db 484 m_I2C_interface.stop();
IanBenzMaxim 21:00c94aeb533e 485
IanBenzMaxim 47:307dc45952db 486 return OneWireMaster::Success;
IanBenzMaxim 21:00c94aeb533e 487 }
IanBenzMaxim 21:00c94aeb533e 488
IanBenzMaxim 34:11fffbe98ef9 489 OneWireMaster::CmdResult DS2465::writeConfig(const Config & config, bool verify)
IanBenzMaxim 21:00c94aeb533e 490 {
IanBenzMaxim 73:2cecc1372acc 491 uint8_t configBuf;
IanBenzMaxim 35:5d23395628f6 492 OneWireMaster::CmdResult result;
IanBenzMaxim 21:00c94aeb533e 493
IanBenzMaxim 35:5d23395628f6 494 configBuf = config.writeByte();
IanBenzMaxim 35:5d23395628f6 495 result = writeMemory(ADDR_WCFG_REG, &configBuf, 1);
IanBenzMaxim 35:5d23395628f6 496 if (verify)
IanBenzMaxim 35:5d23395628f6 497 {
IanBenzMaxim 35:5d23395628f6 498 if (result == OneWireMaster::Success)
IanBenzMaxim 35:5d23395628f6 499 {
IanBenzMaxim 35:5d23395628f6 500 result = readMemory(ADDR_WCFG_REG, &configBuf, 1);
IanBenzMaxim 35:5d23395628f6 501 }
IanBenzMaxim 35:5d23395628f6 502 if (result == OneWireMaster::Success)
IanBenzMaxim 35:5d23395628f6 503 {
IanBenzMaxim 35:5d23395628f6 504 if (configBuf != config.readByte())
IanBenzMaxim 35:5d23395628f6 505 result = OneWireMaster::OperationFailure;
IanBenzMaxim 35:5d23395628f6 506 }
IanBenzMaxim 35:5d23395628f6 507 }
IanBenzMaxim 35:5d23395628f6 508
IanBenzMaxim 35:5d23395628f6 509 if (result == OneWireMaster::Success)
IanBenzMaxim 35:5d23395628f6 510 m_curConfig = config;
IanBenzMaxim 35:5d23395628f6 511
IanBenzMaxim 35:5d23395628f6 512 return result;
IanBenzMaxim 24:8942d8478d68 513 }
IanBenzMaxim 24:8942d8478d68 514
IanBenzMaxim 73:2cecc1372acc 515 OneWireMaster::CmdResult DS2465::pollBusy(uint8_t * pStatus)
IanBenzMaxim 24:8942d8478d68 516 {
IanBenzMaxim 47:307dc45952db 517 const unsigned int pollLimit = 200;
IanBenzMaxim 47:307dc45952db 518
IanBenzMaxim 47:307dc45952db 519 OneWireMaster::CmdResult result;
IanBenzMaxim 73:2cecc1372acc 520 uint8_t status;
IanBenzMaxim 47:307dc45952db 521 unsigned int pollCount = 0;
IanBenzMaxim 24:8942d8478d68 522
IanBenzMaxim 47:307dc45952db 523 do
IanBenzMaxim 47:307dc45952db 524 {
IanBenzMaxim 47:307dc45952db 525 result = readMemory(ADDR_STATUS_REG, &status, 1, true);
IanBenzMaxim 47:307dc45952db 526 if (result != OneWireMaster::Success)
IanBenzMaxim 47:307dc45952db 527 return result;
IanBenzMaxim 47:307dc45952db 528 if (pStatus != NULL)
IanBenzMaxim 47:307dc45952db 529 *pStatus = status;
IanBenzMaxim 47:307dc45952db 530 if (pollCount++ >= pollLimit)
IanBenzMaxim 47:307dc45952db 531 return OneWireMaster::TimeoutError;
IanBenzMaxim 47:307dc45952db 532 } while (status & STATUS_1WB);
IanBenzMaxim 24:8942d8478d68 533
IanBenzMaxim 47:307dc45952db 534 return OneWireMaster::Success;
IanBenzMaxim 21:00c94aeb533e 535 }
IanBenzMaxim 21:00c94aeb533e 536
IanBenzMaxim 21:00c94aeb533e 537 OneWireMaster::CmdResult DS2465::OWReset(void)
IanBenzMaxim 24:8942d8478d68 538 {
IanBenzMaxim 24:8942d8478d68 539 // 1-Wire reset (Case B)
IanBenzMaxim 24:8942d8478d68 540 // S AD,0 [A] ADDR_CMD_REG [A] 1WRS [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 24:8942d8478d68 541 // \--------/
IanBenzMaxim 24:8942d8478d68 542 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 24:8942d8478d68 543 // [] indicates from slave
IanBenzMaxim 21:00c94aeb533e 544
IanBenzMaxim 24:8942d8478d68 545 OneWireMaster::CmdResult result;
IanBenzMaxim 73:2cecc1372acc 546 uint8_t buf;
IanBenzMaxim 21:00c94aeb533e 547
IanBenzMaxim 24:8942d8478d68 548 buf = CMD_1WRS;
IanBenzMaxim 34:11fffbe98ef9 549 result = writeMemory(ADDR_CMD_REG, &buf, 1);
IanBenzMaxim 21:00c94aeb533e 550
IanBenzMaxim 24:8942d8478d68 551 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 552 result = pollBusy(&buf);
IanBenzMaxim 24:8942d8478d68 553
IanBenzMaxim 24:8942d8478d68 554 if (result == OneWireMaster::Success)
IanBenzMaxim 24:8942d8478d68 555 {
IanBenzMaxim 24:8942d8478d68 556 // check for presence detect
IanBenzMaxim 24:8942d8478d68 557 if ((buf & STATUS_PPD) != STATUS_PPD)
IanBenzMaxim 24:8942d8478d68 558 result = OneWireMaster::OperationFailure;
IanBenzMaxim 24:8942d8478d68 559 }
IanBenzMaxim 21:00c94aeb533e 560
IanBenzMaxim 24:8942d8478d68 561 return result;
IanBenzMaxim 21:00c94aeb533e 562 }
IanBenzMaxim 21:00c94aeb533e 563
IanBenzMaxim 34:11fffbe98ef9 564 OneWireMaster::CmdResult DS2465::reset(void)
IanBenzMaxim 24:8942d8478d68 565 {
IanBenzMaxim 21:00c94aeb533e 566 // Device Reset
IanBenzMaxim 21:00c94aeb533e 567 // S AD,0 [A] ADDR_CMD_REG [A] 1WMR [A] Sr AD,1 [A] [SS] A\ P
IanBenzMaxim 21:00c94aeb533e 568 // [] indicates from slave
IanBenzMaxim 21:00c94aeb533e 569 // SS status byte to read to verify state
IanBenzMaxim 21:00c94aeb533e 570
IanBenzMaxim 24:8942d8478d68 571 OneWireMaster::CmdResult result;
IanBenzMaxim 73:2cecc1372acc 572 uint8_t buf;
IanBenzMaxim 21:00c94aeb533e 573
IanBenzMaxim 24:8942d8478d68 574 buf = CMD_1WMR;
IanBenzMaxim 34:11fffbe98ef9 575 result = writeMemory(ADDR_CMD_REG, &buf, 1);
IanBenzMaxim 21:00c94aeb533e 576
IanBenzMaxim 24:8942d8478d68 577 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 578 result = readMemory(ADDR_STATUS_REG, &buf, 1, true);
IanBenzMaxim 24:8942d8478d68 579
IanBenzMaxim 24:8942d8478d68 580 if (result == OneWireMaster::Success)
IanBenzMaxim 21:00c94aeb533e 581 {
IanBenzMaxim 24:8942d8478d68 582 if ((buf & 0xF7) != 0x10)
IanBenzMaxim 24:8942d8478d68 583 result = OneWireMaster::OperationFailure;
IanBenzMaxim 21:00c94aeb533e 584 }
IanBenzMaxim 24:8942d8478d68 585
IanBenzMaxim 24:8942d8478d68 586 if (result == OneWireMaster::Success)
IanBenzMaxim 24:8942d8478d68 587 OWReset(); // do a command to get 1-Wire master reset out of holding state
IanBenzMaxim 21:00c94aeb533e 588
IanBenzMaxim 24:8942d8478d68 589 return result;
IanBenzMaxim 21:00c94aeb533e 590 }