1-Wire® library for mbed. Complete 1-Wire library that supports our silicon masters along with a bit-bang master on the MAX32600MBED platform with one common interface for mbed. Slave support has also been included and more slaves will be added as time permits.

Dependents:   MAXREFDES131_Qt_Demo MAX32630FTHR_iButton_uSD_Logger MAX32630FTHR_DS18B20_uSD_Logger MAXREFDES130_131_Demo ... more

Superseded by MaximInterface.

Committer:
IanBenzMaxim
Date:
Fri Apr 01 09:29:55 2016 -0500
Revision:
34:11fffbe98ef9
Parent:
33:a4c015046956
Child:
35:5d23395628f6
Continue code cleanup of DS2465 and DS28E15_22_25.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
IanBenzMaxim 21:00c94aeb533e 1 #include "DS2465.hpp"
IanBenzMaxim 27:d5aaefa252f1 2 #include "RomId.hpp"
IanBenzMaxim 27:d5aaefa252f1 3 #include "mbed.h"
IanBenzMaxim 21:00c94aeb533e 4
IanBenzMaxim 21:00c94aeb533e 5 #define I2C_WRITE 0
IanBenzMaxim 21:00c94aeb533e 6 #define I2C_READ 1
IanBenzMaxim 21:00c94aeb533e 7
IanBenzMaxim 21:00c94aeb533e 8 // DS2465 commands
IanBenzMaxim 21:00c94aeb533e 9 #define CMD_1WMR 0xF0
IanBenzMaxim 21:00c94aeb533e 10 #define CMD_WCFG 0xD2
IanBenzMaxim 21:00c94aeb533e 11 #define CMD_CHSL 0xC3
IanBenzMaxim 21:00c94aeb533e 12 #define CMD_SRP 0xE1
IanBenzMaxim 21:00c94aeb533e 13
IanBenzMaxim 21:00c94aeb533e 14 #define CMD_1WRS 0xB4
IanBenzMaxim 21:00c94aeb533e 15 #define CMD_1WWB 0xA5
IanBenzMaxim 21:00c94aeb533e 16 #define CMD_1WRB 0x96
IanBenzMaxim 21:00c94aeb533e 17 #define CMD_1WSB 0x87
IanBenzMaxim 21:00c94aeb533e 18 #define CMD_1WT 0x78
IanBenzMaxim 21:00c94aeb533e 19 #define CMD_1WTB 0x69
IanBenzMaxim 21:00c94aeb533e 20 #define CMD_1WRF 0xE1
IanBenzMaxim 21:00c94aeb533e 21 #define CMD_CPS 0x5A
IanBenzMaxim 21:00c94aeb533e 22 #define CMD_CSS 0x4B
IanBenzMaxim 21:00c94aeb533e 23 #define CMD_CSAM 0x3C
IanBenzMaxim 21:00c94aeb533e 24 #define CMD_CSWM 0x2D
IanBenzMaxim 21:00c94aeb533e 25 #define CMD_CNMS 0x1E
IanBenzMaxim 21:00c94aeb533e 26 #define CMD_SPR 0x0F
IanBenzMaxim 21:00c94aeb533e 27
IanBenzMaxim 21:00c94aeb533e 28 // DS2465 status bits
IanBenzMaxim 21:00c94aeb533e 29 #define STATUS_1WB 0x01
IanBenzMaxim 21:00c94aeb533e 30 #define STATUS_PPD 0x02
IanBenzMaxim 21:00c94aeb533e 31 #define STATUS_SD 0x04
IanBenzMaxim 21:00c94aeb533e 32 #define STATUS_LL 0x08
IanBenzMaxim 21:00c94aeb533e 33 #define STATUS_RST 0x10
IanBenzMaxim 21:00c94aeb533e 34 #define STATUS_SBR 0x20
IanBenzMaxim 21:00c94aeb533e 35 #define STATUS_TSB 0x40
IanBenzMaxim 21:00c94aeb533e 36 #define STATUS_DIR 0x80
IanBenzMaxim 21:00c94aeb533e 37
IanBenzMaxim 21:00c94aeb533e 38 static const int I2C_WRITE_OK = 0;
IanBenzMaxim 21:00c94aeb533e 39
IanBenzMaxim 24:8942d8478d68 40
IanBenzMaxim 24:8942d8478d68 41 std::uint8_t DS2465::Config::readByte() const
IanBenzMaxim 24:8942d8478d68 42 {
IanBenzMaxim 24:8942d8478d68 43 std::uint8_t config = 0;
IanBenzMaxim 24:8942d8478d68 44 if (c1WS)
IanBenzMaxim 24:8942d8478d68 45 config |= 0x08;
IanBenzMaxim 24:8942d8478d68 46 if (cSPU)
IanBenzMaxim 24:8942d8478d68 47 config |= 0x04;
IanBenzMaxim 24:8942d8478d68 48 if (cPDN)
IanBenzMaxim 24:8942d8478d68 49 config |= 0x02;
IanBenzMaxim 24:8942d8478d68 50 if (cAPU)
IanBenzMaxim 24:8942d8478d68 51 config |= 0x01;
IanBenzMaxim 24:8942d8478d68 52 return config;
IanBenzMaxim 24:8942d8478d68 53 }
IanBenzMaxim 24:8942d8478d68 54
IanBenzMaxim 24:8942d8478d68 55 std::uint8_t DS2465::Config::writeByte() const
IanBenzMaxim 24:8942d8478d68 56 {
IanBenzMaxim 24:8942d8478d68 57 std::uint8_t config = readByte();
IanBenzMaxim 24:8942d8478d68 58 return ((~config << 4) | config);
IanBenzMaxim 24:8942d8478d68 59 }
IanBenzMaxim 24:8942d8478d68 60
IanBenzMaxim 24:8942d8478d68 61 void DS2465::Config::reset()
IanBenzMaxim 24:8942d8478d68 62 {
IanBenzMaxim 24:8942d8478d68 63 c1WS = cSPU = cPDN = false;
IanBenzMaxim 24:8942d8478d68 64 cAPU = true;
IanBenzMaxim 24:8942d8478d68 65 }
IanBenzMaxim 24:8942d8478d68 66
IanBenzMaxim 24:8942d8478d68 67
IanBenzMaxim 24:8942d8478d68 68
IanBenzMaxim 24:8942d8478d68 69
IanBenzMaxim 32:bce180b544ed 70 DS2465::DS2465(I2C & I2C_interface, std::uint8_t I2C_address)
IanBenzMaxim 21:00c94aeb533e 71 : m_I2C_interface(I2C_interface), m_I2C_address(I2C_address)
IanBenzMaxim 21:00c94aeb533e 72 {
IanBenzMaxim 21:00c94aeb533e 73
IanBenzMaxim 21:00c94aeb533e 74 }
IanBenzMaxim 21:00c94aeb533e 75
IanBenzMaxim 21:00c94aeb533e 76
IanBenzMaxim 21:00c94aeb533e 77
IanBenzMaxim 21:00c94aeb533e 78
IanBenzMaxim 21:00c94aeb533e 79 OneWireMaster::CmdResult DS2465::OWInitMaster()
IanBenzMaxim 21:00c94aeb533e 80 {
IanBenzMaxim 34:11fffbe98ef9 81 return detect();
IanBenzMaxim 21:00c94aeb533e 82 }
IanBenzMaxim 21:00c94aeb533e 83
IanBenzMaxim 21:00c94aeb533e 84
IanBenzMaxim 21:00c94aeb533e 85 //--------------------------------------------------------------------------
IanBenzMaxim 21:00c94aeb533e 86 // Compute Next Master Secret DS2465
IanBenzMaxim 21:00c94aeb533e 87 //
IanBenzMaxim 21:00c94aeb533e 88 // 'swap' - 1 if swapping a page into the computation
IanBenzMaxim 21:00c94aeb533e 89 // 'page' - page number to swap in
IanBenzMaxim 21:00c94aeb533e 90 // 'region' - (1) first 1/2 page, (2) second 1/2 page, (3) entire page
IanBenzMaxim 21:00c94aeb533e 91 //
IanBenzMaxim 21:00c94aeb533e 92 // Returns: true write successful
IanBenzMaxim 21:00c94aeb533e 93 // false failure to complete read
IanBenzMaxim 21:00c94aeb533e 94 //
IanBenzMaxim 33:a4c015046956 95 OneWireMaster::CmdResult DS2465::computeNextMasterSecret(bool swap, unsigned int pageNum, PageRegion region)
IanBenzMaxim 21:00c94aeb533e 96 {
IanBenzMaxim 27:d5aaefa252f1 97 std::uint8_t command[2] = { CMD_CNMS, (swap ? (0xC8 | (pageNum << 4) | region) : 0xBF) };
IanBenzMaxim 34:11fffbe98ef9 98 return writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 99 }
IanBenzMaxim 21:00c94aeb533e 100
IanBenzMaxim 21:00c94aeb533e 101 //--------------------------------------------------------------------------
IanBenzMaxim 21:00c94aeb533e 102 // Compute Write MAC DS2465
IanBenzMaxim 21:00c94aeb533e 103 //
IanBenzMaxim 21:00c94aeb533e 104 // 'regwrite' - true if writing to a register, false if regular memory
IanBenzMaxim 21:00c94aeb533e 105 // 'swap' - true if swapping a page into the computation
IanBenzMaxim 21:00c94aeb533e 106 // 'page' - page number to swap in
IanBenzMaxim 21:00c94aeb533e 107 // 'segment' - segment number if swaping
IanBenzMaxim 21:00c94aeb533e 108 //
IanBenzMaxim 21:00c94aeb533e 109 // Returns: true write successful
IanBenzMaxim 21:00c94aeb533e 110 // false failure to complete read
IanBenzMaxim 21:00c94aeb533e 111 //
IanBenzMaxim 33:a4c015046956 112 OneWireMaster::CmdResult DS2465::computeWriteMac(bool regwrite, bool swap, unsigned int pageNum, unsigned int segmentNum) const
IanBenzMaxim 21:00c94aeb533e 113 {
IanBenzMaxim 27:d5aaefa252f1 114 std::uint8_t command[2] = { CMD_CSWM, ((regwrite << 7) | (swap << 6) | (pageNum << 4) | segmentNum) };
IanBenzMaxim 34:11fffbe98ef9 115 return cWriteMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 116 }
IanBenzMaxim 21:00c94aeb533e 117
IanBenzMaxim 21:00c94aeb533e 118 //--------------------------------------------------------------------------
IanBenzMaxim 21:00c94aeb533e 119 // Compute Slave Authentication MAC DS2465
IanBenzMaxim 21:00c94aeb533e 120 //
IanBenzMaxim 21:00c94aeb533e 121 // 'swap' - true if swapping a page into the computation
IanBenzMaxim 21:00c94aeb533e 122 // 'page' - page number to swap in
IanBenzMaxim 21:00c94aeb533e 123 // 'region' - (1) first 1/2 page, (2) second 1/2 page, (3) entire page
IanBenzMaxim 21:00c94aeb533e 124 //
IanBenzMaxim 21:00c94aeb533e 125 // Returns: true write successful
IanBenzMaxim 21:00c94aeb533e 126 // false failure to complete read
IanBenzMaxim 21:00c94aeb533e 127 //
IanBenzMaxim 33:a4c015046956 128 OneWireMaster::CmdResult DS2465::computeAuthMac(bool swap, unsigned int pageNum, PageRegion region) const
IanBenzMaxim 21:00c94aeb533e 129 {
IanBenzMaxim 27:d5aaefa252f1 130 std::uint8_t command[2] = { CMD_CSAM, (swap ? (0xC8 | (pageNum << 4) | region) : 0xBF) };
IanBenzMaxim 34:11fffbe98ef9 131 return cWriteMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 132 }
IanBenzMaxim 21:00c94aeb533e 133
IanBenzMaxim 21:00c94aeb533e 134 //--------------------------------------------------------------------------
IanBenzMaxim 21:00c94aeb533e 135 // Compute S-Secret on DS2465
IanBenzMaxim 21:00c94aeb533e 136 //
IanBenzMaxim 21:00c94aeb533e 137 // 'swap' - true if swapping a page into the computation
IanBenzMaxim 21:00c94aeb533e 138 // 'page' - page number to swap in
IanBenzMaxim 21:00c94aeb533e 139 // 'region' - (1) first 1/2 page, (2) second 1/2 page, (3) entire page
IanBenzMaxim 21:00c94aeb533e 140 //
IanBenzMaxim 21:00c94aeb533e 141 // Returns: true write successful
IanBenzMaxim 21:00c94aeb533e 142 // false failure to complete read
IanBenzMaxim 21:00c94aeb533e 143 //
IanBenzMaxim 33:a4c015046956 144 OneWireMaster::CmdResult DS2465::computeSlaveSecret(bool swap, unsigned int pageNum, PageRegion region)
IanBenzMaxim 21:00c94aeb533e 145 {
IanBenzMaxim 27:d5aaefa252f1 146 std::uint8_t command[2] = { CMD_CSS, (swap ? (0xC8 | (pageNum << 4) | region) : 0xBF) };
IanBenzMaxim 34:11fffbe98ef9 147 return writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 148 }
IanBenzMaxim 21:00c94aeb533e 149
IanBenzMaxim 21:00c94aeb533e 150
IanBenzMaxim 21:00c94aeb533e 151
IanBenzMaxim 21:00c94aeb533e 152
IanBenzMaxim 33:a4c015046956 153 ISha256MacCoprocessor::CmdResult DS2465::setMasterSecret(const Secret & secret)
IanBenzMaxim 21:00c94aeb533e 154 {
IanBenzMaxim 21:00c94aeb533e 155 OneWireMaster::CmdResult result;
IanBenzMaxim 34:11fffbe98ef9 156 result = writeMemory(ADDR_SPAD, secret, secret.length);
IanBenzMaxim 21:00c94aeb533e 157 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 158 result = copyScratchpad(1, 0, 1, 0);
IanBenzMaxim 21:00c94aeb533e 159 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 160 wait_ms(8 * eepromWriteDelayMs);
IanBenzMaxim 21:00c94aeb533e 161 return (result == OneWireMaster::Success ? ISha256MacCoprocessor::Success : ISha256MacCoprocessor::OperationFailure);
IanBenzMaxim 21:00c94aeb533e 162 }
IanBenzMaxim 21:00c94aeb533e 163
IanBenzMaxim 33:a4c015046956 164 ISha256MacCoprocessor::CmdResult DS2465::computeWriteMac(const WriteMacData & writeMacData, Mac & mac) const
IanBenzMaxim 21:00c94aeb533e 165 {
IanBenzMaxim 21:00c94aeb533e 166 OneWireMaster::CmdResult result;
IanBenzMaxim 21:00c94aeb533e 167 // Write input data to scratchpad
IanBenzMaxim 34:11fffbe98ef9 168 result = writeScratchpad(writeMacData, writeMacData.length);
IanBenzMaxim 21:00c94aeb533e 169 // Compute MAC
IanBenzMaxim 21:00c94aeb533e 170 if (result == OneWireMaster::Success)
IanBenzMaxim 33:a4c015046956 171 result = computeWriteMac(false, false, 0, 0);
IanBenzMaxim 21:00c94aeb533e 172 if (result == OneWireMaster::Success)
IanBenzMaxim 21:00c94aeb533e 173 {
IanBenzMaxim 34:11fffbe98ef9 174 wait_ms(shaComputationDelayMs);
IanBenzMaxim 21:00c94aeb533e 175 // Read MAC from register
IanBenzMaxim 34:11fffbe98ef9 176 result = readMemory(ADDR_MAC_READ, mac, mac.length, true);
IanBenzMaxim 21:00c94aeb533e 177 }
IanBenzMaxim 21:00c94aeb533e 178 return (result == OneWireMaster::Success ? ISha256MacCoprocessor::Success : ISha256MacCoprocessor::OperationFailure);
IanBenzMaxim 21:00c94aeb533e 179 }
IanBenzMaxim 21:00c94aeb533e 180
IanBenzMaxim 33:a4c015046956 181 ISha256MacCoprocessor::CmdResult DS2465::computeAuthMac(const DevicePage & devicePage, const DeviceScratchpad & challenge, const AuthMacData & authMacData, Mac & mac) const
IanBenzMaxim 21:00c94aeb533e 182 {
IanBenzMaxim 21:00c94aeb533e 183 OneWireMaster::CmdResult result;
IanBenzMaxim 21:00c94aeb533e 184 int addr = ADDR_SPAD;
IanBenzMaxim 21:00c94aeb533e 185 // Write input data to scratchpad
IanBenzMaxim 34:11fffbe98ef9 186 result = cWriteMemory(addr, devicePage, devicePage.length);
IanBenzMaxim 21:00c94aeb533e 187 if (result == OneWireMaster::Success)
IanBenzMaxim 21:00c94aeb533e 188 {
IanBenzMaxim 33:a4c015046956 189 addr += devicePage.length;
IanBenzMaxim 34:11fffbe98ef9 190 result = cWriteMemory(addr, challenge, challenge.length);
IanBenzMaxim 21:00c94aeb533e 191 }
IanBenzMaxim 21:00c94aeb533e 192 if (result == OneWireMaster::Success)
IanBenzMaxim 21:00c94aeb533e 193 {
IanBenzMaxim 33:a4c015046956 194 addr += challenge.length;
IanBenzMaxim 34:11fffbe98ef9 195 result = cWriteMemory(addr, authMacData, authMacData.length);
IanBenzMaxim 21:00c94aeb533e 196 }
IanBenzMaxim 21:00c94aeb533e 197 // Compute MAC
IanBenzMaxim 21:00c94aeb533e 198 if (result == OneWireMaster::Success)
IanBenzMaxim 33:a4c015046956 199 result = computeAuthMac(false, 0, REGION_FULL_PAGE);
IanBenzMaxim 21:00c94aeb533e 200 if (result == OneWireMaster::Success)
IanBenzMaxim 21:00c94aeb533e 201 {
IanBenzMaxim 34:11fffbe98ef9 202 wait_ms(shaComputationDelayMs * 2);
IanBenzMaxim 21:00c94aeb533e 203 // Read MAC from register
IanBenzMaxim 34:11fffbe98ef9 204 result = readMemory(ADDR_MAC_READ, mac, mac.length, true);
IanBenzMaxim 21:00c94aeb533e 205 }
IanBenzMaxim 21:00c94aeb533e 206 return (result == OneWireMaster::Success ? ISha256MacCoprocessor::Success : ISha256MacCoprocessor::OperationFailure);
IanBenzMaxim 21:00c94aeb533e 207 }
IanBenzMaxim 21:00c94aeb533e 208
IanBenzMaxim 33:a4c015046956 209 ISha256MacCoprocessor::CmdResult DS2465::computeSlaveSecret(const DevicePage & devicePage, const DeviceScratchpad & deviceScratchpad, const SlaveSecretData & slaveSecretData)
IanBenzMaxim 21:00c94aeb533e 210 {
IanBenzMaxim 21:00c94aeb533e 211 OneWireMaster::CmdResult result;
IanBenzMaxim 21:00c94aeb533e 212 int addr = ADDR_SPAD;
IanBenzMaxim 21:00c94aeb533e 213 // Write input data to scratchpad
IanBenzMaxim 34:11fffbe98ef9 214 result = writeMemory(addr, devicePage, devicePage.length);
IanBenzMaxim 21:00c94aeb533e 215 if (result == OneWireMaster::Success)
IanBenzMaxim 21:00c94aeb533e 216 {
IanBenzMaxim 33:a4c015046956 217 addr += devicePage.length;
IanBenzMaxim 34:11fffbe98ef9 218 result = writeMemory(addr, deviceScratchpad, deviceScratchpad.length);
IanBenzMaxim 21:00c94aeb533e 219 }
IanBenzMaxim 21:00c94aeb533e 220 if (result == OneWireMaster::Success)
IanBenzMaxim 21:00c94aeb533e 221 {
IanBenzMaxim 33:a4c015046956 222 addr += deviceScratchpad.length;
IanBenzMaxim 34:11fffbe98ef9 223 result = writeMemory(addr, slaveSecretData, slaveSecretData.length);
IanBenzMaxim 21:00c94aeb533e 224 }
IanBenzMaxim 21:00c94aeb533e 225 // Compute secret
IanBenzMaxim 21:00c94aeb533e 226 if (result == OneWireMaster::Success)
IanBenzMaxim 33:a4c015046956 227 result = computeSlaveSecret(false, 0, REGION_FULL_PAGE);
IanBenzMaxim 21:00c94aeb533e 228 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 229 wait_ms(shaComputationDelayMs * 2);
IanBenzMaxim 21:00c94aeb533e 230 return (result == OneWireMaster::Success ? ISha256MacCoprocessor::Success : ISha256MacCoprocessor::OperationFailure);
IanBenzMaxim 21:00c94aeb533e 231 }
IanBenzMaxim 21:00c94aeb533e 232
IanBenzMaxim 21:00c94aeb533e 233 //--------------------------------------------------------------------------
IanBenzMaxim 21:00c94aeb533e 234 // Copy Scratchpad on DS2465 to either secret or memory page
IanBenzMaxim 21:00c94aeb533e 235 //
IanBenzMaxim 34:11fffbe98ef9 236 // 'destSecret' - 1 if destination is secret, 0 if memory page
IanBenzMaxim 34:11fffbe98ef9 237 // 'page' - page number if destSecret=0
IanBenzMaxim 21:00c94aeb533e 238 // 'notfull' - 0 if only 4 byte segment, 1 if writing to full page,
IanBenzMaxim 21:00c94aeb533e 239 // 'seg' - Segment number if full=0.
IanBenzMaxim 21:00c94aeb533e 240 //
IanBenzMaxim 21:00c94aeb533e 241 // Returns: true write successful
IanBenzMaxim 21:00c94aeb533e 242 // false failure to complete read
IanBenzMaxim 21:00c94aeb533e 243 //
IanBenzMaxim 34:11fffbe98ef9 244 OneWireMaster::CmdResult DS2465::copyScratchpad(bool destSecret, unsigned int pageNum, bool notFull, unsigned int segmentNum)
IanBenzMaxim 21:00c94aeb533e 245 {
IanBenzMaxim 34:11fffbe98ef9 246 std::uint8_t command[2] = { CMD_CPS, (destSecret ? 0 : (0x80 | (pageNum << 4) | (notFull << 3) | segmentNum)) };
IanBenzMaxim 34:11fffbe98ef9 247 return writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 248 }
IanBenzMaxim 21:00c94aeb533e 249
IanBenzMaxim 26:a361e3f42ba5 250
IanBenzMaxim 21:00c94aeb533e 251
IanBenzMaxim 26:a361e3f42ba5 252
IanBenzMaxim 34:11fffbe98ef9 253 OneWireMaster::CmdResult DS2465::configureLevel(OWLevel level)
IanBenzMaxim 26:a361e3f42ba5 254 {
IanBenzMaxim 26:a361e3f42ba5 255 OneWireMaster::CmdResult result;
IanBenzMaxim 32:bce180b544ed 256 if (m_curConfig.cSPU != (level == LEVEL_STRONG))
IanBenzMaxim 26:a361e3f42ba5 257 {
IanBenzMaxim 32:bce180b544ed 258 m_curConfig.cSPU = (level == LEVEL_STRONG);
IanBenzMaxim 34:11fffbe98ef9 259 result = writeConfig(m_curConfig, true);
IanBenzMaxim 21:00c94aeb533e 260 }
IanBenzMaxim 26:a361e3f42ba5 261 else
IanBenzMaxim 26:a361e3f42ba5 262 {
IanBenzMaxim 26:a361e3f42ba5 263 result = OneWireMaster::Success;
IanBenzMaxim 26:a361e3f42ba5 264 }
IanBenzMaxim 21:00c94aeb533e 265 return result;
IanBenzMaxim 21:00c94aeb533e 266 }
IanBenzMaxim 21:00c94aeb533e 267
IanBenzMaxim 21:00c94aeb533e 268 //--------------------------------------------------------------------------
IanBenzMaxim 21:00c94aeb533e 269 // Set the 1-Wire Net line level pull-up to normal. The DS2465 does only
IanBenzMaxim 21:00c94aeb533e 270 // allows enabling strong pull-up on a bit or byte event. Consequently this
IanBenzMaxim 21:00c94aeb533e 271 // function only allows the MODE_STANDARD argument. To enable strong pull-up
IanBenzMaxim 21:00c94aeb533e 272 // use OWWriteBytePower or OWReadBitPower.
IanBenzMaxim 21:00c94aeb533e 273 //
IanBenzMaxim 21:00c94aeb533e 274 // 'new_level' - new level defined as
IanBenzMaxim 21:00c94aeb533e 275 // MODE_STANDARD 0x00
IanBenzMaxim 21:00c94aeb533e 276 //
IanBenzMaxim 21:00c94aeb533e 277 // Returns: current 1-Wire Net level
IanBenzMaxim 21:00c94aeb533e 278 //
IanBenzMaxim 32:bce180b544ed 279 OneWireMaster::CmdResult DS2465::OWSetLevel(OWLevel new_level)
IanBenzMaxim 21:00c94aeb533e 280 {
IanBenzMaxim 32:bce180b544ed 281 if (new_level == LEVEL_STRONG)
IanBenzMaxim 27:d5aaefa252f1 282 return OneWireMaster::OperationFailure;
IanBenzMaxim 27:d5aaefa252f1 283
IanBenzMaxim 34:11fffbe98ef9 284 return configureLevel(new_level);
IanBenzMaxim 21:00c94aeb533e 285 }
IanBenzMaxim 21:00c94aeb533e 286
IanBenzMaxim 21:00c94aeb533e 287 //--------------------------------------------------------------------------
IanBenzMaxim 21:00c94aeb533e 288 // Set the 1-Wire Net communication speed.
IanBenzMaxim 21:00c94aeb533e 289 //
IanBenzMaxim 21:00c94aeb533e 290 // 'new_speed' - new speed defined as
IanBenzMaxim 21:00c94aeb533e 291 // MODE_STANDARD 0x00
IanBenzMaxim 21:00c94aeb533e 292 // MODE_OVERDRIVE 0x01
IanBenzMaxim 21:00c94aeb533e 293 //
IanBenzMaxim 21:00c94aeb533e 294 // Returns: current 1-Wire Net speed
IanBenzMaxim 21:00c94aeb533e 295 //
IanBenzMaxim 32:bce180b544ed 296 OneWireMaster::CmdResult DS2465::OWSetSpeed(OWSpeed new_speed)
IanBenzMaxim 21:00c94aeb533e 297 {
IanBenzMaxim 27:d5aaefa252f1 298 // Requested speed is already set
IanBenzMaxim 27:d5aaefa252f1 299 if (m_curConfig.c1WS == (new_speed == SPEED_OVERDRIVE))
IanBenzMaxim 27:d5aaefa252f1 300 return OneWireMaster::Success;
IanBenzMaxim 27:d5aaefa252f1 301
IanBenzMaxim 27:d5aaefa252f1 302 // set the speed
IanBenzMaxim 27:d5aaefa252f1 303 m_curConfig.c1WS = (new_speed == SPEED_OVERDRIVE);
IanBenzMaxim 21:00c94aeb533e 304
IanBenzMaxim 27:d5aaefa252f1 305 // write the new config
IanBenzMaxim 34:11fffbe98ef9 306 return writeConfig(m_curConfig, true);
IanBenzMaxim 21:00c94aeb533e 307 }
IanBenzMaxim 21:00c94aeb533e 308
IanBenzMaxim 21:00c94aeb533e 309 //--------------------------------------------------------------------------
IanBenzMaxim 21:00c94aeb533e 310 // Use the DS2465 help command '1-Wire triplet' to perform one bit of a 1-Wire
IanBenzMaxim 21:00c94aeb533e 311 // search. This command does two read bits and one write bit. The write bit
IanBenzMaxim 21:00c94aeb533e 312 // is either the default direction (all device have same bit) or in case of
IanBenzMaxim 21:00c94aeb533e 313 // a discripancy, the 'search_direction' parameter is used.
IanBenzMaxim 21:00c94aeb533e 314 //
j3 22:686273e55cdc 315 // Returns � The DS2465 status byte result from the triplet command
IanBenzMaxim 21:00c94aeb533e 316 //
IanBenzMaxim 32:bce180b544ed 317 OneWireMaster::CmdResult DS2465::OWTriplet(SearchDirection & search_direction, std::uint8_t & sbr, std::uint8_t & tsb)
IanBenzMaxim 21:00c94aeb533e 318 {
IanBenzMaxim 21:00c94aeb533e 319 // 1-Wire Triplet (Case B)
IanBenzMaxim 21:00c94aeb533e 320 // S AD,0 [A] 1WT [A] SS [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 21:00c94aeb533e 321 // \--------/
IanBenzMaxim 21:00c94aeb533e 322 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 21:00c94aeb533e 323 // [] indicates from slave
IanBenzMaxim 21:00c94aeb533e 324 // SS indicates byte containing search direction bit value in msbit
IanBenzMaxim 24:8942d8478d68 325
IanBenzMaxim 24:8942d8478d68 326 OneWireMaster::CmdResult result;
IanBenzMaxim 27:d5aaefa252f1 327 std::uint8_t command[2] = { CMD_1WT, ((search_direction == DIRECTION_WRITE_ONE) ? 0x80 : 0x00) };
IanBenzMaxim 34:11fffbe98ef9 328 result = writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 24:8942d8478d68 329 if (result == OneWireMaster::Success)
IanBenzMaxim 32:bce180b544ed 330 {
IanBenzMaxim 32:bce180b544ed 331 std::uint8_t status;
IanBenzMaxim 34:11fffbe98ef9 332 result = pollBusy(&status);
IanBenzMaxim 32:bce180b544ed 333 if (result == OneWireMaster::Success)
IanBenzMaxim 32:bce180b544ed 334 {
IanBenzMaxim 32:bce180b544ed 335 // check bit results in status byte
IanBenzMaxim 32:bce180b544ed 336 sbr = ((status & STATUS_SBR) == STATUS_SBR);
IanBenzMaxim 32:bce180b544ed 337 tsb = ((status & STATUS_TSB) == STATUS_TSB);
IanBenzMaxim 32:bce180b544ed 338 search_direction = ((status & STATUS_DIR) == STATUS_DIR) ? DIRECTION_WRITE_ONE : DIRECTION_WRITE_ZERO;
IanBenzMaxim 32:bce180b544ed 339 }
IanBenzMaxim 32:bce180b544ed 340 }
IanBenzMaxim 24:8942d8478d68 341 return result;
IanBenzMaxim 21:00c94aeb533e 342 }
IanBenzMaxim 21:00c94aeb533e 343
IanBenzMaxim 21:00c94aeb533e 344 //--------------------------------------------------------------------------
IanBenzMaxim 21:00c94aeb533e 345 // The 'OWReadBlock' receives a block of data from the
IanBenzMaxim 21:00c94aeb533e 346 // 1-Wire Net. The destination is the mac buffer (rx_mac=1) or
IanBenzMaxim 21:00c94aeb533e 347 // the scratchpad (rx_mac=0). The result is buffer is returned.
IanBenzMaxim 21:00c94aeb533e 348 //
IanBenzMaxim 21:00c94aeb533e 349 // 'rx_buf' - pointer to a block to receive bytes
IanBenzMaxim 21:00c94aeb533e 350 // of length 'rx_len' from 1-Wire Net
IanBenzMaxim 21:00c94aeb533e 351 // 'rx_len' - length in bytes to read. Only valid numbers are 8,16,20,32;
IanBenzMaxim 21:00c94aeb533e 352 //
IanBenzMaxim 27:d5aaefa252f1 353 OneWireMaster::CmdResult DS2465::OWReadBlock(std::uint8_t *rx_buf, std::uint8_t rx_len)
IanBenzMaxim 21:00c94aeb533e 354 {
IanBenzMaxim 21:00c94aeb533e 355 // 1-Wire Receive Block (Case A)
IanBenzMaxim 21:00c94aeb533e 356 // S AD,0 [A] ADDR_CMD_REG [A] 1WRF [A] PR [A] P
IanBenzMaxim 21:00c94aeb533e 357 // [] indicates from slave
IanBenzMaxim 21:00c94aeb533e 358 // PR indicates byte containing parameter
IanBenzMaxim 21:00c94aeb533e 359
IanBenzMaxim 24:8942d8478d68 360 OneWireMaster::CmdResult result;
IanBenzMaxim 27:d5aaefa252f1 361 std::uint8_t command[2] = { CMD_1WRF, rx_len };
IanBenzMaxim 24:8942d8478d68 362
IanBenzMaxim 34:11fffbe98ef9 363 result = writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 24:8942d8478d68 364 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 365 result = pollBusy();
IanBenzMaxim 24:8942d8478d68 366 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 367 result = readMemory(ADDR_SPAD, rx_buf, rx_len, false);
IanBenzMaxim 21:00c94aeb533e 368
IanBenzMaxim 24:8942d8478d68 369 return result;
IanBenzMaxim 21:00c94aeb533e 370 }
IanBenzMaxim 21:00c94aeb533e 371
IanBenzMaxim 21:00c94aeb533e 372
IanBenzMaxim 21:00c94aeb533e 373
IanBenzMaxim 21:00c94aeb533e 374
IanBenzMaxim 27:d5aaefa252f1 375 OneWireMaster::CmdResult DS2465::OWWriteBlock(const std::uint8_t *tran_buf, std::uint8_t tran_len)
IanBenzMaxim 21:00c94aeb533e 376 {
IanBenzMaxim 21:00c94aeb533e 377 return OWWriteBlock(false, tran_buf, tran_len);
IanBenzMaxim 21:00c94aeb533e 378 }
IanBenzMaxim 21:00c94aeb533e 379
IanBenzMaxim 21:00c94aeb533e 380 //--------------------------------------------------------------------------
IanBenzMaxim 21:00c94aeb533e 381 // The 'OWWriteBlock' transfers a block of data to the
IanBenzMaxim 21:00c94aeb533e 382 // 1-Wire Net. The mac buffer can be sent (tx_mac=1) or a
IanBenzMaxim 21:00c94aeb533e 383 // portion of the scratchpad can be sent.
IanBenzMaxim 21:00c94aeb533e 384 //
IanBenzMaxim 21:00c94aeb533e 385 // 'tx_mac' - flag to indicate if the MAC buffer is to be sent (1) or
IanBenzMaxim 21:00c94aeb533e 386 // the data provided in teh tran_buf is to be sent (0)
IanBenzMaxim 21:00c94aeb533e 387 // 'tran_buf' - pointer to a block of bytes
IanBenzMaxim 21:00c94aeb533e 388 // of length 'tran_len' that will be sent
IanBenzMaxim 21:00c94aeb533e 389 // to the 1-Wire Net
IanBenzMaxim 21:00c94aeb533e 390 // 'tran_len' - length in bytes to transfer. Only valid numbers are 8,16,20,32;
IanBenzMaxim 21:00c94aeb533e 391 //
IanBenzMaxim 27:d5aaefa252f1 392 OneWireMaster::CmdResult DS2465::OWWriteBlock(bool tx_mac, const std::uint8_t *tran_buf, std::uint8_t tran_len)
IanBenzMaxim 21:00c94aeb533e 393 {
IanBenzMaxim 21:00c94aeb533e 394 OneWireMaster::CmdResult result;
IanBenzMaxim 27:d5aaefa252f1 395 std::uint8_t command[2] = { CMD_1WTB, (tx_mac ? 0xFF : tran_len) };
IanBenzMaxim 21:00c94aeb533e 396
IanBenzMaxim 24:8942d8478d68 397 if (!tx_mac)
IanBenzMaxim 21:00c94aeb533e 398 {
IanBenzMaxim 21:00c94aeb533e 399 // prefill scratchpad with required data
IanBenzMaxim 34:11fffbe98ef9 400 result = writeMemory(ADDR_SPAD, tran_buf, tran_len);
IanBenzMaxim 21:00c94aeb533e 401 if (result != OneWireMaster::Success)
IanBenzMaxim 21:00c94aeb533e 402 return result;
IanBenzMaxim 21:00c94aeb533e 403 }
IanBenzMaxim 21:00c94aeb533e 404
IanBenzMaxim 21:00c94aeb533e 405 // 1-Wire Transmit Block (Case A)
IanBenzMaxim 21:00c94aeb533e 406 // S AD,0 [A] ADDR_CMD_REG [A] 1WTB [A] PR [A] P
IanBenzMaxim 21:00c94aeb533e 407 // [] indicates from slave
IanBenzMaxim 21:00c94aeb533e 408 // PR indicates byte containing parameter
IanBenzMaxim 24:8942d8478d68 409
IanBenzMaxim 34:11fffbe98ef9 410 result = writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 24:8942d8478d68 411
IanBenzMaxim 24:8942d8478d68 412 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 413 result = pollBusy();
IanBenzMaxim 21:00c94aeb533e 414
IanBenzMaxim 24:8942d8478d68 415 return result;
IanBenzMaxim 21:00c94aeb533e 416 }
IanBenzMaxim 21:00c94aeb533e 417
IanBenzMaxim 21:00c94aeb533e 418 //--------------------------------------------------------------------------
IanBenzMaxim 21:00c94aeb533e 419 // Send 8 bits of read communication to the 1-Wire Net and return the
IanBenzMaxim 21:00c94aeb533e 420 // result 8 bits read from the 1-Wire Net.
IanBenzMaxim 21:00c94aeb533e 421 //
IanBenzMaxim 21:00c94aeb533e 422 // Returns: 8 bits read from 1-Wire Net
IanBenzMaxim 21:00c94aeb533e 423 //
IanBenzMaxim 32:bce180b544ed 424 OneWireMaster::CmdResult DS2465::OWReadByte(std::uint8_t & recvbyte, OWLevel after_level)
IanBenzMaxim 21:00c94aeb533e 425 {
IanBenzMaxim 24:8942d8478d68 426 OneWireMaster::CmdResult result;
IanBenzMaxim 27:d5aaefa252f1 427 std::uint8_t buf;
IanBenzMaxim 21:00c94aeb533e 428
IanBenzMaxim 24:8942d8478d68 429 // 1-Wire Read Bytes (Case C)
IanBenzMaxim 24:8942d8478d68 430 // S AD,0 [A] ADDR_CMD_REG [A] 1WRB [A] Sr AD,1 [A] [Status] A [Status] A
IanBenzMaxim 24:8942d8478d68 431 // \--------/
IanBenzMaxim 24:8942d8478d68 432 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 24:8942d8478d68 433 // Sr AD,0 [A] SRP [A] E1 [A] Sr AD,1 [A] DD A\ P
IanBenzMaxim 24:8942d8478d68 434 //
IanBenzMaxim 24:8942d8478d68 435 // [] indicates from slave
IanBenzMaxim 24:8942d8478d68 436 // DD data read
IanBenzMaxim 26:a361e3f42ba5 437
IanBenzMaxim 34:11fffbe98ef9 438 result = configureLevel(after_level);
IanBenzMaxim 26:a361e3f42ba5 439 if (result != OneWireMaster::Success)
IanBenzMaxim 26:a361e3f42ba5 440 return result;
IanBenzMaxim 24:8942d8478d68 441
IanBenzMaxim 24:8942d8478d68 442 buf = CMD_1WRB;
IanBenzMaxim 34:11fffbe98ef9 443 result = writeMemory(ADDR_CMD_REG, &buf, 1);
IanBenzMaxim 21:00c94aeb533e 444
IanBenzMaxim 24:8942d8478d68 445 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 446 result = pollBusy();
IanBenzMaxim 24:8942d8478d68 447
IanBenzMaxim 24:8942d8478d68 448 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 449 result = readMemory(ADDR_DATA_REG, &buf, 1);
IanBenzMaxim 21:00c94aeb533e 450
IanBenzMaxim 24:8942d8478d68 451 if (result == OneWireMaster::Success)
IanBenzMaxim 24:8942d8478d68 452 recvbyte = buf;
IanBenzMaxim 21:00c94aeb533e 453
IanBenzMaxim 24:8942d8478d68 454 return result;
IanBenzMaxim 21:00c94aeb533e 455 }
IanBenzMaxim 21:00c94aeb533e 456
IanBenzMaxim 21:00c94aeb533e 457 //--------------------------------------------------------------------------
IanBenzMaxim 21:00c94aeb533e 458 // Send 8 bits of communication to the 1-Wire Net and verify that the
IanBenzMaxim 21:00c94aeb533e 459 // 8 bits read from the 1-Wire Net is the same (write operation).
IanBenzMaxim 21:00c94aeb533e 460 // The parameter 'sendbyte' least significant 8 bits are used.
IanBenzMaxim 21:00c94aeb533e 461 //
IanBenzMaxim 21:00c94aeb533e 462 // 'sendbyte' - 8 bits to send (least significant byte)
IanBenzMaxim 21:00c94aeb533e 463 //
IanBenzMaxim 21:00c94aeb533e 464 // Returns: true: bytes written and echo was the same
IanBenzMaxim 21:00c94aeb533e 465 // false: echo was not the same
IanBenzMaxim 21:00c94aeb533e 466 //
IanBenzMaxim 32:bce180b544ed 467 OneWireMaster::CmdResult DS2465::OWWriteByte(std::uint8_t sendbyte, OWLevel after_level)
IanBenzMaxim 24:8942d8478d68 468 {
IanBenzMaxim 21:00c94aeb533e 469 // 1-Wire Write Byte (Case B)
IanBenzMaxim 21:00c94aeb533e 470 // S AD,0 [A] ADDR_CMD_REG [A] 1WWB [A] DD [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 21:00c94aeb533e 471 // \--------/
IanBenzMaxim 21:00c94aeb533e 472 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 21:00c94aeb533e 473 // [] indicates from slave
IanBenzMaxim 21:00c94aeb533e 474 // DD data to write
IanBenzMaxim 24:8942d8478d68 475
IanBenzMaxim 24:8942d8478d68 476 OneWireMaster::CmdResult result;
IanBenzMaxim 26:a361e3f42ba5 477
IanBenzMaxim 34:11fffbe98ef9 478 result = configureLevel(after_level);
IanBenzMaxim 26:a361e3f42ba5 479 if (result != OneWireMaster::Success)
IanBenzMaxim 26:a361e3f42ba5 480 return result;
IanBenzMaxim 26:a361e3f42ba5 481
IanBenzMaxim 27:d5aaefa252f1 482 std::uint8_t command[2] = { CMD_1WWB, sendbyte };
IanBenzMaxim 24:8942d8478d68 483
IanBenzMaxim 34:11fffbe98ef9 484 result = writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 24:8942d8478d68 485 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 486 result = pollBusy();
IanBenzMaxim 21:00c94aeb533e 487
IanBenzMaxim 24:8942d8478d68 488 return result;
IanBenzMaxim 21:00c94aeb533e 489 }
IanBenzMaxim 21:00c94aeb533e 490
IanBenzMaxim 21:00c94aeb533e 491 //--------------------------------------------------------------------------
IanBenzMaxim 21:00c94aeb533e 492 // Send 1 bit of communication to the 1-Wire Net and return the
IanBenzMaxim 21:00c94aeb533e 493 // result 1 bit read from the 1-Wire Net. The parameter 'sendbit'
IanBenzMaxim 21:00c94aeb533e 494 // least significant bit is used and the least significant bit
IanBenzMaxim 21:00c94aeb533e 495 // of the result is the return bit.
IanBenzMaxim 21:00c94aeb533e 496 //
IanBenzMaxim 21:00c94aeb533e 497 // 'sendbit' - the least significant bit is the bit to send
IanBenzMaxim 21:00c94aeb533e 498 //
IanBenzMaxim 21:00c94aeb533e 499 // Returns: 0: 0 bit read from sendbit
IanBenzMaxim 21:00c94aeb533e 500 // 1: 1 bit read from sendbit
IanBenzMaxim 21:00c94aeb533e 501 //
IanBenzMaxim 32:bce180b544ed 502 OneWireMaster::CmdResult DS2465::OWTouchBit(std::uint8_t & sendrecvbit, OWLevel after_level)
IanBenzMaxim 21:00c94aeb533e 503 {
IanBenzMaxim 21:00c94aeb533e 504 // 1-Wire bit (Case B)
IanBenzMaxim 21:00c94aeb533e 505 // S AD,0 [A] ADDR_CMD_REG [A] 1WSB [A] BB [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 21:00c94aeb533e 506 // \--------/
IanBenzMaxim 21:00c94aeb533e 507 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 21:00c94aeb533e 508 // [] indicates from slave
IanBenzMaxim 21:00c94aeb533e 509 // BB indicates byte containing bit value in msbit
IanBenzMaxim 21:00c94aeb533e 510
IanBenzMaxim 24:8942d8478d68 511 OneWireMaster::CmdResult result;
IanBenzMaxim 26:a361e3f42ba5 512
IanBenzMaxim 34:11fffbe98ef9 513 result = configureLevel(after_level);
IanBenzMaxim 26:a361e3f42ba5 514 if (result != OneWireMaster::Success)
IanBenzMaxim 26:a361e3f42ba5 515 return result;
IanBenzMaxim 26:a361e3f42ba5 516
IanBenzMaxim 27:d5aaefa252f1 517 std::uint8_t command[2] = { CMD_1WSB, (sendrecvbit ? 0x80 : 0x00) };
IanBenzMaxim 27:d5aaefa252f1 518 std::uint8_t status;
IanBenzMaxim 24:8942d8478d68 519
IanBenzMaxim 34:11fffbe98ef9 520 result = writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 521
IanBenzMaxim 24:8942d8478d68 522 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 523 result = pollBusy(&status);
IanBenzMaxim 21:00c94aeb533e 524
IanBenzMaxim 24:8942d8478d68 525 if (result == OneWireMaster::Success)
IanBenzMaxim 24:8942d8478d68 526 sendrecvbit = (status & STATUS_SBR);
IanBenzMaxim 24:8942d8478d68 527
IanBenzMaxim 24:8942d8478d68 528 return result;
IanBenzMaxim 21:00c94aeb533e 529 }
IanBenzMaxim 21:00c94aeb533e 530
IanBenzMaxim 21:00c94aeb533e 531 //--------------------------------------------------------------------------
IanBenzMaxim 21:00c94aeb533e 532 // Write to Scratchpad (SRAM) memory on the DS2465
IanBenzMaxim 21:00c94aeb533e 533 //
IanBenzMaxim 21:00c94aeb533e 534 // 'addr' - address to start writing (must be in SRAM)
IanBenzMaxim 21:00c94aeb533e 535 // 'buf' - buffer of data to write
IanBenzMaxim 21:00c94aeb533e 536 // 'len' - length to write
IanBenzMaxim 21:00c94aeb533e 537 //
IanBenzMaxim 21:00c94aeb533e 538 // Returns: true write successful
IanBenzMaxim 21:00c94aeb533e 539 // false failure to complete write
IanBenzMaxim 21:00c94aeb533e 540 //
IanBenzMaxim 34:11fffbe98ef9 541 OneWireMaster::CmdResult DS2465::cWriteMemory(std::uint8_t addr, const std::uint8_t * buf, std::size_t bufLen) const
IanBenzMaxim 21:00c94aeb533e 542 {
IanBenzMaxim 21:00c94aeb533e 543 int i;
IanBenzMaxim 21:00c94aeb533e 544
IanBenzMaxim 21:00c94aeb533e 545 // Write SRAM (Case A)
IanBenzMaxim 21:00c94aeb533e 546 // S AD,0 [A] VSA [A] DD [A] P
IanBenzMaxim 21:00c94aeb533e 547 // \-----/
IanBenzMaxim 21:00c94aeb533e 548 // Repeat for each data byte
IanBenzMaxim 21:00c94aeb533e 549 // [] indicates from slave
IanBenzMaxim 21:00c94aeb533e 550 // VSA valid SRAM memory address
IanBenzMaxim 21:00c94aeb533e 551 // DD memory data to write
IanBenzMaxim 21:00c94aeb533e 552
IanBenzMaxim 21:00c94aeb533e 553 m_I2C_interface.start();
IanBenzMaxim 32:bce180b544ed 554 if (m_I2C_interface.write((m_I2C_address | I2C_WRITE)) != I2C_WRITE_OK)
IanBenzMaxim 21:00c94aeb533e 555 {
IanBenzMaxim 21:00c94aeb533e 556 m_I2C_interface.stop();
IanBenzMaxim 21:00c94aeb533e 557 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 21:00c94aeb533e 558 }
IanBenzMaxim 32:bce180b544ed 559 if (m_I2C_interface.write(addr) != I2C_WRITE_OK)
IanBenzMaxim 21:00c94aeb533e 560 {
IanBenzMaxim 21:00c94aeb533e 561 m_I2C_interface.stop();
IanBenzMaxim 21:00c94aeb533e 562 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 21:00c94aeb533e 563 }
IanBenzMaxim 21:00c94aeb533e 564 // loop to write each byte
IanBenzMaxim 21:00c94aeb533e 565 for (i = 0; i < bufLen; i++)
IanBenzMaxim 21:00c94aeb533e 566 {
IanBenzMaxim 21:00c94aeb533e 567 if (m_I2C_interface.write(buf[i]) != I2C_WRITE_OK)
IanBenzMaxim 21:00c94aeb533e 568 {
IanBenzMaxim 21:00c94aeb533e 569 m_I2C_interface.stop();
IanBenzMaxim 21:00c94aeb533e 570 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 21:00c94aeb533e 571 }
IanBenzMaxim 21:00c94aeb533e 572 }
IanBenzMaxim 21:00c94aeb533e 573 m_I2C_interface.stop();
IanBenzMaxim 21:00c94aeb533e 574
IanBenzMaxim 21:00c94aeb533e 575 return OneWireMaster::Success;
IanBenzMaxim 21:00c94aeb533e 576 }
IanBenzMaxim 21:00c94aeb533e 577
IanBenzMaxim 21:00c94aeb533e 578 //--------------------------------------------------------------------------
IanBenzMaxim 21:00c94aeb533e 579 // Read memory from the DS2465
IanBenzMaxim 21:00c94aeb533e 580 //
IanBenzMaxim 21:00c94aeb533e 581 // 'addr' - address to start reading
IanBenzMaxim 21:00c94aeb533e 582 // 'buf' - buffer to hold memory read
IanBenzMaxim 21:00c94aeb533e 583 // 'len' - length to read
IanBenzMaxim 34:11fffbe98ef9 584 // 'skipSetPointer' - flag to indicate to skip setting address pointer
IanBenzMaxim 21:00c94aeb533e 585 //
IanBenzMaxim 21:00c94aeb533e 586 // Returns: true read successful
IanBenzMaxim 21:00c94aeb533e 587 // false failure to complete read
IanBenzMaxim 21:00c94aeb533e 588 //
IanBenzMaxim 34:11fffbe98ef9 589 OneWireMaster::CmdResult DS2465::readMemory(std::uint8_t addr, std::uint8_t * buf, std::size_t bufLen, bool skipSetPointer) const
IanBenzMaxim 21:00c94aeb533e 590 {
IanBenzMaxim 21:00c94aeb533e 591 int i;
IanBenzMaxim 21:00c94aeb533e 592
IanBenzMaxim 21:00c94aeb533e 593 // Read (Case A)
IanBenzMaxim 21:00c94aeb533e 594 // S AD,0 [A] MA [A] Sr AD,1 [A] [DD] A [DD] A\ P
IanBenzMaxim 21:00c94aeb533e 595 // \-----/
IanBenzMaxim 21:00c94aeb533e 596 // Repeat for each data byte, NAK last byte
IanBenzMaxim 21:00c94aeb533e 597 // [] indicates from slave
IanBenzMaxim 21:00c94aeb533e 598 // MA memory address
IanBenzMaxim 21:00c94aeb533e 599 // DD memory data read
IanBenzMaxim 21:00c94aeb533e 600
IanBenzMaxim 21:00c94aeb533e 601 m_I2C_interface.start();
IanBenzMaxim 34:11fffbe98ef9 602 if (!skipSetPointer)
IanBenzMaxim 21:00c94aeb533e 603 {
IanBenzMaxim 32:bce180b544ed 604 if (m_I2C_interface.write((m_I2C_address | I2C_WRITE)) != I2C_WRITE_OK)
IanBenzMaxim 21:00c94aeb533e 605 {
IanBenzMaxim 21:00c94aeb533e 606 m_I2C_interface.stop();
IanBenzMaxim 21:00c94aeb533e 607 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 21:00c94aeb533e 608 }
IanBenzMaxim 32:bce180b544ed 609 if (m_I2C_interface.write(addr) != I2C_WRITE_OK)
IanBenzMaxim 21:00c94aeb533e 610 {
IanBenzMaxim 21:00c94aeb533e 611 m_I2C_interface.stop();
IanBenzMaxim 21:00c94aeb533e 612 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 21:00c94aeb533e 613 }
IanBenzMaxim 21:00c94aeb533e 614 m_I2C_interface.start();
IanBenzMaxim 21:00c94aeb533e 615 }
IanBenzMaxim 21:00c94aeb533e 616
IanBenzMaxim 32:bce180b544ed 617 if (m_I2C_interface.write((m_I2C_address | I2C_READ)) != I2C_WRITE_OK)
IanBenzMaxim 21:00c94aeb533e 618 {
IanBenzMaxim 21:00c94aeb533e 619 m_I2C_interface.stop();
IanBenzMaxim 21:00c94aeb533e 620 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 21:00c94aeb533e 621 }
IanBenzMaxim 21:00c94aeb533e 622 // loop to read each byte, NAK last byte
IanBenzMaxim 21:00c94aeb533e 623 for (i = 0; i < bufLen; i++)
IanBenzMaxim 21:00c94aeb533e 624 {
IanBenzMaxim 21:00c94aeb533e 625 buf[i] = m_I2C_interface.read((i == (bufLen - 1)) ? m_I2C_interface.NoACK : m_I2C_interface.ACK);
IanBenzMaxim 21:00c94aeb533e 626 }
IanBenzMaxim 21:00c94aeb533e 627 m_I2C_interface.stop();
IanBenzMaxim 21:00c94aeb533e 628
IanBenzMaxim 21:00c94aeb533e 629 return OneWireMaster::Success;
IanBenzMaxim 21:00c94aeb533e 630 }
IanBenzMaxim 21:00c94aeb533e 631
IanBenzMaxim 21:00c94aeb533e 632 //--------------------------------------------------------------------------
IanBenzMaxim 21:00c94aeb533e 633 // Write the configuration register in the DS2465. The configuration
IanBenzMaxim 21:00c94aeb533e 634 // options are provided in the lower nibble of the provided config byte.
IanBenzMaxim 21:00c94aeb533e 635 // The uppper nibble in bitwise inverted when written to the DS2465.
IanBenzMaxim 21:00c94aeb533e 636 //
IanBenzMaxim 21:00c94aeb533e 637 // Returns: true: config written and response correct
IanBenzMaxim 21:00c94aeb533e 638 // false: response incorrect
IanBenzMaxim 21:00c94aeb533e 639 //
IanBenzMaxim 34:11fffbe98ef9 640 OneWireMaster::CmdResult DS2465::writeConfig(const Config & config, bool verify)
IanBenzMaxim 21:00c94aeb533e 641 {
IanBenzMaxim 24:8942d8478d68 642 std::uint8_t configBuf;
IanBenzMaxim 24:8942d8478d68 643 OneWireMaster::CmdResult result;
IanBenzMaxim 21:00c94aeb533e 644
IanBenzMaxim 24:8942d8478d68 645 configBuf = config.writeByte();
IanBenzMaxim 34:11fffbe98ef9 646 result = writeMemory(ADDR_WCFG_REG, &configBuf, 1);
IanBenzMaxim 34:11fffbe98ef9 647 if (verify)
IanBenzMaxim 21:00c94aeb533e 648 {
IanBenzMaxim 34:11fffbe98ef9 649 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 650 {
IanBenzMaxim 34:11fffbe98ef9 651 result = readMemory(ADDR_WCFG_REG, &configBuf, 1);
IanBenzMaxim 34:11fffbe98ef9 652 }
IanBenzMaxim 34:11fffbe98ef9 653 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 654 {
IanBenzMaxim 24:8942d8478d68 655 if (configBuf != config.readByte())
IanBenzMaxim 34:11fffbe98ef9 656 result = OneWireMaster::OperationFailure;
IanBenzMaxim 34:11fffbe98ef9 657 }
IanBenzMaxim 21:00c94aeb533e 658 }
IanBenzMaxim 21:00c94aeb533e 659
IanBenzMaxim 24:8942d8478d68 660 return result;
IanBenzMaxim 24:8942d8478d68 661 }
IanBenzMaxim 24:8942d8478d68 662
IanBenzMaxim 24:8942d8478d68 663
IanBenzMaxim 24:8942d8478d68 664
IanBenzMaxim 34:11fffbe98ef9 665 DS2465::Config DS2465::currentConfig() const
IanBenzMaxim 32:bce180b544ed 666 {
IanBenzMaxim 32:bce180b544ed 667 return m_curConfig;
IanBenzMaxim 32:bce180b544ed 668 }
IanBenzMaxim 32:bce180b544ed 669
IanBenzMaxim 32:bce180b544ed 670
IanBenzMaxim 32:bce180b544ed 671
IanBenzMaxim 24:8942d8478d68 672
IanBenzMaxim 34:11fffbe98ef9 673 OneWireMaster::CmdResult DS2465::pollBusy(std::uint8_t * pStatus)
IanBenzMaxim 24:8942d8478d68 674 {
IanBenzMaxim 24:8942d8478d68 675 const unsigned int pollLimit = 200;
IanBenzMaxim 24:8942d8478d68 676
IanBenzMaxim 24:8942d8478d68 677 OneWireMaster::CmdResult result;
IanBenzMaxim 27:d5aaefa252f1 678 std::uint8_t status;
IanBenzMaxim 24:8942d8478d68 679 unsigned int pollCount = 0;
IanBenzMaxim 24:8942d8478d68 680
IanBenzMaxim 24:8942d8478d68 681 // loop checking 1WB bit for completion of 1-Wire operation
IanBenzMaxim 24:8942d8478d68 682 // abort if poll limit reached
IanBenzMaxim 24:8942d8478d68 683
IanBenzMaxim 24:8942d8478d68 684 do
IanBenzMaxim 24:8942d8478d68 685 {
IanBenzMaxim 34:11fffbe98ef9 686 result = readMemory(ADDR_STATUS_REG, &status, 1, true);
IanBenzMaxim 24:8942d8478d68 687 if (result != OneWireMaster::Success)
IanBenzMaxim 24:8942d8478d68 688 return result;
IanBenzMaxim 24:8942d8478d68 689 if (pStatus != NULL)
IanBenzMaxim 24:8942d8478d68 690 *pStatus = status;
IanBenzMaxim 24:8942d8478d68 691 if (pollCount++ >= pollLimit)
IanBenzMaxim 24:8942d8478d68 692 return OneWireMaster::TimeoutError;
IanBenzMaxim 24:8942d8478d68 693 } while (status & STATUS_1WB);
IanBenzMaxim 24:8942d8478d68 694
IanBenzMaxim 21:00c94aeb533e 695 return OneWireMaster::Success;
IanBenzMaxim 21:00c94aeb533e 696 }
IanBenzMaxim 21:00c94aeb533e 697
IanBenzMaxim 21:00c94aeb533e 698 //--------------------------------------------------------------------------
IanBenzMaxim 21:00c94aeb533e 699 // Reset all of the devices on the 1-Wire Net and return the result.
IanBenzMaxim 21:00c94aeb533e 700 //
IanBenzMaxim 21:00c94aeb533e 701 // Returns: true(1): presense pulse(s) detected, device(s) reset
IanBenzMaxim 21:00c94aeb533e 702 // false(0): no presense pulses detected
IanBenzMaxim 21:00c94aeb533e 703 //
IanBenzMaxim 21:00c94aeb533e 704 OneWireMaster::CmdResult DS2465::OWReset(void)
IanBenzMaxim 24:8942d8478d68 705 {
IanBenzMaxim 24:8942d8478d68 706 // 1-Wire reset (Case B)
IanBenzMaxim 24:8942d8478d68 707 // S AD,0 [A] ADDR_CMD_REG [A] 1WRS [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 24:8942d8478d68 708 // \--------/
IanBenzMaxim 24:8942d8478d68 709 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 24:8942d8478d68 710 // [] indicates from slave
IanBenzMaxim 21:00c94aeb533e 711
IanBenzMaxim 24:8942d8478d68 712 OneWireMaster::CmdResult result;
IanBenzMaxim 27:d5aaefa252f1 713 std::uint8_t buf;
IanBenzMaxim 21:00c94aeb533e 714
IanBenzMaxim 24:8942d8478d68 715 buf = CMD_1WRS;
IanBenzMaxim 34:11fffbe98ef9 716 result = writeMemory(ADDR_CMD_REG, &buf, 1);
IanBenzMaxim 21:00c94aeb533e 717
IanBenzMaxim 24:8942d8478d68 718 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 719 result = pollBusy(&buf);
IanBenzMaxim 24:8942d8478d68 720
IanBenzMaxim 24:8942d8478d68 721 if (result == OneWireMaster::Success)
IanBenzMaxim 24:8942d8478d68 722 {
IanBenzMaxim 24:8942d8478d68 723 // check for presence detect
IanBenzMaxim 24:8942d8478d68 724 if ((buf & STATUS_PPD) != STATUS_PPD)
IanBenzMaxim 24:8942d8478d68 725 result = OneWireMaster::OperationFailure;
IanBenzMaxim 24:8942d8478d68 726 }
IanBenzMaxim 21:00c94aeb533e 727
IanBenzMaxim 24:8942d8478d68 728 return result;
IanBenzMaxim 21:00c94aeb533e 729 }
IanBenzMaxim 21:00c94aeb533e 730
IanBenzMaxim 34:11fffbe98ef9 731 OneWireMaster::CmdResult DS2465::reset(void)
IanBenzMaxim 24:8942d8478d68 732 {
IanBenzMaxim 21:00c94aeb533e 733 // Device Reset
IanBenzMaxim 21:00c94aeb533e 734 // S AD,0 [A] ADDR_CMD_REG [A] 1WMR [A] Sr AD,1 [A] [SS] A\ P
IanBenzMaxim 21:00c94aeb533e 735 // [] indicates from slave
IanBenzMaxim 21:00c94aeb533e 736 // SS status byte to read to verify state
IanBenzMaxim 21:00c94aeb533e 737
IanBenzMaxim 24:8942d8478d68 738 OneWireMaster::CmdResult result;
IanBenzMaxim 27:d5aaefa252f1 739 std::uint8_t buf;
IanBenzMaxim 21:00c94aeb533e 740
IanBenzMaxim 24:8942d8478d68 741 buf = CMD_1WMR;
IanBenzMaxim 34:11fffbe98ef9 742 result = writeMemory(ADDR_CMD_REG, &buf, 1);
IanBenzMaxim 21:00c94aeb533e 743
IanBenzMaxim 24:8942d8478d68 744 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 745 result = readMemory(ADDR_STATUS_REG, &buf, 1, true);
IanBenzMaxim 24:8942d8478d68 746
IanBenzMaxim 24:8942d8478d68 747 if (result == OneWireMaster::Success)
IanBenzMaxim 21:00c94aeb533e 748 {
IanBenzMaxim 24:8942d8478d68 749 if ((buf & 0xF7) != 0x10)
IanBenzMaxim 24:8942d8478d68 750 result = OneWireMaster::OperationFailure;
IanBenzMaxim 21:00c94aeb533e 751 }
IanBenzMaxim 24:8942d8478d68 752
IanBenzMaxim 24:8942d8478d68 753 if (result == OneWireMaster::Success)
IanBenzMaxim 24:8942d8478d68 754 OWReset(); // do a command to get 1-Wire master reset out of holding state
IanBenzMaxim 21:00c94aeb533e 755
IanBenzMaxim 24:8942d8478d68 756 return result;
IanBenzMaxim 21:00c94aeb533e 757 }
IanBenzMaxim 21:00c94aeb533e 758
IanBenzMaxim 34:11fffbe98ef9 759 OneWireMaster::CmdResult DS2465::detect()
IanBenzMaxim 21:00c94aeb533e 760 {
IanBenzMaxim 21:00c94aeb533e 761 OneWireMaster::CmdResult result;
IanBenzMaxim 21:00c94aeb533e 762
IanBenzMaxim 21:00c94aeb533e 763 // reset DS2465
IanBenzMaxim 34:11fffbe98ef9 764 result = reset();
IanBenzMaxim 21:00c94aeb533e 765 if (result != OneWireMaster::Success)
IanBenzMaxim 21:00c94aeb533e 766 return result;
IanBenzMaxim 21:00c94aeb533e 767
IanBenzMaxim 21:00c94aeb533e 768 // default configuration
IanBenzMaxim 24:8942d8478d68 769 m_curConfig.reset();
IanBenzMaxim 21:00c94aeb533e 770
IanBenzMaxim 21:00c94aeb533e 771 // write the default configuration setup
IanBenzMaxim 34:11fffbe98ef9 772 result = writeConfig(m_curConfig, true);
IanBenzMaxim 21:00c94aeb533e 773 return result;
IanBenzMaxim 21:00c94aeb533e 774 }