Maxim Integrated / OneWire

1-Wire® library for mbed. Complete 1-Wire library that supports our silicon masters along with a bit-bang master on the MAX32600MBED platform with one common interface for mbed. Slave support has also been included and more slaves will be added as time permits.

Dependents:   MAXREFDES131_Qt_Demo MAX32630FTHR_iButton_uSD_Logger MAX32630FTHR_DS18B20_uSD_Logger MAXREFDES130_131_Demo ... more

Superseded by MaximInterface.

OneWire_Masters/DS2465/DS2465.cpp@72:6892702709ee, 2016-05-09 (annotated)

Committer:
IanBenzMaxim
Date:
Mon May 09 16:20:56 2016 -0500
Revision:
72:6892702709ee
Parent:
71:562f5c702094 
Use distinct names to prevent hiding of overloads in derived classes.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
IanBenzMaxim 21:00c94aeb533e 1 #include "DS2465.hpp"
IanBenzMaxim 27:d5aaefa252f1 2 #include "RomId.hpp"
IanBenzMaxim 27:d5aaefa252f1 3 #include "mbed.h"
IanBenzMaxim 21:00c94aeb533e 4
IanBenzMaxim 21:00c94aeb533e 5 #define I2C_WRITE 0
IanBenzMaxim 21:00c94aeb533e 6 #define I2C_READ 1
IanBenzMaxim 21:00c94aeb533e 7
IanBenzMaxim 21:00c94aeb533e 8 // DS2465 commands
IanBenzMaxim 21:00c94aeb533e 9 #define CMD_1WMR 0xF0
IanBenzMaxim 21:00c94aeb533e 10 #define CMD_WCFG 0xD2
IanBenzMaxim 21:00c94aeb533e 11 #define CMD_CHSL 0xC3
IanBenzMaxim 21:00c94aeb533e 12 #define CMD_SRP 0xE1
IanBenzMaxim 21:00c94aeb533e 13
IanBenzMaxim 21:00c94aeb533e 14 #define CMD_1WRS 0xB4
IanBenzMaxim 21:00c94aeb533e 15 #define CMD_1WWB 0xA5
IanBenzMaxim 21:00c94aeb533e 16 #define CMD_1WRB 0x96
IanBenzMaxim 21:00c94aeb533e 17 #define CMD_1WSB 0x87
IanBenzMaxim 21:00c94aeb533e 18 #define CMD_1WT 0x78
IanBenzMaxim 21:00c94aeb533e 19 #define CMD_1WTB 0x69
IanBenzMaxim 21:00c94aeb533e 20 #define CMD_1WRF 0xE1
IanBenzMaxim 21:00c94aeb533e 21 #define CMD_CPS 0x5A
IanBenzMaxim 21:00c94aeb533e 22 #define CMD_CSS 0x4B
IanBenzMaxim 21:00c94aeb533e 23 #define CMD_CSAM 0x3C
IanBenzMaxim 21:00c94aeb533e 24 #define CMD_CSWM 0x2D
IanBenzMaxim 21:00c94aeb533e 25 #define CMD_CNMS 0x1E
IanBenzMaxim 21:00c94aeb533e 26 #define CMD_SPR 0x0F
IanBenzMaxim 21:00c94aeb533e 27
IanBenzMaxim 21:00c94aeb533e 28 // DS2465 status bits
IanBenzMaxim 21:00c94aeb533e 29 #define STATUS_1WB 0x01
IanBenzMaxim 21:00c94aeb533e 30 #define STATUS_PPD 0x02
IanBenzMaxim 21:00c94aeb533e 31 #define STATUS_SD 0x04
IanBenzMaxim 21:00c94aeb533e 32 #define STATUS_LL 0x08
IanBenzMaxim 21:00c94aeb533e 33 #define STATUS_RST 0x10
IanBenzMaxim 21:00c94aeb533e 34 #define STATUS_SBR 0x20
IanBenzMaxim 21:00c94aeb533e 35 #define STATUS_TSB 0x40
IanBenzMaxim 21:00c94aeb533e 36 #define STATUS_DIR 0x80
IanBenzMaxim 21:00c94aeb533e 37
IanBenzMaxim 21:00c94aeb533e 38 static const int I2C_WRITE_OK = 0;
IanBenzMaxim 21:00c94aeb533e 39
IanBenzMaxim 24:8942d8478d68 40 std::uint8_t DS2465::Config::readByte() const
IanBenzMaxim 24:8942d8478d68 41 {
IanBenzMaxim 24:8942d8478d68 42 std::uint8_t config = 0;
IanBenzMaxim 71:562f5c702094 43 if (get1WS())
IanBenzMaxim 24:8942d8478d68 44 config |= 0x08;
IanBenzMaxim 71:562f5c702094 45 if (getSPU())
IanBenzMaxim 24:8942d8478d68 46 config |= 0x04;
IanBenzMaxim 71:562f5c702094 47 if (getPDN())
IanBenzMaxim 24:8942d8478d68 48 config |= 0x02;
IanBenzMaxim 71:562f5c702094 49 if (getAPU())
IanBenzMaxim 24:8942d8478d68 50 config |= 0x01;
IanBenzMaxim 24:8942d8478d68 51 return config;
IanBenzMaxim 24:8942d8478d68 52 }
IanBenzMaxim 24:8942d8478d68 53
IanBenzMaxim 24:8942d8478d68 54 std::uint8_t DS2465::Config::writeByte() const
IanBenzMaxim 24:8942d8478d68 55 {
IanBenzMaxim 24:8942d8478d68 56 std::uint8_t config = readByte();
IanBenzMaxim 24:8942d8478d68 57 return ((~config << 4) | config);
IanBenzMaxim 24:8942d8478d68 58 }
IanBenzMaxim 24:8942d8478d68 59
IanBenzMaxim 24:8942d8478d68 60 void DS2465::Config::reset()
IanBenzMaxim 24:8942d8478d68 61 {
IanBenzMaxim 71:562f5c702094 62 set1WS(false);
IanBenzMaxim 71:562f5c702094 63 setSPU(false);
IanBenzMaxim 71:562f5c702094 64 setPDN(false);
IanBenzMaxim 71:562f5c702094 65 setAPU(true);
IanBenzMaxim 24:8942d8478d68 66 }
IanBenzMaxim 24:8942d8478d68 67
IanBenzMaxim 32:bce180b544ed 68 DS2465::DS2465(I2C & I2C_interface, std::uint8_t I2C_address)
IanBenzMaxim 21:00c94aeb533e 69 : m_I2C_interface(I2C_interface), m_I2C_address(I2C_address)
IanBenzMaxim 21:00c94aeb533e 70 {
IanBenzMaxim 21:00c94aeb533e 71
IanBenzMaxim 21:00c94aeb533e 72 }
IanBenzMaxim 21:00c94aeb533e 73
IanBenzMaxim 21:00c94aeb533e 74 OneWireMaster::CmdResult DS2465::OWInitMaster()
IanBenzMaxim 21:00c94aeb533e 75 {
IanBenzMaxim 47:307dc45952db 76 OneWireMaster::CmdResult result;
IanBenzMaxim 47:307dc45952db 77
IanBenzMaxim 47:307dc45952db 78 // reset DS2465
IanBenzMaxim 47:307dc45952db 79 result = reset();
IanBenzMaxim 47:307dc45952db 80 if (result != OneWireMaster::Success)
IanBenzMaxim 47:307dc45952db 81 return result;
IanBenzMaxim 47:307dc45952db 82
IanBenzMaxim 47:307dc45952db 83 // write the default configuration setup
IanBenzMaxim 47:307dc45952db 84 Config defaultConfig;
IanBenzMaxim 47:307dc45952db 85 result = writeConfig(defaultConfig, true);
IanBenzMaxim 47:307dc45952db 86 return result;
IanBenzMaxim 21:00c94aeb533e 87 }
IanBenzMaxim 21:00c94aeb533e 88
IanBenzMaxim 33:a4c015046956 89 OneWireMaster::CmdResult DS2465::computeNextMasterSecret(bool swap, unsigned int pageNum, PageRegion region)
IanBenzMaxim 21:00c94aeb533e 90 {
IanBenzMaxim 48:6f9208ae280e 91 std::uint8_t command[2] = { CMD_CNMS, (std::uint8_t)(swap ? (0xC8 | (pageNum << 4) | region) : 0xBF) };
IanBenzMaxim 34:11fffbe98ef9 92 return writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 93 }
IanBenzMaxim 21:00c94aeb533e 94
IanBenzMaxim 33:a4c015046956 95 OneWireMaster::CmdResult DS2465::computeWriteMac(bool regwrite, bool swap, unsigned int pageNum, unsigned int segmentNum) const
IanBenzMaxim 21:00c94aeb533e 96 {
IanBenzMaxim 48:6f9208ae280e 97 std::uint8_t command[2] = { CMD_CSWM, (std::uint8_t)((regwrite << 7) | (swap << 6) | (pageNum << 4) | segmentNum) };
IanBenzMaxim 34:11fffbe98ef9 98 return cWriteMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 99 }
IanBenzMaxim 21:00c94aeb533e 100
IanBenzMaxim 33:a4c015046956 101 OneWireMaster::CmdResult DS2465::computeAuthMac(bool swap, unsigned int pageNum, PageRegion region) const
IanBenzMaxim 21:00c94aeb533e 102 {
IanBenzMaxim 48:6f9208ae280e 103 std::uint8_t command[2] = { CMD_CSAM, (std::uint8_t)(swap ? (0xC8 | (pageNum << 4) | region) : 0xBF) };
IanBenzMaxim 34:11fffbe98ef9 104 return cWriteMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 105 }
IanBenzMaxim 21:00c94aeb533e 106
IanBenzMaxim 33:a4c015046956 107 OneWireMaster::CmdResult DS2465::computeSlaveSecret(bool swap, unsigned int pageNum, PageRegion region)
IanBenzMaxim 21:00c94aeb533e 108 {
IanBenzMaxim 48:6f9208ae280e 109 std::uint8_t command[2] = { CMD_CSS, (std::uint8_t)(swap ? (0xC8 | (pageNum << 4) | region) : 0xBF) };
IanBenzMaxim 34:11fffbe98ef9 110 return writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 111 }
IanBenzMaxim 21:00c94aeb533e 112
IanBenzMaxim 48:6f9208ae280e 113 ISha256MacCoprocessor::CmdResult DS2465::setMasterSecret(const Secret & masterSecret)
IanBenzMaxim 21:00c94aeb533e 114 {
IanBenzMaxim 21:00c94aeb533e 115 OneWireMaster::CmdResult result;
IanBenzMaxim 48:6f9208ae280e 116 result = writeMemory(ADDR_SPAD, masterSecret, masterSecret.length);
IanBenzMaxim 21:00c94aeb533e 117 if (result == OneWireMaster::Success)
IanBenzMaxim 47:307dc45952db 118 result = copyScratchpadToSecret();
IanBenzMaxim 21:00c94aeb533e 119 if (result == OneWireMaster::Success)
IanBenzMaxim 47:307dc45952db 120 wait_ms(eepromPageWriteDelayMs);
IanBenzMaxim 21:00c94aeb533e 121 return (result == OneWireMaster::Success ? ISha256MacCoprocessor::Success : ISha256MacCoprocessor::OperationFailure);
IanBenzMaxim 21:00c94aeb533e 122 }
IanBenzMaxim 21:00c94aeb533e 123
IanBenzMaxim 33:a4c015046956 124 ISha256MacCoprocessor::CmdResult DS2465::computeWriteMac(const WriteMacData & writeMacData, Mac & mac) const
IanBenzMaxim 21:00c94aeb533e 125 {
IanBenzMaxim 21:00c94aeb533e 126 OneWireMaster::CmdResult result;
IanBenzMaxim 21:00c94aeb533e 127 // Write input data to scratchpad
IanBenzMaxim 34:11fffbe98ef9 128 result = writeScratchpad(writeMacData, writeMacData.length);
IanBenzMaxim 21:00c94aeb533e 129 // Compute MAC
IanBenzMaxim 21:00c94aeb533e 130 if (result == OneWireMaster::Success)
IanBenzMaxim 47:307dc45952db 131 result = computeWriteMac(false);
IanBenzMaxim 21:00c94aeb533e 132 if (result == OneWireMaster::Success)
IanBenzMaxim 21:00c94aeb533e 133 {
IanBenzMaxim 34:11fffbe98ef9 134 wait_ms(shaComputationDelayMs);
IanBenzMaxim 21:00c94aeb533e 135 // Read MAC from register
IanBenzMaxim 34:11fffbe98ef9 136 result = readMemory(ADDR_MAC_READ, mac, mac.length, true);
IanBenzMaxim 21:00c94aeb533e 137 }
IanBenzMaxim 21:00c94aeb533e 138 return (result == OneWireMaster::Success ? ISha256MacCoprocessor::Success : ISha256MacCoprocessor::OperationFailure);
IanBenzMaxim 21:00c94aeb533e 139 }
IanBenzMaxim 21:00c94aeb533e 140
IanBenzMaxim 33:a4c015046956 141 ISha256MacCoprocessor::CmdResult DS2465::computeAuthMac(const DevicePage & devicePage, const DeviceScratchpad & challenge, const AuthMacData & authMacData, Mac & mac) const
IanBenzMaxim 21:00c94aeb533e 142 {
IanBenzMaxim 21:00c94aeb533e 143 OneWireMaster::CmdResult result;
IanBenzMaxim 21:00c94aeb533e 144 int addr = ADDR_SPAD;
IanBenzMaxim 21:00c94aeb533e 145 // Write input data to scratchpad
IanBenzMaxim 34:11fffbe98ef9 146 result = cWriteMemory(addr, devicePage, devicePage.length);
IanBenzMaxim 21:00c94aeb533e 147 if (result == OneWireMaster::Success)
IanBenzMaxim 21:00c94aeb533e 148 {
IanBenzMaxim 33:a4c015046956 149 addr += devicePage.length;
IanBenzMaxim 34:11fffbe98ef9 150 result = cWriteMemory(addr, challenge, challenge.length);
IanBenzMaxim 21:00c94aeb533e 151 }
IanBenzMaxim 21:00c94aeb533e 152 if (result == OneWireMaster::Success)
IanBenzMaxim 21:00c94aeb533e 153 {
IanBenzMaxim 33:a4c015046956 154 addr += challenge.length;
IanBenzMaxim 34:11fffbe98ef9 155 result = cWriteMemory(addr, authMacData, authMacData.length);
IanBenzMaxim 21:00c94aeb533e 156 }
IanBenzMaxim 21:00c94aeb533e 157 // Compute MAC
IanBenzMaxim 21:00c94aeb533e 158 if (result == OneWireMaster::Success)
IanBenzMaxim 47:307dc45952db 159 result = computeAuthMac();
IanBenzMaxim 21:00c94aeb533e 160 if (result == OneWireMaster::Success)
IanBenzMaxim 21:00c94aeb533e 161 {
IanBenzMaxim 34:11fffbe98ef9 162 wait_ms(shaComputationDelayMs * 2);
IanBenzMaxim 21:00c94aeb533e 163 // Read MAC from register
IanBenzMaxim 34:11fffbe98ef9 164 result = readMemory(ADDR_MAC_READ, mac, mac.length, true);
IanBenzMaxim 21:00c94aeb533e 165 }
IanBenzMaxim 21:00c94aeb533e 166 return (result == OneWireMaster::Success ? ISha256MacCoprocessor::Success : ISha256MacCoprocessor::OperationFailure);
IanBenzMaxim 21:00c94aeb533e 167 }
IanBenzMaxim 21:00c94aeb533e 168
IanBenzMaxim 33:a4c015046956 169 ISha256MacCoprocessor::CmdResult DS2465::computeSlaveSecret(const DevicePage & devicePage, const DeviceScratchpad & deviceScratchpad, const SlaveSecretData & slaveSecretData)
IanBenzMaxim 21:00c94aeb533e 170 {
IanBenzMaxim 21:00c94aeb533e 171 OneWireMaster::CmdResult result;
IanBenzMaxim 21:00c94aeb533e 172 int addr = ADDR_SPAD;
IanBenzMaxim 21:00c94aeb533e 173 // Write input data to scratchpad
IanBenzMaxim 34:11fffbe98ef9 174 result = writeMemory(addr, devicePage, devicePage.length);
IanBenzMaxim 21:00c94aeb533e 175 if (result == OneWireMaster::Success)
IanBenzMaxim 21:00c94aeb533e 176 {
IanBenzMaxim 33:a4c015046956 177 addr += devicePage.length;
IanBenzMaxim 34:11fffbe98ef9 178 result = writeMemory(addr, deviceScratchpad, deviceScratchpad.length);
IanBenzMaxim 21:00c94aeb533e 179 }
IanBenzMaxim 21:00c94aeb533e 180 if (result == OneWireMaster::Success)
IanBenzMaxim 21:00c94aeb533e 181 {
IanBenzMaxim 33:a4c015046956 182 addr += deviceScratchpad.length;
IanBenzMaxim 34:11fffbe98ef9 183 result = writeMemory(addr, slaveSecretData, slaveSecretData.length);
IanBenzMaxim 21:00c94aeb533e 184 }
IanBenzMaxim 21:00c94aeb533e 185 // Compute secret
IanBenzMaxim 21:00c94aeb533e 186 if (result == OneWireMaster::Success)
IanBenzMaxim 47:307dc45952db 187 result = computeSlaveSecret();
IanBenzMaxim 21:00c94aeb533e 188 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 189 wait_ms(shaComputationDelayMs * 2);
IanBenzMaxim 21:00c94aeb533e 190 return (result == OneWireMaster::Success ? ISha256MacCoprocessor::Success : ISha256MacCoprocessor::OperationFailure);
IanBenzMaxim 21:00c94aeb533e 191 }
IanBenzMaxim 21:00c94aeb533e 192
IanBenzMaxim 34:11fffbe98ef9 193 OneWireMaster::CmdResult DS2465::copyScratchpad(bool destSecret, unsigned int pageNum, bool notFull, unsigned int segmentNum)
IanBenzMaxim 21:00c94aeb533e 194 {
IanBenzMaxim 48:6f9208ae280e 195 std::uint8_t command[2] = { CMD_CPS, (std::uint8_t)(destSecret ? 0 : (0x80 | (pageNum << 4) | (notFull << 3) | segmentNum)) };
IanBenzMaxim 34:11fffbe98ef9 196 return writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 197 }
IanBenzMaxim 21:00c94aeb533e 198
IanBenzMaxim 34:11fffbe98ef9 199 OneWireMaster::CmdResult DS2465::configureLevel(OWLevel level)
IanBenzMaxim 26:a361e3f42ba5 200 {
IanBenzMaxim 26:a361e3f42ba5 201 OneWireMaster::CmdResult result;
IanBenzMaxim 71:562f5c702094 202 if (m_curConfig.getSPU() != (level == LEVEL_STRONG))
IanBenzMaxim 26:a361e3f42ba5 203 {
IanBenzMaxim 35:5d23395628f6 204 Config newConfig = m_curConfig;
IanBenzMaxim 71:562f5c702094 205 newConfig.setSPU(level == LEVEL_STRONG);
IanBenzMaxim 35:5d23395628f6 206 result = writeConfig(newConfig, true);
IanBenzMaxim 21:00c94aeb533e 207 }
IanBenzMaxim 26:a361e3f42ba5 208 else
IanBenzMaxim 26:a361e3f42ba5 209 {
IanBenzMaxim 26:a361e3f42ba5 210 result = OneWireMaster::Success;
IanBenzMaxim 26:a361e3f42ba5 211 }
IanBenzMaxim 21:00c94aeb533e 212 return result;
IanBenzMaxim 21:00c94aeb533e 213 }
IanBenzMaxim 21:00c94aeb533e 214
IanBenzMaxim 32:bce180b544ed 215 OneWireMaster::CmdResult DS2465::OWSetLevel(OWLevel new_level)
IanBenzMaxim 21:00c94aeb533e 216 {
IanBenzMaxim 32:bce180b544ed 217 if (new_level == LEVEL_STRONG)
IanBenzMaxim 27:d5aaefa252f1 218 return OneWireMaster::OperationFailure;
IanBenzMaxim 27:d5aaefa252f1 219
IanBenzMaxim 34:11fffbe98ef9 220 return configureLevel(new_level);
IanBenzMaxim 21:00c94aeb533e 221 }
IanBenzMaxim 21:00c94aeb533e 222
IanBenzMaxim 32:bce180b544ed 223 OneWireMaster::CmdResult DS2465::OWSetSpeed(OWSpeed new_speed)
IanBenzMaxim 21:00c94aeb533e 224 {
IanBenzMaxim 27:d5aaefa252f1 225 // Requested speed is already set
IanBenzMaxim 71:562f5c702094 226 if (m_curConfig.get1WS() == (new_speed == SPEED_OVERDRIVE))
IanBenzMaxim 27:d5aaefa252f1 227 return OneWireMaster::Success;
IanBenzMaxim 27:d5aaefa252f1 228
IanBenzMaxim 27:d5aaefa252f1 229 // set the speed
IanBenzMaxim 35:5d23395628f6 230 Config newConfig = m_curConfig;
IanBenzMaxim 71:562f5c702094 231 newConfig.set1WS(new_speed == SPEED_OVERDRIVE);
IanBenzMaxim 21:00c94aeb533e 232
IanBenzMaxim 27:d5aaefa252f1 233 // write the new config
IanBenzMaxim 35:5d23395628f6 234 return writeConfig(newConfig, true);
IanBenzMaxim 21:00c94aeb533e 235 }
IanBenzMaxim 21:00c94aeb533e 236
IanBenzMaxim 32:bce180b544ed 237 OneWireMaster::CmdResult DS2465::OWTriplet(SearchDirection & search_direction, std::uint8_t & sbr, std::uint8_t & tsb)
IanBenzMaxim 21:00c94aeb533e 238 {
IanBenzMaxim 21:00c94aeb533e 239 // 1-Wire Triplet (Case B)
IanBenzMaxim 21:00c94aeb533e 240 // S AD,0 [A] 1WT [A] SS [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 21:00c94aeb533e 241 // \--------/
IanBenzMaxim 21:00c94aeb533e 242 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 21:00c94aeb533e 243 // [] indicates from slave
IanBenzMaxim 21:00c94aeb533e 244 // SS indicates byte containing search direction bit value in msbit
IanBenzMaxim 24:8942d8478d68 245
IanBenzMaxim 24:8942d8478d68 246 OneWireMaster::CmdResult result;
IanBenzMaxim 48:6f9208ae280e 247 std::uint8_t command[2] = { CMD_1WT, (std::uint8_t)((search_direction == DIRECTION_WRITE_ONE) ? 0x80 : 0x00) };
IanBenzMaxim 34:11fffbe98ef9 248 result = writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 24:8942d8478d68 249 if (result == OneWireMaster::Success)
IanBenzMaxim 32:bce180b544ed 250 {
IanBenzMaxim 32:bce180b544ed 251 std::uint8_t status;
IanBenzMaxim 34:11fffbe98ef9 252 result = pollBusy(&status);
IanBenzMaxim 32:bce180b544ed 253 if (result == OneWireMaster::Success)
IanBenzMaxim 32:bce180b544ed 254 {
IanBenzMaxim 32:bce180b544ed 255 // check bit results in status byte
IanBenzMaxim 32:bce180b544ed 256 sbr = ((status & STATUS_SBR) == STATUS_SBR);
IanBenzMaxim 32:bce180b544ed 257 tsb = ((status & STATUS_TSB) == STATUS_TSB);
IanBenzMaxim 32:bce180b544ed 258 search_direction = ((status & STATUS_DIR) == STATUS_DIR) ? DIRECTION_WRITE_ONE : DIRECTION_WRITE_ZERO;
IanBenzMaxim 32:bce180b544ed 259 }
IanBenzMaxim 32:bce180b544ed 260 }
IanBenzMaxim 24:8942d8478d68 261 return result;
IanBenzMaxim 21:00c94aeb533e 262 }
IanBenzMaxim 21:00c94aeb533e 263
IanBenzMaxim 27:d5aaefa252f1 264 OneWireMaster::CmdResult DS2465::OWReadBlock(std::uint8_t *rx_buf, std::uint8_t rx_len)
IanBenzMaxim 21:00c94aeb533e 265 {
IanBenzMaxim 21:00c94aeb533e 266 // 1-Wire Receive Block (Case A)
IanBenzMaxim 21:00c94aeb533e 267 // S AD,0 [A] ADDR_CMD_REG [A] 1WRF [A] PR [A] P
IanBenzMaxim 21:00c94aeb533e 268 // [] indicates from slave
IanBenzMaxim 21:00c94aeb533e 269 // PR indicates byte containing parameter
IanBenzMaxim 21:00c94aeb533e 270
IanBenzMaxim 24:8942d8478d68 271 OneWireMaster::CmdResult result;
IanBenzMaxim 27:d5aaefa252f1 272 std::uint8_t command[2] = { CMD_1WRF, rx_len };
IanBenzMaxim 24:8942d8478d68 273
IanBenzMaxim 34:11fffbe98ef9 274 result = writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 24:8942d8478d68 275 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 276 result = pollBusy();
IanBenzMaxim 24:8942d8478d68 277 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 278 result = readMemory(ADDR_SPAD, rx_buf, rx_len, false);
IanBenzMaxim 21:00c94aeb533e 279
IanBenzMaxim 24:8942d8478d68 280 return result;
IanBenzMaxim 21:00c94aeb533e 281 }
IanBenzMaxim 21:00c94aeb533e 282
IanBenzMaxim 27:d5aaefa252f1 283 OneWireMaster::CmdResult DS2465::OWWriteBlock(const std::uint8_t *tran_buf, std::uint8_t tran_len)
IanBenzMaxim 21:00c94aeb533e 284 {
IanBenzMaxim 21:00c94aeb533e 285 return OWWriteBlock(false, tran_buf, tran_len);
IanBenzMaxim 21:00c94aeb533e 286 }
IanBenzMaxim 21:00c94aeb533e 287
IanBenzMaxim 47:307dc45952db 288 OneWireMaster::CmdResult DS2465::OWWriteBlockMac()
IanBenzMaxim 47:307dc45952db 289 {
IanBenzMaxim 47:307dc45952db 290 return OWWriteBlock(true, NULL, 0);
IanBenzMaxim 47:307dc45952db 291 }
IanBenzMaxim 47:307dc45952db 292
IanBenzMaxim 27:d5aaefa252f1 293 OneWireMaster::CmdResult DS2465::OWWriteBlock(bool tx_mac, const std::uint8_t *tran_buf, std::uint8_t tran_len)
IanBenzMaxim 21:00c94aeb533e 294 {
IanBenzMaxim 21:00c94aeb533e 295 OneWireMaster::CmdResult result;
IanBenzMaxim 48:6f9208ae280e 296 std::uint8_t command[2] = { CMD_1WTB, (std::uint8_t)(tx_mac ? 0xFF : tran_len) };
IanBenzMaxim 21:00c94aeb533e 297
IanBenzMaxim 24:8942d8478d68 298 if (!tx_mac)
IanBenzMaxim 21:00c94aeb533e 299 {
IanBenzMaxim 21:00c94aeb533e 300 // prefill scratchpad with required data
IanBenzMaxim 34:11fffbe98ef9 301 result = writeMemory(ADDR_SPAD, tran_buf, tran_len);
IanBenzMaxim 21:00c94aeb533e 302 if (result != OneWireMaster::Success)
IanBenzMaxim 21:00c94aeb533e 303 return result;
IanBenzMaxim 21:00c94aeb533e 304 }
IanBenzMaxim 21:00c94aeb533e 305
IanBenzMaxim 21:00c94aeb533e 306 // 1-Wire Transmit Block (Case A)
IanBenzMaxim 21:00c94aeb533e 307 // S AD,0 [A] ADDR_CMD_REG [A] 1WTB [A] PR [A] P
IanBenzMaxim 21:00c94aeb533e 308 // [] indicates from slave
IanBenzMaxim 21:00c94aeb533e 309 // PR indicates byte containing parameter
IanBenzMaxim 24:8942d8478d68 310
IanBenzMaxim 34:11fffbe98ef9 311 result = writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 24:8942d8478d68 312
IanBenzMaxim 24:8942d8478d68 313 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 314 result = pollBusy();
IanBenzMaxim 21:00c94aeb533e 315
IanBenzMaxim 24:8942d8478d68 316 return result;
IanBenzMaxim 21:00c94aeb533e 317 }
IanBenzMaxim 21:00c94aeb533e 318
IanBenzMaxim 72:6892702709ee 319 OneWireMaster::CmdResult DS2465::OWReadByteSetLevel(std::uint8_t & recvbyte, OWLevel after_level)
IanBenzMaxim 21:00c94aeb533e 320 {
IanBenzMaxim 24:8942d8478d68 321 // 1-Wire Read Bytes (Case C)
IanBenzMaxim 24:8942d8478d68 322 // S AD,0 [A] ADDR_CMD_REG [A] 1WRB [A] Sr AD,1 [A] [Status] A [Status] A
IanBenzMaxim 24:8942d8478d68 323 // \--------/
IanBenzMaxim 24:8942d8478d68 324 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 24:8942d8478d68 325 // Sr AD,0 [A] SRP [A] E1 [A] Sr AD,1 [A] DD A\ P
IanBenzMaxim 24:8942d8478d68 326 //
IanBenzMaxim 24:8942d8478d68 327 // [] indicates from slave
IanBenzMaxim 24:8942d8478d68 328 // DD data read
IanBenzMaxim 26:a361e3f42ba5 329
IanBenzMaxim 69:f915c4c59a69 330 OneWireMaster::CmdResult result;
IanBenzMaxim 69:f915c4c59a69 331 std::uint8_t buf;
IanBenzMaxim 69:f915c4c59a69 332
IanBenzMaxim 34:11fffbe98ef9 333 result = configureLevel(after_level);
IanBenzMaxim 26:a361e3f42ba5 334 if (result != OneWireMaster::Success)
IanBenzMaxim 26:a361e3f42ba5 335 return result;
IanBenzMaxim 24:8942d8478d68 336
IanBenzMaxim 24:8942d8478d68 337 buf = CMD_1WRB;
IanBenzMaxim 34:11fffbe98ef9 338 result = writeMemory(ADDR_CMD_REG, &buf, 1);
IanBenzMaxim 21:00c94aeb533e 339
IanBenzMaxim 24:8942d8478d68 340 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 341 result = pollBusy();
IanBenzMaxim 24:8942d8478d68 342
IanBenzMaxim 24:8942d8478d68 343 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 344 result = readMemory(ADDR_DATA_REG, &buf, 1);
IanBenzMaxim 21:00c94aeb533e 345
IanBenzMaxim 24:8942d8478d68 346 if (result == OneWireMaster::Success)
IanBenzMaxim 24:8942d8478d68 347 recvbyte = buf;
IanBenzMaxim 21:00c94aeb533e 348
IanBenzMaxim 24:8942d8478d68 349 return result;
IanBenzMaxim 21:00c94aeb533e 350 }
IanBenzMaxim 21:00c94aeb533e 351
IanBenzMaxim 72:6892702709ee 352 OneWireMaster::CmdResult DS2465::OWWriteByteSetLevel(std::uint8_t sendbyte, OWLevel after_level)
IanBenzMaxim 24:8942d8478d68 353 {
IanBenzMaxim 21:00c94aeb533e 354 // 1-Wire Write Byte (Case B)
IanBenzMaxim 21:00c94aeb533e 355 // S AD,0 [A] ADDR_CMD_REG [A] 1WWB [A] DD [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 21:00c94aeb533e 356 // \--------/
IanBenzMaxim 21:00c94aeb533e 357 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 21:00c94aeb533e 358 // [] indicates from slave
IanBenzMaxim 21:00c94aeb533e 359 // DD data to write
IanBenzMaxim 24:8942d8478d68 360
IanBenzMaxim 24:8942d8478d68 361 OneWireMaster::CmdResult result;
IanBenzMaxim 26:a361e3f42ba5 362
IanBenzMaxim 34:11fffbe98ef9 363 result = configureLevel(after_level);
IanBenzMaxim 26:a361e3f42ba5 364 if (result != OneWireMaster::Success)
IanBenzMaxim 26:a361e3f42ba5 365 return result;
IanBenzMaxim 26:a361e3f42ba5 366
IanBenzMaxim 27:d5aaefa252f1 367 std::uint8_t command[2] = { CMD_1WWB, sendbyte };
IanBenzMaxim 24:8942d8478d68 368
IanBenzMaxim 34:11fffbe98ef9 369 result = writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 24:8942d8478d68 370 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 371 result = pollBusy();
IanBenzMaxim 21:00c94aeb533e 372
IanBenzMaxim 24:8942d8478d68 373 return result;
IanBenzMaxim 21:00c94aeb533e 374 }
IanBenzMaxim 21:00c94aeb533e 375
IanBenzMaxim 72:6892702709ee 376 OneWireMaster::CmdResult DS2465::OWTouchBitSetLevel(std::uint8_t & sendrecvbit, OWLevel after_level)
IanBenzMaxim 21:00c94aeb533e 377 {
IanBenzMaxim 21:00c94aeb533e 378 // 1-Wire bit (Case B)
IanBenzMaxim 21:00c94aeb533e 379 // S AD,0 [A] ADDR_CMD_REG [A] 1WSB [A] BB [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 21:00c94aeb533e 380 // \--------/
IanBenzMaxim 21:00c94aeb533e 381 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 21:00c94aeb533e 382 // [] indicates from slave
IanBenzMaxim 21:00c94aeb533e 383 // BB indicates byte containing bit value in msbit
IanBenzMaxim 21:00c94aeb533e 384
IanBenzMaxim 24:8942d8478d68 385 OneWireMaster::CmdResult result;
IanBenzMaxim 26:a361e3f42ba5 386
IanBenzMaxim 34:11fffbe98ef9 387 result = configureLevel(after_level);
IanBenzMaxim 26:a361e3f42ba5 388 if (result != OneWireMaster::Success)
IanBenzMaxim 26:a361e3f42ba5 389 return result;
IanBenzMaxim 26:a361e3f42ba5 390
IanBenzMaxim 48:6f9208ae280e 391 std::uint8_t command[2] = { CMD_1WSB, (std::uint8_t)(sendrecvbit ? 0x80 : 0x00) };
IanBenzMaxim 27:d5aaefa252f1 392 std::uint8_t status;
IanBenzMaxim 24:8942d8478d68 393
IanBenzMaxim 34:11fffbe98ef9 394 result = writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 395
IanBenzMaxim 24:8942d8478d68 396 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 397 result = pollBusy(&status);
IanBenzMaxim 21:00c94aeb533e 398
IanBenzMaxim 24:8942d8478d68 399 if (result == OneWireMaster::Success)
IanBenzMaxim 24:8942d8478d68 400 sendrecvbit = (status & STATUS_SBR);
IanBenzMaxim 24:8942d8478d68 401
IanBenzMaxim 24:8942d8478d68 402 return result;
IanBenzMaxim 21:00c94aeb533e 403 }
IanBenzMaxim 21:00c94aeb533e 404
IanBenzMaxim 34:11fffbe98ef9 405 OneWireMaster::CmdResult DS2465::cWriteMemory(std::uint8_t addr, const std::uint8_t * buf, std::size_t bufLen) const
IanBenzMaxim 21:00c94aeb533e 406 {
IanBenzMaxim 21:00c94aeb533e 407 int i;
IanBenzMaxim 21:00c94aeb533e 408
IanBenzMaxim 21:00c94aeb533e 409 // Write SRAM (Case A)
IanBenzMaxim 21:00c94aeb533e 410 // S AD,0 [A] VSA [A] DD [A] P
IanBenzMaxim 21:00c94aeb533e 411 // \-----/
IanBenzMaxim 21:00c94aeb533e 412 // Repeat for each data byte
IanBenzMaxim 21:00c94aeb533e 413 // [] indicates from slave
IanBenzMaxim 21:00c94aeb533e 414 // VSA valid SRAM memory address
IanBenzMaxim 21:00c94aeb533e 415 // DD memory data to write
IanBenzMaxim 21:00c94aeb533e 416
IanBenzMaxim 21:00c94aeb533e 417 m_I2C_interface.start();
IanBenzMaxim 32:bce180b544ed 418 if (m_I2C_interface.write((m_I2C_address | I2C_WRITE)) != I2C_WRITE_OK)
IanBenzMaxim 21:00c94aeb533e 419 {
IanBenzMaxim 21:00c94aeb533e 420 m_I2C_interface.stop();
IanBenzMaxim 21:00c94aeb533e 421 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 21:00c94aeb533e 422 }
IanBenzMaxim 32:bce180b544ed 423 if (m_I2C_interface.write(addr) != I2C_WRITE_OK)
IanBenzMaxim 21:00c94aeb533e 424 {
IanBenzMaxim 21:00c94aeb533e 425 m_I2C_interface.stop();
IanBenzMaxim 21:00c94aeb533e 426 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 21:00c94aeb533e 427 }
IanBenzMaxim 21:00c94aeb533e 428 // loop to write each byte
IanBenzMaxim 21:00c94aeb533e 429 for (i = 0; i < bufLen; i++)
IanBenzMaxim 21:00c94aeb533e 430 {
IanBenzMaxim 21:00c94aeb533e 431 if (m_I2C_interface.write(buf[i]) != I2C_WRITE_OK)
IanBenzMaxim 21:00c94aeb533e 432 {
IanBenzMaxim 21:00c94aeb533e 433 m_I2C_interface.stop();
IanBenzMaxim 21:00c94aeb533e 434 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 21:00c94aeb533e 435 }
IanBenzMaxim 21:00c94aeb533e 436 }
IanBenzMaxim 21:00c94aeb533e 437 m_I2C_interface.stop();
IanBenzMaxim 21:00c94aeb533e 438
IanBenzMaxim 47:307dc45952db 439 return OneWireMaster::Success;
IanBenzMaxim 21:00c94aeb533e 440 }
IanBenzMaxim 21:00c94aeb533e 441
IanBenzMaxim 34:11fffbe98ef9 442 OneWireMaster::CmdResult DS2465::readMemory(std::uint8_t addr, std::uint8_t * buf, std::size_t bufLen, bool skipSetPointer) const
IanBenzMaxim 21:00c94aeb533e 443 {
IanBenzMaxim 47:307dc45952db 444 int i;
IanBenzMaxim 21:00c94aeb533e 445
IanBenzMaxim 47:307dc45952db 446 // Read (Case A)
IanBenzMaxim 47:307dc45952db 447 // S AD,0 [A] MA [A] Sr AD,1 [A] [DD] A [DD] A\ P
IanBenzMaxim 47:307dc45952db 448 // \-----/
IanBenzMaxim 47:307dc45952db 449 // Repeat for each data byte, NAK last byte
IanBenzMaxim 47:307dc45952db 450 // [] indicates from slave
IanBenzMaxim 47:307dc45952db 451 // MA memory address
IanBenzMaxim 47:307dc45952db 452 // DD memory data read
IanBenzMaxim 21:00c94aeb533e 453
IanBenzMaxim 47:307dc45952db 454 m_I2C_interface.start();
IanBenzMaxim 47:307dc45952db 455 if (!skipSetPointer)
IanBenzMaxim 47:307dc45952db 456 {
IanBenzMaxim 47:307dc45952db 457 if (m_I2C_interface.write((m_I2C_address | I2C_WRITE)) != I2C_WRITE_OK)
IanBenzMaxim 47:307dc45952db 458 {
IanBenzMaxim 47:307dc45952db 459 m_I2C_interface.stop();
IanBenzMaxim 47:307dc45952db 460 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 47:307dc45952db 461 }
IanBenzMaxim 47:307dc45952db 462 if (m_I2C_interface.write(addr) != I2C_WRITE_OK)
IanBenzMaxim 47:307dc45952db 463 {
IanBenzMaxim 47:307dc45952db 464 m_I2C_interface.stop();
IanBenzMaxim 47:307dc45952db 465 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 47:307dc45952db 466 }
IanBenzMaxim 47:307dc45952db 467 m_I2C_interface.start();
IanBenzMaxim 47:307dc45952db 468 }
IanBenzMaxim 21:00c94aeb533e 469
IanBenzMaxim 47:307dc45952db 470 if (m_I2C_interface.write((m_I2C_address | I2C_READ)) != I2C_WRITE_OK)
IanBenzMaxim 47:307dc45952db 471 {
IanBenzMaxim 47:307dc45952db 472 m_I2C_interface.stop();
IanBenzMaxim 47:307dc45952db 473 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 47:307dc45952db 474 }
IanBenzMaxim 47:307dc45952db 475 // loop to read each byte, NAK last byte
IanBenzMaxim 47:307dc45952db 476 for (i = 0; i < bufLen; i++)
IanBenzMaxim 47:307dc45952db 477 {
IanBenzMaxim 69:f915c4c59a69 478 buf[i] = m_I2C_interface.read((i == (bufLen - 1)) ? I2C::NoACK : I2C::ACK);
IanBenzMaxim 47:307dc45952db 479 }
IanBenzMaxim 47:307dc45952db 480 m_I2C_interface.stop();
IanBenzMaxim 21:00c94aeb533e 481
IanBenzMaxim 47:307dc45952db 482 return OneWireMaster::Success;
IanBenzMaxim 21:00c94aeb533e 483 }
IanBenzMaxim 21:00c94aeb533e 484
IanBenzMaxim 34:11fffbe98ef9 485 OneWireMaster::CmdResult DS2465::writeConfig(const Config & config, bool verify)
IanBenzMaxim 21:00c94aeb533e 486 {
IanBenzMaxim 35:5d23395628f6 487 std::uint8_t configBuf;
IanBenzMaxim 35:5d23395628f6 488 OneWireMaster::CmdResult result;
IanBenzMaxim 21:00c94aeb533e 489
IanBenzMaxim 35:5d23395628f6 490 configBuf = config.writeByte();
IanBenzMaxim 35:5d23395628f6 491 result = writeMemory(ADDR_WCFG_REG, &configBuf, 1);
IanBenzMaxim 35:5d23395628f6 492 if (verify)
IanBenzMaxim 35:5d23395628f6 493 {
IanBenzMaxim 35:5d23395628f6 494 if (result == OneWireMaster::Success)
IanBenzMaxim 35:5d23395628f6 495 {
IanBenzMaxim 35:5d23395628f6 496 result = readMemory(ADDR_WCFG_REG, &configBuf, 1);
IanBenzMaxim 35:5d23395628f6 497 }
IanBenzMaxim 35:5d23395628f6 498 if (result == OneWireMaster::Success)
IanBenzMaxim 35:5d23395628f6 499 {
IanBenzMaxim 35:5d23395628f6 500 if (configBuf != config.readByte())
IanBenzMaxim 35:5d23395628f6 501 result = OneWireMaster::OperationFailure;
IanBenzMaxim 35:5d23395628f6 502 }
IanBenzMaxim 35:5d23395628f6 503 }
IanBenzMaxim 35:5d23395628f6 504
IanBenzMaxim 35:5d23395628f6 505 if (result == OneWireMaster::Success)
IanBenzMaxim 35:5d23395628f6 506 m_curConfig = config;
IanBenzMaxim 35:5d23395628f6 507
IanBenzMaxim 35:5d23395628f6 508 return result;
IanBenzMaxim 24:8942d8478d68 509 }
IanBenzMaxim 24:8942d8478d68 510
IanBenzMaxim 34:11fffbe98ef9 511 OneWireMaster::CmdResult DS2465::pollBusy(std::uint8_t * pStatus)
IanBenzMaxim 24:8942d8478d68 512 {
IanBenzMaxim 47:307dc45952db 513 const unsigned int pollLimit = 200;
IanBenzMaxim 47:307dc45952db 514
IanBenzMaxim 47:307dc45952db 515 OneWireMaster::CmdResult result;
IanBenzMaxim 47:307dc45952db 516 std::uint8_t status;
IanBenzMaxim 47:307dc45952db 517 unsigned int pollCount = 0;
IanBenzMaxim 24:8942d8478d68 518
IanBenzMaxim 47:307dc45952db 519 do
IanBenzMaxim 47:307dc45952db 520 {
IanBenzMaxim 47:307dc45952db 521 result = readMemory(ADDR_STATUS_REG, &status, 1, true);
IanBenzMaxim 47:307dc45952db 522 if (result != OneWireMaster::Success)
IanBenzMaxim 47:307dc45952db 523 return result;
IanBenzMaxim 47:307dc45952db 524 if (pStatus != NULL)
IanBenzMaxim 47:307dc45952db 525 *pStatus = status;
IanBenzMaxim 47:307dc45952db 526 if (pollCount++ >= pollLimit)
IanBenzMaxim 47:307dc45952db 527 return OneWireMaster::TimeoutError;
IanBenzMaxim 47:307dc45952db 528 } while (status & STATUS_1WB);
IanBenzMaxim 24:8942d8478d68 529
IanBenzMaxim 47:307dc45952db 530 return OneWireMaster::Success;
IanBenzMaxim 21:00c94aeb533e 531 }
IanBenzMaxim 21:00c94aeb533e 532
IanBenzMaxim 21:00c94aeb533e 533 OneWireMaster::CmdResult DS2465::OWReset(void)
IanBenzMaxim 24:8942d8478d68 534 {
IanBenzMaxim 24:8942d8478d68 535 // 1-Wire reset (Case B)
IanBenzMaxim 24:8942d8478d68 536 // S AD,0 [A] ADDR_CMD_REG [A] 1WRS [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 24:8942d8478d68 537 // \--------/
IanBenzMaxim 24:8942d8478d68 538 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 24:8942d8478d68 539 // [] indicates from slave
IanBenzMaxim 21:00c94aeb533e 540
IanBenzMaxim 24:8942d8478d68 541 OneWireMaster::CmdResult result;
IanBenzMaxim 27:d5aaefa252f1 542 std::uint8_t buf;
IanBenzMaxim 21:00c94aeb533e 543
IanBenzMaxim 24:8942d8478d68 544 buf = CMD_1WRS;
IanBenzMaxim 34:11fffbe98ef9 545 result = writeMemory(ADDR_CMD_REG, &buf, 1);
IanBenzMaxim 21:00c94aeb533e 546
IanBenzMaxim 24:8942d8478d68 547 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 548 result = pollBusy(&buf);
IanBenzMaxim 24:8942d8478d68 549
IanBenzMaxim 24:8942d8478d68 550 if (result == OneWireMaster::Success)
IanBenzMaxim 24:8942d8478d68 551 {
IanBenzMaxim 24:8942d8478d68 552 // check for presence detect
IanBenzMaxim 24:8942d8478d68 553 if ((buf & STATUS_PPD) != STATUS_PPD)
IanBenzMaxim 24:8942d8478d68 554 result = OneWireMaster::OperationFailure;
IanBenzMaxim 24:8942d8478d68 555 }
IanBenzMaxim 21:00c94aeb533e 556
IanBenzMaxim 24:8942d8478d68 557 return result;
IanBenzMaxim 21:00c94aeb533e 558 }
IanBenzMaxim 21:00c94aeb533e 559
IanBenzMaxim 34:11fffbe98ef9 560 OneWireMaster::CmdResult DS2465::reset(void)
IanBenzMaxim 24:8942d8478d68 561 {
IanBenzMaxim 21:00c94aeb533e 562 // Device Reset
IanBenzMaxim 21:00c94aeb533e 563 // S AD,0 [A] ADDR_CMD_REG [A] 1WMR [A] Sr AD,1 [A] [SS] A\ P
IanBenzMaxim 21:00c94aeb533e 564 // [] indicates from slave
IanBenzMaxim 21:00c94aeb533e 565 // SS status byte to read to verify state
IanBenzMaxim 21:00c94aeb533e 566
IanBenzMaxim 24:8942d8478d68 567 OneWireMaster::CmdResult result;
IanBenzMaxim 27:d5aaefa252f1 568 std::uint8_t buf;
IanBenzMaxim 21:00c94aeb533e 569
IanBenzMaxim 24:8942d8478d68 570 buf = CMD_1WMR;
IanBenzMaxim 34:11fffbe98ef9 571 result = writeMemory(ADDR_CMD_REG, &buf, 1);
IanBenzMaxim 21:00c94aeb533e 572
IanBenzMaxim 24:8942d8478d68 573 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 574 result = readMemory(ADDR_STATUS_REG, &buf, 1, true);
IanBenzMaxim 24:8942d8478d68 575
IanBenzMaxim 24:8942d8478d68 576 if (result == OneWireMaster::Success)
IanBenzMaxim 21:00c94aeb533e 577 {
IanBenzMaxim 24:8942d8478d68 578 if ((buf & 0xF7) != 0x10)
IanBenzMaxim 24:8942d8478d68 579 result = OneWireMaster::OperationFailure;
IanBenzMaxim 21:00c94aeb533e 580 }
IanBenzMaxim 24:8942d8478d68 581
IanBenzMaxim 24:8942d8478d68 582 if (result == OneWireMaster::Success)
IanBenzMaxim 24:8942d8478d68 583 OWReset(); // do a command to get 1-Wire master reset out of holding state
IanBenzMaxim 21:00c94aeb533e 584
IanBenzMaxim 24:8942d8478d68 585 return result;
IanBenzMaxim 21:00c94aeb533e 586 }