MH / Mbed OS MAX30003WING_Demo_QRS_RK_MUX_05292021

3 channel_MUX

Dependencies:   BufferedSerial MAX30003 max32630fthr1 DS1307

main.cpp@8:6b9359f81cc0, 2020-08-05 (annotated)

Committer:
parthsagar2010
Date:
Wed Aug 05 04:33:07 2020 +0000
Revision:
8:6b9359f81cc0
Parent:
7:cf0855a0450a
Child:
9:24ecf16eab0f
To MH Egypt Team

Who changed what in which revision?

UserRevisionLine numberNew contents of line
coreyharris 6:86ac850c718d 1
parthsagar2010 8:6b9359f81cc0 2 #include "MAX30003.h"
coreyharris 0:38c49bc37c7c 3 #include "mbed.h"
coreyharris 0:38c49bc37c7c 4 #include "max32630fthr.h"
parthsagar2010 8:6b9359f81cc0 5
coreyharris 0:38c49bc37c7c 6
coreyharris 0:38c49bc37c7c 7 MAX32630FTHR pegasus(MAX32630FTHR::VIO_3V3);
coreyharris 0:38c49bc37c7c 8
coreyharris 0:38c49bc37c7c 9 void ecg_config(MAX30003 &ecgAFE);
coreyharris 0:38c49bc37c7c 10
coreyharris 0:38c49bc37c7c 11 volatile bool ecgFIFOIntFlag = 0;
parthsagar2010 8:6b9359f81cc0 12 void ecgFIFO_callback_1() { // Triggered when the ECG FIFO is about to be full
coreyharris 0:38c49bc37c7c 13
coreyharris 0:38c49bc37c7c 14 ecgFIFOIntFlag = 1;
coreyharris 0:38c49bc37c7c 15
coreyharris 0:38c49bc37c7c 16 }
coreyharris 0:38c49bc37c7c 17
coreyharris 0:38c49bc37c7c 18 int main()
coreyharris 3:420d5efbd967 19 {
coreyharris 6:86ac850c718d 20
coreyharris 6:86ac850c718d 21 // Constants
coreyharris 4:06e258ff0b97 22 const int EINT_STATUS_MASK = 1 << 23;
coreyharris 6:86ac850c718d 23 const int FIFO_OVF_MASK = 0x7;
coreyharris 6:86ac850c718d 24 const int FIFO_VALID_SAMPLE_MASK = 0x0;
coreyharris 6:86ac850c718d 25 const int FIFO_FAST_SAMPLE_MASK = 0x1;
coreyharris 6:86ac850c718d 26 const int ETAG_BITS_MASK = 0x7;
parthsagar2010 8:6b9359f81cc0 27 DigitalOut rLed(LED1, LED_OFF);
coreyharris 3:420d5efbd967 28
coreyharris 1:86843c27cc81 29 Serial pc(USBTX, USBRX); // Use USB debug probe for serial link
coreyharris 1:86843c27cc81 30 pc.baud(115200); // Baud rate = 115200
coreyharris 1:86843c27cc81 31
coreyharris 1:86843c27cc81 32 InterruptIn ecgFIFO_int(P5_4); // Config P5_4 as int. in for the
parthsagar2010 8:6b9359f81cc0 33 ecgFIFO_int.fall(&ecgFIFO_callback_1); // ecg FIFO interrupt at falling edge
coreyharris 0:38c49bc37c7c 34
coreyharris 1:86843c27cc81 35 SPI spiBus(SPI2_MOSI, SPI2_MISO, SPI2_SCK); // SPI bus, P5_1 = MOSI,
coreyharris 1:86843c27cc81 36 // P5_2 = MISO, P5_0 = SCK
coreyharris 0:38c49bc37c7c 37
coreyharris 4:06e258ff0b97 38 MAX30003 ecgAFE(spiBus, P5_3); // New MAX30003 on spiBus, CS = P5_3
parthsagar2010 8:6b9359f81cc0 39
coreyharris 4:06e258ff0b97 40 ecg_config(ecgAFE); // Config ECG
coreyharris 1:86843c27cc81 41
coreyharris 0:38c49bc37c7c 42
coreyharris 4:06e258ff0b97 43 ecgAFE.writeRegister( MAX30003::SYNCH , 0);
coreyharris 0:38c49bc37c7c 44
coreyharris 4:06e258ff0b97 45 uint32_t ecgFIFO, readECGSamples, idx, ETAG[32], status;
coreyharris 1:86843c27cc81 46 int16_t ecgSample[32];
coreyharris 2:812d40f1853d 47
coreyharris 1:86843c27cc81 48 while(1) {
coreyharris 1:86843c27cc81 49
coreyharris 4:06e258ff0b97 50 // Read back ECG samples from the FIFO
coreyharris 0:38c49bc37c7c 51 if( ecgFIFOIntFlag ) {
coreyharris 2:812d40f1853d 52
coreyharris 5:f8d1f651bef5 53 ecgFIFOIntFlag = 0;
coreyharris 4:06e258ff0b97 54 status = ecgAFE.readRegister( MAX30003::STATUS ); // Read the STATUS register
coreyharris 2:812d40f1853d 55
coreyharris 3:420d5efbd967 56 // Check if EINT interrupt asserted
coreyharris 3:420d5efbd967 57 if ( ( status & EINT_STATUS_MASK ) == EINT_STATUS_MASK ) {
coreyharris 3:420d5efbd967 58
coreyharris 4:06e258ff0b97 59 readECGSamples = 0; // Reset sample counter
coreyharris 3:420d5efbd967 60
coreyharris 2:812d40f1853d 61 do {
coreyharris 6:86ac850c718d 62 ecgFIFO = ecgAFE.readRegister( MAX30003::ECG_FIFO ); // Read FIFO
coreyharris 4:06e258ff0b97 63 ecgSample[readECGSamples] = ecgFIFO >> 8; // Isolate voltage data
coreyharris 6:86ac850c718d 64 ETAG[readECGSamples] = ( ecgFIFO >> 3 ) & ETAG_BITS_MASK; // Isolate ETAG
coreyharris 4:06e258ff0b97 65 readECGSamples++; // Increment sample counter
coreyharris 3:420d5efbd967 66
coreyharris 3:420d5efbd967 67 // Check that sample is not last sample in FIFO
coreyharris 6:86ac850c718d 68 } while ( ETAG[readECGSamples-1] == FIFO_VALID_SAMPLE_MASK ||
coreyharris 6:86ac850c718d 69 ETAG[readECGSamples-1] == FIFO_FAST_SAMPLE_MASK );
coreyharris 2:812d40f1853d 70
coreyharris 3:420d5efbd967 71 // Check if FIFO has overflowed
coreyharris 6:86ac850c718d 72 if( ETAG[readECGSamples - 1] == FIFO_OVF_MASK ){
coreyharris 3:420d5efbd967 73 ecgAFE.writeRegister( MAX30003::FIFO_RST , 0); // Reset FIFO
johnGreeneMaxim 7:cf0855a0450a 74 rLed = 1;//notifies the user that an over flow occured
coreyharris 3:420d5efbd967 75 }
coreyharris 3:420d5efbd967 76
coreyharris 4:06e258ff0b97 77 // Print results
coreyharris 4:06e258ff0b97 78 for( idx = 0; idx < readECGSamples; idx++ ) {
coreyharris 6:86ac850c718d 79 pc.printf("%6d\r\n", ecgSample[idx]);
coreyharris 6:86ac850c718d 80 }
coreyharris 6:86ac850c718d 81
coreyharris 0:38c49bc37c7c 82 }
coreyharris 0:38c49bc37c7c 83 }
coreyharris 0:38c49bc37c7c 84 }
coreyharris 0:38c49bc37c7c 85 }
coreyharris 0:38c49bc37c7c 86
coreyharris 0:38c49bc37c7c 87
coreyharris 0:38c49bc37c7c 88
coreyharris 0:38c49bc37c7c 89
coreyharris 0:38c49bc37c7c 90 void ecg_config(MAX30003& ecgAFE) {
coreyharris 0:38c49bc37c7c 91
coreyharris 1:86843c27cc81 92 // Reset ECG to clear registers
coreyharris 1:86843c27cc81 93 ecgAFE.writeRegister( MAX30003::SW_RST , 0);
coreyharris 0:38c49bc37c7c 94
coreyharris 1:86843c27cc81 95 // General config register setting
coreyharris 1:86843c27cc81 96 MAX30003::GeneralConfiguration_u CNFG_GEN_r;
coreyharris 3:420d5efbd967 97 CNFG_GEN_r.bits.en_ecg = 1; // Enable ECG channel
coreyharris 3:420d5efbd967 98 CNFG_GEN_r.bits.rbiasn = 1; // Enable resistive bias on negative input
coreyharris 3:420d5efbd967 99 CNFG_GEN_r.bits.rbiasp = 1; // Enable resistive bias on positive input
coreyharris 3:420d5efbd967 100 CNFG_GEN_r.bits.en_rbias = 1; // Enable resistive bias
coreyharris 3:420d5efbd967 101 CNFG_GEN_r.bits.imag = 2; // Current magnitude = 10nA
coreyharris 3:420d5efbd967 102 CNFG_GEN_r.bits.en_dcloff = 1; // Enable DC lead-off detection
coreyharris 1:86843c27cc81 103 ecgAFE.writeRegister( MAX30003::CNFG_GEN , CNFG_GEN_r.all);
coreyharris 1:86843c27cc81 104
coreyharris 1:86843c27cc81 105
coreyharris 1:86843c27cc81 106 // ECG Config register setting
coreyharris 1:86843c27cc81 107 MAX30003::ECGConfiguration_u CNFG_ECG_r;
coreyharris 3:420d5efbd967 108 CNFG_ECG_r.bits.dlpf = 1; // Digital LPF cutoff = 40Hz
coreyharris 3:420d5efbd967 109 CNFG_ECG_r.bits.dhpf = 1; // Digital HPF cutoff = 0.5Hz
coreyharris 3:420d5efbd967 110 CNFG_ECG_r.bits.gain = 3; // ECG gain = 160V/V
coreyharris 3:420d5efbd967 111 CNFG_ECG_r.bits.rate = 2; // Sample rate = 128 sps
coreyharris 1:86843c27cc81 112 ecgAFE.writeRegister( MAX30003::CNFG_ECG , CNFG_ECG_r.all);
coreyharris 1:86843c27cc81 113
coreyharris 1:86843c27cc81 114
coreyharris 1:86843c27cc81 115 //R-to-R configuration
coreyharris 1:86843c27cc81 116 MAX30003::RtoR1Configuration_u CNFG_RTOR_r;
coreyharris 3:420d5efbd967 117 CNFG_RTOR_r.bits.en_rtor = 1; // Enable R-to-R detection
coreyharris 1:86843c27cc81 118 ecgAFE.writeRegister( MAX30003::CNFG_RTOR1 , CNFG_RTOR_r.all);
coreyharris 1:86843c27cc81 119
coreyharris 1:86843c27cc81 120
coreyharris 1:86843c27cc81 121 //Manage interrupts register setting
coreyharris 1:86843c27cc81 122 MAX30003::ManageInterrupts_u MNG_INT_r;
coreyharris 3:420d5efbd967 123 MNG_INT_r.bits.efit = 0b00011; // Assert EINT w/ 4 unread samples
coreyharris 3:420d5efbd967 124 MNG_INT_r.bits.clr_rrint = 0b01; // Clear R-to-R on RTOR reg. read back
coreyharris 1:86843c27cc81 125 ecgAFE.writeRegister( MAX30003::MNGR_INT , MNG_INT_r.all);
coreyharris 0:38c49bc37c7c 126
coreyharris 0:38c49bc37c7c 127
coreyharris 1:86843c27cc81 128 //Enable interrupts register setting
coreyharris 1:86843c27cc81 129 MAX30003::EnableInterrupts_u EN_INT_r;
coreyharris 5:f8d1f651bef5 130 EN_INT_r.all = 0;
coreyharris 3:420d5efbd967 131 EN_INT_r.bits.en_eint = 1; // Enable EINT interrupt
coreyharris 4:06e258ff0b97 132 EN_INT_r.bits.en_rrint = 0; // Disable R-to-R interrupt
coreyharris 3:420d5efbd967 133 EN_INT_r.bits.intb_type = 3; // Open-drain NMOS with internal pullup
coreyharris 1:86843c27cc81 134 ecgAFE.writeRegister( MAX30003::EN_INT , EN_INT_r.all);
coreyharris 1:86843c27cc81 135
coreyharris 1:86843c27cc81 136
coreyharris 1:86843c27cc81 137 //Dyanmic modes config
coreyharris 1:86843c27cc81 138 MAX30003::ManageDynamicModes_u MNG_DYN_r;
coreyharris 3:420d5efbd967 139 MNG_DYN_r.bits.fast = 0; // Fast recovery mode disabled
coreyharris 1:86843c27cc81 140 ecgAFE.writeRegister( MAX30003::MNGR_DYN , MNG_DYN_r.all);
coreyharris 5:f8d1f651bef5 141
coreyharris 5:f8d1f651bef5 142 // MUX Config
coreyharris 5:f8d1f651bef5 143 MAX30003::MuxConfiguration_u CNFG_MUX_r;
coreyharris 5:f8d1f651bef5 144 CNFG_MUX_r.bits.openn = 0; // Connect ECGN to AFE channel
coreyharris 5:f8d1f651bef5 145 CNFG_MUX_r.bits.openp = 0; // Connect ECGP to AFE channel
coreyharris 5:f8d1f651bef5 146 ecgAFE.writeRegister( MAX30003::CNFG_EMUX , CNFG_MUX_r.all);
coreyharris 1:86843c27cc81 147
coreyharris 1:86843c27cc81 148 return;
coreyharris 0:38c49bc37c7c 149 }
coreyharris 0:38c49bc37c7c 150