MH / Mbed OS MAX30003WING_Demo_QRS_RK_MUX_05292021

3 channel_MUX

Dependencies:   BufferedSerial MAX30003 max32630fthr1 DS1307

main.cpp@1:86843c27cc81, 2017-08-17 (annotated)

Committer:
coreyharris
Date:
Thu Aug 17 19:56:40 2017 +0000
Revision:
1:86843c27cc81
Parent:
0:38c49bc37c7c
Child:
2:812d40f1853d
Updated demo to include ETAG monitoring;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
coreyharris 0:38c49bc37c7c 1 #include "mbed.h"
coreyharris 0:38c49bc37c7c 2 #include "max32630fthr.h"
coreyharris 0:38c49bc37c7c 3 #include "MAX30003.h"
coreyharris 0:38c49bc37c7c 4
coreyharris 0:38c49bc37c7c 5 MAX32630FTHR pegasus(MAX32630FTHR::VIO_3V3);
coreyharris 0:38c49bc37c7c 6
coreyharris 0:38c49bc37c7c 7 void ecg_config(MAX30003 &ecgAFE);
coreyharris 0:38c49bc37c7c 8
coreyharris 0:38c49bc37c7c 9 /* ECG FIFO nearly full callback */
coreyharris 0:38c49bc37c7c 10 volatile bool ecgFIFOIntFlag = 0;
coreyharris 0:38c49bc37c7c 11 void ecgFIFO_callback() {
coreyharris 0:38c49bc37c7c 12
coreyharris 0:38c49bc37c7c 13 ecgFIFOIntFlag = 1;
coreyharris 0:38c49bc37c7c 14
coreyharris 0:38c49bc37c7c 15 }
coreyharris 0:38c49bc37c7c 16
coreyharris 0:38c49bc37c7c 17 int main()
coreyharris 0:38c49bc37c7c 18 {
coreyharris 1:86843c27cc81 19 Serial pc(USBTX, USBRX); // Use USB debug probe for serial link
coreyharris 1:86843c27cc81 20 pc.baud(115200); // Baud rate = 115200
coreyharris 1:86843c27cc81 21
coreyharris 1:86843c27cc81 22 DigitalOut rLed(LED1, LED_OFF); // Debug LEDs
coreyharris 0:38c49bc37c7c 23 DigitalOut gLed(LED2, LED_OFF);
coreyharris 0:38c49bc37c7c 24 DigitalOut bLed(LED3, LED_OFF);
coreyharris 0:38c49bc37c7c 25
coreyharris 1:86843c27cc81 26 InterruptIn ecgFIFO_int(P5_4); // Config P5_4 as int. in for the
coreyharris 1:86843c27cc81 27 ecgFIFO_int.fall(&ecgFIFO_callback); // ecg FIFO almost full interrupt
coreyharris 0:38c49bc37c7c 28
coreyharris 1:86843c27cc81 29 SPI spiBus(SPI2_MOSI, SPI2_MISO, SPI2_SCK); // SPI bus, P5_1 = MOSI,
coreyharris 1:86843c27cc81 30 // P5_2 = MISO, P5_0 = SCK
coreyharris 0:38c49bc37c7c 31
coreyharris 0:38c49bc37c7c 32 MAX30003 *ecgAFE;
coreyharris 1:86843c27cc81 33 ecgAFE = new MAX30003(spiBus, P5_3); // New MAX30003 on spiBus, CS = P5_3
coreyharris 1:86843c27cc81 34 ecg_config(*ecgAFE); // Config ECG
coreyharris 1:86843c27cc81 35
coreyharris 0:38c49bc37c7c 36
coreyharris 1:86843c27cc81 37 ecgAFE->writeRegister( MAX30003::SYNCH , 0);
coreyharris 0:38c49bc37c7c 38
coreyharris 1:86843c27cc81 39 uint32_t ecgFIFO, readSamples, idx, ETAG[32];
coreyharris 1:86843c27cc81 40 int16_t ecgSample[32];
coreyharris 1:86843c27cc81 41 while(1) {
coreyharris 1:86843c27cc81 42
coreyharris 1:86843c27cc81 43 bLed = LED_ON;
coreyharris 1:86843c27cc81 44
coreyharris 0:38c49bc37c7c 45 /* Read back ECG samples from the FIFO */
coreyharris 0:38c49bc37c7c 46 if( ecgFIFOIntFlag ) {
coreyharris 1:86843c27cc81 47 pc.printf("Interrupt received....\r\n\r\n");
coreyharris 1:86843c27cc81 48 bLed = LED_OFF;
coreyharris 1:86843c27cc81 49 ecgFIFOIntFlag = 0; // Clear interrupt flag
coreyharris 1:86843c27cc81 50 readSamples = 0; // Reset sample counter
coreyharris 1:86843c27cc81 51 do {
coreyharris 1:86843c27cc81 52 ecgFIFO = ecgAFE->readRegister( MAX30003::ECG_FIFO ); // Read FIFO
coreyharris 1:86843c27cc81 53 ecgSample[readSamples] = ecgFIFO >> 8; // Isolate voltage data
coreyharris 1:86843c27cc81 54 ETAG[readSamples] = ( ecgFIFO >> 3 ) & 0b111; // Isolate ETAG
coreyharris 1:86843c27cc81 55 readSamples++; // Increment sample counter
coreyharris 1:86843c27cc81 56 } while ( ETAG[readSamples-1] == 0x0 || ETAG[readSamples-1] == 0x1 ); // Check that sample is valid
coreyharris 1:86843c27cc81 57
coreyharris 1:86843c27cc81 58 pc.printf("%d samples read from FIFO \r\n", readSamples);
coreyharris 1:86843c27cc81 59
coreyharris 1:86843c27cc81 60 for( idx = 0; idx < readSamples; idx++ ) {
coreyharris 1:86843c27cc81 61 pc.printf("Sample : %6d, \tETAG : 0x%x\r\n", ecgSample[idx], ETAG[idx]);
coreyharris 0:38c49bc37c7c 62 }
coreyharris 1:86843c27cc81 63
coreyharris 1:86843c27cc81 64 pc.printf("\r\n\r\n\r\n");
coreyharris 1:86843c27cc81 65
coreyharris 0:38c49bc37c7c 66 }
coreyharris 1:86843c27cc81 67
coreyharris 0:38c49bc37c7c 68 }
coreyharris 0:38c49bc37c7c 69 }
coreyharris 0:38c49bc37c7c 70
coreyharris 0:38c49bc37c7c 71
coreyharris 0:38c49bc37c7c 72
coreyharris 0:38c49bc37c7c 73
coreyharris 0:38c49bc37c7c 74 void ecg_config(MAX30003& ecgAFE) {
coreyharris 0:38c49bc37c7c 75
coreyharris 1:86843c27cc81 76 // Reset ECG to clear registers
coreyharris 1:86843c27cc81 77 ecgAFE.writeRegister( MAX30003::SW_RST , 0);
coreyharris 0:38c49bc37c7c 78
coreyharris 0:38c49bc37c7c 79
coreyharris 0:38c49bc37c7c 80
coreyharris 1:86843c27cc81 81 // General config register setting
coreyharris 1:86843c27cc81 82 MAX30003::GeneralConfiguration_u CNFG_GEN_r;
coreyharris 1:86843c27cc81 83 CNFG_GEN_r.bits.en_ecg = 1;
coreyharris 1:86843c27cc81 84 CNFG_GEN_r.bits.rbiasn = 1;
coreyharris 1:86843c27cc81 85 CNFG_GEN_r.bits.rbiasp = 1;
coreyharris 1:86843c27cc81 86 CNFG_GEN_r.bits.en_rbias = 1;
coreyharris 1:86843c27cc81 87 CNFG_GEN_r.bits.imag = 2;
coreyharris 1:86843c27cc81 88 CNFG_GEN_r.bits.en_dcloff = 1;
coreyharris 1:86843c27cc81 89 ecgAFE.writeRegister( MAX30003::CNFG_GEN , CNFG_GEN_r.all);
coreyharris 1:86843c27cc81 90
coreyharris 1:86843c27cc81 91
coreyharris 1:86843c27cc81 92 // ECG Config register setting
coreyharris 1:86843c27cc81 93 MAX30003::ECGConfiguration_u CNFG_ECG_r;
coreyharris 1:86843c27cc81 94 CNFG_ECG_r.bits.dlpf = 1;
coreyharris 1:86843c27cc81 95 CNFG_ECG_r.bits.dhpf = 1;
coreyharris 1:86843c27cc81 96 CNFG_ECG_r.bits.gain = 3;
coreyharris 1:86843c27cc81 97 CNFG_ECG_r.bits.rate = 3;
coreyharris 1:86843c27cc81 98 ecgAFE.writeRegister( MAX30003::CNFG_ECG , CNFG_ECG_r.all);
coreyharris 1:86843c27cc81 99
coreyharris 1:86843c27cc81 100
coreyharris 1:86843c27cc81 101 //R-to-R configuration
coreyharris 1:86843c27cc81 102 MAX30003::RtoR1Configuration_u CNFG_RTOR_r;
coreyharris 1:86843c27cc81 103 CNFG_RTOR_r.bits.en_rtor = 1;
coreyharris 1:86843c27cc81 104 ecgAFE.writeRegister( MAX30003::CNFG_RTOR1 , CNFG_RTOR_r.all);
coreyharris 1:86843c27cc81 105
coreyharris 1:86843c27cc81 106
coreyharris 1:86843c27cc81 107 //Manage interrupts register setting
coreyharris 1:86843c27cc81 108 MAX30003::ManageInterrupts_u MNG_INT_r;
coreyharris 1:86843c27cc81 109 MNG_INT_r.bits.efit = 0b00011;
coreyharris 1:86843c27cc81 110 ecgAFE.writeRegister( MAX30003::MNGR_INT , MNG_INT_r.all);
coreyharris 0:38c49bc37c7c 111
coreyharris 0:38c49bc37c7c 112
coreyharris 1:86843c27cc81 113 //Enable interrupts register setting
coreyharris 1:86843c27cc81 114 MAX30003::EnableInterrupts_u EN_INT_r;
coreyharris 1:86843c27cc81 115 EN_INT_r.all = 0;
coreyharris 1:86843c27cc81 116 EN_INT_r.bits.en_eint = 1;
coreyharris 1:86843c27cc81 117 EN_INT_r.bits.intb_type = 0b11;
coreyharris 1:86843c27cc81 118 ecgAFE.writeRegister( MAX30003::EN_INT , EN_INT_r.all);
coreyharris 1:86843c27cc81 119
coreyharris 1:86843c27cc81 120
coreyharris 1:86843c27cc81 121 //Dyanmic modes config
coreyharris 1:86843c27cc81 122 MAX30003::ManageDynamicModes_u MNG_DYN_r;
coreyharris 1:86843c27cc81 123 MNG_DYN_r.bits.fast = 0;
coreyharris 1:86843c27cc81 124 ecgAFE.writeRegister( MAX30003::MNGR_DYN , MNG_DYN_r.all);
coreyharris 1:86843c27cc81 125
coreyharris 0:38c49bc37c7c 126
coreyharris 1:86843c27cc81 127 //MUX Config
coreyharris 1:86843c27cc81 128 MAX30003::MuxConfiguration_u CNFG_MUX_r;
coreyharris 1:86843c27cc81 129 CNFG_MUX_r.bits.pol = 0;
coreyharris 1:86843c27cc81 130 ecgAFE.writeRegister( MAX30003::CNFG_EMUX , CNFG_MUX_r.all);
coreyharris 0:38c49bc37c7c 131
coreyharris 1:86843c27cc81 132 return;
coreyharris 0:38c49bc37c7c 133 }
coreyharris 0:38c49bc37c7c 134