Self test boot program for testing icarus sensors

Dependencies:   BLE_API mbed nRF51822

Fork of BLE_UARTConsole by Bluetooth Low Energy

Committer:
smigielski
Date:
Wed Apr 15 20:01:16 2015 +0000
Revision:
14:cb369746225d
Parent:
13:ef0ce8fa871f
ADXL362 self test working

Who changed what in which revision?

UserRevisionLine numberNew contents of line
smigielski 10:3a24c970db40 1 #ifndef MBED_MPU9250_SENSOR_H
smigielski 10:3a24c970db40 2 #define MBED_MPU9250_SENSOR_H
smigielski 10:3a24c970db40 3
smigielski 10:3a24c970db40 4 #include "mbed.h"
smigielski 10:3a24c970db40 5
smigielski 10:3a24c970db40 6 #include "BaseSensor.h"
smigielski 10:3a24c970db40 7
smigielski 11:70359785c2a7 8 // mpu9250 registers
smigielski 14:cb369746225d 9 #define MPU9250_SELF_TEST_X_GYRO 0x00
smigielski 14:cb369746225d 10 #define MPU9250_SELF_TEST_Y_GYRO 0x01
smigielski 14:cb369746225d 11 #define MPU9250_SELF_TEST_Z_GYRO 0x02
smigielski 14:cb369746225d 12
smigielski 14:cb369746225d 13 #define MPU9250_SELF_TEST_X_ACCEL 0x0D
smigielski 14:cb369746225d 14 #define MPU9250_SELF_TEST_Y_ACCEL 0x0E
smigielski 14:cb369746225d 15 #define MPU9250_SELF_TEST_Z_ACCEL 0x0F
smigielski 14:cb369746225d 16
smigielski 14:cb369746225d 17
smigielski 14:cb369746225d 18 #define MPU9250_XG_OFFSET_H 0x13
smigielski 14:cb369746225d 19 #define MPU9250_XG_OFFSET_L 0x14
smigielski 14:cb369746225d 20 #define MPU9250_YG_OFFSET_H 0x15
smigielski 14:cb369746225d 21 #define MPU9250_YG_OFFSET_L 0x16
smigielski 14:cb369746225d 22 #define MPU9250_ZG_OFFSET_H 0x17
smigielski 14:cb369746225d 23 #define MPU9250_ZG_OFFSET_L 0x18
smigielski 11:70359785c2a7 24 #define MPU9250_SMPLRT_DIV 0x19
smigielski 11:70359785c2a7 25 #define MPU9250_CONFIG 0x1A
smigielski 11:70359785c2a7 26 #define MPU9250_GYRO_CONFIG 0x1B
smigielski 11:70359785c2a7 27 #define MPU9250_ACCEL_CONFIG 0x1C
smigielski 11:70359785c2a7 28 #define MPU9250_ACCEL_CONFIG_2 0x1D
smigielski 11:70359785c2a7 29 #define MPU9250_LP_ACCEL_ODR 0x1E
smigielski 11:70359785c2a7 30 #define MPU9250_MOT_THR 0x1F
smigielski 11:70359785c2a7 31 #define MPU9250_FIFO_EN 0x23
smigielski 11:70359785c2a7 32 #define MPU9250_I2C_MST_CTRL 0x24
smigielski 11:70359785c2a7 33 #define MPU9250_I2C_SLV0_ADDR 0x25
smigielski 11:70359785c2a7 34 #define MPU9250_I2C_SLV0_REG 0x26
smigielski 11:70359785c2a7 35 #define MPU9250_I2C_SLV0_CTRL 0x27
smigielski 11:70359785c2a7 36 #define MPU9250_I2C_SLV1_ADDR 0x28
smigielski 11:70359785c2a7 37 #define MPU9250_I2C_SLV1_REG 0x29
smigielski 11:70359785c2a7 38 #define MPU9250_I2C_SLV1_CTRL 0x2A
smigielski 11:70359785c2a7 39 #define MPU9250_I2C_SLV2_ADDR 0x2B
smigielski 11:70359785c2a7 40 #define MPU9250_I2C_SLV2_REG 0x2C
smigielski 11:70359785c2a7 41 #define MPU9250_I2C_SLV2_CTRL 0x2D
smigielski 11:70359785c2a7 42 #define MPU9250_I2C_SLV3_ADDR 0x2E
smigielski 11:70359785c2a7 43 #define MPU9250_I2C_SLV3_REG 0x2F
smigielski 11:70359785c2a7 44 #define MPU9250_I2C_SLV3_CTRL 0x30
smigielski 11:70359785c2a7 45 #define MPU9250_I2C_SLV4_ADDR 0x31
smigielski 11:70359785c2a7 46 #define MPU9250_I2C_SLV4_REG 0x32
smigielski 11:70359785c2a7 47 #define MPU9250_I2C_SLV4_DO 0x33
smigielski 11:70359785c2a7 48 #define MPU9250_I2C_SLV4_CTRL 0x34
smigielski 11:70359785c2a7 49 #define MPU9250_I2C_SLV4_DI 0x35
smigielski 11:70359785c2a7 50 #define MPU9250_I2C_MST_STATUS 0x36
smigielski 11:70359785c2a7 51 #define MPU9250_INT_PIN_CFG 0x37
smigielski 11:70359785c2a7 52 #define MPU9250_INT_ENABLE 0x38
smigielski 11:70359785c2a7 53 #define MPU9250_ACCEL_XOUT_H 0x3B
smigielski 11:70359785c2a7 54 #define MPU9250_ACCEL_XOUT_L 0x3C
smigielski 11:70359785c2a7 55 #define MPU9250_ACCEL_YOUT_H 0x3D
smigielski 11:70359785c2a7 56 #define MPU9250_ACCEL_YOUT_L 0x3E
smigielski 11:70359785c2a7 57 #define MPU9250_ACCEL_ZOUT_H 0x3F
smigielski 11:70359785c2a7 58 #define MPU9250_ACCEL_ZOUT_L 0x40
smigielski 11:70359785c2a7 59 #define MPU9250_TEMP_OUT_H 0x41
smigielski 11:70359785c2a7 60 #define MPU9250_TEMP_OUT_L 0x42
smigielski 11:70359785c2a7 61 #define MPU9250_GYRO_XOUT_H 0x43
smigielski 11:70359785c2a7 62 #define MPU9250_GYRO_XOUT_L 0x44
smigielski 11:70359785c2a7 63 #define MPU9250_GYRO_YOUT_H 0x45
smigielski 11:70359785c2a7 64 #define MPU9250_GYRO_YOUT_L 0x46
smigielski 11:70359785c2a7 65 #define MPU9250_GYRO_ZOUT_H 0x47
smigielski 11:70359785c2a7 66 #define MPU9250_GYRO_ZOUT_L 0x48
smigielski 11:70359785c2a7 67 #define MPU9250_EXT_SENS_DATA_00 0x49
smigielski 11:70359785c2a7 68 #define MPU9250_EXT_SENS_DATA_01 0x4A
smigielski 11:70359785c2a7 69 #define MPU9250_EXT_SENS_DATA_02 0x4B
smigielski 11:70359785c2a7 70 #define MPU9250_EXT_SENS_DATA_03 0x4C
smigielski 11:70359785c2a7 71 #define MPU9250_EXT_SENS_DATA_04 0x4D
smigielski 11:70359785c2a7 72 #define MPU9250_EXT_SENS_DATA_05 0x4E
smigielski 11:70359785c2a7 73 #define MPU9250_EXT_SENS_DATA_06 0x4F
smigielski 11:70359785c2a7 74 #define MPU9250_EXT_SENS_DATA_07 0x50
smigielski 11:70359785c2a7 75 #define MPU9250_EXT_SENS_DATA_08 0x51
smigielski 11:70359785c2a7 76 #define MPU9250_EXT_SENS_DATA_09 0x52
smigielski 11:70359785c2a7 77 #define MPU9250_EXT_SENS_DATA_10 0x53
smigielski 11:70359785c2a7 78 #define MPU9250_EXT_SENS_DATA_11 0x54
smigielski 11:70359785c2a7 79 #define MPU9250_EXT_SENS_DATA_12 0x55
smigielski 11:70359785c2a7 80 #define MPU9250_EXT_SENS_DATA_13 0x56
smigielski 11:70359785c2a7 81 #define MPU9250_EXT_SENS_DATA_14 0x57
smigielski 11:70359785c2a7 82 #define MPU9250_EXT_SENS_DATA_15 0x58
smigielski 11:70359785c2a7 83 #define MPU9250_EXT_SENS_DATA_16 0x59
smigielski 11:70359785c2a7 84 #define MPU9250_EXT_SENS_DATA_17 0x5A
smigielski 11:70359785c2a7 85 #define MPU9250_EXT_SENS_DATA_18 0x5B
smigielski 11:70359785c2a7 86 #define MPU9250_EXT_SENS_DATA_19 0x5C
smigielski 11:70359785c2a7 87 #define MPU9250_EXT_SENS_DATA_20 0x5D
smigielski 11:70359785c2a7 88 #define MPU9250_EXT_SENS_DATA_21 0x5E
smigielski 11:70359785c2a7 89 #define MPU9250_EXT_SENS_DATA_22 0x5F
smigielski 11:70359785c2a7 90 #define MPU9250_EXT_SENS_DATA_23 0x60
smigielski 11:70359785c2a7 91 #define MPU9250_I2C_SLV0_DO 0x63
smigielski 11:70359785c2a7 92 #define MPU9250_I2C_SLV1_DO 0x64
smigielski 11:70359785c2a7 93 #define MPU9250_I2C_SLV2_DO 0x65
smigielski 11:70359785c2a7 94 #define MPU9250_I2C_SLV3_DO 0x66
smigielski 11:70359785c2a7 95 #define MPU9250_I2C_MST_DELAY_CTRL 0x67
smigielski 11:70359785c2a7 96 #define MPU9250_SIGNAL_PATH_RESET 0x68
smigielski 11:70359785c2a7 97 #define MPU9250_MOT_DETECT_CTRL 0x69
smigielski 11:70359785c2a7 98 #define MPU9250_USER_CTRL 0x6A
smigielski 11:70359785c2a7 99 #define MPU9250_PWR_MGMT_1 0x6B
smigielski 11:70359785c2a7 100 #define MPU9250_PWR_MGMT_2 0x6C
smigielski 11:70359785c2a7 101 #define MPU9250_BANK_SEL 0x6D
smigielski 11:70359785c2a7 102 #define MPU9250_MEM_START_ADDR 0x6E
smigielski 11:70359785c2a7 103 #define MPU9250_MEM_R_W 0x6F
smigielski 11:70359785c2a7 104 #define MPU9250_DMP_CFG_1 0x70
smigielski 11:70359785c2a7 105 #define MPU9250_DMP_CFG_2 0x71
smigielski 11:70359785c2a7 106 #define MPU9250_FIFO_COUNTH 0x72
smigielski 11:70359785c2a7 107 #define MPU9250_FIFO_COUNTL 0x73
smigielski 11:70359785c2a7 108 #define MPU9250_FIFO_R_W 0x74
smigielski 11:70359785c2a7 109 #define MPU9250_WHOAMI 0x75
smigielski 11:70359785c2a7 110 #define MPU9250_XA_OFFSET_H 0x77
smigielski 11:70359785c2a7 111 #define MPU9250_XA_OFFSET_L 0x78
smigielski 11:70359785c2a7 112 #define MPU9250_YA_OFFSET_H 0x7A
smigielski 11:70359785c2a7 113 #define MPU9250_YA_OFFSET_L 0x7B
smigielski 11:70359785c2a7 114 #define MPU9250_ZA_OFFSET_H 0x7D
smigielski 11:70359785c2a7 115 #define MPU9250_ZA_OFFSET_L 0x7E
smigielski 11:70359785c2a7 116 /* ---- AK8963 Reg In MPU9250 ----------------------------------------------- */
smigielski 11:70359785c2a7 117 #define AK8963_I2C_ADDR 0x0c//0x18
smigielski 11:70359785c2a7 118 #define AK8963_Device_ID 0x48
smigielski 11:70359785c2a7 119
smigielski 11:70359785c2a7 120 // Read-only Reg
smigielski 11:70359785c2a7 121 #define AK8963_WIA 0x00
smigielski 11:70359785c2a7 122 #define AK8963_INFO 0x01
smigielski 11:70359785c2a7 123 #define AK8963_ST1 0x02
smigielski 11:70359785c2a7 124 #define AK8963_HXL 0x03
smigielski 11:70359785c2a7 125 #define AK8963_HXH 0x04
smigielski 11:70359785c2a7 126 #define AK8963_HYL 0x05
smigielski 11:70359785c2a7 127 #define AK8963_HYH 0x06
smigielski 11:70359785c2a7 128 #define AK8963_HZL 0x07
smigielski 11:70359785c2a7 129 #define AK8963_HZH 0x08
smigielski 11:70359785c2a7 130 #define AK8963_ST2 0x09
smigielski 11:70359785c2a7 131 // Write/Read Reg
smigielski 14:cb369746225d 132 #define AK8963_CNTL 0x0A
smigielski 14:cb369746225d 133 #define AK8963_RSV 0x0B
smigielski 11:70359785c2a7 134 #define AK8963_ASTC 0x0C
smigielski 11:70359785c2a7 135 #define AK8963_TS1 0x0D
smigielski 11:70359785c2a7 136 #define AK8963_TS2 0x0E
smigielski 11:70359785c2a7 137 #define AK8963_I2CDIS 0x0F
smigielski 11:70359785c2a7 138 // Read-only Reg ( ROM )
smigielski 11:70359785c2a7 139 #define AK8963_ASAX 0x10
smigielski 11:70359785c2a7 140 #define AK8963_ASAY 0x11
smigielski 11:70359785c2a7 141 #define AK8963_ASAZ 0x12
smigielski 10:3a24c970db40 142
smigielski 11:70359785c2a7 143 #define MPU9250_READ_FLAG 0x80
smigielski 14:cb369746225d 144
smigielski 14:cb369746225d 145 #define MPU9250_AFS_2G 0
smigielski 14:cb369746225d 146 #define MPU9250_AFS_4G 1
smigielski 14:cb369746225d 147 #define MPU9250_AFS_8G 2
smigielski 14:cb369746225d 148 #define MPU9250_AFS_16G 3
smigielski 14:cb369746225d 149
smigielski 14:cb369746225d 150 #define MPU9250_GFS_250DPS 0
smigielski 14:cb369746225d 151 #define MPU9250_GFS_500DPS 1
smigielski 14:cb369746225d 152 #define MPU9250_GFS_1000DPS 2
smigielski 14:cb369746225d 153 #define MPU9250_GFS_2000DPS 3
smigielski 14:cb369746225d 154
smigielski 14:cb369746225d 155
smigielski 14:cb369746225d 156 #define MPU9250_AFS_2G_MULTIPLIER 2.0/32768.0
smigielski 14:cb369746225d 157 #define MPU9250_AFS_4G_MULTIPLIER 4.0/32768.0
smigielski 14:cb369746225d 158 #define MPU9250_AFS_8G_MULTIPLIER 8.0/32768.0
smigielski 14:cb369746225d 159 #define MPU9250_AFS_16G_MULTIPLIER 16.0/32768.0
smigielski 14:cb369746225d 160
smigielski 14:cb369746225d 161
smigielski 14:cb369746225d 162 #define MPU9250_GFS_250DPS_MULTIPLIER 250.0/32768.0
smigielski 14:cb369746225d 163 #define MPU9250_GFS_500DPS_MULTIPLIER 500.0/32768.0
smigielski 14:cb369746225d 164 #define MPU9250_GFS_1000DPS_MULTIPLIER 1000.0/32768.0
smigielski 14:cb369746225d 165 #define MPU9250_GFS_2000DPS_MULTIPLIER 2000.0/32768.0
smigielski 14:cb369746225d 166
smigielski 14:cb369746225d 167
smigielski 14:cb369746225d 168 /* ---- Sensitivity --------------------------------------------------------- */
smigielski 14:cb369746225d 169
smigielski 14:cb369746225d 170 #define MPU9250A_2g ((float)0.000061035156f) // 0.000061035156 g/LSB
smigielski 14:cb369746225d 171 #define MPU9250A_4g ((float)0.000122070312f) // 0.000122070312 g/LSB
smigielski 14:cb369746225d 172 #define MPU9250A_8g ((float)0.000244140625f) // 0.000244140625 g/LSB
smigielski 14:cb369746225d 173 #define MPU9250A_16g ((float)0.000488281250f) // 0.000488281250 g/LSB
smigielski 14:cb369746225d 174
smigielski 14:cb369746225d 175 #define MPU9250G_250dps ((float)0.007633587786f) // 0.007633587786 dps/LSB
smigielski 14:cb369746225d 176 #define MPU9250G_500dps ((float)0.015267175572f) // 0.015267175572 dps/LSB
smigielski 14:cb369746225d 177 #define MPU9250G_1000dps ((float)0.030487804878f) // 0.030487804878 dps/LSB
smigielski 14:cb369746225d 178 #define MPU9250G_2000dps ((float)0.060975609756f) // 0.060975609756 dps/LSB
smigielski 14:cb369746225d 179
smigielski 14:cb369746225d 180 #define MPU9250M_4800uT ((float)0.15f) // 0.15 uT/LSB
smigielski 14:cb369746225d 181
smigielski 14:cb369746225d 182 #define MPU9250T_85degC ((float)0.002995177763f) // 0.002995177763 degC/LSB
smigielski 14:cb369746225d 183
smigielski 10:3a24c970db40 184
smigielski 10:3a24c970db40 185 class MPU9250Sensor : public BaseSensor {
smigielski 10:3a24c970db40 186 public:
smigielski 10:3a24c970db40 187 //SPI at 1MHz
smigielski 13:ef0ce8fa871f 188 MPU9250Sensor(SPI&,DigitalOut&, void (*debug_)(const char* format, ...)=0);
smigielski 10:3a24c970db40 189 //get sensor details from actual implementation
smigielski 10:3a24c970db40 190 virtual char* getSimpleName();
smigielski 10:3a24c970db40 191 virtual void getSensorDetails(sensor_t*);
smigielski 10:3a24c970db40 192 //verify basic integrity of underlining hardware
smigielski 10:3a24c970db40 193 virtual uint32_t verifyIntegrity(uint32_t*);
smigielski 10:3a24c970db40 194 private:
smigielski 13:ef0ce8fa871f 195 SPI& spi;
smigielski 13:ef0ce8fa871f 196 DigitalOut& cs;
smigielski 13:ef0ce8fa871f 197
smigielski 14:cb369746225d 198 float magnetometerCalibration[3];
smigielski 14:cb369746225d 199 void initMagnetometr();
smigielski 13:ef0ce8fa871f 200 uint32_t selfTest(uint32_t* errorResult);
smigielski 14:cb369746225d 201 uint32_t gyroscopeSelfTest(uint32_t* errorResult);
smigielski 14:cb369746225d 202 uint32_t accelerometerSelfTest(uint32_t* errorResult);
smigielski 14:cb369746225d 203 uint32_t magnetometerSelfTest(uint32_t* errorResult);
smigielski 14:cb369746225d 204 void readGyroOffset(uint8_t reg, float* data);
smigielski 14:cb369746225d 205 void averageData(uint8_t reg,int16_t* data);
smigielski 13:ef0ce8fa871f 206 uint8_t readRegister( uint8_t reg);
smigielski 14:cb369746225d 207 uint8_t readRegisterI2C( uint8_t reg);
smigielski 14:cb369746225d 208 void readRegisters(uint8_t reg, uint8_t count, uint8_t * dest);
smigielski 14:cb369746225d 209 void readRegistersI2C(uint8_t reg, uint8_t count, uint8_t * dest);
smigielski 14:cb369746225d 210 void writeRegister( uint8_t reg, uint8_t data, uint8_t mask = 0xff,uint8_t pos = 0);
smigielski 14:cb369746225d 211 void writeRegisterI2C( uint8_t reg, uint8_t data, uint8_t mask = 0xff,uint8_t pos = 0);
smigielski 10:3a24c970db40 212 };
smigielski 10:3a24c970db40 213
smigielski 10:3a24c970db40 214 #endif