GraphicsDisplay / UniGraphic

Basically i glued Peter Drescher and Simon Ford libs in a GraphicsDisplay class, then derived TFT or LCD class (which inherits Protocols class), then the most derived ones (Inits), which are per-display and are the only part needed to be adapted to diff hw.

Dependents:   testUniGraphic_150217 maze_TFT_MMA8451Q TFT_test_frdm-kl25z TFT_test_NUCLEO-F411RE ... more

Protocols/SPI8.cpp@34:c66986d80f72, 2022-01-25 (annotated)

Committer:
Geremia
Date:
Tue Jan 25 17:57:55 2022 +0000
Revision:
34:c66986d80f72
Parent:
20:14daa48ffd4c 
align attribute fixed to gcc style, updated to OS6 then got bored

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Geremia 4:12ba0ecc2c1f 1 /* mbed UniGraphic library - SPI8 protocol class
Geremia 4:12ba0ecc2c1f 2 * Copyright (c) 2015 Giuliano Dianda
Geremia 4:12ba0ecc2c1f 3 * Released under the MIT License: http://mbed.org/license/mit
Geremia 4:12ba0ecc2c1f 4 *
Geremia 4:12ba0ecc2c1f 5 * Derived work of:
Geremia 4:12ba0ecc2c1f 6 *
Geremia 4:12ba0ecc2c1f 7 * mbed library for 240*320 pixel display TFT based on ILI9341 LCD Controller
Geremia 4:12ba0ecc2c1f 8 * Copyright (c) 2013 Peter Drescher - DC2PD
Geremia 4:12ba0ecc2c1f 9 *
Geremia 4:12ba0ecc2c1f 10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
Geremia 4:12ba0ecc2c1f 11 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
Geremia 4:12ba0ecc2c1f 12 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
Geremia 4:12ba0ecc2c1f 13 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
Geremia 4:12ba0ecc2c1f 14 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
Geremia 4:12ba0ecc2c1f 15 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
Geremia 4:12ba0ecc2c1f 16 * THE SOFTWARE.
Geremia 4:12ba0ecc2c1f 17 */
Geremia 4:12ba0ecc2c1f 18
Geremia 0:75ec1b3cde17 19 #include "SPI8.h"
Geremia 0:75ec1b3cde17 20
Geremia 0:75ec1b3cde17 21
Geremia 1:ff019d22b275 22 SPI8::SPI8(int Hz, PinName mosi, PinName miso, PinName sclk, PinName CS, PinName reset, PinName DC)
Geremia 0:75ec1b3cde17 23 : _CS(CS), _spi(mosi, miso, sclk), _reset(reset), _DC(DC)
Geremia 0:75ec1b3cde17 24 {
Geremia 0:75ec1b3cde17 25 _reset = 1;
Geremia 0:75ec1b3cde17 26 _DC=1;
Geremia 0:75ec1b3cde17 27 _CS=1;
Geremia 0:75ec1b3cde17 28 _spi.format(8,0); // 8 bit spi mode 0
Geremia 1:ff019d22b275 29 _spi.frequency(Hz);
Geremia 0:75ec1b3cde17 30 hw_reset();
Geremia 0:75ec1b3cde17 31 }
Geremia 0:75ec1b3cde17 32
Geremia 1:ff019d22b275 33 void SPI8::wr_cmd8(unsigned char cmd)
Geremia 20:14daa48ffd4c 34 {
Geremia 0:75ec1b3cde17 35 _DC.write(0); // 0=cmd
Geremia 0:75ec1b3cde17 36 _spi.write(cmd); // write 8bit
Geremia 20:14daa48ffd4c 37 _DC.write(1); // 1=data next
Geremia 0:75ec1b3cde17 38 }
Geremia 1:ff019d22b275 39 void SPI8::wr_data8(unsigned char data)
Geremia 0:75ec1b3cde17 40 {
Geremia 1:ff019d22b275 41 _spi.write(data); // write 8bit
Geremia 0:75ec1b3cde17 42 }
Geremia 1:ff019d22b275 43 void SPI8::wr_cmd16(unsigned short cmd)
Geremia 20:14daa48ffd4c 44 {
Geremia 1:ff019d22b275 45 _DC.write(0); // 0=cmd
Geremia 1:ff019d22b275 46 _spi.write(cmd>>8); // write 8bit
Geremia 1:ff019d22b275 47 _spi.write(cmd&0xFF); // write 8bit
Geremia 20:14daa48ffd4c 48 _DC.write(1); // 1=data next
Geremia 1:ff019d22b275 49 }
Geremia 1:ff019d22b275 50 void SPI8::wr_data16(unsigned short data)
Geremia 1:ff019d22b275 51 {
Geremia 1:ff019d22b275 52 _spi.write(data>>8); // write 8bit
Geremia 1:ff019d22b275 53 _spi.write(data&0xFF); // write 8bit
Geremia 1:ff019d22b275 54 }
Geremia 4:12ba0ecc2c1f 55 void SPI8::wr_gram(unsigned short data)
Geremia 4:12ba0ecc2c1f 56 {
Geremia 4:12ba0ecc2c1f 57 _spi.write(data>>8); // write 8bit
Geremia 4:12ba0ecc2c1f 58 _spi.write(data&0xFF); // write 8bit
Geremia 4:12ba0ecc2c1f 59 }
Geremia 4:12ba0ecc2c1f 60 void SPI8::wr_gram(unsigned short data, unsigned int count)
Geremia 1:ff019d22b275 61 {
Geremia 1:ff019d22b275 62 if((data>>8)==(data&0xFF))
Geremia 1:ff019d22b275 63 {
Geremia 1:ff019d22b275 64 count<<=1;
Geremia 1:ff019d22b275 65 while(count)
Geremia 1:ff019d22b275 66 {
Geremia 1:ff019d22b275 67 _spi.write(data); // write 8bit
Geremia 1:ff019d22b275 68 count--;
Geremia 1:ff019d22b275 69 }
Geremia 1:ff019d22b275 70 }
Geremia 1:ff019d22b275 71 else
Geremia 1:ff019d22b275 72 {
Geremia 1:ff019d22b275 73 while(count)
Geremia 1:ff019d22b275 74 {
Geremia 1:ff019d22b275 75 _spi.write(data>>8); // write 8bit
Geremia 1:ff019d22b275 76 _spi.write(data&0xFF); // write 8bit
Geremia 1:ff019d22b275 77 count--;
Geremia 1:ff019d22b275 78 }
Geremia 1:ff019d22b275 79 }
Geremia 1:ff019d22b275 80 }
Geremia 4:12ba0ecc2c1f 81 void SPI8::wr_grambuf(unsigned short* data, unsigned int lenght)
Geremia 1:ff019d22b275 82 {
Geremia 1:ff019d22b275 83 while(lenght)
Geremia 1:ff019d22b275 84 {
Geremia 1:ff019d22b275 85 _spi.write((*data)>>8); // write 8bit
Geremia 1:ff019d22b275 86 _spi.write((*data)&0xFF); // write 8bit
Geremia 1:ff019d22b275 87 data++;
Geremia 0:75ec1b3cde17 88 lenght--;
Geremia 0:75ec1b3cde17 89 }
Geremia 0:75ec1b3cde17 90 }
Geremia 11:b842b8e332cb 91 unsigned short SPI8::rd_gram(bool convert)
Geremia 5:b222a9461d6b 92 {
Geremia 5:b222a9461d6b 93 unsigned int r=0;
Geremia 5:b222a9461d6b 94 _spi.write(0); // whole first byte is dummy
Geremia 5:b222a9461d6b 95 r |= _spi.write(0);
Geremia 5:b222a9461d6b 96 r <<= 8;
Geremia 5:b222a9461d6b 97 r |= _spi.write(0);
Geremia 11:b842b8e332cb 98 if(convert)
Geremia 11:b842b8e332cb 99 {
Geremia 11:b842b8e332cb 100 r <<= 8;
Geremia 11:b842b8e332cb 101 r |= _spi.write(0);
Geremia 11:b842b8e332cb 102 // gram is 18bit/pixel, if you set 16bit/pixel (cmd 3A), during writing the 16bits are expanded to 18bit
Geremia 11:b842b8e332cb 103 // during reading, you read the raw 18bit gram
Geremia 11:b842b8e332cb 104 r = RGB24to16((r&0xFF0000)>>16, (r&0xFF00)>>8, r&0xFF);// 18bit pixel padded to 24bits, rrrrrr00_gggggg00_bbbbbb00, converted to 16bit
Geremia 11:b842b8e332cb 105 }
Geremia 5:b222a9461d6b 106 _CS = 1; // force CS HIG to interupt the "read state"
Geremia 5:b222a9461d6b 107 _CS = 0;
Geremia 5:b222a9461d6b 108 return (unsigned short)r;
Geremia 5:b222a9461d6b 109 }
Geremia 7:bb0383b91104 110 unsigned int SPI8::rd_reg_data32(unsigned char reg)
Geremia 7:bb0383b91104 111 {
Geremia 7:bb0383b91104 112 wr_cmd8(reg);
Geremia 7:bb0383b91104 113 unsigned int r=0;
Geremia 7:bb0383b91104 114
Geremia 7:bb0383b91104 115 r |= _spi.write(0); // we get only 7bit valid, first bit was the dummy cycle
Geremia 7:bb0383b91104 116 r <<= 8;
Geremia 7:bb0383b91104 117 r |= _spi.write(0);
Geremia 7:bb0383b91104 118 r <<= 8;
Geremia 7:bb0383b91104 119 r |= _spi.write(0);
Geremia 7:bb0383b91104 120 r <<= 8;
Geremia 7:bb0383b91104 121 r |= _spi.write(0);
Geremia 7:bb0383b91104 122 r <<= 1; // 32bits are aligned, now collecting bit_0
Geremia 7:bb0383b91104 123 r |= (_spi.write(0) >> 7);
Geremia 7:bb0383b91104 124 // we clocked 7 more bit so ILI waiting for 8th, we need to reset spi bus
Geremia 7:bb0383b91104 125 _CS = 1; // force CS HIG to interupt the cmd
Geremia 7:bb0383b91104 126 _CS = 0;
Geremia 7:bb0383b91104 127 return r;
Geremia 7:bb0383b91104 128 }
Geremia 7:bb0383b91104 129 unsigned int SPI8::rd_extcreg_data32(unsigned char reg, unsigned char SPIreadenablecmd)
Geremia 7:bb0383b91104 130 {
Geremia 7:bb0383b91104 131 unsigned int r=0;
Geremia 7:bb0383b91104 132 for(int regparam=1; regparam<4; regparam++) // when reading EXTC regs, first parameter is always dummy, so start with 1
Geremia 7:bb0383b91104 133 {
Geremia 7:bb0383b91104 134 wr_cmd8(SPIreadenablecmd); // spi-in enable cmd, 0xD9 (ili9341) or 0xFB (ili9488) or don't know
Geremia 7:bb0383b91104 135 wr_data8(0xF0|regparam); // in low nibble specify which reg parameter we want
Geremia 7:bb0383b91104 136 wr_cmd8(reg); // now send cmd (select register we want to read)
Geremia 7:bb0383b91104 137 r <<= 8;
Geremia 7:bb0383b91104 138 r |= _spi.write(0);
Geremia 7:bb0383b91104 139 // r = _spi.write(0) >> 8; for 16bit
Geremia 7:bb0383b91104 140 }
Geremia 20:14daa48ffd4c 141 _CS = 1; // force CS HIG to interupt the cmd
Geremia 7:bb0383b91104 142 _CS = 0;
Geremia 20:14daa48ffd4c 143 return r;
Geremia 20:14daa48ffd4c 144 }
Geremia 20:14daa48ffd4c 145 // ILI932x specific
Geremia 20:14daa48ffd4c 146 void SPI8::dummyread()
Geremia 20:14daa48ffd4c 147 {
Geremia 20:14daa48ffd4c 148 _spi.write(0); // dummy read
Geremia 20:14daa48ffd4c 149 }
Geremia 20:14daa48ffd4c 150 // ILI932x specific
Geremia 20:14daa48ffd4c 151 void SPI8::reg_select(unsigned char reg, bool forread)
Geremia 20:14daa48ffd4c 152 {
Geremia 20:14daa48ffd4c 153 _CS = 1; //fixme: really needed?
Geremia 20:14daa48ffd4c 154 _CS = 0; //fixme: really needed?
Geremia 20:14daa48ffd4c 155 _spi.write(0x70);
Geremia 20:14daa48ffd4c 156 _spi.write(0); // write MSB
Geremia 20:14daa48ffd4c 157 _spi.write(reg); // write LSB
Geremia 20:14daa48ffd4c 158 _CS = 1; //fixme: really needed?
Geremia 20:14daa48ffd4c 159 _CS = 0; //fixme: really needed?
Geremia 20:14daa48ffd4c 160 if(forread) _spi.write(0x73);
Geremia 20:14daa48ffd4c 161 else _spi.write(0x72);
Geremia 20:14daa48ffd4c 162 }
Geremia 20:14daa48ffd4c 163 // ILI932x specific
Geremia 20:14daa48ffd4c 164 void SPI8::reg_write(unsigned char reg, unsigned short data)
Geremia 20:14daa48ffd4c 165 {
Geremia 20:14daa48ffd4c 166 _CS = 1; //fixme: really needed?
Geremia 20:14daa48ffd4c 167 _CS = 0; //fixme: really needed?
Geremia 20:14daa48ffd4c 168 _spi.write(0x70);
Geremia 20:14daa48ffd4c 169 _spi.write(0); // write MSB
Geremia 20:14daa48ffd4c 170 _spi.write(reg); // write LSB
Geremia 20:14daa48ffd4c 171 _CS = 1; //fixme: really needed?
Geremia 20:14daa48ffd4c 172 _CS = 0; //fixme: really needed?
Geremia 20:14daa48ffd4c 173 _spi.write(0x72);
Geremia 20:14daa48ffd4c 174 _spi.write(data>>8);
Geremia 20:14daa48ffd4c 175 _spi.write(data&0xFF);
Geremia 20:14daa48ffd4c 176 }
Geremia 20:14daa48ffd4c 177 // ILI932x specific
Geremia 20:14daa48ffd4c 178 unsigned short SPI8::reg_read(unsigned char reg)
Geremia 20:14daa48ffd4c 179 {
Geremia 20:14daa48ffd4c 180 unsigned short r=0;
Geremia 20:14daa48ffd4c 181 _CS = 1; //fixme: really needed?
Geremia 20:14daa48ffd4c 182 _CS = 0; //fixme: really needed?
Geremia 20:14daa48ffd4c 183 _spi.write(0x70);
Geremia 20:14daa48ffd4c 184 _spi.write(0); // write MSB
Geremia 20:14daa48ffd4c 185 _spi.write(reg); // write LSB
Geremia 20:14daa48ffd4c 186 _CS = 1; //fixme: really needed?
Geremia 20:14daa48ffd4c 187 _CS = 0; //fixme: really needed?
Geremia 20:14daa48ffd4c 188 _spi.write(0x73);
Geremia 20:14daa48ffd4c 189 _spi.write(0); // dummy read
Geremia 20:14daa48ffd4c 190 r = _spi.write(0); // read 8bit
Geremia 20:14daa48ffd4c 191 r <<= 8;
Geremia 20:14daa48ffd4c 192 r |= _spi.write(0); // read 8bit
Geremia 7:bb0383b91104 193 return r;
Geremia 7:bb0383b91104 194 }
Geremia 0:75ec1b3cde17 195 void SPI8::hw_reset()
Geremia 0:75ec1b3cde17 196 {
Geremia 34:c66986d80f72 197 thread_sleep_for(15);
Geremia 0:75ec1b3cde17 198 _DC = 1;
Geremia 20:14daa48ffd4c 199 _CS = 1;
Geremia 0:75ec1b3cde17 200 _reset = 0; // display reset
Geremia 34:c66986d80f72 201 thread_sleep_for(2);
Geremia 0:75ec1b3cde17 202 _reset = 1; // end reset
Geremia 34:c66986d80f72 203 thread_sleep_for(100);
Geremia 0:75ec1b3cde17 204 }
Geremia 0:75ec1b3cde17 205 void SPI8::BusEnable(bool enable)
Geremia 0:75ec1b3cde17 206 {
Geremia 0:75ec1b3cde17 207 _CS = enable ? 0:1;
Geremia 0:75ec1b3cde17 208 }