GraphicsDisplay / UniGraphic

Basically i glued Peter Drescher and Simon Ford libs in a GraphicsDisplay class, then derived TFT or LCD class (which inherits Protocols class), then the most derived ones (Inits), which are per-display and are the only part needed to be adapted to diff hw.

Dependents:   testUniGraphic_150217 maze_TFT_MMA8451Q TFT_test_frdm-kl25z TFT_test_NUCLEO-F411RE ... more

Protocols/PAR16.cpp@7:bb0383b91104, 2015-02-17 (annotated)

Committer:
Geremia
Date:
Tue Feb 17 11:02:06 2015 +0000
Revision:
7:bb0383b91104
Parent:
5:b222a9461d6b
Child:
11:b842b8e332cb
TFT: added get deviceID, scroll functions

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Geremia 4:12ba0ecc2c1f 1 /* mbed UniGraphic library - PAR16 protocol class
Geremia 4:12ba0ecc2c1f 2 * Copyright (c) 2015 Giuliano Dianda
Geremia 4:12ba0ecc2c1f 3 * Released under the MIT License: http://mbed.org/license/mit
Geremia 4:12ba0ecc2c1f 4 *
Geremia 4:12ba0ecc2c1f 5 * Derived work of:
Geremia 4:12ba0ecc2c1f 6 *
Geremia 4:12ba0ecc2c1f 7 * mbed library for 240*320 pixel display TFT based on ILI9341 LCD Controller
Geremia 4:12ba0ecc2c1f 8 * Copyright (c) 2013 Peter Drescher - DC2PD
Geremia 4:12ba0ecc2c1f 9 *
Geremia 4:12ba0ecc2c1f 10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
Geremia 4:12ba0ecc2c1f 11 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
Geremia 4:12ba0ecc2c1f 12 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
Geremia 4:12ba0ecc2c1f 13 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
Geremia 4:12ba0ecc2c1f 14 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
Geremia 4:12ba0ecc2c1f 15 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
Geremia 4:12ba0ecc2c1f 16 * THE SOFTWARE.
Geremia 4:12ba0ecc2c1f 17 */
Geremia 4:12ba0ecc2c1f 18 #include "PAR16.h"
Geremia 4:12ba0ecc2c1f 19
Geremia 4:12ba0ecc2c1f 20 PAR16::PAR16(PortName port, PinName CS, PinName reset, PinName DC, PinName WR, PinName RD)
Geremia 4:12ba0ecc2c1f 21 : _port(port,0xFFFF), _CS(CS), _reset(reset), _DC(DC), _WR(WR), _RD(RD)
Geremia 4:12ba0ecc2c1f 22 {
Geremia 4:12ba0ecc2c1f 23 _reset = 1;
Geremia 4:12ba0ecc2c1f 24 _DC=1;
Geremia 4:12ba0ecc2c1f 25 _WR=1;
Geremia 4:12ba0ecc2c1f 26 _RD=1;
Geremia 4:12ba0ecc2c1f 27 _CS=1;
Geremia 4:12ba0ecc2c1f 28 #ifdef STMPORTDEBUG
Geremia 4:12ba0ecc2c1f 29 findport(port); //on return, GPIO get disabled
Geremia 4:12ba0ecc2c1f 30 #endif
Geremia 4:12ba0ecc2c1f 31 _port.mode(PullNone);
Geremia 4:12ba0ecc2c1f 32 _port.output(); // will re-enable our GPIO port
Geremia 4:12ba0ecc2c1f 33 hw_reset();
Geremia 4:12ba0ecc2c1f 34 }
Geremia 4:12ba0ecc2c1f 35
Geremia 4:12ba0ecc2c1f 36 #ifdef STMPORTDEBUG
Geremia 4:12ba0ecc2c1f 37 // create a port obj with STM HAL drivers, just to collect memorymapped regs
Geremia 4:12ba0ecc2c1f 38 void PAR16::findport(PortName port)
Geremia 4:12ba0ecc2c1f 39 {
Geremia 4:12ba0ecc2c1f 40 port_t tempport;
Geremia 4:12ba0ecc2c1f 41 port_init(&tempport, port, 0xFF, PIN_INPUT);
Geremia 4:12ba0ecc2c1f 42 outreg = tempport.reg_out;
Geremia 4:12ba0ecc2c1f 43 inreg = tempport.reg_in;
Geremia 4:12ba0ecc2c1f 44 // debug("out 0x%.8X in 0x%.8X\r\n", outreg, inreg);
Geremia 4:12ba0ecc2c1f 45 }
Geremia 4:12ba0ecc2c1f 46 #endif
Geremia 4:12ba0ecc2c1f 47 void PAR16::wr_cmd8(unsigned char cmd)
Geremia 4:12ba0ecc2c1f 48 {
Geremia 4:12ba0ecc2c1f 49 #ifdef USE_CS
Geremia 4:12ba0ecc2c1f 50 _CS = 0;
Geremia 4:12ba0ecc2c1f 51 #endif
Geremia 4:12ba0ecc2c1f 52 _DC = 0; // 0=cmd
Geremia 4:12ba0ecc2c1f 53 _port.write(cmd); // write 8bit
Geremia 4:12ba0ecc2c1f 54 _WR=0;
Geremia 4:12ba0ecc2c1f 55 _WR=1;
Geremia 4:12ba0ecc2c1f 56 #ifdef USE_CS
Geremia 4:12ba0ecc2c1f 57 _CS = 1;
Geremia 4:12ba0ecc2c1f 58 #endif
Geremia 4:12ba0ecc2c1f 59 }
Geremia 4:12ba0ecc2c1f 60 void PAR16::wr_data8(unsigned char data)
Geremia 4:12ba0ecc2c1f 61 {
Geremia 4:12ba0ecc2c1f 62 #ifdef USE_CS
Geremia 4:12ba0ecc2c1f 63 _CS = 0;
Geremia 4:12ba0ecc2c1f 64 #endif
Geremia 4:12ba0ecc2c1f 65 _DC = 1; // 1=data
Geremia 4:12ba0ecc2c1f 66 _port.write(data); // write 8bit
Geremia 4:12ba0ecc2c1f 67 _WR=0;
Geremia 4:12ba0ecc2c1f 68 _WR=1;
Geremia 4:12ba0ecc2c1f 69 #ifdef USE_CS
Geremia 4:12ba0ecc2c1f 70 _CS = 1;
Geremia 4:12ba0ecc2c1f 71 #endif
Geremia 4:12ba0ecc2c1f 72 }
Geremia 4:12ba0ecc2c1f 73 void PAR16::wr_cmd16(unsigned short cmd)
Geremia 4:12ba0ecc2c1f 74 {
Geremia 4:12ba0ecc2c1f 75 #ifdef USE_CS
Geremia 4:12ba0ecc2c1f 76 _CS = 0;
Geremia 4:12ba0ecc2c1f 77 #endif
Geremia 4:12ba0ecc2c1f 78 _DC = 0; // 0=cmd
Geremia 4:12ba0ecc2c1f 79 _port.write(cmd>>8); // write 8bit
Geremia 4:12ba0ecc2c1f 80 _WR=0;
Geremia 4:12ba0ecc2c1f 81 _WR=1;
Geremia 4:12ba0ecc2c1f 82 _port.write(cmd&0xFF); // write 8bit
Geremia 4:12ba0ecc2c1f 83 _WR=0;
Geremia 4:12ba0ecc2c1f 84 _WR=1;
Geremia 4:12ba0ecc2c1f 85 #ifdef USE_CS
Geremia 4:12ba0ecc2c1f 86 _CS = 1;
Geremia 4:12ba0ecc2c1f 87 #endif
Geremia 4:12ba0ecc2c1f 88 }
Geremia 4:12ba0ecc2c1f 89 void PAR16::wr_data16(unsigned short data)
Geremia 4:12ba0ecc2c1f 90 {
Geremia 4:12ba0ecc2c1f 91 #ifdef USE_CS
Geremia 4:12ba0ecc2c1f 92 _CS = 0;
Geremia 4:12ba0ecc2c1f 93 #endif
Geremia 4:12ba0ecc2c1f 94 _DC = 1; // 1=data
Geremia 4:12ba0ecc2c1f 95 _port.write(data>>8); // write 8bit
Geremia 4:12ba0ecc2c1f 96 _WR=0;
Geremia 4:12ba0ecc2c1f 97 _WR=1;
Geremia 4:12ba0ecc2c1f 98 _port.write(data&0xFF); // write 8bit
Geremia 4:12ba0ecc2c1f 99 _WR=0;
Geremia 4:12ba0ecc2c1f 100 _WR=1;
Geremia 4:12ba0ecc2c1f 101 #ifdef USE_CS
Geremia 4:12ba0ecc2c1f 102 _CS = 1;
Geremia 4:12ba0ecc2c1f 103 #endif
Geremia 4:12ba0ecc2c1f 104 }
Geremia 4:12ba0ecc2c1f 105 void PAR16::wr_gram(unsigned short data)
Geremia 4:12ba0ecc2c1f 106 {
Geremia 4:12ba0ecc2c1f 107 #ifdef USE_CS
Geremia 4:12ba0ecc2c1f 108 _CS = 0;
Geremia 4:12ba0ecc2c1f 109 #endif
Geremia 4:12ba0ecc2c1f 110 _DC = 1; // 1=data
Geremia 4:12ba0ecc2c1f 111 _port.write(data); // write 16bit
Geremia 4:12ba0ecc2c1f 112 _WR=0;
Geremia 4:12ba0ecc2c1f 113 _WR=1;
Geremia 4:12ba0ecc2c1f 114 #ifdef USE_CS
Geremia 4:12ba0ecc2c1f 115 _CS = 1;
Geremia 4:12ba0ecc2c1f 116 #endif
Geremia 4:12ba0ecc2c1f 117 }
Geremia 4:12ba0ecc2c1f 118 void PAR16::wr_gram(unsigned short data, unsigned int count)
Geremia 4:12ba0ecc2c1f 119 {
Geremia 4:12ba0ecc2c1f 120 #ifdef USE_CS
Geremia 4:12ba0ecc2c1f 121 _CS = 0;
Geremia 4:12ba0ecc2c1f 122 #endif
Geremia 4:12ba0ecc2c1f 123 _DC = 1; // 1=data
Geremia 4:12ba0ecc2c1f 124 while(count)
Geremia 4:12ba0ecc2c1f 125 {
Geremia 4:12ba0ecc2c1f 126 _port.write(data); // write 16bit
Geremia 4:12ba0ecc2c1f 127 _WR=0;
Geremia 4:12ba0ecc2c1f 128 _WR=1;
Geremia 4:12ba0ecc2c1f 129 count--;
Geremia 4:12ba0ecc2c1f 130 }
Geremia 4:12ba0ecc2c1f 131 #ifdef USE_CS
Geremia 4:12ba0ecc2c1f 132 _CS = 1;
Geremia 4:12ba0ecc2c1f 133 #endif
Geremia 4:12ba0ecc2c1f 134 }
Geremia 4:12ba0ecc2c1f 135 void PAR16::wr_grambuf(unsigned short* data, unsigned int lenght)
Geremia 4:12ba0ecc2c1f 136 {
Geremia 4:12ba0ecc2c1f 137 #ifdef USE_CS
Geremia 4:12ba0ecc2c1f 138 _CS = 0;
Geremia 4:12ba0ecc2c1f 139 #endif
Geremia 4:12ba0ecc2c1f 140 _DC = 1; // 1=data
Geremia 4:12ba0ecc2c1f 141 while(lenght)
Geremia 4:12ba0ecc2c1f 142 {
Geremia 4:12ba0ecc2c1f 143 _port.write(*data); // write 16bit
Geremia 4:12ba0ecc2c1f 144 _WR=0;
Geremia 4:12ba0ecc2c1f 145 _WR=1;
Geremia 4:12ba0ecc2c1f 146 data++;
Geremia 4:12ba0ecc2c1f 147 lenght--;
Geremia 4:12ba0ecc2c1f 148 }
Geremia 4:12ba0ecc2c1f 149 #ifdef USE_CS
Geremia 4:12ba0ecc2c1f 150 _CS = 1;
Geremia 4:12ba0ecc2c1f 151 #endif
Geremia 4:12ba0ecc2c1f 152 }
Geremia 7:bb0383b91104 153 unsigned short PAR16::rd_gram()
Geremia 5:b222a9461d6b 154 {
Geremia 5:b222a9461d6b 155 #ifdef USE_CS
Geremia 5:b222a9461d6b 156 _CS = 0;
Geremia 5:b222a9461d6b 157 #endif
Geremia 7:bb0383b91104 158 unsigned short r=0;
Geremia 7:bb0383b91104 159 _DC = 1; // 1=data
Geremia 7:bb0383b91104 160 _port.input();
Geremia 7:bb0383b91104 161
Geremia 7:bb0383b91104 162 _RD = 0;
Geremia 7:bb0383b91104 163 _port.read(); //dummy read
Geremia 7:bb0383b91104 164 _RD = 1;
Geremia 7:bb0383b91104 165
Geremia 7:bb0383b91104 166 _RD = 0;
Geremia 7:bb0383b91104 167 // _RD = 0; // add wait
Geremia 7:bb0383b91104 168 r |= _port.read();
Geremia 7:bb0383b91104 169 _RD = 1;
Geremia 7:bb0383b91104 170
Geremia 7:bb0383b91104 171 #ifdef USE_CS
Geremia 7:bb0383b91104 172 _CS = 1;
Geremia 7:bb0383b91104 173 #endif
Geremia 7:bb0383b91104 174 _port.output();
Geremia 7:bb0383b91104 175 return r;
Geremia 7:bb0383b91104 176 }
Geremia 7:bb0383b91104 177 unsigned int PAR16::rd_reg_data32(unsigned char reg)
Geremia 7:bb0383b91104 178 {
Geremia 7:bb0383b91104 179 #ifdef USE_CS
Geremia 7:bb0383b91104 180 _CS = 0;
Geremia 7:bb0383b91104 181 #endif
Geremia 7:bb0383b91104 182 wr_cmd8(reg);
Geremia 5:b222a9461d6b 183 unsigned int r=0;
Geremia 5:b222a9461d6b 184 _DC = 1; // 1=data
Geremia 5:b222a9461d6b 185 _port.input();
Geremia 5:b222a9461d6b 186
Geremia 5:b222a9461d6b 187 _RD = 0;
Geremia 5:b222a9461d6b 188 _port.read(); //dummy read
Geremia 5:b222a9461d6b 189 _RD = 1;
Geremia 5:b222a9461d6b 190
Geremia 5:b222a9461d6b 191 _RD = 0;
Geremia 5:b222a9461d6b 192 // _RD = 0; // add wait
Geremia 5:b222a9461d6b 193 r |= (_port.read()&0xFF);
Geremia 5:b222a9461d6b 194 r <<= 8;
Geremia 5:b222a9461d6b 195 _RD = 1;
Geremia 5:b222a9461d6b 196
Geremia 5:b222a9461d6b 197 _RD = 0;
Geremia 5:b222a9461d6b 198 // _RD = 0; // add wait
Geremia 5:b222a9461d6b 199 r |= (_port.read()&0xFF);
Geremia 5:b222a9461d6b 200 r <<= 8;
Geremia 5:b222a9461d6b 201 _RD = 1;
Geremia 5:b222a9461d6b 202
Geremia 5:b222a9461d6b 203 _RD = 0;
Geremia 5:b222a9461d6b 204 // _RD = 0; // add wait
Geremia 5:b222a9461d6b 205 r |= (_port.read()&0xFF);
Geremia 5:b222a9461d6b 206 r <<= 8;
Geremia 5:b222a9461d6b 207 _RD = 1;
Geremia 5:b222a9461d6b 208
Geremia 5:b222a9461d6b 209 _RD = 0;
Geremia 5:b222a9461d6b 210 // _RD = 0; // add wait
Geremia 5:b222a9461d6b 211 r |= (_port.read()&0xFF);
Geremia 5:b222a9461d6b 212 _RD = 1;
Geremia 5:b222a9461d6b 213
Geremia 5:b222a9461d6b 214 _CS = 1; // force CS HIG to interupt the cmd in case was not supported
Geremia 5:b222a9461d6b 215 #ifndef USE_CS //if CS is not used, force fixed LOW again
Geremia 5:b222a9461d6b 216 _CS = 0;
Geremia 5:b222a9461d6b 217 #endif
Geremia 5:b222a9461d6b 218 _port.output();
Geremia 5:b222a9461d6b 219 return r;
Geremia 5:b222a9461d6b 220 }
Geremia 7:bb0383b91104 221 // in Par mode EXTC regs (0xB0-0xFF) can be directly read
Geremia 7:bb0383b91104 222 unsigned int PAR16::rd_extcreg_data32(unsigned char reg, unsigned char SPIreadenablecmd)
Geremia 5:b222a9461d6b 223 {
Geremia 7:bb0383b91104 224 return rd_reg_data32(reg);
Geremia 5:b222a9461d6b 225 }
Geremia 4:12ba0ecc2c1f 226 void PAR16::hw_reset()
Geremia 4:12ba0ecc2c1f 227 {
Geremia 4:12ba0ecc2c1f 228 wait_ms(15);
Geremia 4:12ba0ecc2c1f 229 _DC = 1;
Geremia 4:12ba0ecc2c1f 230 _CS = 1;
Geremia 4:12ba0ecc2c1f 231 _WR = 1;
Geremia 4:12ba0ecc2c1f 232 _RD = 1;
Geremia 4:12ba0ecc2c1f 233 _reset = 0; // display reset
Geremia 4:12ba0ecc2c1f 234 wait_us(50);
Geremia 4:12ba0ecc2c1f 235 _reset = 1; // end reset
Geremia 4:12ba0ecc2c1f 236 wait_ms(15);
Geremia 4:12ba0ecc2c1f 237 #ifndef USE_CS
Geremia 4:12ba0ecc2c1f 238 _CS=0; // put CS low now and forever
Geremia 4:12ba0ecc2c1f 239 #endif
Geremia 4:12ba0ecc2c1f 240 }
Geremia 4:12ba0ecc2c1f 241 void PAR16::BusEnable(bool enable)
Geremia 4:12ba0ecc2c1f 242 {
Geremia 4:12ba0ecc2c1f 243 _CS = enable ? 0:1;
Geremia 4:12ba0ecc2c1f 244 }