Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

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sahilmgandhi 18:6a4db94011d3 1 /**************************************************************************//**
sahilmgandhi 18:6a4db94011d3 2 * @file emac.h
sahilmgandhi 18:6a4db94011d3 3 * @version V1.00
sahilmgandhi 18:6a4db94011d3 4 * $Revision: 9 $
sahilmgandhi 18:6a4db94011d3 5 * $Date: 14/05/29 1:13p $
sahilmgandhi 18:6a4db94011d3 6 * @brief NUC472/NUC442 EMAC driver header file
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * @note
sahilmgandhi 18:6a4db94011d3 9 * Copyright (C) 2013 Nuvoton Technology Corp. All rights reserved.
sahilmgandhi 18:6a4db94011d3 10 *****************************************************************************/
sahilmgandhi 18:6a4db94011d3 11 #ifndef __EMAC_H__
sahilmgandhi 18:6a4db94011d3 12 #define __EMAC_H__
sahilmgandhi 18:6a4db94011d3 13
sahilmgandhi 18:6a4db94011d3 14 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 15 extern "C"
sahilmgandhi 18:6a4db94011d3 16 {
sahilmgandhi 18:6a4db94011d3 17 #endif
sahilmgandhi 18:6a4db94011d3 18
sahilmgandhi 18:6a4db94011d3 19
sahilmgandhi 18:6a4db94011d3 20 /** @addtogroup NUC472_442_Device_Driver NUC472/NUC442 Device Driver
sahilmgandhi 18:6a4db94011d3 21 @{
sahilmgandhi 18:6a4db94011d3 22 */
sahilmgandhi 18:6a4db94011d3 23
sahilmgandhi 18:6a4db94011d3 24 /** @addtogroup NUC472_442_EMAC_Driver EMAC Driver
sahilmgandhi 18:6a4db94011d3 25 @{
sahilmgandhi 18:6a4db94011d3 26 */
sahilmgandhi 18:6a4db94011d3 27
sahilmgandhi 18:6a4db94011d3 28 /** @addtogroup NUC472_442_EMAC_EXPORTED_CONSTANTS EMAC Exported Constants
sahilmgandhi 18:6a4db94011d3 29 @{
sahilmgandhi 18:6a4db94011d3 30 */
sahilmgandhi 18:6a4db94011d3 31
sahilmgandhi 18:6a4db94011d3 32 #define EMAC_PHY_ADDR 1 ///< PHY address, this address is board dependent
sahilmgandhi 18:6a4db94011d3 33
sahilmgandhi 18:6a4db94011d3 34 #define EMAC_RX_DESC_SIZE 4 ///< Number of Rx Descriptors, should be 2 at least
sahilmgandhi 18:6a4db94011d3 35 #define EMAC_TX_DESC_SIZE 4 ///< Number of Tx Descriptors, should be 2 at least
sahilmgandhi 18:6a4db94011d3 36
sahilmgandhi 18:6a4db94011d3 37
sahilmgandhi 18:6a4db94011d3 38 /*@}*/ /* end of group NUC472_442_EMAC_EXPORTED_CONSTANTS */
sahilmgandhi 18:6a4db94011d3 39
sahilmgandhi 18:6a4db94011d3 40
sahilmgandhi 18:6a4db94011d3 41 /** @addtogroup NUC472_442_EMAC_EXPORTED_FUNCTIONS EMAC Exported Functions
sahilmgandhi 18:6a4db94011d3 42 @{
sahilmgandhi 18:6a4db94011d3 43 */
sahilmgandhi 18:6a4db94011d3 44
sahilmgandhi 18:6a4db94011d3 45
sahilmgandhi 18:6a4db94011d3 46 /**
sahilmgandhi 18:6a4db94011d3 47 * @brief Enable EMAC Tx function
sahilmgandhi 18:6a4db94011d3 48 * @param None
sahilmgandhi 18:6a4db94011d3 49 * @return None
sahilmgandhi 18:6a4db94011d3 50 * \hideinitializer
sahilmgandhi 18:6a4db94011d3 51 */
sahilmgandhi 18:6a4db94011d3 52 #define EMAC_ENABLE_TX() (EMAC->CTL |= EMAC_CTL_TXON_Msk)
sahilmgandhi 18:6a4db94011d3 53
sahilmgandhi 18:6a4db94011d3 54
sahilmgandhi 18:6a4db94011d3 55 /**
sahilmgandhi 18:6a4db94011d3 56 * @brief Enable EMAC Rx function
sahilmgandhi 18:6a4db94011d3 57 * @param None
sahilmgandhi 18:6a4db94011d3 58 * @return None
sahilmgandhi 18:6a4db94011d3 59 * \hideinitializer
sahilmgandhi 18:6a4db94011d3 60 */
sahilmgandhi 18:6a4db94011d3 61 #define EMAC_ENABLE_RX() do{EMAC->CTL |= EMAC_CTL_RXON_Msk; EMAC->RXST = 0;}while(0)
sahilmgandhi 18:6a4db94011d3 62
sahilmgandhi 18:6a4db94011d3 63 /**
sahilmgandhi 18:6a4db94011d3 64 * @brief Disable EMAC Tx function
sahilmgandhi 18:6a4db94011d3 65 * @param None
sahilmgandhi 18:6a4db94011d3 66 * @return None
sahilmgandhi 18:6a4db94011d3 67 * \hideinitializer
sahilmgandhi 18:6a4db94011d3 68 */
sahilmgandhi 18:6a4db94011d3 69 #define EMAC_DISABLE_TX() (EMAC->CTL &= ~EMAC_CTL_TXON_Msk)
sahilmgandhi 18:6a4db94011d3 70
sahilmgandhi 18:6a4db94011d3 71
sahilmgandhi 18:6a4db94011d3 72 /**
sahilmgandhi 18:6a4db94011d3 73 * @brief Disable EMAC Rx function
sahilmgandhi 18:6a4db94011d3 74 * @param None
sahilmgandhi 18:6a4db94011d3 75 * @return None
sahilmgandhi 18:6a4db94011d3 76 * \hideinitializer
sahilmgandhi 18:6a4db94011d3 77 */
sahilmgandhi 18:6a4db94011d3 78 #define EMAC_DISABLE_RX() (EMAC->CTL &= ~EMAC_CTL_RXON_Msk)
sahilmgandhi 18:6a4db94011d3 79
sahilmgandhi 18:6a4db94011d3 80 /**
sahilmgandhi 18:6a4db94011d3 81 * @brief Enable EMAC Magic Packet Wakeup function
sahilmgandhi 18:6a4db94011d3 82 * @param None
sahilmgandhi 18:6a4db94011d3 83 * @return None
sahilmgandhi 18:6a4db94011d3 84 * \hideinitializer
sahilmgandhi 18:6a4db94011d3 85 */
sahilmgandhi 18:6a4db94011d3 86 #define EMAC_ENABLE_MAGIC_PKT_WAKEUP() (EMAC->CTL |= EMAC_CTL_WOLEN_Msk)
sahilmgandhi 18:6a4db94011d3 87
sahilmgandhi 18:6a4db94011d3 88
sahilmgandhi 18:6a4db94011d3 89 /**
sahilmgandhi 18:6a4db94011d3 90 * @brief Disable EMAC Magic Packet Wakeup function
sahilmgandhi 18:6a4db94011d3 91 * @param None
sahilmgandhi 18:6a4db94011d3 92 * @return None
sahilmgandhi 18:6a4db94011d3 93 * \hideinitializer
sahilmgandhi 18:6a4db94011d3 94 */
sahilmgandhi 18:6a4db94011d3 95 #define EMAC_DISABLE_MAGIC_PKT_WAKEUP() (EMAC->CTL &= ~EMAC_CTL_WOLEN_Msk)
sahilmgandhi 18:6a4db94011d3 96
sahilmgandhi 18:6a4db94011d3 97 /**
sahilmgandhi 18:6a4db94011d3 98 * @brief Enable EMAC MII interface
sahilmgandhi 18:6a4db94011d3 99 * @param None
sahilmgandhi 18:6a4db94011d3 100 * @return None
sahilmgandhi 18:6a4db94011d3 101 * @details After calling \ref EMAC_Open, EMAC use RMII interface by default, but can switch to
sahilmgandhi 18:6a4db94011d3 102 * MII interface by calling this macro
sahilmgandhi 18:6a4db94011d3 103 * \hideinitializer
sahilmgandhi 18:6a4db94011d3 104 */
sahilmgandhi 18:6a4db94011d3 105 #define EMAC_ENABLE_MII_INTF() (EMAC->CTL &= ~(EMAC_CTL_RMIIEN_Msk | EMAC_CTL_RMIIRXCTL_Msk))
sahilmgandhi 18:6a4db94011d3 106
sahilmgandhi 18:6a4db94011d3 107 /**
sahilmgandhi 18:6a4db94011d3 108 * @brief Enable EMAC to receive broadcast packets
sahilmgandhi 18:6a4db94011d3 109 * @param None
sahilmgandhi 18:6a4db94011d3 110 * @return None
sahilmgandhi 18:6a4db94011d3 111 * \hideinitializer
sahilmgandhi 18:6a4db94011d3 112 */
sahilmgandhi 18:6a4db94011d3 113 #define EMAC_ENABLE_RECV_BCASTPKT() (EMAC->CAMCTL |= EMAC_CAMCTL_ABP_Msk)
sahilmgandhi 18:6a4db94011d3 114
sahilmgandhi 18:6a4db94011d3 115 /**
sahilmgandhi 18:6a4db94011d3 116 * @brief Disable EMAC to receive broadcast packets
sahilmgandhi 18:6a4db94011d3 117 * @param None
sahilmgandhi 18:6a4db94011d3 118 * @return None
sahilmgandhi 18:6a4db94011d3 119 * \hideinitializer
sahilmgandhi 18:6a4db94011d3 120 */
sahilmgandhi 18:6a4db94011d3 121 #define EMAC_DISABLE_RECV_BCASTPKT() (EMAC->CAMCTL &= ~EMAC_CAMCTL_ABP_Msk)
sahilmgandhi 18:6a4db94011d3 122
sahilmgandhi 18:6a4db94011d3 123 /**
sahilmgandhi 18:6a4db94011d3 124 * @brief Enable EMAC to receive multicast packets
sahilmgandhi 18:6a4db94011d3 125 * @param None
sahilmgandhi 18:6a4db94011d3 126 * @return None
sahilmgandhi 18:6a4db94011d3 127 * \hideinitializer
sahilmgandhi 18:6a4db94011d3 128 */
sahilmgandhi 18:6a4db94011d3 129 #define EMAC_ENABLE_RECV_MCASTPKT() (EMAC->CAMCTL |= EMAC_CAMCTL_AMP_Msk)
sahilmgandhi 18:6a4db94011d3 130
sahilmgandhi 18:6a4db94011d3 131 /**
sahilmgandhi 18:6a4db94011d3 132 * @brief Disable EMAC Magic Packet Wakeup function
sahilmgandhi 18:6a4db94011d3 133 * @param None
sahilmgandhi 18:6a4db94011d3 134 * @return None
sahilmgandhi 18:6a4db94011d3 135 * \hideinitializer
sahilmgandhi 18:6a4db94011d3 136 */
sahilmgandhi 18:6a4db94011d3 137 #define EMAC_DISABLE_RECV_MCASTPKT() (EMAC->CAMCTL &= ~EMAC_CAMCTL_AMP_Msk)
sahilmgandhi 18:6a4db94011d3 138
sahilmgandhi 18:6a4db94011d3 139 /**
sahilmgandhi 18:6a4db94011d3 140 * @brief Check if EMAC time stamp alarm interrupt occurred or not
sahilmgandhi 18:6a4db94011d3 141 * @param None
sahilmgandhi 18:6a4db94011d3 142 * @return If time stamp alarm interrupt occurred or not
sahilmgandhi 18:6a4db94011d3 143 * @retval 0 Alarm interrupt does not occur
sahilmgandhi 18:6a4db94011d3 144 * @retval 1 Alarm interrupt occurred
sahilmgandhi 18:6a4db94011d3 145 * \hideinitializer
sahilmgandhi 18:6a4db94011d3 146 */
sahilmgandhi 18:6a4db94011d3 147 #define EMAC_GET_ALARM_FLAG() (EMAC->INTSTS & EMAC_INTSTS_TSALMIF_Msk ? 1 : 0)
sahilmgandhi 18:6a4db94011d3 148
sahilmgandhi 18:6a4db94011d3 149 /**
sahilmgandhi 18:6a4db94011d3 150 * @brief Clear EMAC time stamp alarm interrupt flag
sahilmgandhi 18:6a4db94011d3 151 * @param None
sahilmgandhi 18:6a4db94011d3 152 * @return None
sahilmgandhi 18:6a4db94011d3 153 * \hideinitializer
sahilmgandhi 18:6a4db94011d3 154 */
sahilmgandhi 18:6a4db94011d3 155 #define EMAC_CLR_ALARM_FLAG() (EMAC->INTSTS = EMAC_INTSTS_TSALMIF_Msk)
sahilmgandhi 18:6a4db94011d3 156
sahilmgandhi 18:6a4db94011d3 157
sahilmgandhi 18:6a4db94011d3 158 void EMAC_Open(uint8_t *pu8MacAddr);
sahilmgandhi 18:6a4db94011d3 159 void EMAC_Close(void);
sahilmgandhi 18:6a4db94011d3 160 void EMAC_SetMacAddr(uint8_t *pu8MacAddr);
sahilmgandhi 18:6a4db94011d3 161 void EMAC_EnableCamEntry(uint32_t u32Entry, uint8_t *pu8MacAddr);
sahilmgandhi 18:6a4db94011d3 162 void EMAC_DisableCamEntry(uint32_t u32Entry);
sahilmgandhi 18:6a4db94011d3 163
sahilmgandhi 18:6a4db94011d3 164 uint32_t EMAC_RecvPkt(uint8_t *pu8Data, uint32_t *pu32Size);
sahilmgandhi 18:6a4db94011d3 165 uint32_t EMAC_RecvPktTS(uint8_t *pu8Data, uint32_t *pu32Size, uint32_t *pu32Sec, uint32_t *pu32Nsec);
sahilmgandhi 18:6a4db94011d3 166 void EMAC_RecvPktDone(void);
sahilmgandhi 18:6a4db94011d3 167
sahilmgandhi 18:6a4db94011d3 168 uint32_t EMAC_SendPkt(uint8_t *pu8Data, uint32_t u32Size);
sahilmgandhi 18:6a4db94011d3 169 uint32_t EMAC_SendPktDone(void);
sahilmgandhi 18:6a4db94011d3 170 uint32_t EMAC_SendPktDoneTS(uint32_t *pu32Sec, uint32_t *pu32Nsec);
sahilmgandhi 18:6a4db94011d3 171
sahilmgandhi 18:6a4db94011d3 172 void EMAC_EnableTS(uint32_t u32Sec, uint32_t u32Nsec);
sahilmgandhi 18:6a4db94011d3 173 void EMAC_DisableTS(void);
sahilmgandhi 18:6a4db94011d3 174 void EMAC_GetTime(uint32_t *pu32Sec, uint32_t *pu32Nsec);
sahilmgandhi 18:6a4db94011d3 175 void EMAC_SetTime(uint32_t u32Sec, uint32_t u32Nsec);
sahilmgandhi 18:6a4db94011d3 176 void EMAC_UpdateTime(uint32_t u32Neg, uint32_t u32Sec, uint32_t u32Nsec);
sahilmgandhi 18:6a4db94011d3 177 void EMAC_EnableAlarm(uint32_t u32Sec, uint32_t u32Nsec);
sahilmgandhi 18:6a4db94011d3 178 void EMAC_DisableAlarm(void);
sahilmgandhi 18:6a4db94011d3 179
sahilmgandhi 18:6a4db94011d3 180
sahilmgandhi 18:6a4db94011d3 181
sahilmgandhi 18:6a4db94011d3 182 /*@}*/ /* end of group NUC472_442_EMAC_EXPORTED_FUNCTIONS */
sahilmgandhi 18:6a4db94011d3 183
sahilmgandhi 18:6a4db94011d3 184 /*@}*/ /* end of group NUC472_442_EMAC_Driver */
sahilmgandhi 18:6a4db94011d3 185
sahilmgandhi 18:6a4db94011d3 186 /*@}*/ /* end of group NUC472_442_Device_Driver */
sahilmgandhi 18:6a4db94011d3 187
sahilmgandhi 18:6a4db94011d3 188 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 189 }
sahilmgandhi 18:6a4db94011d3 190 #endif
sahilmgandhi 18:6a4db94011d3 191
sahilmgandhi 18:6a4db94011d3 192 #endif //__EMAC_H__
sahilmgandhi 18:6a4db94011d3 193
sahilmgandhi 18:6a4db94011d3 194 /*** (C) COPYRIGHT 2013 Nuvoton Technology Corp. ***/