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(wiki syntax)
PORT_Type Struct Reference
[PORT Peripheral Access Layer]
PORT - Register Layout Typedef. More...
#include <MK20D5.h>
Data Fields | |
| __IO uint32_t | PCR [32] |
| Pin Control Register n, array offset: 0x0, array step: 0x4. | |
| __O uint32_t | GPCLR |
| Global Pin Control Low Register, offset: 0x80. | |
| __O uint32_t | GPCHR |
| Global Pin Control High Register, offset: 0x84. | |
| __IO uint32_t | ISFR |
| Interrupt Status Flag Register, offset: 0xA0. | |
| __IO uint32_t | DFER |
| Digital Filter Enable Register, offset: 0xC0. | |
| __IO uint32_t | DFCR |
| Digital Filter Clock Register, offset: 0xC4. | |
| __IO uint32_t | DFWR |
| Digital Filter Width Register, offset: 0xC8. | |
Detailed Description
PORT - Register Layout Typedef.
Definition at line 4674 of file MK20D5.h.
Field Documentation
Generated on Tue Jul 12 2022 15:37:38 by
1.7.2