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DAPLink Reset
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PDB_Type Struct Reference
[PDB Peripheral Access Layer]
PDB - Register Layout Typedef. More...
#include <MK20D5.h>
Data Fields | |
| __IO uint32_t | SC |
| Status and Control Register, offset: 0x0. | |
| __IO uint32_t | MOD |
| Modulus Register, offset: 0x4. | |
| __I uint32_t | CNT |
| Counter Register, offset: 0x8. | |
| __IO uint32_t | IDLY |
| Interrupt Delay Register, offset: 0xC. | |
| __IO uint32_t | POEN |
| Pulse-Out n Enable Register, offset: 0x190. | |
| __IO uint32_t | PODLY [2] |
| Pulse-Out n Delay Register, array offset: 0x194, array step: 0x4. | |
| __IO uint32_t | C1 |
| Channel n Control Register 1, array offset: 0x10, array step: 0x10. | |
| __IO uint32_t | INTC |
| DAC Interval Trigger n Control register, array offset: 0x150, array step: 0x8. | |
| __IO uint32_t | INT |
| DAC Interval n register, array offset: 0x154, array step: 0x8. | |
Detailed Description
PDB - Register Layout Typedef.
Definition at line 4326 of file MK20D5.h.
Field Documentation
| __IO uint32_t C1 |
| __IO uint32_t INT |
| __IO uint32_t INTC |
Generated on Tue Jul 12 2022 15:37:38 by
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