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ADC_Type Struct Reference
Data Fields

ADC_Type Struct Reference
[ADC Peripheral Access Layer]

ADC - Register Layout Typedef. More...

#include <MK20D5.h>

Data Fields

__IO uint32_t SC1 [2]
 ADC status and control registers 1, array offset: 0x0, array step: 0x4.
__IO uint32_t CFG1
 ADC configuration register 1, offset: 0x8.
__IO uint32_t CFG2
 Configuration register 2, offset: 0xC.
__I uint32_t R [2]
 ADC data result register, array offset: 0x10, array step: 0x4.
__IO uint32_t CV1
 Compare value registers, offset: 0x18.
__IO uint32_t CV2
 Compare value registers, offset: 0x1C.
__IO uint32_t SC2
 Status and control register 2, offset: 0x20.
__IO uint32_t SC3
 Status and control register 3, offset: 0x24.
__IO uint32_t OFS
 ADC offset correction register, offset: 0x28.
__IO uint32_t PG
 ADC plus-side gain register, offset: 0x2C.
__IO uint32_t MG
 ADC minus-side gain register, offset: 0x30.
__IO uint32_t CLPD
 ADC plus-side general calibration value register, offset: 0x34.
__IO uint32_t CLPS
 ADC plus-side general calibration value register, offset: 0x38.
__IO uint32_t CLP4
 ADC plus-side general calibration value register, offset: 0x3C.
__IO uint32_t CLP3
 ADC plus-side general calibration value register, offset: 0x40.
__IO uint32_t CLP2
 ADC plus-side general calibration value register, offset: 0x44.
__IO uint32_t CLP1
 ADC plus-side general calibration value register, offset: 0x48.
__IO uint32_t CLP0
 ADC plus-side general calibration value register, offset: 0x4C.
__IO uint32_t CLMD
 ADC minus-side general calibration value register, offset: 0x54.
__IO uint32_t CLMS
 ADC minus-side general calibration value register, offset: 0x58.
__IO uint32_t CLM4
 ADC minus-side general calibration value register, offset: 0x5C.
__IO uint32_t CLM3
 ADC minus-side general calibration value register, offset: 0x60.
__IO uint32_t CLM2
 ADC minus-side general calibration value register, offset: 0x64.
__IO uint32_t CLM1
 ADC minus-side general calibration value register, offset: 0x68.
__IO uint32_t CLM0
 ADC minus-side general calibration value register, offset: 0x6C.

Detailed Description

ADC - Register Layout Typedef.

Definition at line 380 of file MK20D5.h.

Field Documentation

__IO uint32_t SC1

ADC status and control registers 1, array offset: 0x0, array step: 0x4.

ADC Status and Control Registers 1, array offset: 0x0, array step: 0x4.

Definition at line 381 of file MK20D5.h.

Generated on Tue Jul 12 2022 15:37:36 by  doxygen 1.7.2