Data Structures
struct	_sim_clock_config
	SIM configuration structure for clock setting. More...
struct	_oscer_config
	OSC configuration for OSCERCLK. More...
struct	_osc_config
	OSC Initialization Configuration Structure. More...
struct	_mcg_pll_config
	MCG PLL configuration. More...
struct	_mcg_config
	MCG configure structure for mode change. More...
Files
file	fsl_clock.h
Typedefs
typedef enum _clock_name	clock_name_t
	Clock name used to get clock frequency.
typedef enum _clock_usb_src	clock_usb_src_t
	USB clock source definition.
typedef enum _clock_ip_name	clock_ip_name_t
	Clock gate name used for CLOCK_EnableClock/CLOCK_DisableClock.
typedef struct _sim_clock_config	sim_clock_config_t
	SIM configuration structure for clock setting.
typedef enum _osc_mode	osc_mode_t
	OSC work mode.
typedef struct _oscer_config	oscer_config_t
	OSC configuration for OSCERCLK.
typedef struct _osc_config	osc_config_t
	OSC Initialization Configuration Structure.
typedef enum _mcg_fll_src	mcg_fll_src_t
	MCG FLL reference clock source select.
typedef enum _mcg_irc_mode	mcg_irc_mode_t
	MCG internal reference clock select.
typedef enum _mcg_dmx32	mcg_dmx32_t
	MCG DCO Maximum Frequency with 32.768 kHz Reference.
typedef enum _mcg_drs	mcg_drs_t
	MCG DCO range select.
typedef enum _mcg_pll_ref_src	mcg_pll_ref_src_t
	MCG PLL reference clock select.
typedef enum _mcg_clkout_src	mcg_clkout_src_t
	MCGOUT clock source.
typedef enum _mcg_atm_select	mcg_atm_select_t
	MCG Automatic Trim Machine Select.
typedef enum _mcg_oscsel	mcg_oscsel_t
	MCG OSC Clock Select.
typedef enum _mcg_pll_clk_select	mcg_pll_clk_select_t
	MCG PLLCS select.
typedef enum _mcg_monitor_mode	mcg_monitor_mode_t
	MCG clock monitor mode.
typedef enum _mcg_mode	mcg_mode_t
	MCG mode definitions.
typedef struct _mcg_pll_config	mcg_pll_config_t
	MCG PLL configuration.
typedef struct _mcg_config	mcg_config_t
	MCG configure structure for mode change.
Enumerations
enum	_clock_name { kCLOCK_CoreSysClk, kCLOCK_PlatClk, kCLOCK_BusClk, kCLOCK_FlexBusClk, kCLOCK_FlashClk, kCLOCK_FastPeriphClk, kCLOCK_PllFllSelClk, kCLOCK_Er32kClk, kCLOCK_Osc0ErClk, kCLOCK_Osc1ErClk, kCLOCK_Osc0ErClkUndiv, kCLOCK_McgFixedFreqClk, kCLOCK_McgInternalRefClk, kCLOCK_McgFllClk, kCLOCK_McgPll0Clk, kCLOCK_McgPll1Clk, kCLOCK_McgExtPllClk, kCLOCK_McgPeriphClk, kCLOCK_McgIrc48MClk, kCLOCK_LpoClk }
	Clock name used to get clock frequency. More...
enum	_clock_usb_src { kCLOCK_UsbSrcPll0 = SIM_SOPT2_USBSRC(1U) \| SIM_SOPT2_PLLFLLSEL(1U), kCLOCK_UsbSrcUsbPfd = SIM_SOPT2_USBSRC(1U) \| SIM_SOPT2_PLLFLLSEL(2U), kCLOCK_UsbSrcIrc48M = SIM_SOPT2_USBSRC(1U) \| SIM_SOPT2_PLLFLLSEL(3U), kCLOCK_UsbSrcExt = SIM_SOPT2_USBSRC(0U) }
	USB clock source definition. More...
enum	_clock_ip_name
	Clock gate name used for CLOCK_EnableClock/CLOCK_DisableClock. More...
enum	_osc_mode { kOSC_ModeExt = 0U, kOSC_ModeOscLowPower = MCG_C2_EREFS_MASK, kOSC_ModeOscLowPower = MCG_C2_EREFS_MASK, kOSC_ModeOscHighGain, MCG_C2_HGO0_MASK }
	OSC work mode. More...
enum	_osc_cap_load { kOSC_Cap2P = OSC_CR_SC2P_MASK, kOSC_Cap4P = OSC_CR_SC4P_MASK, kOSC_Cap8P = OSC_CR_SC8P_MASK, kOSC_Cap16P = OSC_CR_SC16P_MASK }
	Oscillator capacitor load setting. More...
enum	_oscer_enable_mode { kOSC_ErClkEnable = OSC_CR_ERCLKEN_MASK, kOSC_ErClkEnableInStop = OSC_CR_EREFSTEN_MASK }
	OSCERCLK enable mode. More...
enum	_mcg_fll_src { kMCG_FllSrcExternal, kMCG_FllSrcInternal }
	MCG FLL reference clock source select. More...
enum	_mcg_irc_mode { kMCG_IrcSlow, kMCG_IrcFast }
	MCG internal reference clock select. More...
enum	_mcg_dmx32 { kMCG_Dmx32Default, kMCG_Dmx32Fine }
	MCG DCO Maximum Frequency with 32.768 kHz Reference. More...
enum	_mcg_drs { kMCG_DrsLow, kMCG_DrsMid, kMCG_DrsMidHigh, kMCG_DrsHigh }
	MCG DCO range select. More...
enum	_mcg_pll_ref_src { kMCG_PllRefOsc0, kMCG_PllRefOsc1 }
	MCG PLL reference clock select. More...
enum	_mcg_clkout_src { kMCG_ClkOutSrcOut, kMCG_ClkOutSrcInternal, kMCG_ClkOutSrcExternal }
	MCGOUT clock source. More...
enum	_mcg_atm_select { kMCG_AtmSel32k, kMCG_AtmSel4m }
	MCG Automatic Trim Machine Select. More...
enum	_mcg_oscsel { kMCG_OscselOsc, kMCG_OscselRtc, kMCG_OscselIrc }
	MCG OSC Clock Select. More...
enum	_mcg_pll_clk_select { kMCG_PllClkSelPll0 }
	MCG PLLCS select. More...
enum	_mcg_monitor_mode { kMCG_MonitorNone, kMCG_MonitorInt, kMCG_MonitorReset }
	MCG clock monitor mode. More...
enum	_mcg_status { kStatus_MCG_ModeUnreachable = MAKE_STATUS(kStatusGroup_MCG, 0), kStatus_MCG_ModeInvalid = MAKE_STATUS(kStatusGroup_MCG, 1), kStatus_MCG_AtmBusClockInvalid = MAKE_STATUS(kStatusGroup_MCG, 2), kStatus_MCG_AtmDesiredFreqInvalid = MAKE_STATUS(kStatusGroup_MCG, 3), kStatus_MCG_AtmIrcUsed = MAKE_STATUS(kStatusGroup_MCG, 4), kStatus_MCG_AtmHardwareFail = MAKE_STATUS(kStatusGroup_MCG, 5), kStatus_MCG_SourceUsed = MAKE_STATUS(kStatusGroup_MCG, 6) }
	MCG status. More...
enum	_mcg_status_flags_t { kMCG_Osc0LostFlag = (1U << 0U), kMCG_Osc0InitFlag = (1U << 1U), kMCG_RtcOscLostFlag = (1U << 4U), kMCG_Pll0LostFlag = (1U << 5U), kMCG_Pll0LockFlag = (1U << 6U), kMCG_ExtPllLostFlag = (1U << 9U) }
	MCG status flags. More...
enum	_mcg_irclk_enable_mode { kMCG_IrclkEnable = MCG_C1_IRCLKEN_MASK, kMCG_IrclkEnableInStop = MCG_C1_IREFSTEN_MASK }
	MCG internal reference clock (MCGIRCLK) enable mode definition. More...
enum	_mcg_pll_enable_mode { kMCG_PllEnableIndependent = MCG_C5_PLLCLKEN0_MASK, kMCG_PllEnableInStop = MCG_C5_PLLSTEN0_MASK }
	MCG PLL clock enable mode definition. More...
enum	_mcg_mode { kMCG_ModeFEI = 0U, kMCG_ModeFBI, kMCG_ModeBLPI, kMCG_ModeFEE, kMCG_ModeFBE, kMCG_ModeBLPE, kMCG_ModePBE, kMCG_ModePEE, kMCG_ModeError }
	MCG mode definitions. More...
Functions
static void	CLOCK_EnableClock (clock_ip_name_t name)
	Enable the clock for specific IP.
static void	CLOCK_DisableClock (clock_ip_name_t name)
	Disable the clock for specific IP.
static void	CLOCK_SetEr32kClock (uint32_t src)
	Set ERCLK32K source.
static void	CLOCK_SetSdhc0Clock (uint32_t src)
	Set SDHC0 clock source.
static void	CLOCK_SetLpuartClock (uint32_t src)
	Set LPUART clock source.
static void	CLOCK_SetTpmClock (uint32_t src)
	Set TPM clock source.
static void	CLOCK_SetTraceClock (uint32_t src, uint32_t divValue, uint32_t fracValue)
	Set debug trace clock source.
static void	CLOCK_SetPllFllSelClock (uint32_t src, uint32_t divValue, uint32_t fracValue)
	Set PLLFLLSEL clock source.
static void	CLOCK_SetClkOutClock (uint32_t src)
	Set CLKOUT source.
static void	CLOCK_SetRtcClkOutClock (uint32_t src)
	Set RTC_CLKOUT source.
bool	CLOCK_EnableUsbhs0Clock (clock_usb_src_t src, uint32_t freq)
	Enable USB HS clock.
static void	CLOCK_DisableUsbhs0Clock (void)
bool	CLOCK_EnableUsbfs0Clock (clock_usb_src_t src, uint32_t freq)
	Enable USB FS clock.
static void	CLOCK_DisableUsbfs0Clock (void)
static void	CLOCK_SetOutDiv (uint32_t outdiv1, uint32_t outdiv2, uint32_t outdiv3, uint32_t outdiv4)
	System clock divider.
uint32_t	CLOCK_GetFreq (clock_name_t clockName)
	Gets the clock frequency for a specific clock name.
uint32_t	CLOCK_GetCoreSysClkFreq (void)
	Get the core clock or system clock frequency.
uint32_t	CLOCK_GetPlatClkFreq (void)
	Get the platform clock frequency.
uint32_t	CLOCK_GetBusClkFreq (void)
	Get the bus clock frequency.
uint32_t	CLOCK_GetFlexBusClkFreq (void)
	Get the flexbus clock frequency.
uint32_t	CLOCK_GetFlashClkFreq (void)
	Get the flash clock frequency.
uint32_t	CLOCK_GetPllFllSelClkFreq (void)
	Get the output clock frequency selected by SIM[PLLFLLSEL].
uint32_t	CLOCK_GetEr32kClkFreq (void)
	Get the external reference 32K clock frequency (ERCLK32K).
uint32_t	CLOCK_GetOsc0ErClkFreq (void)
	Get the OSC0 external reference clock frequency (OSC0ERCLK).
uint32_t	CLOCK_GetOsc0ErClkUndivFreq (void)
	Get the OSC0 external reference undivided clock frequency (OSC0ERCLK_UNDIV).
void	CLOCK_SetSimConfig (sim_clock_config_t const *config)
	Set the clock configure in SIM module.
static void	CLOCK_SetSimSafeDivs (void)
	Set the system clock dividers in SIM to safe value.
Variables
uint32_t	g_xtal0Freq
	External XTAL0 (OSC0) clock frequency.
uint32_t	g_xtal32Freq
	External XTAL32/EXTAL32/RTC_CLKIN clock frequency.
MCG frequency functions.
uint32_t	CLOCK_GetOutClkFreq (void)
	Get the MCG output clock(MCGOUTCLK) frequency.
uint32_t	CLOCK_GetFllFreq (void)
	Get the MCG FLL clock(MCGFLLCLK) frequency.
uint32_t	CLOCK_GetInternalRefClkFreq (void)
	Get the MCG internal reference clock(MCGIRCLK) frequency.
uint32_t	CLOCK_GetFixedFreqClkFreq (void)
	Get the MCG fixed frequency clock(MCGFFCLK) frequency.
uint32_t	CLOCK_GetPll0Freq (void)
	Get the MCG PLL0 clock(MCGPLL0CLK) frequency.
uint32_t	CLOCK_GetExtPllFreq (void)
	Get the MCG external PLL frequency.
void	CLOCK_SetExtPllFreq (uint32_t freq)
	Set the MCG external PLL frequency.
MCG clock configuration.
static void	CLOCK_SetLowPowerEnable (bool enable)
	Enable or disable MCG low power.
status_t	CLOCK_SetInternalRefClkConfig (uint8_t enableMode, mcg_irc_mode_t ircs, uint8_t fcrdiv)
	Configure the Internal Reference clock (MCGIRCLK)
status_t	CLOCK_SetExternalRefClkConfig (mcg_oscsel_t oscsel)
	Select the MCG external reference clock.
void	CLOCK_EnablePll0 (mcg_pll_config_t const *config)
	Enables the PLL0 in FLL mode.
static void	CLOCK_DisablePll0 (void)
	Disables the PLL0 in FLL mode.
uint32_t	CLOCK_CalcPllDiv (uint32_t refFreq, uint32_t desireFreq, uint8_t prdiv, uint8_t vdiv)
	Calculates the PLL divider setting for desired output frequency.
MCG clock lock monitor functions.
void	CLOCK_SetOsc0MonitorMode (mcg_monitor_mode_t mode)
	Set the OSC0 clock monitor mode.
void	CLOCK_SetRtcOscMonitorMode (mcg_monitor_mode_t mode)
	Set the RTC OSC clock monitor mode.
void	CLOCK_SetPll0MonitorMode (mcg_monitor_mode_t mode)
	Set the PLL0 clock monitor mode.
void	CLOCK_SetExtPllMonitorMode (mcg_monitor_mode_t mode)
	Set the external PLL clock monitor mode.
uint32_t	CLOCK_GetStatusFlags (void)
	Get the MCG status flags.
void	CLOCK_ClearStatusFlags (uint32_t mask)
	Clears the MCG status flags.
OSC configuration
static void	OSC_SetExtRefClkConfig (OSC_Type base, oscer_config_t const config)
	Configures the OSC external reference clock (OSCERCLK).
static void	OSC_SetCapLoad (OSC_Type *base, uint8_t capLoad)
	Sets the capacitor load configuration for the oscillator.
void	CLOCK_InitOsc0 (osc_config_t const *config)
	Initialize OSC0.
void	CLOCK_DeinitOsc0 (void)
	Deinitialize OSC0.
External clock frequency
static void	CLOCK_SetXtal0Freq (uint32_t freq)
	Set the XTAL0 frequency based on board setting.
static void	CLOCK_SetXtal32Freq (uint32_t freq)
	Set the XTAL32/RTC_CLKIN frequency based on board setting.
MCG auto-trim machine.
status_t	CLOCK_TrimInternalRefClk (uint32_t extFreq, uint32_t desireFreq, uint32_t *actualFreq, mcg_atm_select_t atms)
	Auto trim the internal reference clock.
MCG mode functions.
mcg_mode_t	CLOCK_GetMode (void)
	Gets the current MCG mode.
status_t	CLOCK_SetFeiMode (mcg_dmx32_t dmx32, mcg_drs_t drs, void(*fllStableDelay)(void))
	Set MCG to FEI mode.
status_t	CLOCK_SetFeeMode (uint8_t frdiv, mcg_dmx32_t dmx32, mcg_drs_t drs, void(*fllStableDelay)(void))
	Set MCG to FEE mode.
status_t	CLOCK_SetFbiMode (mcg_dmx32_t dmx32, mcg_drs_t drs, void(*fllStableDelay)(void))
	Set MCG to FBI mode.
status_t	CLOCK_SetFbeMode (uint8_t frdiv, mcg_dmx32_t dmx32, mcg_drs_t drs, void(*fllStableDelay)(void))
	Set MCG to FBE mode.
status_t	CLOCK_SetBlpiMode (void)
	Set MCG to BLPI mode.
status_t	CLOCK_SetBlpeMode (void)
	Set MCG to BLPE mode.
status_t	CLOCK_SetPbeMode (mcg_pll_clk_select_t pllcs, mcg_pll_config_t const *config)
	Set MCG to PBE mode.
status_t	CLOCK_SetPeeMode (void)
	Set MCG to PEE mode.
status_t	CLOCK_ExternalModeToFbeModeQuick (void)
	Switch MCG to FBE mode quickly from external mode.
status_t	CLOCK_InternalModeToFbiModeQuick (void)
	Switch MCG to FBI mode quickly from internal modes.
status_t	CLOCK_BootToFeiMode (mcg_dmx32_t dmx32, mcg_drs_t drs, void(*fllStableDelay)(void))
	Set MCG to FEI mode during system boot up.
status_t	CLOCK_BootToFeeMode (mcg_oscsel_t oscsel, uint8_t frdiv, mcg_dmx32_t dmx32, mcg_drs_t drs, void(*fllStableDelay)(void))
	Set MCG to FEE mode during system bootup.
status_t	CLOCK_BootToBlpiMode (uint8_t fcrdiv, mcg_irc_mode_t ircs, uint8_t ircEnableMode)
	Set MCG to BLPI mode during system boot up.
status_t	CLOCK_BootToBlpeMode (mcg_oscsel_t oscsel)
	Set MCG to BLPE mode during sytem boot up.
status_t	CLOCK_BootToPeeMode (mcg_oscsel_t oscsel, mcg_pll_clk_select_t pllcs, mcg_pll_config_t const *config)
	Set MCG to PEE mode during system boot up.
status_t	CLOCK_SetMcgConfig (mcg_config_t const *config)
	Set MCG to some target mode.

Typedef Documentation

typedef enum _clock_ip_name clock_ip_name_t

Clock gate name used for CLOCK_EnableClock/CLOCK_DisableClock.

typedef enum _clock_name clock_name_t

Clock name used to get clock frequency.

typedef enum _clock_usb_src clock_usb_src_t

USB clock source definition.

typedef enum _mcg_atm_select mcg_atm_select_t

MCG Automatic Trim Machine Select.

typedef enum _mcg_clkout_src mcg_clkout_src_t

MCGOUT clock source.

typedef struct _mcg_config mcg_config_t

MCG configure structure for mode change.

When porting to a new board, please set the following members according to board setting: 1. frdiv: If FLL uses the external reference clock, please set this value to make sure external reference clock divided by frdiv is in the range 31.25kHz to 39.0625kHz. 2. The PLL reference clock divider PRDIV: PLL reference clock frequency after PRDIV should be in the range of FSL_FEATURE_MCG_PLL_REF_MIN to FSL_FEATURE_MCG_PLL_REF_MAX.

typedef enum _mcg_dmx32 mcg_dmx32_t

MCG DCO Maximum Frequency with 32.768 kHz Reference.

typedef enum _mcg_drs mcg_drs_t

MCG DCO range select.

typedef enum _mcg_fll_src mcg_fll_src_t

MCG FLL reference clock source select.

typedef enum _mcg_irc_mode mcg_irc_mode_t

MCG internal reference clock select.

typedef enum _mcg_mode mcg_mode_t

MCG mode definitions.

typedef enum _mcg_monitor_mode mcg_monitor_mode_t

MCG clock monitor mode.

typedef enum _mcg_oscsel mcg_oscsel_t

MCG OSC Clock Select.

typedef enum _mcg_pll_clk_select mcg_pll_clk_select_t

MCG PLLCS select.

typedef struct _mcg_pll_config mcg_pll_config_t

MCG PLL configuration.

typedef enum _mcg_pll_ref_src mcg_pll_ref_src_t

MCG PLL reference clock select.

typedef struct _osc_config osc_config_t

OSC Initialization Configuration Structure.

Defines the configuration data structure to initialize the OSC. When porting to a new board, please set the following members according to board setting: 1. freq: The external frequency. 2. workMode: The OSC module mode.

typedef enum _osc_mode osc_mode_t

OSC work mode.

typedef struct _oscer_config oscer_config_t

OSC configuration for OSCERCLK.

typedef struct _sim_clock_config sim_clock_config_t

SIM configuration structure for clock setting.

Enumeration Type Documentation

enum _clock_ip_name

Clock gate name used for CLOCK_EnableClock/CLOCK_DisableClock.

Definition at line 357 of file fsl_clock.h.

enum _clock_name

Clock name used to get clock frequency.

Enumerator:

kCLOCK_CoreSysClk	Core/system clock
kCLOCK_PlatClk	Platform clock
kCLOCK_BusClk	Bus clock
kCLOCK_FlexBusClk	FlexBus clock
kCLOCK_FlashClk	Flash clock
kCLOCK_FastPeriphClk	Fast peripheral clock
kCLOCK_PllFllSelClk	The clock after SIM[PLLFLLSEL].
kCLOCK_Er32kClk	External reference 32K clock (ERCLK32K)
kCLOCK_Osc0ErClk	OSC0 external reference clock (OSC0ERCLK)
kCLOCK_Osc1ErClk	OSC1 external reference clock (OSC1ERCLK)
kCLOCK_Osc0ErClkUndiv	OSC0 external reference undivided clock(OSC0ERCLK_UNDIV).
kCLOCK_McgFixedFreqClk	MCG fixed frequency clock (MCGFFCLK)
kCLOCK_McgInternalRefClk	MCG internal reference clock (MCGIRCLK)
kCLOCK_McgFllClk	MCGFLLCLK
kCLOCK_McgPll0Clk	MCGPLL0CLK
kCLOCK_McgPll1Clk	MCGPLL1CLK
kCLOCK_McgExtPllClk	EXT_PLLCLK
kCLOCK_McgPeriphClk	MCG peripheral clock (MCGPCLK)
kCLOCK_McgIrc48MClk	MCG IRC48M clock
kCLOCK_LpoClk	LPO clock

Definition at line 286 of file fsl_clock.h.

enum _clock_usb_src

USB clock source definition.

Enumerator:

kCLOCK_UsbSrcPll0	Use PLL0.
kCLOCK_UsbSrcUsbPfd	Use USBPFDCLK.
kCLOCK_UsbSrcIrc48M	Use IRC48M.
kCLOCK_UsbSrcExt	Use USB_CLKIN.

Definition at line 320 of file fsl_clock.h.

enum _mcg_atm_select

MCG Automatic Trim Machine Select.

Enumerator:

kMCG_AtmSel32k	32 kHz Internal Reference Clock selected
kMCG_AtmSel4m	4 MHz Internal Reference Clock selected

Definition at line 548 of file fsl_clock.h.

enum _mcg_clkout_src

MCGOUT clock source.

Enumerator:

kMCG_ClkOutSrcOut	Output of the FLL is selected (reset default)
kMCG_ClkOutSrcInternal	Internal reference clock is selected
kMCG_ClkOutSrcExternal	External reference clock is selected

Definition at line 540 of file fsl_clock.h.

enum _mcg_dmx32

MCG DCO Maximum Frequency with 32.768 kHz Reference.

Enumerator:

kMCG_Dmx32Default	DCO has a default range of 25%
kMCG_Dmx32Fine	DCO is fine-tuned for maximum frequency with 32.768 kHz reference

Definition at line 517 of file fsl_clock.h.

enum _mcg_drs

MCG DCO range select.

Enumerator:

kMCG_DrsLow	Low frequency range
kMCG_DrsMid	Mid frequency range
kMCG_DrsMidHigh	Mid-High frequency range
kMCG_DrsHigh	High frequency range

Definition at line 524 of file fsl_clock.h.

enum _mcg_fll_src

MCG FLL reference clock source select.

Enumerator:

kMCG_FllSrcExternal	External reference clock is selected
kMCG_FllSrcInternal	The slow internal reference clock is selected

Definition at line 503 of file fsl_clock.h.

enum _mcg_irc_mode

MCG internal reference clock select.

Enumerator:

kMCG_IrcSlow	Slow internal reference clock selected
kMCG_IrcFast	Fast internal reference clock selected

Definition at line 510 of file fsl_clock.h.

enum _mcg_irclk_enable_mode

MCG internal reference clock (MCGIRCLK) enable mode definition.

Enumerator:

kMCG_IrclkEnable	MCGIRCLK enable.
kMCG_IrclkEnableInStop	MCGIRCLK enable in stop mode.

Definition at line 603 of file fsl_clock.h.

enum _mcg_mode

MCG mode definitions.

Enumerator:

kMCG_ModeFEI	FEI - FLL Engaged Internal
kMCG_ModeFBI	FBI - FLL Bypassed Internal
kMCG_ModeBLPI	BLPI - Bypassed Low Power Internal
kMCG_ModeFEE	FEE - FLL Engaged External
kMCG_ModeFBE	FBE - FLL Bypassed External
kMCG_ModeBLPE	BLPE - Bypassed Low Power External
kMCG_ModePBE	PBE - PLL Bypassed External
kMCG_ModePEE	PEE - PLL Engaged External
kMCG_ModeError	Unknown mode

Definition at line 622 of file fsl_clock.h.

enum _mcg_monitor_mode

MCG clock monitor mode.

Enumerator:

kMCG_MonitorNone	Clock monitor is disabled.
kMCG_MonitorInt	Trigger interrupt when clock lost.
kMCG_MonitorReset	System reset when clock lost.

Definition at line 570 of file fsl_clock.h.

enum _mcg_oscsel

MCG OSC Clock Select.

Enumerator:

kMCG_OscselOsc	Selects System Oscillator (OSCCLK)
kMCG_OscselRtc	Selects 32 kHz RTC Oscillator
kMCG_OscselIrc	Selects 48 MHz IRC Oscillator

Definition at line 555 of file fsl_clock.h.

enum _mcg_pll_clk_select

MCG PLLCS select.

Enumerator:

kMCG_PllClkSelPll0

PLL0 output clock is selected

Definition at line 563 of file fsl_clock.h.

enum _mcg_pll_enable_mode

MCG PLL clock enable mode definition.

Enumerator:

kMCG_PllEnableIndependent	MCGPLLCLK enable indepencent of MCG clock mode. Generally, PLL is disabled in FLL modes (FEI/FBI/FEE/FBE), set PLL clock enable independent will enable PLL in the FLL modes.
kMCG_PllEnableInStop	MCGPLLCLK enable in STOP mode.

Definition at line 610 of file fsl_clock.h.

enum _mcg_pll_ref_src

MCG PLL reference clock select.

Enumerator:

kMCG_PllRefOsc0	Selects OSC0 as PLL reference clock
kMCG_PllRefOsc1	Selects OSC1 as PLL reference clock

Definition at line 533 of file fsl_clock.h.

enum _mcg_status

MCG status.

Enumerator:

kStatus_MCG_ModeUnreachable	Can't switch to target mode.
kStatus_MCG_ModeInvalid	Current mode invalid for the specific function.
kStatus_MCG_AtmBusClockInvalid	Invalid bus clock for ATM.
kStatus_MCG_AtmDesiredFreqInvalid	Invalid desired frequency for ATM.
kStatus_MCG_AtmIrcUsed	IRC is used when using ATM.
kStatus_MCG_AtmHardwareFail	Hardware fail occurs during ATM.
kStatus_MCG_SourceUsed	Could not change clock source because it is used currently.

Definition at line 578 of file fsl_clock.h.

enum _mcg_status_flags_t

MCG status flags.

Enumerator:

kMCG_Osc0LostFlag	OSC0 lost.
kMCG_Osc0InitFlag	OSC0 crystal initialized.
kMCG_RtcOscLostFlag	RTC OSC lost.
kMCG_Pll0LostFlag	PLL0 lost.
kMCG_Pll0LockFlag	PLL0 locked.
kMCG_ExtPllLostFlag	External PLL lost.

Definition at line 592 of file fsl_clock.h.

enum _osc_cap_load

Oscillator capacitor load setting.

Enumerator:

kOSC_Cap2P	2 pF capacitor load
kOSC_Cap4P	4 pF capacitor load
kOSC_Cap8P	8 pF capacitor load
kOSC_Cap16P	16 pF capacitor load

Definition at line 462 of file fsl_clock.h.

enum _osc_mode

OSC work mode.

Enumerator:

kOSC_ModeExt	Use external clock.
kOSC_ModeOscLowPower	Oscillator low power.
kOSC_ModeOscLowPower	Oscillator low power.
kOSC_ModeOscHighGain	Oscillator high gain.
MCG_C2_HGO0_MASK	Oscillator high gain.

Definition at line 436 of file fsl_clock.h.

enum _oscer_enable_mode

OSCERCLK enable mode.

Enumerator:

kOSC_ErClkEnable	Enable.
kOSC_ErClkEnableInStop	Enable in stop mode.

Definition at line 471 of file fsl_clock.h.

Function Documentation

status_t CLOCK_BootToBlpeMode ( mcg_oscsel_t oscsel )

Set MCG to BLPE mode during sytem boot up.

This function sets MCG to BLPE mode from reset mode, it could be used to setup MCG during sytem boot up.

Parameters:

oscsel OSC clock select, MCG_C7[OSCSEL].

Return values:

kStatus_MCG_ModeUnreachable	Could not switch to the target mode.
kStatus_Success	Switch to target mode successfully.

Definition at line 1725 of file fsl_clock.c.

status_t CLOCK_BootToBlpiMode	(	uint8_t	fcrdiv,
		mcg_irc_mode_t	ircs,
		uint8_t	ircEnableMode
	)

Set MCG to BLPI mode during system boot up.

This function sets MCG to BLPI mode from reset mode, it could be used to setup MCG during sytem boot up.

Parameters:

fcrdiv	Fast IRC divider, FCRDIV.
ircs	The internal reference clock to select, IRCS.
ircEnableMode	The MCGIRCLK enable mode, OR'ed value of _mcg_irclk_enable_mode.

Return values:

kStatus_MCG_SourceUsed	Could not change MCGIRCLK setting.
kStatus_Success	Switch to target mode successfully.

Definition at line 1708 of file fsl_clock.c.

status_t CLOCK_BootToFeeMode	(	mcg_oscsel_t	oscsel,
		uint8_t	frdiv,
		mcg_dmx32_t	dmx32,
		mcg_drs_t	drs,
		void(*)(void)	fllStableDelay
	)

Set MCG to FEE mode during system bootup.

This function sets MCG to FEE mode from reset mode, it could be used to set up MCG during system boot up.

Parameters:

oscsel	OSC clock select, OSCSEL.
frdiv	FLL reference clock divider setting, FRDIV.
dmx32	DMX32 in FEE mode.
drs	The DCO range selection.
fllStableDelay	Delay function to make sure FLL is stable.

Return values:

kStatus_MCG_ModeUnreachable	Could not switch to the target mode.
kStatus_Success	Switch to target mode successfully.

Definition at line 1700 of file fsl_clock.c.

status_t CLOCK_BootToFeiMode	(	mcg_dmx32_t	dmx32,
		mcg_drs_t	drs,
		void(*)(void)	fllStableDelay
	)

Set MCG to FEI mode during system boot up.

This function sets MCG to FEI mode from reset mode, it could be used to set up MCG during system boot up.

Parameters:

dmx32	DMX32 in FEI mode.
drs	The DCO range selection.
fllStableDelay	Delay function to make sure FLL is stable.

Return values:

kStatus_MCG_ModeUnreachable	Could not switch to the target mode.
kStatus_Success	Switch to target mode successfully.

Note:: If dmx32 is set to kMCG_Dmx32Fine, the slow IRC must not be trimmed to frequency above 32768Hz.

Definition at line 1695 of file fsl_clock.c.

status_t CLOCK_BootToPeeMode	(	mcg_oscsel_t	oscsel,
		mcg_pll_clk_select_t	pllcs,
		mcg_pll_config_t const *	config
	)

Set MCG to PEE mode during system boot up.

This function sets MCG to PEE mode from reset mode, it could be used to setup MCG during system boot up.

Parameters:

oscsel	OSC clock select, MCG_C7[OSCSEL].
pllcs	The PLL selection, PLLCS.
config	Pointer to the PLL configuration.

Return values:

kStatus_MCG_ModeUnreachable	Could not switch to the target mode.
kStatus_Success	Switch to target mode successfully.

Definition at line 1746 of file fsl_clock.c.

uint32_t CLOCK_CalcPllDiv	(	uint32_t	refFreq,
		uint32_t	desireFreq,
		uint8_t *	prdiv,
		uint8_t *	vdiv
	)

Calculates the PLL divider setting for desired output frequency.

This function calculates the proper reference clock divider (PRDIV) and VCO divider (VDIV) to generate desired PLL output frequency. It returns the closest frequency PLL could generate, the corresponding PRDIV/VDIV are returned from parameters. If desired frequency is not valid, this function returns 0.

Parameters:

refFreq	PLL reference clock frequency.
desireFreq	Desired PLL output frequency.
prdiv	PRDIV value to generate desired PLL frequency.
vdiv	VDIV value to generate desired PLL frequency.

Returns:: Closest frequency PLL could generate.

Definition at line 830 of file fsl_clock.c.

void CLOCK_ClearStatusFlags ( uint32_t mask )

Clears the MCG status flags.

This function clears the MCG clock lock lost status. The parameter is logical OR value of the flags to clear, see _mcg_status_flags_t.

Example:

   // To clear the clock lost lock status flags of OSC0 and PLL0.

   CLOCK_ClearStatusFlags(kMCG_Osc0LostFlag  | kMCG_Pll0LostFlag );

Parameters:

mask	The status flags to clear. This is a logical OR of members of the enumeration _mcg_status_flags_t.

Definition at line 1068 of file fsl_clock.c.

void CLOCK_DeinitOsc0 ( void )

Deinitialize OSC0.

This function deinitializes OSC0.

Definition at line 1110 of file fsl_clock.c.

static void CLOCK_DisableClock ( clock_ip_name_t name ) [static]

Disable the clock for specific IP.

Parameters:

name	Which clock to disable, see clock_ip_name_t.

Definition at line 700 of file fsl_clock.h.

static void CLOCK_DisablePll0 ( void ) [static]

Disables the PLL0 in FLL mode.

This function disables the PLL0 in FLL mode, it should be used together with CLOCK_EnablePll0.

Definition at line 1095 of file fsl_clock.h.

static void CLOCK_DisableUsbfs0Clock ( void ) [static]

Disable USB FS clock.

Definition at line 820 of file fsl_clock.h.

static void CLOCK_DisableUsbhs0Clock ( void ) [static]

Disable USB HS clock.

Definition at line 801 of file fsl_clock.h.

static void CLOCK_EnableClock ( clock_ip_name_t name ) [static]

Enable the clock for specific IP.

Parameters:

name	Which clock to enable, see clock_ip_name_t.

Definition at line 689 of file fsl_clock.h.

void CLOCK_EnablePll0 ( mcg_pll_config_t const * config )

Enables the PLL0 in FLL mode.

This function setups the PLL0 in FLL mode, make sure the PLL reference clock is enabled before calling this function. This function reconfigures the PLL0, make sure the PLL0 is not used as a clock source while calling this function. The function CLOCK_CalcPllDiv can help to get the proper PLL divider values.

Parameters:

config Pointer to the configuration structure.

Definition at line 929 of file fsl_clock.c.

bool CLOCK_EnableUsbfs0Clock	(	clock_usb_src_t	src,
		uint32_t	freq
	)

Enable USB FS clock.

Parameters:

src	USB FS clock source.
freq	The frequency specified by src.

Return values:

true	The clock is set successfully.
false	The clock source is invalid to get proper USB FS clock.

Definition at line 531 of file fsl_clock.c.

bool CLOCK_EnableUsbhs0Clock	(	clock_usb_src_t	src,
		uint32_t	freq
	)

Enable USB HS clock.

Parameters:

src	USB HS clock source.
freq	The frequency specified by src.

Return values:

true	The clock is set successfully.
false	The clock source is invalid to get proper USB HS clock.

Definition at line 578 of file fsl_clock.c.

status_t CLOCK_ExternalModeToFbeModeQuick ( void )

Switch MCG to FBE mode quickly from external mode.

This function changes MCG from external modes (PEE/PBE/BLPE/FEE) to FBE mode quickly. It only changes to use external clock as the system clock souce and disable PLL, but does not configure FLL settings. This is a lite function with small code size, it is useful during mode switch. For example, to switch from PEE mode to FEI mode:

 CLOCK_ExternalModeToFbeModeQuick();
 CLOCK_SetFeiMode(...);

Return values:

kStatus_Success	Change successfully.
kStatus_MCG_ModeInvalid	Current mode is not external modes, should not call this function.

Definition at line 1649 of file fsl_clock.c.

uint32_t CLOCK_GetBusClkFreq ( void )

Get the bus clock frequency.

Returns:: Clock frequency in Hz.

Definition at line 457 of file fsl_clock.c.

uint32_t CLOCK_GetCoreSysClkFreq ( void )

Get the core clock or system clock frequency.

Returns:: Clock frequency in Hz.

Definition at line 462 of file fsl_clock.c.

uint32_t CLOCK_GetEr32kClkFreq ( void )

Get the external reference 32K clock frequency (ERCLK32K).

Returns:: Clock frequency in Hz.

Definition at line 385 of file fsl_clock.c.

uint32_t CLOCK_GetExtPllFreq ( void )

Get the MCG external PLL frequency.

This function gets the MCG external PLL frequency (Hz).

Returns:: The frequency of MCG external PLL.

Definition at line 725 of file fsl_clock.c.

uint32_t CLOCK_GetFixedFreqClkFreq ( void )

Get the MCG fixed frequency clock(MCGFFCLK) frequency.

This function gets the MCG fixed frequency clock frequency (Hz) based on current MCG register value.

Returns:: The frequency of MCGFFCLK.

Definition at line 685 of file fsl_clock.c.

uint32_t CLOCK_GetFlashClkFreq ( void )

Get the flash clock frequency.

Returns:: Clock frequency in Hz.

Definition at line 447 of file fsl_clock.c.

uint32_t CLOCK_GetFlexBusClkFreq ( void )

Get the flexbus clock frequency.

Returns:: Clock frequency in Hz.

Definition at line 452 of file fsl_clock.c.

uint32_t CLOCK_GetFllFreq ( void )

Get the MCG FLL clock(MCGFLLCLK) frequency.

This function gets the MCG FLL clock frequency (Hz) based on current MCG register value. The FLL is only enabled in FEI/FBI/FEE/FBE mode, in other modes, FLL is disabled in low power state.

Returns:: The frequency of MCGFLLCLK.

Definition at line 648 of file fsl_clock.c.

uint32_t CLOCK_GetFreq ( clock_name_t clockName )

Gets the clock frequency for a specific clock name.

This function checks the current clock configurations and then calculates the clock frequency for a specific clock name defined in clock_name_t. The MCG must be properly configured before using this function.

Parameters:

clockName Clock names defined in clock_name_t

Returns:: Clock frequency value in Hertz

Definition at line 467 of file fsl_clock.c.

uint32_t CLOCK_GetInternalRefClkFreq ( void )

Get the MCG internal reference clock(MCGIRCLK) frequency.

This function gets the MCG internal reference clock frequency (Hz) based on current MCG register value.

Returns:: The frequency of MCGIRCLK.

Definition at line 674 of file fsl_clock.c.

mcg_mode_t CLOCK_GetMode ( void )

Gets the current MCG mode.

This function checks the MCG registers and determine current MCG mode.

Returns:: Current MCG mode or error code, see mcg_mode_t.

Definition at line 1192 of file fsl_clock.c.

uint32_t CLOCK_GetOsc0ErClkFreq ( void )

Get the OSC0 external reference clock frequency (OSC0ERCLK).

Returns:: Clock frequency in Hz.

Definition at line 437 of file fsl_clock.c.

uint32_t CLOCK_GetOsc0ErClkUndivFreq ( void )

Get the OSC0 external reference undivided clock frequency (OSC0ERCLK_UNDIV).

Returns:: Clock frequency in Hz.

Definition at line 357 of file fsl_clock.c.

uint32_t CLOCK_GetOutClkFreq ( void )

Get the MCG output clock(MCGOUTCLK) frequency.

This function gets the MCG output clock frequency (Hz) based on current MCG register value.

Returns:: The frequency of MCGOUTCLK.

Definition at line 610 of file fsl_clock.c.

uint32_t CLOCK_GetPlatClkFreq ( void )

Get the platform clock frequency.

Returns:: Clock frequency in Hz.

Definition at line 442 of file fsl_clock.c.

uint32_t CLOCK_GetPll0Freq ( void )

Get the MCG PLL0 clock(MCGPLL0CLK) frequency.

This function gets the MCG PLL0 clock frequency (Hz) based on current MCG register value.

Returns:: The frequency of MCGPLL0CLK.

Definition at line 700 of file fsl_clock.c.

uint32_t CLOCK_GetPllFllSelClkFreq ( void )

Get the output clock frequency selected by SIM[PLLFLLSEL].

Returns:: Clock frequency in Hz.

Definition at line 409 of file fsl_clock.c.

uint32_t CLOCK_GetStatusFlags ( void )

Get the MCG status flags.

This function gets the MCG clock status flags, all the status flags are returned as a logical OR of the enumeration _mcg_status_flags_t. To check specific flags, compare the return value with the flags.

Example:

   // To check the clock lost lock status of OSC0 and PLL0.
   uint32_t mcgFlags;

   mcgFlags = CLOCK_GetStatusFlags();

   if (mcgFlags & kMCG_Osc0LostFlag )
   {
       // OSC0 clock lock lost. Do something.
   }
   if (mcgFlags & kMCG_Pll0LostFlag )
   {
       // PLL0 clock lock lost. Do something.
   }

Returns:: Logical OR value of the _mcg_status_flags_t.

Definition at line 1036 of file fsl_clock.c.

void CLOCK_InitOsc0 ( osc_config_t const * config )

Initialize OSC0.

This function initializes OSC0 according to board configuration.

Parameters:

config Pointer to the OSC0 configuration structure.

Definition at line 1092 of file fsl_clock.c.

status_t CLOCK_InternalModeToFbiModeQuick ( void )

Switch MCG to FBI mode quickly from internal modes.

This function changes MCG from internal modes (PEI/PBI/BLPI/FEI) to FBI mode quickly. It only changes to use MCGIRCLK as the system clock souce and disable PLL, but does not configure FLL settings. This is a lite function with small code size, it is useful during mode switch. For example, to switch from PEI mode to FEE mode:

 CLOCK_InternalModeToFbiModeQuick();
 CLOCK_SetFeeMode(...);

Return values:

kStatus_Success	Change successfully.
kStatus_MCG_ModeInvalid	Current mode is not internal mode, should not call this function.

Definition at line 1675 of file fsl_clock.c.

status_t CLOCK_SetBlpeMode ( void )

Set MCG to BLPE mode.

This function sets MCG to BLPE mode. If could not set to BLPE mode directly from current mode, this function returns error.

Return values:

kStatus_MCG_ModeUnreachable	Could not switch to the target mode.
kStatus_Success	Switch to target mode successfully.

Definition at line 1570 of file fsl_clock.c.

status_t CLOCK_SetBlpiMode ( void )

Set MCG to BLPI mode.

This function sets MCG to BLPI mode. If could not set to BLPI mode directly from current mode, this function returns error.

Return values:

kStatus_MCG_ModeUnreachable	Could not switch to the target mode.
kStatus_Success	Switch to target mode successfully.

Definition at line 1555 of file fsl_clock.c.

static void CLOCK_SetClkOutClock ( uint32_t src ) [static]

Set CLKOUT source.

Parameters:

src	The value to set CLKOUT source.

Definition at line 773 of file fsl_clock.h.

static void CLOCK_SetEr32kClock ( uint32_t src ) [static]

Set ERCLK32K source.

Parameters:

src	The value to set ERCLK32K clock source.

Definition at line 711 of file fsl_clock.h.

status_t CLOCK_SetExternalRefClkConfig ( mcg_oscsel_t oscsel )

Select the MCG external reference clock.

Select the MCG external reference clock source, it changes the MCG_C7[OSCSEL] and wait for the clock source stable. Should not change external reference clock in FEE/FBE/BLPE/PBE/PEE mdes, so don't call this function in these modes.

Parameters:

oscsel MCG external reference clock source, MCG_C7[OSCSEL].

Return values:

kStatus_MCG_SourceUsed	External reference clock is used, should not change.
kStatus_Success	External reference clock set successfully.

Definition at line 735 of file fsl_clock.c.

void CLOCK_SetExtPllFreq ( uint32_t freq )

Set the MCG external PLL frequency.

This function sets the MCG external PLL frequency (Hz), the MCG external PLL frequency is passed in to MCG driver through this function. Please call this function after the external PLL frequency is changed, otherwise the APIs for get frequency may returns wrong value.

Parameters:

The	frequency of MCG external PLL.

Definition at line 730 of file fsl_clock.c.

void CLOCK_SetExtPllMonitorMode ( mcg_monitor_mode_t mode )

Set the external PLL clock monitor mode.

Set the external PLL clock monitor mode, see mcg_monitor_mode_t for details.

Parameters:

mode	The monitor mode to set.

Definition at line 1019 of file fsl_clock.c.

status_t CLOCK_SetFbeMode	(	uint8_t	frdiv,
		mcg_dmx32_t	dmx32,
		mcg_drs_t	drs,
		void(*)(void)	fllStableDelay
	)

Set MCG to FBE mode.

This function sets MCG to FBE mode. If could not set to FBE mode directly from current mode, this function returns error.

Parameters:

frdiv	FLL reference clock divider setting, FRDIV.
dmx32	DMX32 in FBE mode.
drs	The DCO range selection.
fllStableDelay	Delay function to make sure FLL is stable. If FLL is not used in FBE mode, this parameter could be NULL. Pass in NULL does not delay.

Return values:

kStatus_MCG_ModeUnreachable	Could not switch to the target mode.
kStatus_Success	Switch to target mode successfully.

Definition at line 1483 of file fsl_clock.c.

status_t CLOCK_SetFbiMode	(	mcg_dmx32_t	dmx32,
		mcg_drs_t	drs,
		void(*)(void)	fllStableDelay
	)

Set MCG to FBI mode.

This function sets MCG to FBI mode. If could not set to FBI mode directly from current mode, this function returns error.

Parameters:

dmx32	DMX32 in FBI mode.
drs	The DCO range selection.
fllStableDelay	Delay function to make sure FLL is stable. If FLL is not used in FBI mode, this parameter could be NULL. Pass in NULL does not delay.

Return values:

kStatus_MCG_ModeUnreachable	Could not switch to the target mode.
kStatus_Success	Switch to target mode successfully.

Note:: If dmx32 is set to kMCG_Dmx32Fine, the slow IRC must not be trimmed to frequency above 32768Hz.

Definition at line 1419 of file fsl_clock.c.

status_t CLOCK_SetFeeMode	(	uint8_t	frdiv,
		mcg_dmx32_t	dmx32,
		mcg_drs_t	drs,
		void(*)(void)	fllStableDelay
	)

Set MCG to FEE mode.

This function sets MCG to FEE mode. If could not set to FEE mode directly from current mode, this function returns error.

Parameters:

frdiv	FLL reference clock divider setting, FRDIV.
dmx32	DMX32 in FEE mode.
drs	The DCO range selection.
fllStableDelay	Delay function to make sure FLL is stable, if pass in NULL, then does not delay.

Return values:

kStatus_MCG_ModeUnreachable	Could not switch to the target mode.
kStatus_Success	Switch to target mode successfully.

Definition at line 1352 of file fsl_clock.c.

status_t CLOCK_SetFeiMode	(	mcg_dmx32_t	dmx32,
		mcg_drs_t	drs,
		void(*)(void)	fllStableDelay
	)

Set MCG to FEI mode.

This function sets MCG to FEI mode. If could not set to FEI mode directly from current mode, this function returns error.

Parameters:

dmx32	DMX32 in FEI mode.
drs	The DCO range selection.
fllStableDelay	Delay function to make sure FLL is stable, if pass in NULL, then does not delay.

Return values:

kStatus_MCG_ModeUnreachable	Could not switch to the target mode.
kStatus_Success	Switch to target mode successfully.

Note:: If dmx32 is set to kMCG_Dmx32Fine, the slow IRC must not be trimmed to frequency above 32768Hz.

Definition at line 1292 of file fsl_clock.c.

status_t CLOCK_SetInternalRefClkConfig	(	uint8_t	enableMode,
		mcg_irc_mode_t	ircs,
		uint8_t	fcrdiv
	)

Configure the Internal Reference clock (MCGIRCLK)

This function setups the MCGIRCLK base on parameters. It selects the IRC source, if fast IRC is used, this function also sets the fast IRC divider. This function also sets whether enable MCGIRCLK in stop mode. Calling this function in FBI/PBI/BLPI modes may change the system clock, so it is not allowed to use this in these modes.

Parameters:

enableMode	MCGIRCLK enable mode, OR'ed value of _mcg_irclk_enable_mode.
ircs	MCGIRCLK clock source, choose fast or slow.
fcrdiv	Fast IRC divider setting (`FCRDIV`).

Return values:

kStatus_MCG_SourceUsed	MCGIRCLK is used as system clock, should not configure MCGIRCLK.
kStatus_Success	MCGIRCLK configuration finished successfully.

Definition at line 782 of file fsl_clock.c.

static void CLOCK_SetLowPowerEnable ( bool enable ) [static]

Enable or disable MCG low power.

Enable MCG low power will disable the PLL and FLL in bypass modes. That is, in FBE and PBE modes, enable low power will set MCG to BLPE mode, in FBI and PBI mode, enable low power will set MCG to BLPI mode. When disable MCG low power, the PLL or FLL will be enabled based on MCG setting.

Parameters:

enable True to enable MCG low power, false to disable MCG low power.

Definition at line 1034 of file fsl_clock.h.

static void CLOCK_SetLpuartClock ( uint32_t src ) [static]

Set LPUART clock source.

Parameters:

src	The value to set LPUART clock source.

Definition at line 731 of file fsl_clock.h.

status_t CLOCK_SetMcgConfig ( mcg_config_t const * config )

Set MCG to some target mode.

This function sets MCG to some target mode defined by the configure structure, if cannot switch to target mode directly, this function will choose the proper path.

Parameters:

config Pointer to the target MCG mode configuration structure.

Returns:: Return kStatus_Success if switch successfully, otherwise return error code _mcg_status.

Note:: If external clock is used in the target mode, please make sure it is enabled, for example, if the OSC0 is used, please setup OSC0 correctly before this funciton.

Definition at line 1792 of file fsl_clock.c.

void CLOCK_SetOsc0MonitorMode ( mcg_monitor_mode_t mode )

Set the OSC0 clock monitor mode.

Set the OSC0 clock monitor mode, see mcg_monitor_mode_t for details.

Parameters:

mode	The monitor mode to set.

Definition at line 949 of file fsl_clock.c.

static void CLOCK_SetOutDiv	(	uint32_t	outdiv1,
		uint32_t	outdiv2,
		uint32_t	outdiv3,
		uint32_t	outdiv4
	)		`[static]`

System clock divider.

Set the SIM_CLKDIV1[OUTDIV1], SIM_CLKDIV1[OUTDIV2], SIM_CLKDIV1[OUTDIV3], SIM_CLKDIV1[OUTDIV4].

Parameters:

outdiv1	Clock 1 output divider value.
outdiv2	Clock 2 output divider value.
outdiv3	Clock 3 output divider value.
outdiv4	Clock 4 output divider value.

Definition at line 838 of file fsl_clock.h.

status_t CLOCK_SetPbeMode	(	mcg_pll_clk_select_t	pllcs,
		mcg_pll_config_t const *	config
	)

Set MCG to PBE mode.

This function sets MCG to PBE mode. If could not set to PBE mode directly from current mode, this function returns error.

Parameters:

pllcs	The PLL selection, PLLCS.
config	Pointer to the PLL configuration.

Return values:

kStatus_MCG_ModeUnreachable	Could not switch to the target mode.
kStatus_Success	Switch to target mode successfully.

Note:: 1. The parameter pllcs selects the PLL, for some platforms, there is only one PLL, the parameter pllcs is kept for interface compatible. 2. The parameter config is the PLL configuration structure, on some platforms, could choose the external PLL directly. This means that the configuration structure is not necessary, pass in NULL for this case. For example: CLOCK_SetPbeMode(kMCG_OscselOsc, kMCG_PllClkSelExtPll, NULL);

Definition at line 1585 of file fsl_clock.c.

status_t CLOCK_SetPeeMode ( void )

Set MCG to PEE mode.

This function sets MCG to PEE mode.

Return values:

kStatus_MCG_ModeUnreachable	Could not switch to the target mode.
kStatus_Success	Switch to target mode successfully.

Note:: This function only change CLKS to use PLL/FLL output. If the PRDIV/VDIV are different from PBE mode, please setup these settings in PBE mode and wait for stable then switch to PEE mode.

Definition at line 1628 of file fsl_clock.c.

void CLOCK_SetPll0MonitorMode ( mcg_monitor_mode_t mode )

Set the PLL0 clock monitor mode.

Set the PLL0 clock monitor mode, see mcg_monitor_mode_t for details.

Parameters:

mode	The monitor mode to set.

Definition at line 989 of file fsl_clock.c.

static void CLOCK_SetPllFllSelClock	(	uint32_t	src,
		uint32_t	divValue,
		uint32_t	fracValue
	)		`[static]`

Set PLLFLLSEL clock source.

Parameters:

src	The value to set PLLFLLSEL clock source.

Definition at line 762 of file fsl_clock.h.

static void CLOCK_SetRtcClkOutClock ( uint32_t src ) [static]

Set RTC_CLKOUT source.

Parameters:

src	The value to set RTC_CLKOUT source.

Definition at line 783 of file fsl_clock.h.

void CLOCK_SetRtcOscMonitorMode ( mcg_monitor_mode_t mode )

Set the RTC OSC clock monitor mode.

Set the RTC OSC clock monitor mode, see mcg_monitor_mode_t for details.

Parameters:

mode	The monitor mode to set.

Definition at line 972 of file fsl_clock.c.

static void CLOCK_SetSdhc0Clock ( uint32_t src ) [static]

Set SDHC0 clock source.

Parameters:

src	The value to set SDHC0 clock source.

Definition at line 721 of file fsl_clock.h.

void CLOCK_SetSimConfig ( sim_clock_config_t const * config )

Set the clock configure in SIM module.

This function sets system layer clock settings in SIM module.

Parameters:

config Pointer to the configure structure.

Definition at line 524 of file fsl_clock.c.

static void CLOCK_SetSimSafeDivs ( void ) [static]

Set the system clock dividers in SIM to safe value.

The system level clocks (core clock, bus clock, flexbus clock and flash clock) must be in allowed ranges. During MCG clock mode switch, the MCG output clock changes then the system level clocks may be out of range. This function could be used before MCG mode change, to make sure system level clocks are in allowed range.

Parameters:

config Pointer to the configure structure.

Definition at line 939 of file fsl_clock.h.

static void CLOCK_SetTpmClock ( uint32_t src ) [static]

Set TPM clock source.

Parameters:

src	The value to set TPM clock source.

Definition at line 741 of file fsl_clock.h.

static void CLOCK_SetTraceClock	(	uint32_t	src,
		uint32_t	divValue,
		uint32_t	fracValue
	)		`[static]`

Set debug trace clock source.

Parameters:

src	The value to set debug trace clock source.

Definition at line 751 of file fsl_clock.h.

static void CLOCK_SetXtal0Freq ( uint32_t freq ) [static]

Set the XTAL0 frequency based on board setting.

Parameters:

freq	The XTAL0/EXTAL0 input clock frequency in Hz.

Definition at line 1298 of file fsl_clock.h.

static void CLOCK_SetXtal32Freq ( uint32_t freq ) [static]

Set the XTAL32/RTC_CLKIN frequency based on board setting.

Parameters:

freq	The XTAL32/EXTAL32/RTC_CLKIN input clock frequency in Hz.

Definition at line 1308 of file fsl_clock.h.

status_t CLOCK_TrimInternalRefClk	(	uint32_t	extFreq,
		uint32_t	desireFreq,
		uint32_t *	actualFreq,
		mcg_atm_select_t	atms
	)

Auto trim the internal reference clock.

This function trims the internal reference clock using external clock. If successful, it returns the kStatus_Success and the frequency after trimming is received in the parameter actualFreq. If an error occurs, the error code is returned.

Parameters:

extFreq	External clock frequency, should be bus clock.
desireFreq	Frequency want to trim to.
actualFreq	Actual frequency after trim.
atms	Trim fast or slow internal reference clock.

Return values:

kStatus_Success	ATM success.
kStatus_MCG_AtmBusClockInvalid	The bus clock is not in allowed range for ATM.
kStatus_MCG_AtmDesiredFreqInvalid	MCGIRCLK could not be trimmed to the desired frequency.
kStatus_MCG_AtmIrcUsed	Could not trim because MCGIRCLK is used as bus clock source.
kStatus_MCG_AtmHardwareFail	Hardware fails during trim.

Definition at line 1116 of file fsl_clock.c.

static void OSC_SetCapLoad	(	OSC_Type *	base,
		uint8_t	capLoad
	)		`[static]`

Sets the capacitor load configuration for the oscillator.

This function sets the specified capacitors configuration for the oscillator. This should be done in the early system level initialization function call based on the system configuration.

Parameters:

base	OSC peripheral address.
capLoad	OR'ed value for the capacitor load option, see _osc_cap_load.

Example:

   // To enable only 2 pF and 8 pF capacitor load, please use like this.
   OSC_SetCapLoad(OSC, kOSC_Cap2P  | kOSC_Cap8P );

Definition at line 1260 of file fsl_clock.h.

static void OSC_SetExtRefClkConfig	(	OSC_Type *	base,
		oscer_config_t const *	config
	)		`[static]`

Configures the OSC external reference clock (OSCERCLK).

This function configures the OSC external reference clock (OSCERCLK). For example, to enable the OSCERCLK in normal mode and stop mode, and also set the output divider to 1, as follows:

   oscer_config_t config =
   {
       .enableMode  = kOSC_ErClkEnable  | kOSC_ErClkEnableInStop ,
       .erclkDiv   = 1U,
   };

   OSC_SetExtRefClkConfig(OSC, &config);

Parameters:

base	OSC peripheral address.
config	Pointer to the configuration structure.

Definition at line 1232 of file fsl_clock.h.

Variable Documentation

uint32_t g_xtal0Freq

External XTAL0 (OSC0) clock frequency.

The XTAL0/EXTAL0 (OSC0) clock frequency in Hz, when the clock is setup, use the function CLOCK_SetXtal0Freq to set the value in to clock driver. For example, if XTAL0 is 8MHz,

 CLOCK_InitOsc0(...); // Setup the OSC0
 CLOCK_SetXtal0Freq(80000000); // Set the XTAL0 value to clock driver.

This is important for the multicore platforms, only one core needs to setup OSC0 using CLOCK_InitOsc0, all other cores need to call CLOCK_SetXtal0Freq to get valid clock frequency.

Definition at line 126 of file fsl_clock.c.

uint32_t g_xtal32Freq

External XTAL32/EXTAL32/RTC_CLKIN clock frequency.

The XTAL32/EXTAL32/RTC_CLKIN clock frequency in Hz, when the clock is setup, use the function CLOCK_SetXtal32Freq to set the value in to clock driver.

This is important for the multicore platforms, only one core needs to setup the clock, all other cores need to call CLOCK_SetXtal32Freq to get valid clock frequency.

Definition at line 128 of file fsl_clock.c.

Important changes to repositories hosted on mbed.com

Clock

Data Structures

Files

Typedefs

Enumerations

Functions

Variables

MCG frequency functions.

MCG clock configuration.

MCG clock lock monitor functions.

OSC configuration

External clock frequency

MCG auto-trim machine.

MCG mode functions.

Typedef Documentation

Enumeration Type Documentation

Function Documentation

Variable Documentation

Repository toolbox

Repository details

Important Information for this Arm website

Important changes to repositories hosted on mbed.com

Clock

Data Structures

Files

Typedefs

Enumerations

Functions

Variables

MCG frequency functions.

MCG clock configuration.

MCG clock lock monitor functions.

OSC configuration

External clock frequency

MCG auto-trim machine.

MCG mode functions.

Typedef Documentation

Enumeration Type Documentation

Function Documentation

Variable Documentation

Repository toolbox

Repository details

Important Information for this Arm website

Access Warning