Analog Devices AD7124-8 - 8-Channel, Low Noise, Low Power, 24-Bit, Sigma-Delta ADC with PGA and Reference
Dependents: CN0398 CN0391 CN0398_arduino
AD7124.cpp@5:5fa802deb471, 2016-11-08 (annotated)
- Committer:
- adisuciu
- Date:
- Tue Nov 08 09:41:47 2016 +0000
- Revision:
- 5:5fa802deb471
- Parent:
- 4:502352a643e6
Merge
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
adisuciu | 0:f32d3fb1d3e2 | 1 | /** |
adisuciu | 0:f32d3fb1d3e2 | 2 | * @file AD7124.cpp |
adisuciu | 0:f32d3fb1d3e2 | 3 | * @brief Source file for AD7124 ADC |
adisuciu | 0:f32d3fb1d3e2 | 4 | * @author Analog Devices Inc. |
adisuciu | 0:f32d3fb1d3e2 | 5 | * |
adisuciu | 0:f32d3fb1d3e2 | 6 | * For support please go to: |
adisuciu | 0:f32d3fb1d3e2 | 7 | * Github: https://github.com/analogdevicesinc/mbed-adi |
adisuciu | 0:f32d3fb1d3e2 | 8 | * Support: https://ez.analog.com/community/linux-device-drivers/microcontroller-no-os-drivers |
adisuciu | 0:f32d3fb1d3e2 | 9 | * Product: http://www.analog.com/ad7124 |
adisuciu | 0:f32d3fb1d3e2 | 10 | * More: https://wiki.analog.com/resources/tools-software/mbed-drivers-all |
adisuciu | 0:f32d3fb1d3e2 | 11 | |
adisuciu | 0:f32d3fb1d3e2 | 12 | ******************************************************************************** |
adisuciu | 0:f32d3fb1d3e2 | 13 | * Copyright 2016(c) Analog Devices, Inc. |
adisuciu | 0:f32d3fb1d3e2 | 14 | * |
adisuciu | 0:f32d3fb1d3e2 | 15 | * All rights reserved. |
adisuciu | 0:f32d3fb1d3e2 | 16 | * |
adisuciu | 0:f32d3fb1d3e2 | 17 | * Redistribution and use in source and binary forms, with or without |
adisuciu | 0:f32d3fb1d3e2 | 18 | * modification, are permitted provided that the following conditions are met: |
adisuciu | 0:f32d3fb1d3e2 | 19 | * - Redistributions of source code must retain the above copyright |
adisuciu | 0:f32d3fb1d3e2 | 20 | * notice, this list of conditions and the following disclaimer. |
adisuciu | 0:f32d3fb1d3e2 | 21 | * - Redistributions in binary form must reproduce the above copyright |
adisuciu | 0:f32d3fb1d3e2 | 22 | * notice, this list of conditions and the following disclaimer in |
adisuciu | 0:f32d3fb1d3e2 | 23 | * the documentation and/or other materials provided with the |
adisuciu | 0:f32d3fb1d3e2 | 24 | * distribution. |
adisuciu | 0:f32d3fb1d3e2 | 25 | * - Neither the name of Analog Devices, Inc. nor the names of its |
adisuciu | 0:f32d3fb1d3e2 | 26 | * contributors may be used to endorse or promote products derived |
adisuciu | 0:f32d3fb1d3e2 | 27 | * from this software without specific prior written permission. |
adisuciu | 0:f32d3fb1d3e2 | 28 | * - The use of this software may or may not infringe the patent rights |
adisuciu | 0:f32d3fb1d3e2 | 29 | * of one or more patent holders. This license does not release you |
adisuciu | 0:f32d3fb1d3e2 | 30 | * from the requirement that you obtain separate licenses from these |
adisuciu | 0:f32d3fb1d3e2 | 31 | * patent holders to use this software. |
adisuciu | 0:f32d3fb1d3e2 | 32 | * - Use of the software either in source or binary form, must be run |
adisuciu | 0:f32d3fb1d3e2 | 33 | * on or directly connected to an Analog Devices Inc. component. |
adisuciu | 0:f32d3fb1d3e2 | 34 | * |
adisuciu | 0:f32d3fb1d3e2 | 35 | * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR |
adisuciu | 0:f32d3fb1d3e2 | 36 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, |
adisuciu | 0:f32d3fb1d3e2 | 37 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
adisuciu | 0:f32d3fb1d3e2 | 38 | * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, |
adisuciu | 0:f32d3fb1d3e2 | 39 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
adisuciu | 0:f32d3fb1d3e2 | 40 | * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR |
adisuciu | 0:f32d3fb1d3e2 | 41 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
adisuciu | 0:f32d3fb1d3e2 | 42 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
adisuciu | 0:f32d3fb1d3e2 | 43 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
adisuciu | 0:f32d3fb1d3e2 | 44 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
adisuciu | 0:f32d3fb1d3e2 | 45 | * |
adisuciu | 0:f32d3fb1d3e2 | 46 | ********************************************************************************/ |
adisuciu | 0:f32d3fb1d3e2 | 47 | |
adisuciu | 0:f32d3fb1d3e2 | 48 | #include <stdint.h> |
adisuciu | 0:f32d3fb1d3e2 | 49 | #include "mbed.h" |
adisuciu | 0:f32d3fb1d3e2 | 50 | #include "AD7124.h" |
adisuciu | 0:f32d3fb1d3e2 | 51 | |
adisuciu | 4:502352a643e6 | 52 | |
adisuciu | 0:f32d3fb1d3e2 | 53 | /** |
adisuciu | 0:f32d3fb1d3e2 | 54 | * @brief AD7790 constructor, sets CS pin and SPI format |
adisuciu | 0:f32d3fb1d3e2 | 55 | * @param CS - (optional)chip select of the AD7790 |
adisuciu | 0:f32d3fb1d3e2 | 56 | * @param MOSI - (optional)pin of the SPI interface |
adisuciu | 0:f32d3fb1d3e2 | 57 | * @param MISO - (optional)pin of the SPI interface |
adisuciu | 0:f32d3fb1d3e2 | 58 | * @param SCK - (optional)pin of the SPI interface |
adisuciu | 0:f32d3fb1d3e2 | 59 | */ |
adisuciu | 1:4a4194a5a8ed | 60 | |
adisuciu | 4:502352a643e6 | 61 | const static AD7124::ad7124_st_reg ad7124_regs_init[57] = { |
adisuciu | 1:4a4194a5a8ed | 62 | {0x00, 0x00, 1, 2}, /* AD7124_Status */ |
adisuciu | 1:4a4194a5a8ed | 63 | {0x01, 0x0000, 2, 1}, /* AD7124_ADC_Control */ |
adisuciu | 1:4a4194a5a8ed | 64 | {0x02, 0x0000, 3, 2}, /* AD7124_Data */ |
adisuciu | 1:4a4194a5a8ed | 65 | {0x03, 0x0000, 3, 1}, /* AD7124_IOCon1 */ |
adisuciu | 1:4a4194a5a8ed | 66 | {0x04, 0x0000, 2, 1}, /* AD7124_IOCon2 */ |
adisuciu | 1:4a4194a5a8ed | 67 | {0x05, 0x12, 1, 2}, /* AD7124_ID */ |
adisuciu | 1:4a4194a5a8ed | 68 | {0x06, 0x0000, 3, 2}, /* AD7124_Error */ |
adisuciu | 1:4a4194a5a8ed | 69 | {0x07, 0x0400, 3, 1}, /* AD7124_Error_En */ |
adisuciu | 1:4a4194a5a8ed | 70 | {0x08, 0x00, 1, 2}, /* AD7124_Mclk_Count */ |
adisuciu | 1:4a4194a5a8ed | 71 | {0x09, 0x8001, 2, 1}, /* AD7124_Channel_0 */ |
adisuciu | 1:4a4194a5a8ed | 72 | {0x0A, 0x0001, 2, 1}, /* AD7124_Channel_1 */ |
adisuciu | 1:4a4194a5a8ed | 73 | {0x0B, 0x0001, 2, 1}, /* AD7124_Channel_2 */ |
adisuciu | 1:4a4194a5a8ed | 74 | {0x0C, 0x0001, 2, 1}, /* AD7124_Channel_3 */ |
adisuciu | 1:4a4194a5a8ed | 75 | {0x0D, 0x0001, 2, 1}, /* AD7124_Channel_4 */ |
adisuciu | 1:4a4194a5a8ed | 76 | {0x0E, 0x0001, 2, 1}, /* AD7124_Channel_5 */ |
adisuciu | 1:4a4194a5a8ed | 77 | {0x0F, 0x0001, 2, 1}, /* AD7124_Channel_6 */ |
adisuciu | 1:4a4194a5a8ed | 78 | {0x10, 0x0001, 2, 1}, /* AD7124_Channel_7 */ |
adisuciu | 1:4a4194a5a8ed | 79 | {0x11, 0x0001, 2, 1}, /* AD7124_Channel_8 */ |
adisuciu | 1:4a4194a5a8ed | 80 | {0x12, 0x0001, 2, 1}, /* AD7124_Channel_9 */ |
adisuciu | 1:4a4194a5a8ed | 81 | {0x13, 0x0001, 2, 1}, /* AD7124_Channel_10 */ |
adisuciu | 1:4a4194a5a8ed | 82 | {0x14, 0x0001, 2, 1}, /* AD7124_Channel_11 */ |
adisuciu | 1:4a4194a5a8ed | 83 | {0x15, 0x0001, 2, 1}, /* AD7124_Channel_12 */ |
adisuciu | 1:4a4194a5a8ed | 84 | {0x16, 0x0001, 2, 1}, /* AD7124_Channel_13 */ |
adisuciu | 1:4a4194a5a8ed | 85 | {0x17, 0x0001, 2, 1}, /* AD7124_Channel_14 */ |
adisuciu | 1:4a4194a5a8ed | 86 | {0x18, 0x0001, 2, 1}, /* AD7124_Channel_15 */ |
adisuciu | 1:4a4194a5a8ed | 87 | {0x19, 0x0860, 2, 1}, /* AD7124_Config_0 */ |
adisuciu | 1:4a4194a5a8ed | 88 | {0x1A, 0x0860, 2, 1}, /* AD7124_Config_1 */ |
adisuciu | 1:4a4194a5a8ed | 89 | {0x1B, 0x0860, 2, 1}, /* AD7124_Config_2 */ |
adisuciu | 1:4a4194a5a8ed | 90 | {0x1C, 0x0860, 2, 1}, /* AD7124_Config_3 */ |
adisuciu | 1:4a4194a5a8ed | 91 | {0x1D, 0x0860, 2, 1}, /* AD7124_Config_4 */ |
adisuciu | 1:4a4194a5a8ed | 92 | {0x1E, 0x0860, 2, 1}, /* AD7124_Config_5 */ |
adisuciu | 1:4a4194a5a8ed | 93 | {0x1F, 0x0860, 2, 1}, /* AD7124_Config_6 */ |
adisuciu | 1:4a4194a5a8ed | 94 | {0x20, 0x0860, 2, 1}, /* AD7124_Config_7 */ |
adisuciu | 1:4a4194a5a8ed | 95 | {0x21, 0x060180, 3, 1}, /* AD7124_Filter_0 */ |
adisuciu | 1:4a4194a5a8ed | 96 | {0x22, 0x060180, 3, 1}, /* AD7124_Filter_1 */ |
adisuciu | 1:4a4194a5a8ed | 97 | {0x23, 0x060180, 3, 1}, /* AD7124_Filter_2 */ |
adisuciu | 1:4a4194a5a8ed | 98 | {0x24, 0x060180, 3, 1}, /* AD7124_Filter_3 */ |
adisuciu | 1:4a4194a5a8ed | 99 | {0x25, 0x060180, 3, 1}, /* AD7124_Filter_4 */ |
adisuciu | 1:4a4194a5a8ed | 100 | {0x26, 0x060180, 3, 1}, /* AD7124_Filter_5 */ |
adisuciu | 1:4a4194a5a8ed | 101 | {0x27, 0x060180, 3, 1}, /* AD7124_Filter_6 */ |
adisuciu | 1:4a4194a5a8ed | 102 | {0x28, 0x060180, 3, 1}, /* AD7124_Filter_7 */ |
adisuciu | 1:4a4194a5a8ed | 103 | {0x29, 0x800000, 3, 1}, /* AD7124_Offset_0 */ |
adisuciu | 1:4a4194a5a8ed | 104 | {0x2A, 0x800000, 3, 1}, /* AD7124_Offset_1 */ |
adisuciu | 1:4a4194a5a8ed | 105 | {0x2B, 0x800000, 3, 1}, /* AD7124_Offset_2 */ |
adisuciu | 1:4a4194a5a8ed | 106 | {0x2C, 0x800000, 3, 1}, /* AD7124_Offset_3 */ |
adisuciu | 1:4a4194a5a8ed | 107 | {0x2D, 0x800000, 3, 1}, /* AD7124_Offset_4 */ |
adisuciu | 1:4a4194a5a8ed | 108 | {0x2E, 0x800000, 3, 1}, /* AD7124_Offset_5 */ |
adisuciu | 1:4a4194a5a8ed | 109 | {0x2F, 0x800000, 3, 1}, /* AD7124_Offset_6 */ |
adisuciu | 1:4a4194a5a8ed | 110 | {0x30, 0x800000, 3, 1}, /* AD7124_Offset_7 */ |
adisuciu | 1:4a4194a5a8ed | 111 | {0x31, 0x500000, 3, 1}, /* AD7124_Gain_0 */ |
adisuciu | 1:4a4194a5a8ed | 112 | {0x32, 0x500000, 3, 1}, /* AD7124_Gain_1 */ |
adisuciu | 1:4a4194a5a8ed | 113 | {0x33, 0x500000, 3, 1}, /* AD7124_Gain_2 */ |
adisuciu | 1:4a4194a5a8ed | 114 | {0x34, 0x500000, 3, 1}, /* AD7124_Gain_3 */ |
adisuciu | 1:4a4194a5a8ed | 115 | {0x35, 0x500000, 3, 1}, /* AD7124_Gain_4 */ |
adisuciu | 1:4a4194a5a8ed | 116 | {0x36, 0x500000, 3, 1}, /* AD7124_Gain_5 */ |
adisuciu | 1:4a4194a5a8ed | 117 | {0x37, 0x500000, 3, 1}, /* AD7124_Gain_6 */ |
adisuciu | 1:4a4194a5a8ed | 118 | {0x38, 0x500000, 3, 1}, /* AD7124_Gain_7 */ |
adisuciu | 4:502352a643e6 | 119 | }; |
adisuciu | 4:502352a643e6 | 120 | |
adisuciu | 4:502352a643e6 | 121 | AD7124::AD7124(PinName CS, |
adisuciu | 4:502352a643e6 | 122 | PinName MOSI, |
adisuciu | 4:502352a643e6 | 123 | PinName MISO, |
adisuciu | 4:502352a643e6 | 124 | PinName SCK) : |
adisuciu | 4:502352a643e6 | 125 | miso(MISO), ad7124(MOSI, MISO, SCK), cs(CS) |
adisuciu | 4:502352a643e6 | 126 | |
adisuciu | 4:502352a643e6 | 127 | { |
adisuciu | 4:502352a643e6 | 128 | cs = true; // cs is active low |
adisuciu | 4:502352a643e6 | 129 | ad7124.format(8, _SPI_MODE); |
adisuciu | 4:502352a643e6 | 130 | memcpy(ad7124_regs, ad7124_regs_init, 57 * sizeof(ad7124_st_reg)); |
adisuciu | 4:502352a643e6 | 131 | this->regs = ad7124_regs; |
adisuciu | 4:502352a643e6 | 132 | this->useCRC = false; |
adisuciu | 4:502352a643e6 | 133 | |
adisuciu | 4:502352a643e6 | 134 | } |
adisuciu | 0:f32d3fb1d3e2 | 135 | |
adisuciu | 0:f32d3fb1d3e2 | 136 | /** |
adisuciu | 0:f32d3fb1d3e2 | 137 | * @brief Set AD7790 SPI frequency |
adisuciu | 0:f32d3fb1d3e2 | 138 | * @param hz - SPI bus frequency in hz |
adisuciu | 0:f32d3fb1d3e2 | 139 | * @return none |
adisuciu | 0:f32d3fb1d3e2 | 140 | */ |
adisuciu | 0:f32d3fb1d3e2 | 141 | void AD7124::frequency(int hz) |
adisuciu | 0:f32d3fb1d3e2 | 142 | { |
adisuciu | 0:f32d3fb1d3e2 | 143 | ad7124.frequency(hz); |
adisuciu | 0:f32d3fb1d3e2 | 144 | } |
adisuciu | 0:f32d3fb1d3e2 | 145 | |
adisuciu | 0:f32d3fb1d3e2 | 146 | /** |
adisuciu | 0:f32d3fb1d3e2 | 147 | * @brief Resets the AD7790 |
adisuciu | 0:f32d3fb1d3e2 | 148 | * @return none |
adisuciu | 0:f32d3fb1d3e2 | 149 | */ |
adisuciu | 0:f32d3fb1d3e2 | 150 | /*void AD7124::reset() |
adisuciu | 0:f32d3fb1d3e2 | 151 | { |
adisuciu | 0:f32d3fb1d3e2 | 152 | ad7124.format(8, _SPI_MODE); |
adisuciu | 0:f32d3fb1d3e2 | 153 | cs = false; |
adisuciu | 0:f32d3fb1d3e2 | 154 | wait_us(_DELAY_TIMING); |
adisuciu | 0:f32d3fb1d3e2 | 155 | ad7124.write(_RESET); |
adisuciu | 0:f32d3fb1d3e2 | 156 | ad7124.write(_RESET); |
adisuciu | 0:f32d3fb1d3e2 | 157 | ad7124.write(_RESET); |
adisuciu | 0:f32d3fb1d3e2 | 158 | ad7124.write(_RESET); |
adisuciu | 0:f32d3fb1d3e2 | 159 | ad7124.write(_RESET); |
adisuciu | 0:f32d3fb1d3e2 | 160 | ad7124.write(_RESET); |
adisuciu | 0:f32d3fb1d3e2 | 161 | ad7124.write(_RESET); |
adisuciu | 0:f32d3fb1d3e2 | 162 | ad7124.write(_RESET); |
adisuciu | 0:f32d3fb1d3e2 | 163 | wait_us(_DELAY_TIMING); |
adisuciu | 0:f32d3fb1d3e2 | 164 | cs = true; |
adisuciu | 0:f32d3fb1d3e2 | 165 | //_continous_conversion = true; |
adisuciu | 0:f32d3fb1d3e2 | 166 | }*/ |
adisuciu | 0:f32d3fb1d3e2 | 167 | /** |
adisuciu | 0:f32d3fb1d3e2 | 168 | * @brief Reads a register of the AD7790 |
adisuciu | 0:f32d3fb1d3e2 | 169 | * @param address - address of the register |
adisuciu | 0:f32d3fb1d3e2 | 170 | * @return value of the register |
adisuciu | 0:f32d3fb1d3e2 | 171 | */ |
adisuciu | 0:f32d3fb1d3e2 | 172 | uint16_t AD7124::read_reg(uint8_t address) |
adisuciu | 0:f32d3fb1d3e2 | 173 | { |
adisuciu | 0:f32d3fb1d3e2 | 174 | uint16_t data = address << 8; |
adisuciu | 0:f32d3fb1d3e2 | 175 | data |= _DUMMY_BYTE; |
adisuciu | 0:f32d3fb1d3e2 | 176 | data |= _READ_FLAG; |
adisuciu | 0:f32d3fb1d3e2 | 177 | return write_spi(data); |
adisuciu | 0:f32d3fb1d3e2 | 178 | } |
adisuciu | 0:f32d3fb1d3e2 | 179 | |
adisuciu | 0:f32d3fb1d3e2 | 180 | /** |
adisuciu | 0:f32d3fb1d3e2 | 181 | * @brief Writes a register of the AD7790 |
adisuciu | 0:f32d3fb1d3e2 | 182 | * @param address - address of the register |
adisuciu | 0:f32d3fb1d3e2 | 183 | * @param reg_val - value to be written |
adisuciu | 0:f32d3fb1d3e2 | 184 | * @return none |
adisuciu | 0:f32d3fb1d3e2 | 185 | * |
adisuciu | 0:f32d3fb1d3e2 | 186 | */ |
adisuciu | 0:f32d3fb1d3e2 | 187 | void AD7124::write_reg(uint8_t address, uint8_t reg_val) |
adisuciu | 0:f32d3fb1d3e2 | 188 | { |
adisuciu | 0:f32d3fb1d3e2 | 189 | uint16_t spi_data = address << 8; |
adisuciu | 0:f32d3fb1d3e2 | 190 | spi_data |= reg_val; |
adisuciu | 0:f32d3fb1d3e2 | 191 | write_spi(spi_data); |
adisuciu | 0:f32d3fb1d3e2 | 192 | } |
adisuciu | 0:f32d3fb1d3e2 | 193 | |
adisuciu | 0:f32d3fb1d3e2 | 194 | /** |
adisuciu | 0:f32d3fb1d3e2 | 195 | * @brief Writes 16bit data to the AD7790 SPI interface |
adisuciu | 0:f32d3fb1d3e2 | 196 | * @param reg_val to be written |
adisuciu | 0:f32d3fb1d3e2 | 197 | * @return data returned by the AD7790 |
adisuciu | 0:f32d3fb1d3e2 | 198 | */ |
adisuciu | 0:f32d3fb1d3e2 | 199 | uint16_t AD7124::write_spi(uint16_t reg_val) |
adisuciu | 0:f32d3fb1d3e2 | 200 | { |
adisuciu | 0:f32d3fb1d3e2 | 201 | uint16_t data_result; |
adisuciu | 0:f32d3fb1d3e2 | 202 | uint8_t upper_byte = (reg_val >> 8) & 0xFF; |
adisuciu | 0:f32d3fb1d3e2 | 203 | uint8_t lower_byte = reg_val & 0xFF; |
adisuciu | 0:f32d3fb1d3e2 | 204 | ad7124.format(8, _SPI_MODE); |
adisuciu | 0:f32d3fb1d3e2 | 205 | cs = false; |
adisuciu | 0:f32d3fb1d3e2 | 206 | data_result = (ad7124.write(upper_byte) << 8); |
adisuciu | 0:f32d3fb1d3e2 | 207 | data_result |= ad7124.write(lower_byte); |
adisuciu | 0:f32d3fb1d3e2 | 208 | cs = true; |
adisuciu | 0:f32d3fb1d3e2 | 209 | return data_result; |
adisuciu | 0:f32d3fb1d3e2 | 210 | } |
adisuciu | 0:f32d3fb1d3e2 | 211 | |
adisuciu | 0:f32d3fb1d3e2 | 212 | |
adisuciu | 0:f32d3fb1d3e2 | 213 | |
adisuciu | 0:f32d3fb1d3e2 | 214 | /***************************************************************************//** |
adisuciu | 0:f32d3fb1d3e2 | 215 | * @brief Reads the value of the specified register without checking if the |
adisuciu | 0:f32d3fb1d3e2 | 216 | * device is ready to accept user requests. |
adisuciu | 0:f32d3fb1d3e2 | 217 | * |
adisuciu | 0:f32d3fb1d3e2 | 218 | * @param device - The handler of the instance of the driver. |
adisuciu | 0:f32d3fb1d3e2 | 219 | * @param pReg - Pointer to the register structure holding info about the |
adisuciu | 0:f32d3fb1d3e2 | 220 | * register to be read. The read value is stored inside the |
adisuciu | 0:f32d3fb1d3e2 | 221 | * register structure. |
adisuciu | 0:f32d3fb1d3e2 | 222 | * |
adisuciu | 0:f32d3fb1d3e2 | 223 | * @return Returns 0 for success or negative error code. |
adisuciu | 0:f32d3fb1d3e2 | 224 | *******************************************************************************/ |
adisuciu | 0:f32d3fb1d3e2 | 225 | int32_t AD7124::NoCheckReadRegister(ad7124_st_reg* pReg) |
adisuciu | 0:f32d3fb1d3e2 | 226 | { |
adisuciu | 0:f32d3fb1d3e2 | 227 | int32_t ret = 0; |
adisuciu | 0:f32d3fb1d3e2 | 228 | uint8_t buffer[8] = {0, 0, 0, 0, 0, 0, 0, 0}; |
adisuciu | 0:f32d3fb1d3e2 | 229 | uint8_t i = 0; |
adisuciu | 0:f32d3fb1d3e2 | 230 | uint8_t check8 = 0; |
adisuciu | 0:f32d3fb1d3e2 | 231 | uint8_t msgBuf[8] = {0, 0, 0, 0, 0, 0, 0, 0}; |
adisuciu | 0:f32d3fb1d3e2 | 232 | |
adisuciu | 0:f32d3fb1d3e2 | 233 | |
adisuciu | 0:f32d3fb1d3e2 | 234 | check8 = useCRC; |
adisuciu | 0:f32d3fb1d3e2 | 235 | |
adisuciu | 0:f32d3fb1d3e2 | 236 | /* Build the Command word */ |
adisuciu | 0:f32d3fb1d3e2 | 237 | buffer[0] = AD7124_COMM_REG_WEN | AD7124_COMM_REG_RD | |
adisuciu | 0:f32d3fb1d3e2 | 238 | AD7124_COMM_REG_RA(pReg->addr); |
adisuciu | 0:f32d3fb1d3e2 | 239 | |
adisuciu | 0:f32d3fb1d3e2 | 240 | /* Read data from the device */ |
adisuciu | 0:f32d3fb1d3e2 | 241 | ret = SPI_Read(buffer, |
adisuciu | 0:f32d3fb1d3e2 | 242 | ((useCRC != AD7124_DISABLE_CRC) ? pReg->size + 1 |
adisuciu | 0:f32d3fb1d3e2 | 243 | : pReg->size) + 1); |
adisuciu | 0:f32d3fb1d3e2 | 244 | if(ret < 0) |
adisuciu | 0:f32d3fb1d3e2 | 245 | return ret; |
adisuciu | 0:f32d3fb1d3e2 | 246 | |
adisuciu | 0:f32d3fb1d3e2 | 247 | /* Check the CRC */ |
adisuciu | 0:f32d3fb1d3e2 | 248 | if(check8 == AD7124_USE_CRC) { |
adisuciu | 0:f32d3fb1d3e2 | 249 | msgBuf[0] = AD7124_COMM_REG_WEN | AD7124_COMM_REG_RD | |
adisuciu | 0:f32d3fb1d3e2 | 250 | AD7124_COMM_REG_RA(pReg->addr); |
adisuciu | 0:f32d3fb1d3e2 | 251 | for(i = 1; i < pReg->size + 2; ++i) { |
adisuciu | 0:f32d3fb1d3e2 | 252 | msgBuf[i] = buffer[i]; |
adisuciu | 0:f32d3fb1d3e2 | 253 | } |
adisuciu | 0:f32d3fb1d3e2 | 254 | check8 = ComputeCRC8(msgBuf, pReg->size + 2); |
adisuciu | 0:f32d3fb1d3e2 | 255 | } |
adisuciu | 0:f32d3fb1d3e2 | 256 | |
adisuciu | 0:f32d3fb1d3e2 | 257 | if(check8 != 0) { |
adisuciu | 0:f32d3fb1d3e2 | 258 | /* ReadRegister checksum failed. */ |
adisuciu | 0:f32d3fb1d3e2 | 259 | return COMM_ERR; |
adisuciu | 0:f32d3fb1d3e2 | 260 | } |
adisuciu | 0:f32d3fb1d3e2 | 261 | |
adisuciu | 0:f32d3fb1d3e2 | 262 | /* Build the result */ |
adisuciu | 0:f32d3fb1d3e2 | 263 | pReg->value = 0; |
adisuciu | 0:f32d3fb1d3e2 | 264 | for(i = 1; i < pReg->size + 1; i++) { |
adisuciu | 0:f32d3fb1d3e2 | 265 | pReg->value <<= 8; |
adisuciu | 0:f32d3fb1d3e2 | 266 | pReg->value += buffer[i]; |
adisuciu | 0:f32d3fb1d3e2 | 267 | } |
adisuciu | 0:f32d3fb1d3e2 | 268 | |
adisuciu | 0:f32d3fb1d3e2 | 269 | return ret; |
adisuciu | 0:f32d3fb1d3e2 | 270 | } |
adisuciu | 0:f32d3fb1d3e2 | 271 | |
adisuciu | 0:f32d3fb1d3e2 | 272 | /***************************************************************************//** |
adisuciu | 0:f32d3fb1d3e2 | 273 | * @brief Writes the value of the specified register without checking if the |
adisuciu | 0:f32d3fb1d3e2 | 274 | * device is ready to accept user requests. |
adisuciu | 0:f32d3fb1d3e2 | 275 | * |
adisuciu | 0:f32d3fb1d3e2 | 276 | * @param device - The handler of the instance of the driver. |
adisuciu | 0:f32d3fb1d3e2 | 277 | * @param reg - Register structure holding info about the register to be written |
adisuciu | 0:f32d3fb1d3e2 | 278 | * |
adisuciu | 0:f32d3fb1d3e2 | 279 | * @return Returns 0 for success or negative error code. |
adisuciu | 0:f32d3fb1d3e2 | 280 | *******************************************************************************/ |
adisuciu | 0:f32d3fb1d3e2 | 281 | int32_t AD7124::NoCheckWriteRegister(ad7124_st_reg reg) |
adisuciu | 0:f32d3fb1d3e2 | 282 | { |
adisuciu | 0:f32d3fb1d3e2 | 283 | int32_t ret = 0; |
adisuciu | 0:f32d3fb1d3e2 | 284 | int32_t regValue = 0; |
adisuciu | 0:f32d3fb1d3e2 | 285 | uint8_t wrBuf[8] = {0, 0, 0, 0, 0, 0, 0, 0}; |
adisuciu | 0:f32d3fb1d3e2 | 286 | uint8_t i = 0; |
adisuciu | 0:f32d3fb1d3e2 | 287 | uint8_t crc8 = 0; |
adisuciu | 0:f32d3fb1d3e2 | 288 | |
adisuciu | 0:f32d3fb1d3e2 | 289 | |
adisuciu | 0:f32d3fb1d3e2 | 290 | /* Build the Command word */ |
adisuciu | 0:f32d3fb1d3e2 | 291 | wrBuf[0] = AD7124_COMM_REG_WEN | AD7124_COMM_REG_WR | |
adisuciu | 0:f32d3fb1d3e2 | 292 | AD7124_COMM_REG_RA(reg.addr); |
adisuciu | 0:f32d3fb1d3e2 | 293 | |
adisuciu | 0:f32d3fb1d3e2 | 294 | /* Fill the write buffer */ |
adisuciu | 0:f32d3fb1d3e2 | 295 | regValue = reg.value; |
adisuciu | 0:f32d3fb1d3e2 | 296 | for(i = 0; i < reg.size; i++) { |
adisuciu | 0:f32d3fb1d3e2 | 297 | wrBuf[reg.size - i] = regValue & 0xFF; |
adisuciu | 0:f32d3fb1d3e2 | 298 | regValue >>= 8; |
adisuciu | 0:f32d3fb1d3e2 | 299 | } |
adisuciu | 0:f32d3fb1d3e2 | 300 | |
adisuciu | 0:f32d3fb1d3e2 | 301 | /* Compute the CRC */ |
adisuciu | 0:f32d3fb1d3e2 | 302 | if(useCRC != AD7124_DISABLE_CRC) { |
adisuciu | 0:f32d3fb1d3e2 | 303 | crc8 = ComputeCRC8(wrBuf, reg.size + 1); |
adisuciu | 0:f32d3fb1d3e2 | 304 | wrBuf[reg.size + 1] = crc8; |
adisuciu | 0:f32d3fb1d3e2 | 305 | } |
adisuciu | 0:f32d3fb1d3e2 | 306 | |
adisuciu | 0:f32d3fb1d3e2 | 307 | /* Write data to the device */ |
adisuciu | 0:f32d3fb1d3e2 | 308 | ret = SPI_Write(wrBuf, |
adisuciu | 0:f32d3fb1d3e2 | 309 | (useCRC != AD7124_DISABLE_CRC) ? reg.size + 2 |
adisuciu | 0:f32d3fb1d3e2 | 310 | : reg.size + 1); |
adisuciu | 0:f32d3fb1d3e2 | 311 | |
adisuciu | 0:f32d3fb1d3e2 | 312 | return ret; |
adisuciu | 0:f32d3fb1d3e2 | 313 | } |
adisuciu | 0:f32d3fb1d3e2 | 314 | |
adisuciu | 0:f32d3fb1d3e2 | 315 | /***************************************************************************//** |
adisuciu | 0:f32d3fb1d3e2 | 316 | * @brief Reads the value of the specified register only when the device is ready |
adisuciu | 0:f32d3fb1d3e2 | 317 | * to accept user requests. If the device ready flag is deactivated the |
adisuciu | 0:f32d3fb1d3e2 | 318 | * read operation will be executed without checking the device state. |
adisuciu | 0:f32d3fb1d3e2 | 319 | * |
adisuciu | 0:f32d3fb1d3e2 | 320 | * @param device - The handler of the instance of the driver. |
adisuciu | 0:f32d3fb1d3e2 | 321 | * @param pReg - Pointer to the register structure holding info about the |
adisuciu | 0:f32d3fb1d3e2 | 322 | * register to be read. The read value is stored inside the |
adisuciu | 0:f32d3fb1d3e2 | 323 | * register structure. |
adisuciu | 0:f32d3fb1d3e2 | 324 | * |
adisuciu | 0:f32d3fb1d3e2 | 325 | * @return Returns 0 for success or negative error code. |
adisuciu | 0:f32d3fb1d3e2 | 326 | *******************************************************************************/ |
adisuciu | 0:f32d3fb1d3e2 | 327 | int32_t AD7124::ReadRegister(ad7124_st_reg* pReg) |
adisuciu | 0:f32d3fb1d3e2 | 328 | { |
adisuciu | 0:f32d3fb1d3e2 | 329 | int32_t ret; |
adisuciu | 0:f32d3fb1d3e2 | 330 | |
adisuciu | 0:f32d3fb1d3e2 | 331 | if (pReg->addr != ERR_REG && check_ready) { |
adisuciu | 0:f32d3fb1d3e2 | 332 | ret = WaitForSpiReady(spi_rdy_poll_cnt); |
adisuciu | 0:f32d3fb1d3e2 | 333 | if (ret < 0) |
adisuciu | 0:f32d3fb1d3e2 | 334 | return ret; |
adisuciu | 0:f32d3fb1d3e2 | 335 | } |
adisuciu | 0:f32d3fb1d3e2 | 336 | ret = NoCheckReadRegister(pReg); |
adisuciu | 0:f32d3fb1d3e2 | 337 | |
adisuciu | 0:f32d3fb1d3e2 | 338 | return ret; |
adisuciu | 0:f32d3fb1d3e2 | 339 | } |
adisuciu | 0:f32d3fb1d3e2 | 340 | |
adisuciu | 0:f32d3fb1d3e2 | 341 | /***************************************************************************//** |
adisuciu | 0:f32d3fb1d3e2 | 342 | * @brief Writes the value of the specified register only when the device is |
adisuciu | 0:f32d3fb1d3e2 | 343 | * ready to accept user requests. If the device ready flag is deactivated |
adisuciu | 0:f32d3fb1d3e2 | 344 | * the write operation will be executed without checking the device state. |
adisuciu | 0:f32d3fb1d3e2 | 345 | * |
adisuciu | 0:f32d3fb1d3e2 | 346 | * @param device - The handler of the instance of the driver. |
adisuciu | 0:f32d3fb1d3e2 | 347 | * @param reg - Register structure holding info about the register to be written |
adisuciu | 0:f32d3fb1d3e2 | 348 | * |
adisuciu | 0:f32d3fb1d3e2 | 349 | * @return Returns 0 for success or negative error code. |
adisuciu | 0:f32d3fb1d3e2 | 350 | *******************************************************************************/ |
adisuciu | 0:f32d3fb1d3e2 | 351 | int32_t AD7124::WriteRegister(ad7124_st_reg pReg) |
adisuciu | 0:f32d3fb1d3e2 | 352 | { |
adisuciu | 0:f32d3fb1d3e2 | 353 | int32_t ret; |
adisuciu | 0:f32d3fb1d3e2 | 354 | |
adisuciu | 0:f32d3fb1d3e2 | 355 | if (check_ready) { |
adisuciu | 0:f32d3fb1d3e2 | 356 | ret = WaitForSpiReady(spi_rdy_poll_cnt); |
adisuciu | 0:f32d3fb1d3e2 | 357 | if (ret < 0) |
adisuciu | 0:f32d3fb1d3e2 | 358 | return ret; |
adisuciu | 0:f32d3fb1d3e2 | 359 | } |
adisuciu | 0:f32d3fb1d3e2 | 360 | ret = NoCheckWriteRegister(pReg); |
adisuciu | 0:f32d3fb1d3e2 | 361 | |
adisuciu | 0:f32d3fb1d3e2 | 362 | return ret; |
adisuciu | 0:f32d3fb1d3e2 | 363 | } |
adisuciu | 0:f32d3fb1d3e2 | 364 | |
adisuciu | 0:f32d3fb1d3e2 | 365 | /***************************************************************************//** |
adisuciu | 0:f32d3fb1d3e2 | 366 | * @brief Reads and returns the value of a device register. The read value is |
adisuciu | 0:f32d3fb1d3e2 | 367 | * also stored in software register list of the device. |
adisuciu | 0:f32d3fb1d3e2 | 368 | * |
adisuciu | 0:f32d3fb1d3e2 | 369 | * @param device - The handler of the instance of the driver. |
adisuciu | 0:f32d3fb1d3e2 | 370 | * @param reg - Which register to read from. |
adisuciu | 0:f32d3fb1d3e2 | 371 | * @param pError - Pointer to the location where to store the error code if an |
adisuciu | 0:f32d3fb1d3e2 | 372 | * error occurs. Stores 0 for success or negative error code. |
adisuciu | 0:f32d3fb1d3e2 | 373 | * Does not store anything if pErorr = NULL; |
adisuciu | 0:f32d3fb1d3e2 | 374 | * |
adisuciu | 0:f32d3fb1d3e2 | 375 | * @return Returns the value read from the specified register. |
adisuciu | 0:f32d3fb1d3e2 | 376 | *******************************************************************************/ |
adisuciu | 0:f32d3fb1d3e2 | 377 | uint32_t AD7124::ReadDeviceRegister(enum ad7124_registers reg) |
adisuciu | 0:f32d3fb1d3e2 | 378 | { |
adisuciu | 0:f32d3fb1d3e2 | 379 | ReadRegister(®s[reg]); |
adisuciu | 0:f32d3fb1d3e2 | 380 | return (regs[reg].value); |
adisuciu | 0:f32d3fb1d3e2 | 381 | } |
adisuciu | 0:f32d3fb1d3e2 | 382 | |
adisuciu | 0:f32d3fb1d3e2 | 383 | /***************************************************************************//** |
adisuciu | 0:f32d3fb1d3e2 | 384 | * @brief Writes the specified value to a device register. The value to be |
adisuciu | 0:f32d3fb1d3e2 | 385 | * written is also stored in the software register list of the device. |
adisuciu | 0:f32d3fb1d3e2 | 386 | * |
adisuciu | 0:f32d3fb1d3e2 | 387 | * @param device - The handler of the instance of the driver. |
adisuciu | 0:f32d3fb1d3e2 | 388 | * @param reg - Which register to write to. |
adisuciu | 0:f32d3fb1d3e2 | 389 | * @param value - The value to be written to the reigster of the device. |
adisuciu | 0:f32d3fb1d3e2 | 390 | * |
adisuciu | 0:f32d3fb1d3e2 | 391 | * @return Returns 0 for success or negative error code. |
adisuciu | 0:f32d3fb1d3e2 | 392 | *******************************************************************************/ |
adisuciu | 0:f32d3fb1d3e2 | 393 | int32_t AD7124::WriteDeviceRegister(enum ad7124_registers reg, uint32_t value) |
adisuciu | 0:f32d3fb1d3e2 | 394 | { |
adisuciu | 0:f32d3fb1d3e2 | 395 | regs[reg].value = value; |
adisuciu | 0:f32d3fb1d3e2 | 396 | return(WriteRegister(regs[reg])); |
adisuciu | 0:f32d3fb1d3e2 | 397 | } |
adisuciu | 0:f32d3fb1d3e2 | 398 | |
adisuciu | 0:f32d3fb1d3e2 | 399 | /***************************************************************************//** |
adisuciu | 0:f32d3fb1d3e2 | 400 | * @brief Resets the device. |
adisuciu | 0:f32d3fb1d3e2 | 401 | * |
adisuciu | 0:f32d3fb1d3e2 | 402 | * @param device - The handler of the instance of the driver. |
adisuciu | 0:f32d3fb1d3e2 | 403 | * |
adisuciu | 0:f32d3fb1d3e2 | 404 | * @return Returns 0 for success or negative error code. |
adisuciu | 0:f32d3fb1d3e2 | 405 | *******************************************************************************/ |
adisuciu | 0:f32d3fb1d3e2 | 406 | int32_t AD7124::Reset() |
adisuciu | 0:f32d3fb1d3e2 | 407 | { |
adisuciu | 0:f32d3fb1d3e2 | 408 | int32_t ret = 0; |
adisuciu | 0:f32d3fb1d3e2 | 409 | uint8_t wrBuf[8] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}; |
adisuciu | 0:f32d3fb1d3e2 | 410 | |
adisuciu | 0:f32d3fb1d3e2 | 411 | ret = SPI_Write( wrBuf, 8); |
adisuciu | 0:f32d3fb1d3e2 | 412 | |
adisuciu | 0:f32d3fb1d3e2 | 413 | |
adisuciu | 0:f32d3fb1d3e2 | 414 | return ret; |
adisuciu | 0:f32d3fb1d3e2 | 415 | } |
adisuciu | 0:f32d3fb1d3e2 | 416 | |
adisuciu | 0:f32d3fb1d3e2 | 417 | /***************************************************************************//** |
adisuciu | 0:f32d3fb1d3e2 | 418 | * @brief Waits until the device can accept read and write user actions. |
adisuciu | 0:f32d3fb1d3e2 | 419 | * |
adisuciu | 0:f32d3fb1d3e2 | 420 | * @param device - The handler of the instance of the driver. |
adisuciu | 0:f32d3fb1d3e2 | 421 | * @param timeout - Count representing the number of polls to be done until the |
adisuciu | 0:f32d3fb1d3e2 | 422 | * function returns. |
adisuciu | 0:f32d3fb1d3e2 | 423 | * |
adisuciu | 0:f32d3fb1d3e2 | 424 | * @return Returns 0 for success or negative error code. |
adisuciu | 0:f32d3fb1d3e2 | 425 | *******************************************************************************/ |
adisuciu | 0:f32d3fb1d3e2 | 426 | int32_t AD7124::WaitForSpiReady(uint32_t timeout) |
adisuciu | 0:f32d3fb1d3e2 | 427 | { |
adisuciu | 0:f32d3fb1d3e2 | 428 | ad7124_st_reg *regs; |
adisuciu | 0:f32d3fb1d3e2 | 429 | int32_t ret; |
adisuciu | 0:f32d3fb1d3e2 | 430 | int8_t ready = 0; |
adisuciu | 0:f32d3fb1d3e2 | 431 | |
adisuciu | 0:f32d3fb1d3e2 | 432 | regs = this->regs; |
adisuciu | 0:f32d3fb1d3e2 | 433 | |
adisuciu | 0:f32d3fb1d3e2 | 434 | while(!ready && --timeout) { |
adisuciu | 0:f32d3fb1d3e2 | 435 | /* Read the value of the Error Register */ |
adisuciu | 0:f32d3fb1d3e2 | 436 | ret = ReadRegister(®s[AD7124_Error]); |
adisuciu | 0:f32d3fb1d3e2 | 437 | if(ret < 0) |
adisuciu | 0:f32d3fb1d3e2 | 438 | return ret; |
adisuciu | 0:f32d3fb1d3e2 | 439 | |
adisuciu | 0:f32d3fb1d3e2 | 440 | /* Check the SPI IGNORE Error bit in the Error Register */ |
adisuciu | 0:f32d3fb1d3e2 | 441 | ready = (regs[AD7124_Error].value & |
adisuciu | 0:f32d3fb1d3e2 | 442 | AD7124_ERR_REG_SPI_IGNORE_ERR) == 0; |
adisuciu | 0:f32d3fb1d3e2 | 443 | } |
adisuciu | 0:f32d3fb1d3e2 | 444 | |
adisuciu | 0:f32d3fb1d3e2 | 445 | return timeout ? 0 : TIMEOUT; |
adisuciu | 0:f32d3fb1d3e2 | 446 | } |
adisuciu | 0:f32d3fb1d3e2 | 447 | |
adisuciu | 0:f32d3fb1d3e2 | 448 | /***************************************************************************//** |
adisuciu | 0:f32d3fb1d3e2 | 449 | * @brief Waits until a new conversion result is available. |
adisuciu | 0:f32d3fb1d3e2 | 450 | * |
adisuciu | 0:f32d3fb1d3e2 | 451 | * @param device - The handler of the instance of the driver. |
adisuciu | 0:f32d3fb1d3e2 | 452 | * @param timeout - Count representing the number of polls to be done until the |
adisuciu | 0:f32d3fb1d3e2 | 453 | * function returns if no new data is available. |
adisuciu | 0:f32d3fb1d3e2 | 454 | * |
adisuciu | 0:f32d3fb1d3e2 | 455 | * @return Returns 0 for success or negative error code. |
adisuciu | 0:f32d3fb1d3e2 | 456 | *******************************************************************************/ |
adisuciu | 0:f32d3fb1d3e2 | 457 | int32_t AD7124::WaitForConvReady(uint32_t timeout) |
adisuciu | 0:f32d3fb1d3e2 | 458 | { |
adisuciu | 0:f32d3fb1d3e2 | 459 | ad7124_st_reg *regs; |
adisuciu | 0:f32d3fb1d3e2 | 460 | int32_t ret; |
adisuciu | 0:f32d3fb1d3e2 | 461 | int8_t ready = 0; |
adisuciu | 0:f32d3fb1d3e2 | 462 | |
adisuciu | 0:f32d3fb1d3e2 | 463 | regs = this->regs; |
adisuciu | 0:f32d3fb1d3e2 | 464 | |
adisuciu | 0:f32d3fb1d3e2 | 465 | while(!ready && --timeout) { |
adisuciu | 0:f32d3fb1d3e2 | 466 | /* Read the value of the Status Register */ |
adisuciu | 0:f32d3fb1d3e2 | 467 | ret = ReadRegister(®s[AD7124_Status]); |
adisuciu | 0:f32d3fb1d3e2 | 468 | if(ret < 0) |
adisuciu | 0:f32d3fb1d3e2 | 469 | return ret; |
adisuciu | 0:f32d3fb1d3e2 | 470 | |
adisuciu | 0:f32d3fb1d3e2 | 471 | /* Check the RDY bit in the Status Register */ |
adisuciu | 0:f32d3fb1d3e2 | 472 | ready = (regs[AD7124_Status].value & |
adisuciu | 0:f32d3fb1d3e2 | 473 | AD7124_STATUS_REG_RDY) == 0; |
adisuciu | 0:f32d3fb1d3e2 | 474 | wait_ms(1); |
adisuciu | 0:f32d3fb1d3e2 | 475 | } |
adisuciu | 0:f32d3fb1d3e2 | 476 | |
adisuciu | 0:f32d3fb1d3e2 | 477 | return timeout ? 0 : TIMEOUT; |
adisuciu | 0:f32d3fb1d3e2 | 478 | } |
adisuciu | 0:f32d3fb1d3e2 | 479 | |
adisuciu | 0:f32d3fb1d3e2 | 480 | bool AD7124::get_miso() |
adisuciu | 0:f32d3fb1d3e2 | 481 | { |
adisuciu | 0:f32d3fb1d3e2 | 482 | return miso.read(); |
adisuciu | 0:f32d3fb1d3e2 | 483 | } |
adisuciu | 0:f32d3fb1d3e2 | 484 | |
adisuciu | 0:f32d3fb1d3e2 | 485 | /***************************************************************************//** |
adisuciu | 0:f32d3fb1d3e2 | 486 | * @brief Reads the conversion result from the device. |
adisuciu | 0:f32d3fb1d3e2 | 487 | * |
adisuciu | 0:f32d3fb1d3e2 | 488 | * @param device - The handler of the instance of the driver. |
adisuciu | 0:f32d3fb1d3e2 | 489 | * @param pData - Pointer to store the read data. |
adisuciu | 0:f32d3fb1d3e2 | 490 | * |
adisuciu | 0:f32d3fb1d3e2 | 491 | * @return Returns 0 for success or negative error code. |
adisuciu | 0:f32d3fb1d3e2 | 492 | *******************************************************************************/ |
adisuciu | 0:f32d3fb1d3e2 | 493 | int32_t AD7124::ReadData( int32_t* pData) |
adisuciu | 0:f32d3fb1d3e2 | 494 | { |
adisuciu | 0:f32d3fb1d3e2 | 495 | int32_t ret = 0; |
adisuciu | 0:f32d3fb1d3e2 | 496 | uint8_t check8 = 0; |
adisuciu | 0:f32d3fb1d3e2 | 497 | uint8_t buffer[8] = {0, 0, 0, 0, 0, 0, 0, 0}; |
adisuciu | 0:f32d3fb1d3e2 | 498 | uint8_t i = 0; |
adisuciu | 0:f32d3fb1d3e2 | 499 | uint8_t msgBuf[8] = {0, 0, 0, 0, 0, 0, 0, 0}; |
adisuciu | 0:f32d3fb1d3e2 | 500 | ad7124_st_reg *pReg; |
adisuciu | 0:f32d3fb1d3e2 | 501 | |
adisuciu | 0:f32d3fb1d3e2 | 502 | if( !pData) |
adisuciu | 0:f32d3fb1d3e2 | 503 | return INVALID_VAL; |
adisuciu | 0:f32d3fb1d3e2 | 504 | |
adisuciu | 0:f32d3fb1d3e2 | 505 | pReg = ®s[AD7124_Data]; |
adisuciu | 0:f32d3fb1d3e2 | 506 | |
adisuciu | 0:f32d3fb1d3e2 | 507 | /* Build the Command word */ |
adisuciu | 0:f32d3fb1d3e2 | 508 | buffer[0] = AD7124_COMM_REG_WEN | AD7124_COMM_REG_RD | |
adisuciu | 0:f32d3fb1d3e2 | 509 | AD7124_COMM_REG_RA(pReg->addr); |
adisuciu | 0:f32d3fb1d3e2 | 510 | |
adisuciu | 0:f32d3fb1d3e2 | 511 | |
adisuciu | 0:f32d3fb1d3e2 | 512 | /* Read data from the device */ |
adisuciu | 0:f32d3fb1d3e2 | 513 | ret = SPI_Read(buffer, |
adisuciu | 0:f32d3fb1d3e2 | 514 | ((useCRC != AD7124_DISABLE_CRC) ? pReg->size + 1 |
adisuciu | 0:f32d3fb1d3e2 | 515 | : pReg->size) + 2); |
adisuciu | 0:f32d3fb1d3e2 | 516 | |
adisuciu | 0:f32d3fb1d3e2 | 517 | if(ret < 0) |
adisuciu | 0:f32d3fb1d3e2 | 518 | return ret; |
adisuciu | 0:f32d3fb1d3e2 | 519 | |
adisuciu | 0:f32d3fb1d3e2 | 520 | /* Check the CRC */ |
adisuciu | 0:f32d3fb1d3e2 | 521 | if(check8 == AD7124_USE_CRC) { |
adisuciu | 0:f32d3fb1d3e2 | 522 | msgBuf[0] = AD7124_COMM_REG_WEN | AD7124_COMM_REG_RD | |
adisuciu | 0:f32d3fb1d3e2 | 523 | AD7124_COMM_REG_RA(pReg->addr); |
adisuciu | 0:f32d3fb1d3e2 | 524 | for(i = 1; i < pReg->size + 2; ++i) { |
adisuciu | 0:f32d3fb1d3e2 | 525 | msgBuf[i] = buffer[i]; |
adisuciu | 0:f32d3fb1d3e2 | 526 | } |
adisuciu | 0:f32d3fb1d3e2 | 527 | check8 = ComputeCRC8(msgBuf, pReg->size + 3); |
adisuciu | 0:f32d3fb1d3e2 | 528 | } |
adisuciu | 0:f32d3fb1d3e2 | 529 | |
adisuciu | 0:f32d3fb1d3e2 | 530 | if(check8 != 0) { |
adisuciu | 0:f32d3fb1d3e2 | 531 | /* ReadRegister checksum failed. */ |
adisuciu | 0:f32d3fb1d3e2 | 532 | return COMM_ERR; |
adisuciu | 0:f32d3fb1d3e2 | 533 | } |
adisuciu | 0:f32d3fb1d3e2 | 534 | |
adisuciu | 0:f32d3fb1d3e2 | 535 | /* Build the result */ |
adisuciu | 0:f32d3fb1d3e2 | 536 | *pData = 0; |
adisuciu | 0:f32d3fb1d3e2 | 537 | for(i = 1; i < pReg->size + 2; i++) { |
adisuciu | 0:f32d3fb1d3e2 | 538 | *pData <<= 8; |
adisuciu | 0:f32d3fb1d3e2 | 539 | *pData += buffer[i]; |
adisuciu | 0:f32d3fb1d3e2 | 540 | } |
adisuciu | 0:f32d3fb1d3e2 | 541 | wait_ms(500); |
adisuciu | 0:f32d3fb1d3e2 | 542 | return ret; |
adisuciu | 0:f32d3fb1d3e2 | 543 | } |
adisuciu | 0:f32d3fb1d3e2 | 544 | |
adisuciu | 0:f32d3fb1d3e2 | 545 | /***************************************************************************//** |
adisuciu | 0:f32d3fb1d3e2 | 546 | * @brief Computes the CRC checksum for a data buffer. |
adisuciu | 0:f32d3fb1d3e2 | 547 | * |
adisuciu | 0:f32d3fb1d3e2 | 548 | * @param pBuf - Data buffer |
adisuciu | 0:f32d3fb1d3e2 | 549 | * @param bufSize - Data buffer size in bytes |
adisuciu | 0:f32d3fb1d3e2 | 550 | * |
adisuciu | 0:f32d3fb1d3e2 | 551 | * @return Returns the computed CRC checksum. |
adisuciu | 0:f32d3fb1d3e2 | 552 | *******************************************************************************/ |
adisuciu | 0:f32d3fb1d3e2 | 553 | uint8_t AD7124::ComputeCRC8(uint8_t * pBuf, uint8_t bufSize) |
adisuciu | 0:f32d3fb1d3e2 | 554 | { |
adisuciu | 0:f32d3fb1d3e2 | 555 | uint8_t i = 0; |
adisuciu | 0:f32d3fb1d3e2 | 556 | uint8_t crc = 0; |
adisuciu | 0:f32d3fb1d3e2 | 557 | |
adisuciu | 0:f32d3fb1d3e2 | 558 | while(bufSize) { |
adisuciu | 0:f32d3fb1d3e2 | 559 | for(i = 0x80; i != 0; i >>= 1) { |
adisuciu | 0:f32d3fb1d3e2 | 560 | if(((crc & 0x80) != 0) != ((*pBuf & i) != 0)) { /* MSB of CRC register XOR input Bit from Data */ |
adisuciu | 0:f32d3fb1d3e2 | 561 | crc <<= 1; |
adisuciu | 0:f32d3fb1d3e2 | 562 | crc ^= AD7124_CRC8_POLYNOMIAL_REPRESENTATION; |
adisuciu | 0:f32d3fb1d3e2 | 563 | } else { |
adisuciu | 0:f32d3fb1d3e2 | 564 | crc <<= 1; |
adisuciu | 0:f32d3fb1d3e2 | 565 | } |
adisuciu | 0:f32d3fb1d3e2 | 566 | } |
adisuciu | 0:f32d3fb1d3e2 | 567 | pBuf++; |
adisuciu | 0:f32d3fb1d3e2 | 568 | bufSize--; |
adisuciu | 0:f32d3fb1d3e2 | 569 | } |
adisuciu | 0:f32d3fb1d3e2 | 570 | return crc; |
adisuciu | 0:f32d3fb1d3e2 | 571 | } |
adisuciu | 0:f32d3fb1d3e2 | 572 | |
adisuciu | 0:f32d3fb1d3e2 | 573 | |
adisuciu | 0:f32d3fb1d3e2 | 574 | /***************************************************************************//** |
adisuciu | 0:f32d3fb1d3e2 | 575 | * @brief Updates the device SPI interface settings. |
adisuciu | 0:f32d3fb1d3e2 | 576 | * |
adisuciu | 0:f32d3fb1d3e2 | 577 | * @param device - The handler of the instance of the driver. |
adisuciu | 0:f32d3fb1d3e2 | 578 | * |
adisuciu | 0:f32d3fb1d3e2 | 579 | * @return None. |
adisuciu | 0:f32d3fb1d3e2 | 580 | *******************************************************************************/ |
adisuciu | 0:f32d3fb1d3e2 | 581 | void AD7124::UpdateDevSpiSettings() |
adisuciu | 0:f32d3fb1d3e2 | 582 | { |
adisuciu | 0:f32d3fb1d3e2 | 583 | ad7124_st_reg *regs; |
adisuciu | 0:f32d3fb1d3e2 | 584 | |
adisuciu | 0:f32d3fb1d3e2 | 585 | regs = this->regs; |
adisuciu | 0:f32d3fb1d3e2 | 586 | |
adisuciu | 0:f32d3fb1d3e2 | 587 | if (regs[AD7124_Error_En].value & AD7124_ERREN_REG_SPI_IGNORE_ERR_EN) { |
adisuciu | 0:f32d3fb1d3e2 | 588 | check_ready = 1; |
adisuciu | 0:f32d3fb1d3e2 | 589 | } else { |
adisuciu | 0:f32d3fb1d3e2 | 590 | check_ready = 0; |
adisuciu | 0:f32d3fb1d3e2 | 591 | } |
adisuciu | 0:f32d3fb1d3e2 | 592 | } |
adisuciu | 0:f32d3fb1d3e2 | 593 | |
adisuciu | 0:f32d3fb1d3e2 | 594 | /***************************************************************************//** |
adisuciu | 0:f32d3fb1d3e2 | 595 | * @brief Initializes the AD7124. |
adisuciu | 0:f32d3fb1d3e2 | 596 | * |
adisuciu | 0:f32d3fb1d3e2 | 597 | * @param device - The handler of the instance of the driver. |
adisuciu | 0:f32d3fb1d3e2 | 598 | * @param slave_select - The Slave Chip Select Id to be passed to the SPI calls. |
adisuciu | 0:f32d3fb1d3e2 | 599 | * @param regs - The list of registers of the device (initialized or not) to be |
adisuciu | 0:f32d3fb1d3e2 | 600 | * added to the instance of the driver. |
adisuciu | 0:f32d3fb1d3e2 | 601 | * |
adisuciu | 0:f32d3fb1d3e2 | 602 | * @return Returns 0 for success or negative error code. |
adisuciu | 0:f32d3fb1d3e2 | 603 | *******************************************************************************/ |
adisuciu | 0:f32d3fb1d3e2 | 604 | int32_t AD7124::Setup() |
adisuciu | 0:f32d3fb1d3e2 | 605 | { |
adisuciu | 0:f32d3fb1d3e2 | 606 | int32_t ret; |
adisuciu | 0:f32d3fb1d3e2 | 607 | uint8_t regNr; |
adisuciu | 0:f32d3fb1d3e2 | 608 | |
adisuciu | 0:f32d3fb1d3e2 | 609 | |
adisuciu | 0:f32d3fb1d3e2 | 610 | spi_rdy_poll_cnt = 25000; |
adisuciu | 0:f32d3fb1d3e2 | 611 | |
adisuciu | 0:f32d3fb1d3e2 | 612 | /* Initialize the SPI communication. */ |
adisuciu | 0:f32d3fb1d3e2 | 613 | /*ret = SPI_Init(0, 2500000, 1, 0); |
adisuciu | 0:f32d3fb1d3e2 | 614 | if (ret < 0) |
adisuciu | 0:f32d3fb1d3e2 | 615 | return ret;*/ |
adisuciu | 0:f32d3fb1d3e2 | 616 | |
adisuciu | 0:f32d3fb1d3e2 | 617 | /* Reset the device interface.*/ |
adisuciu | 0:f32d3fb1d3e2 | 618 | ret = Reset(); |
adisuciu | 0:f32d3fb1d3e2 | 619 | if (ret < 0) |
adisuciu | 0:f32d3fb1d3e2 | 620 | return ret; |
adisuciu | 0:f32d3fb1d3e2 | 621 | |
adisuciu | 0:f32d3fb1d3e2 | 622 | check_ready = 1; |
adisuciu | 0:f32d3fb1d3e2 | 623 | |
adisuciu | 0:f32d3fb1d3e2 | 624 | /* Initialize registers AD7124_ADC_Control through AD7124_Filter_7. */ |
adisuciu | 0:f32d3fb1d3e2 | 625 | for(regNr = static_cast<uint8_t>(AD7124_Status); (regNr < static_cast<uint8_t>(AD7124_Offset_0)) && !(ret < 0); |
adisuciu | 0:f32d3fb1d3e2 | 626 | regNr++) { |
adisuciu | 0:f32d3fb1d3e2 | 627 | if (regs[regNr].rw == AD7124_RW) { |
adisuciu | 0:f32d3fb1d3e2 | 628 | ret = WriteRegister(regs[regNr]); |
adisuciu | 0:f32d3fb1d3e2 | 629 | if (ret < 0) |
adisuciu | 0:f32d3fb1d3e2 | 630 | break; |
adisuciu | 0:f32d3fb1d3e2 | 631 | } |
adisuciu | 0:f32d3fb1d3e2 | 632 | |
adisuciu | 0:f32d3fb1d3e2 | 633 | /* Get CRC State and device SPI interface settings */ |
adisuciu | 0:f32d3fb1d3e2 | 634 | if (regNr == AD7124_Error_En) { |
adisuciu | 0:f32d3fb1d3e2 | 635 | UpdateDevSpiSettings(); |
adisuciu | 0:f32d3fb1d3e2 | 636 | } |
adisuciu | 0:f32d3fb1d3e2 | 637 | } |
adisuciu | 0:f32d3fb1d3e2 | 638 | |
adisuciu | 0:f32d3fb1d3e2 | 639 | return ret; |
adisuciu | 0:f32d3fb1d3e2 | 640 | } |
adisuciu | 0:f32d3fb1d3e2 | 641 | |
adisuciu | 0:f32d3fb1d3e2 | 642 | uint8_t AD7124::SPI_Read(uint8_t *data, uint8_t bytes_number) |
adisuciu | 0:f32d3fb1d3e2 | 643 | { |
adisuciu | 0:f32d3fb1d3e2 | 644 | cs = false; |
adisuciu | 0:f32d3fb1d3e2 | 645 | for(uint8_t byte = 0; byte < bytes_number; byte++) { |
adisuciu | 0:f32d3fb1d3e2 | 646 | data[byte] = ad7124.write(data[byte]); |
adisuciu | 0:f32d3fb1d3e2 | 647 | } |
adisuciu | 0:f32d3fb1d3e2 | 648 | cs = true; |
adisuciu | 0:f32d3fb1d3e2 | 649 | return bytes_number; |
adisuciu | 0:f32d3fb1d3e2 | 650 | } |
adisuciu | 0:f32d3fb1d3e2 | 651 | |
adisuciu | 0:f32d3fb1d3e2 | 652 | uint8_t AD7124::SPI_Write(uint8_t *data, uint8_t bytes_number) |
adisuciu | 0:f32d3fb1d3e2 | 653 | { |
adisuciu | 0:f32d3fb1d3e2 | 654 | cs = false; |
adisuciu | 0:f32d3fb1d3e2 | 655 | for(uint8_t byte = 0; byte < bytes_number; byte++) { |
adisuciu | 0:f32d3fb1d3e2 | 656 | ad7124.write(data[byte]); |
adisuciu | 0:f32d3fb1d3e2 | 657 | } |
adisuciu | 0:f32d3fb1d3e2 | 658 | |
adisuciu | 0:f32d3fb1d3e2 | 659 | cs = true; |
adisuciu | 0:f32d3fb1d3e2 | 660 | return bytes_number; |
adisuciu | 0:f32d3fb1d3e2 | 661 | |
adisuciu | 0:f32d3fb1d3e2 | 662 | } |