Analog Devices / AD7124

Analog Devices AD7124-8 - 8-Channel, Low Noise, Low Power, 24-Bit, Sigma-Delta ADC with PGA and Reference

Dependents:   CN0398 CN0391 CN0398_arduino

AD7124.cpp@0:f32d3fb1d3e2, 2016-10-24 (annotated)

Committer:
adisuciu
Date:
Mon Oct 24 15:25:58 2016 +0000
Revision:
0:f32d3fb1d3e2
Child:
1:4a4194a5a8ed
Initial revision

Who changed what in which revision?

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adisuciu 0:f32d3fb1d3e2 1 /**
adisuciu 0:f32d3fb1d3e2 2 * @file AD7124.cpp
adisuciu 0:f32d3fb1d3e2 3 * @brief Source file for AD7124 ADC
adisuciu 0:f32d3fb1d3e2 4 * @author Analog Devices Inc.
adisuciu 0:f32d3fb1d3e2 5 *
adisuciu 0:f32d3fb1d3e2 6 * For support please go to:
adisuciu 0:f32d3fb1d3e2 7 * Github: https://github.com/analogdevicesinc/mbed-adi
adisuciu 0:f32d3fb1d3e2 8 * Support: https://ez.analog.com/community/linux-device-drivers/microcontroller-no-os-drivers
adisuciu 0:f32d3fb1d3e2 9 * Product: http://www.analog.com/ad7124
adisuciu 0:f32d3fb1d3e2 10 * More: https://wiki.analog.com/resources/tools-software/mbed-drivers-all
adisuciu 0:f32d3fb1d3e2 11
adisuciu 0:f32d3fb1d3e2 12 ********************************************************************************
adisuciu 0:f32d3fb1d3e2 13 * Copyright 2016(c) Analog Devices, Inc.
adisuciu 0:f32d3fb1d3e2 14 *
adisuciu 0:f32d3fb1d3e2 15 * All rights reserved.
adisuciu 0:f32d3fb1d3e2 16 *
adisuciu 0:f32d3fb1d3e2 17 * Redistribution and use in source and binary forms, with or without
adisuciu 0:f32d3fb1d3e2 18 * modification, are permitted provided that the following conditions are met:
adisuciu 0:f32d3fb1d3e2 19 * - Redistributions of source code must retain the above copyright
adisuciu 0:f32d3fb1d3e2 20 * notice, this list of conditions and the following disclaimer.
adisuciu 0:f32d3fb1d3e2 21 * - Redistributions in binary form must reproduce the above copyright
adisuciu 0:f32d3fb1d3e2 22 * notice, this list of conditions and the following disclaimer in
adisuciu 0:f32d3fb1d3e2 23 * the documentation and/or other materials provided with the
adisuciu 0:f32d3fb1d3e2 24 * distribution.
adisuciu 0:f32d3fb1d3e2 25 * - Neither the name of Analog Devices, Inc. nor the names of its
adisuciu 0:f32d3fb1d3e2 26 * contributors may be used to endorse or promote products derived
adisuciu 0:f32d3fb1d3e2 27 * from this software without specific prior written permission.
adisuciu 0:f32d3fb1d3e2 28 * - The use of this software may or may not infringe the patent rights
adisuciu 0:f32d3fb1d3e2 29 * of one or more patent holders. This license does not release you
adisuciu 0:f32d3fb1d3e2 30 * from the requirement that you obtain separate licenses from these
adisuciu 0:f32d3fb1d3e2 31 * patent holders to use this software.
adisuciu 0:f32d3fb1d3e2 32 * - Use of the software either in source or binary form, must be run
adisuciu 0:f32d3fb1d3e2 33 * on or directly connected to an Analog Devices Inc. component.
adisuciu 0:f32d3fb1d3e2 34 *
adisuciu 0:f32d3fb1d3e2 35 * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
adisuciu 0:f32d3fb1d3e2 36 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
adisuciu 0:f32d3fb1d3e2 37 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
adisuciu 0:f32d3fb1d3e2 38 * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
adisuciu 0:f32d3fb1d3e2 39 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
adisuciu 0:f32d3fb1d3e2 40 * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
adisuciu 0:f32d3fb1d3e2 41 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
adisuciu 0:f32d3fb1d3e2 42 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
adisuciu 0:f32d3fb1d3e2 43 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
adisuciu 0:f32d3fb1d3e2 44 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
adisuciu 0:f32d3fb1d3e2 45 *
adisuciu 0:f32d3fb1d3e2 46 ********************************************************************************/
adisuciu 0:f32d3fb1d3e2 47
adisuciu 0:f32d3fb1d3e2 48 #include <stdint.h>
adisuciu 0:f32d3fb1d3e2 49 #include "mbed.h"
adisuciu 0:f32d3fb1d3e2 50 #include "AD7124.h"
adisuciu 0:f32d3fb1d3e2 51
adisuciu 0:f32d3fb1d3e2 52 /**
adisuciu 0:f32d3fb1d3e2 53 * @brief AD7790 constructor, sets CS pin and SPI format
adisuciu 0:f32d3fb1d3e2 54 * @param CS - (optional)chip select of the AD7790
adisuciu 0:f32d3fb1d3e2 55 * @param MOSI - (optional)pin of the SPI interface
adisuciu 0:f32d3fb1d3e2 56 * @param MISO - (optional)pin of the SPI interface
adisuciu 0:f32d3fb1d3e2 57 * @param SCK - (optional)pin of the SPI interface
adisuciu 0:f32d3fb1d3e2 58 */
adisuciu 0:f32d3fb1d3e2 59 AD7124::AD7124(PinName CS,
adisuciu 0:f32d3fb1d3e2 60 PinName MOSI,
adisuciu 0:f32d3fb1d3e2 61 PinName MISO,
adisuciu 0:f32d3fb1d3e2 62 PinName SCK) :
adisuciu 0:f32d3fb1d3e2 63 miso(MISO), ad7124(MOSI, MISO, SCK), cs(CS)
adisuciu 0:f32d3fb1d3e2 64 {
adisuciu 0:f32d3fb1d3e2 65 cs = true; // cs is active low
adisuciu 0:f32d3fb1d3e2 66 ad7124.format(8, _SPI_MODE);
adisuciu 0:f32d3fb1d3e2 67 this->regs = ad7124_regs;
adisuciu 0:f32d3fb1d3e2 68 this->useCRC = false;
adisuciu 0:f32d3fb1d3e2 69 }
adisuciu 0:f32d3fb1d3e2 70
adisuciu 0:f32d3fb1d3e2 71 /**
adisuciu 0:f32d3fb1d3e2 72 * @brief Set AD7790 SPI frequency
adisuciu 0:f32d3fb1d3e2 73 * @param hz - SPI bus frequency in hz
adisuciu 0:f32d3fb1d3e2 74 * @return none
adisuciu 0:f32d3fb1d3e2 75 */
adisuciu 0:f32d3fb1d3e2 76 void AD7124::frequency(int hz)
adisuciu 0:f32d3fb1d3e2 77 {
adisuciu 0:f32d3fb1d3e2 78 ad7124.frequency(hz);
adisuciu 0:f32d3fb1d3e2 79 }
adisuciu 0:f32d3fb1d3e2 80
adisuciu 0:f32d3fb1d3e2 81 /**
adisuciu 0:f32d3fb1d3e2 82 * @brief Resets the AD7790
adisuciu 0:f32d3fb1d3e2 83 * @return none
adisuciu 0:f32d3fb1d3e2 84 */
adisuciu 0:f32d3fb1d3e2 85 /*void AD7124::reset()
adisuciu 0:f32d3fb1d3e2 86 {
adisuciu 0:f32d3fb1d3e2 87 ad7124.format(8, _SPI_MODE);
adisuciu 0:f32d3fb1d3e2 88 cs = false;
adisuciu 0:f32d3fb1d3e2 89 wait_us(_DELAY_TIMING);
adisuciu 0:f32d3fb1d3e2 90 ad7124.write(_RESET);
adisuciu 0:f32d3fb1d3e2 91 ad7124.write(_RESET);
adisuciu 0:f32d3fb1d3e2 92 ad7124.write(_RESET);
adisuciu 0:f32d3fb1d3e2 93 ad7124.write(_RESET);
adisuciu 0:f32d3fb1d3e2 94 ad7124.write(_RESET);
adisuciu 0:f32d3fb1d3e2 95 ad7124.write(_RESET);
adisuciu 0:f32d3fb1d3e2 96 ad7124.write(_RESET);
adisuciu 0:f32d3fb1d3e2 97 ad7124.write(_RESET);
adisuciu 0:f32d3fb1d3e2 98 wait_us(_DELAY_TIMING);
adisuciu 0:f32d3fb1d3e2 99 cs = true;
adisuciu 0:f32d3fb1d3e2 100 //_continous_conversion = true;
adisuciu 0:f32d3fb1d3e2 101 }*/
adisuciu 0:f32d3fb1d3e2 102 /**
adisuciu 0:f32d3fb1d3e2 103 * @brief Reads a register of the AD7790
adisuciu 0:f32d3fb1d3e2 104 * @param address - address of the register
adisuciu 0:f32d3fb1d3e2 105 * @return value of the register
adisuciu 0:f32d3fb1d3e2 106 */
adisuciu 0:f32d3fb1d3e2 107 uint16_t AD7124::read_reg(uint8_t address)
adisuciu 0:f32d3fb1d3e2 108 {
adisuciu 0:f32d3fb1d3e2 109 uint16_t data = address << 8;
adisuciu 0:f32d3fb1d3e2 110 data |= _DUMMY_BYTE;
adisuciu 0:f32d3fb1d3e2 111 data |= _READ_FLAG;
adisuciu 0:f32d3fb1d3e2 112 return write_spi(data);
adisuciu 0:f32d3fb1d3e2 113 }
adisuciu 0:f32d3fb1d3e2 114
adisuciu 0:f32d3fb1d3e2 115 /**
adisuciu 0:f32d3fb1d3e2 116 * @brief Writes a register of the AD7790
adisuciu 0:f32d3fb1d3e2 117 * @param address - address of the register
adisuciu 0:f32d3fb1d3e2 118 * @param reg_val - value to be written
adisuciu 0:f32d3fb1d3e2 119 * @return none
adisuciu 0:f32d3fb1d3e2 120 *
adisuciu 0:f32d3fb1d3e2 121 */
adisuciu 0:f32d3fb1d3e2 122 void AD7124::write_reg(uint8_t address, uint8_t reg_val)
adisuciu 0:f32d3fb1d3e2 123 {
adisuciu 0:f32d3fb1d3e2 124 uint16_t spi_data = address << 8;
adisuciu 0:f32d3fb1d3e2 125 spi_data |= reg_val;
adisuciu 0:f32d3fb1d3e2 126 write_spi(spi_data);
adisuciu 0:f32d3fb1d3e2 127 }
adisuciu 0:f32d3fb1d3e2 128
adisuciu 0:f32d3fb1d3e2 129 /**
adisuciu 0:f32d3fb1d3e2 130 * @brief Writes 16bit data to the AD7790 SPI interface
adisuciu 0:f32d3fb1d3e2 131 * @param reg_val to be written
adisuciu 0:f32d3fb1d3e2 132 * @return data returned by the AD7790
adisuciu 0:f32d3fb1d3e2 133 */
adisuciu 0:f32d3fb1d3e2 134 uint16_t AD7124::write_spi(uint16_t reg_val)
adisuciu 0:f32d3fb1d3e2 135 {
adisuciu 0:f32d3fb1d3e2 136 uint16_t data_result;
adisuciu 0:f32d3fb1d3e2 137 uint8_t upper_byte = (reg_val >> 8) & 0xFF;
adisuciu 0:f32d3fb1d3e2 138 uint8_t lower_byte = reg_val & 0xFF;
adisuciu 0:f32d3fb1d3e2 139 ad7124.format(8, _SPI_MODE);
adisuciu 0:f32d3fb1d3e2 140 cs = false;
adisuciu 0:f32d3fb1d3e2 141 data_result = (ad7124.write(upper_byte) << 8);
adisuciu 0:f32d3fb1d3e2 142 data_result |= ad7124.write(lower_byte);
adisuciu 0:f32d3fb1d3e2 143 cs = true;
adisuciu 0:f32d3fb1d3e2 144 return data_result;
adisuciu 0:f32d3fb1d3e2 145 }
adisuciu 0:f32d3fb1d3e2 146
adisuciu 0:f32d3fb1d3e2 147
adisuciu 0:f32d3fb1d3e2 148
adisuciu 0:f32d3fb1d3e2 149 /***************************************************************************//**
adisuciu 0:f32d3fb1d3e2 150 * @brief Reads the value of the specified register without checking if the
adisuciu 0:f32d3fb1d3e2 151 * device is ready to accept user requests.
adisuciu 0:f32d3fb1d3e2 152 *
adisuciu 0:f32d3fb1d3e2 153 * @param device - The handler of the instance of the driver.
adisuciu 0:f32d3fb1d3e2 154 * @param pReg - Pointer to the register structure holding info about the
adisuciu 0:f32d3fb1d3e2 155 * register to be read. The read value is stored inside the
adisuciu 0:f32d3fb1d3e2 156 * register structure.
adisuciu 0:f32d3fb1d3e2 157 *
adisuciu 0:f32d3fb1d3e2 158 * @return Returns 0 for success or negative error code.
adisuciu 0:f32d3fb1d3e2 159 *******************************************************************************/
adisuciu 0:f32d3fb1d3e2 160 int32_t AD7124::NoCheckReadRegister(ad7124_st_reg* pReg)
adisuciu 0:f32d3fb1d3e2 161 {
adisuciu 0:f32d3fb1d3e2 162 int32_t ret = 0;
adisuciu 0:f32d3fb1d3e2 163 uint8_t buffer[8] = {0, 0, 0, 0, 0, 0, 0, 0};
adisuciu 0:f32d3fb1d3e2 164 uint8_t i = 0;
adisuciu 0:f32d3fb1d3e2 165 uint8_t check8 = 0;
adisuciu 0:f32d3fb1d3e2 166 uint8_t msgBuf[8] = {0, 0, 0, 0, 0, 0, 0, 0};
adisuciu 0:f32d3fb1d3e2 167
adisuciu 0:f32d3fb1d3e2 168
adisuciu 0:f32d3fb1d3e2 169 check8 = useCRC;
adisuciu 0:f32d3fb1d3e2 170
adisuciu 0:f32d3fb1d3e2 171 /* Build the Command word */
adisuciu 0:f32d3fb1d3e2 172 buffer[0] = AD7124_COMM_REG_WEN | AD7124_COMM_REG_RD |
adisuciu 0:f32d3fb1d3e2 173 AD7124_COMM_REG_RA(pReg->addr);
adisuciu 0:f32d3fb1d3e2 174
adisuciu 0:f32d3fb1d3e2 175 /* Read data from the device */
adisuciu 0:f32d3fb1d3e2 176 ret = SPI_Read(buffer,
adisuciu 0:f32d3fb1d3e2 177 ((useCRC != AD7124_DISABLE_CRC) ? pReg->size + 1
adisuciu 0:f32d3fb1d3e2 178 : pReg->size) + 1);
adisuciu 0:f32d3fb1d3e2 179 if(ret < 0)
adisuciu 0:f32d3fb1d3e2 180 return ret;
adisuciu 0:f32d3fb1d3e2 181
adisuciu 0:f32d3fb1d3e2 182 /* Check the CRC */
adisuciu 0:f32d3fb1d3e2 183 if(check8 == AD7124_USE_CRC) {
adisuciu 0:f32d3fb1d3e2 184 msgBuf[0] = AD7124_COMM_REG_WEN | AD7124_COMM_REG_RD |
adisuciu 0:f32d3fb1d3e2 185 AD7124_COMM_REG_RA(pReg->addr);
adisuciu 0:f32d3fb1d3e2 186 for(i = 1; i < pReg->size + 2; ++i) {
adisuciu 0:f32d3fb1d3e2 187 msgBuf[i] = buffer[i];
adisuciu 0:f32d3fb1d3e2 188 }
adisuciu 0:f32d3fb1d3e2 189 check8 = ComputeCRC8(msgBuf, pReg->size + 2);
adisuciu 0:f32d3fb1d3e2 190 }
adisuciu 0:f32d3fb1d3e2 191
adisuciu 0:f32d3fb1d3e2 192 if(check8 != 0) {
adisuciu 0:f32d3fb1d3e2 193 /* ReadRegister checksum failed. */
adisuciu 0:f32d3fb1d3e2 194 return COMM_ERR;
adisuciu 0:f32d3fb1d3e2 195 }
adisuciu 0:f32d3fb1d3e2 196
adisuciu 0:f32d3fb1d3e2 197 /* Build the result */
adisuciu 0:f32d3fb1d3e2 198 pReg->value = 0;
adisuciu 0:f32d3fb1d3e2 199 for(i = 1; i < pReg->size + 1; i++) {
adisuciu 0:f32d3fb1d3e2 200 pReg->value <<= 8;
adisuciu 0:f32d3fb1d3e2 201 pReg->value += buffer[i];
adisuciu 0:f32d3fb1d3e2 202 }
adisuciu 0:f32d3fb1d3e2 203
adisuciu 0:f32d3fb1d3e2 204 return ret;
adisuciu 0:f32d3fb1d3e2 205 }
adisuciu 0:f32d3fb1d3e2 206
adisuciu 0:f32d3fb1d3e2 207 /***************************************************************************//**
adisuciu 0:f32d3fb1d3e2 208 * @brief Writes the value of the specified register without checking if the
adisuciu 0:f32d3fb1d3e2 209 * device is ready to accept user requests.
adisuciu 0:f32d3fb1d3e2 210 *
adisuciu 0:f32d3fb1d3e2 211 * @param device - The handler of the instance of the driver.
adisuciu 0:f32d3fb1d3e2 212 * @param reg - Register structure holding info about the register to be written
adisuciu 0:f32d3fb1d3e2 213 *
adisuciu 0:f32d3fb1d3e2 214 * @return Returns 0 for success or negative error code.
adisuciu 0:f32d3fb1d3e2 215 *******************************************************************************/
adisuciu 0:f32d3fb1d3e2 216 int32_t AD7124::NoCheckWriteRegister(ad7124_st_reg reg)
adisuciu 0:f32d3fb1d3e2 217 {
adisuciu 0:f32d3fb1d3e2 218 int32_t ret = 0;
adisuciu 0:f32d3fb1d3e2 219 int32_t regValue = 0;
adisuciu 0:f32d3fb1d3e2 220 uint8_t wrBuf[8] = {0, 0, 0, 0, 0, 0, 0, 0};
adisuciu 0:f32d3fb1d3e2 221 uint8_t i = 0;
adisuciu 0:f32d3fb1d3e2 222 uint8_t crc8 = 0;
adisuciu 0:f32d3fb1d3e2 223
adisuciu 0:f32d3fb1d3e2 224
adisuciu 0:f32d3fb1d3e2 225 /* Build the Command word */
adisuciu 0:f32d3fb1d3e2 226 wrBuf[0] = AD7124_COMM_REG_WEN | AD7124_COMM_REG_WR |
adisuciu 0:f32d3fb1d3e2 227 AD7124_COMM_REG_RA(reg.addr);
adisuciu 0:f32d3fb1d3e2 228
adisuciu 0:f32d3fb1d3e2 229 /* Fill the write buffer */
adisuciu 0:f32d3fb1d3e2 230 regValue = reg.value;
adisuciu 0:f32d3fb1d3e2 231 for(i = 0; i < reg.size; i++) {
adisuciu 0:f32d3fb1d3e2 232 wrBuf[reg.size - i] = regValue & 0xFF;
adisuciu 0:f32d3fb1d3e2 233 regValue >>= 8;
adisuciu 0:f32d3fb1d3e2 234 }
adisuciu 0:f32d3fb1d3e2 235
adisuciu 0:f32d3fb1d3e2 236 /* Compute the CRC */
adisuciu 0:f32d3fb1d3e2 237 if(useCRC != AD7124_DISABLE_CRC) {
adisuciu 0:f32d3fb1d3e2 238 crc8 = ComputeCRC8(wrBuf, reg.size + 1);
adisuciu 0:f32d3fb1d3e2 239 wrBuf[reg.size + 1] = crc8;
adisuciu 0:f32d3fb1d3e2 240 }
adisuciu 0:f32d3fb1d3e2 241
adisuciu 0:f32d3fb1d3e2 242 /* Write data to the device */
adisuciu 0:f32d3fb1d3e2 243 ret = SPI_Write(wrBuf,
adisuciu 0:f32d3fb1d3e2 244 (useCRC != AD7124_DISABLE_CRC) ? reg.size + 2
adisuciu 0:f32d3fb1d3e2 245 : reg.size + 1);
adisuciu 0:f32d3fb1d3e2 246
adisuciu 0:f32d3fb1d3e2 247 return ret;
adisuciu 0:f32d3fb1d3e2 248 }
adisuciu 0:f32d3fb1d3e2 249
adisuciu 0:f32d3fb1d3e2 250 /***************************************************************************//**
adisuciu 0:f32d3fb1d3e2 251 * @brief Reads the value of the specified register only when the device is ready
adisuciu 0:f32d3fb1d3e2 252 * to accept user requests. If the device ready flag is deactivated the
adisuciu 0:f32d3fb1d3e2 253 * read operation will be executed without checking the device state.
adisuciu 0:f32d3fb1d3e2 254 *
adisuciu 0:f32d3fb1d3e2 255 * @param device - The handler of the instance of the driver.
adisuciu 0:f32d3fb1d3e2 256 * @param pReg - Pointer to the register structure holding info about the
adisuciu 0:f32d3fb1d3e2 257 * register to be read. The read value is stored inside the
adisuciu 0:f32d3fb1d3e2 258 * register structure.
adisuciu 0:f32d3fb1d3e2 259 *
adisuciu 0:f32d3fb1d3e2 260 * @return Returns 0 for success or negative error code.
adisuciu 0:f32d3fb1d3e2 261 *******************************************************************************/
adisuciu 0:f32d3fb1d3e2 262 int32_t AD7124::ReadRegister(ad7124_st_reg* pReg)
adisuciu 0:f32d3fb1d3e2 263 {
adisuciu 0:f32d3fb1d3e2 264 int32_t ret;
adisuciu 0:f32d3fb1d3e2 265
adisuciu 0:f32d3fb1d3e2 266 if (pReg->addr != ERR_REG && check_ready) {
adisuciu 0:f32d3fb1d3e2 267 ret = WaitForSpiReady(spi_rdy_poll_cnt);
adisuciu 0:f32d3fb1d3e2 268 if (ret < 0)
adisuciu 0:f32d3fb1d3e2 269 return ret;
adisuciu 0:f32d3fb1d3e2 270 }
adisuciu 0:f32d3fb1d3e2 271 ret = NoCheckReadRegister(pReg);
adisuciu 0:f32d3fb1d3e2 272
adisuciu 0:f32d3fb1d3e2 273 return ret;
adisuciu 0:f32d3fb1d3e2 274 }
adisuciu 0:f32d3fb1d3e2 275
adisuciu 0:f32d3fb1d3e2 276 /***************************************************************************//**
adisuciu 0:f32d3fb1d3e2 277 * @brief Writes the value of the specified register only when the device is
adisuciu 0:f32d3fb1d3e2 278 * ready to accept user requests. If the device ready flag is deactivated
adisuciu 0:f32d3fb1d3e2 279 * the write operation will be executed without checking the device state.
adisuciu 0:f32d3fb1d3e2 280 *
adisuciu 0:f32d3fb1d3e2 281 * @param device - The handler of the instance of the driver.
adisuciu 0:f32d3fb1d3e2 282 * @param reg - Register structure holding info about the register to be written
adisuciu 0:f32d3fb1d3e2 283 *
adisuciu 0:f32d3fb1d3e2 284 * @return Returns 0 for success or negative error code.
adisuciu 0:f32d3fb1d3e2 285 *******************************************************************************/
adisuciu 0:f32d3fb1d3e2 286 int32_t AD7124::WriteRegister(ad7124_st_reg pReg)
adisuciu 0:f32d3fb1d3e2 287 {
adisuciu 0:f32d3fb1d3e2 288 int32_t ret;
adisuciu 0:f32d3fb1d3e2 289
adisuciu 0:f32d3fb1d3e2 290 if (check_ready) {
adisuciu 0:f32d3fb1d3e2 291 ret = WaitForSpiReady(spi_rdy_poll_cnt);
adisuciu 0:f32d3fb1d3e2 292 if (ret < 0)
adisuciu 0:f32d3fb1d3e2 293 return ret;
adisuciu 0:f32d3fb1d3e2 294 }
adisuciu 0:f32d3fb1d3e2 295 ret = NoCheckWriteRegister(pReg);
adisuciu 0:f32d3fb1d3e2 296
adisuciu 0:f32d3fb1d3e2 297 return ret;
adisuciu 0:f32d3fb1d3e2 298 }
adisuciu 0:f32d3fb1d3e2 299
adisuciu 0:f32d3fb1d3e2 300 /***************************************************************************//**
adisuciu 0:f32d3fb1d3e2 301 * @brief Reads and returns the value of a device register. The read value is
adisuciu 0:f32d3fb1d3e2 302 * also stored in software register list of the device.
adisuciu 0:f32d3fb1d3e2 303 *
adisuciu 0:f32d3fb1d3e2 304 * @param device - The handler of the instance of the driver.
adisuciu 0:f32d3fb1d3e2 305 * @param reg - Which register to read from.
adisuciu 0:f32d3fb1d3e2 306 * @param pError - Pointer to the location where to store the error code if an
adisuciu 0:f32d3fb1d3e2 307 * error occurs. Stores 0 for success or negative error code.
adisuciu 0:f32d3fb1d3e2 308 * Does not store anything if pErorr = NULL;
adisuciu 0:f32d3fb1d3e2 309 *
adisuciu 0:f32d3fb1d3e2 310 * @return Returns the value read from the specified register.
adisuciu 0:f32d3fb1d3e2 311 *******************************************************************************/
adisuciu 0:f32d3fb1d3e2 312 uint32_t AD7124::ReadDeviceRegister(enum ad7124_registers reg)
adisuciu 0:f32d3fb1d3e2 313 {
adisuciu 0:f32d3fb1d3e2 314 ReadRegister(&regs[reg]);
adisuciu 0:f32d3fb1d3e2 315 return (regs[reg].value);
adisuciu 0:f32d3fb1d3e2 316 }
adisuciu 0:f32d3fb1d3e2 317
adisuciu 0:f32d3fb1d3e2 318 /***************************************************************************//**
adisuciu 0:f32d3fb1d3e2 319 * @brief Writes the specified value to a device register. The value to be
adisuciu 0:f32d3fb1d3e2 320 * written is also stored in the software register list of the device.
adisuciu 0:f32d3fb1d3e2 321 *
adisuciu 0:f32d3fb1d3e2 322 * @param device - The handler of the instance of the driver.
adisuciu 0:f32d3fb1d3e2 323 * @param reg - Which register to write to.
adisuciu 0:f32d3fb1d3e2 324 * @param value - The value to be written to the reigster of the device.
adisuciu 0:f32d3fb1d3e2 325 *
adisuciu 0:f32d3fb1d3e2 326 * @return Returns 0 for success or negative error code.
adisuciu 0:f32d3fb1d3e2 327 *******************************************************************************/
adisuciu 0:f32d3fb1d3e2 328 int32_t AD7124::WriteDeviceRegister(enum ad7124_registers reg, uint32_t value)
adisuciu 0:f32d3fb1d3e2 329 {
adisuciu 0:f32d3fb1d3e2 330 regs[reg].value = value;
adisuciu 0:f32d3fb1d3e2 331 return(WriteRegister(regs[reg]));
adisuciu 0:f32d3fb1d3e2 332 }
adisuciu 0:f32d3fb1d3e2 333
adisuciu 0:f32d3fb1d3e2 334 /***************************************************************************//**
adisuciu 0:f32d3fb1d3e2 335 * @brief Resets the device.
adisuciu 0:f32d3fb1d3e2 336 *
adisuciu 0:f32d3fb1d3e2 337 * @param device - The handler of the instance of the driver.
adisuciu 0:f32d3fb1d3e2 338 *
adisuciu 0:f32d3fb1d3e2 339 * @return Returns 0 for success or negative error code.
adisuciu 0:f32d3fb1d3e2 340 *******************************************************************************/
adisuciu 0:f32d3fb1d3e2 341 int32_t AD7124::Reset()
adisuciu 0:f32d3fb1d3e2 342 {
adisuciu 0:f32d3fb1d3e2 343 int32_t ret = 0;
adisuciu 0:f32d3fb1d3e2 344 uint8_t wrBuf[8] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
adisuciu 0:f32d3fb1d3e2 345
adisuciu 0:f32d3fb1d3e2 346 ret = SPI_Write( wrBuf, 8);
adisuciu 0:f32d3fb1d3e2 347
adisuciu 0:f32d3fb1d3e2 348
adisuciu 0:f32d3fb1d3e2 349 return ret;
adisuciu 0:f32d3fb1d3e2 350 }
adisuciu 0:f32d3fb1d3e2 351
adisuciu 0:f32d3fb1d3e2 352 /***************************************************************************//**
adisuciu 0:f32d3fb1d3e2 353 * @brief Waits until the device can accept read and write user actions.
adisuciu 0:f32d3fb1d3e2 354 *
adisuciu 0:f32d3fb1d3e2 355 * @param device - The handler of the instance of the driver.
adisuciu 0:f32d3fb1d3e2 356 * @param timeout - Count representing the number of polls to be done until the
adisuciu 0:f32d3fb1d3e2 357 * function returns.
adisuciu 0:f32d3fb1d3e2 358 *
adisuciu 0:f32d3fb1d3e2 359 * @return Returns 0 for success or negative error code.
adisuciu 0:f32d3fb1d3e2 360 *******************************************************************************/
adisuciu 0:f32d3fb1d3e2 361 int32_t AD7124::WaitForSpiReady(uint32_t timeout)
adisuciu 0:f32d3fb1d3e2 362 {
adisuciu 0:f32d3fb1d3e2 363 ad7124_st_reg *regs;
adisuciu 0:f32d3fb1d3e2 364 int32_t ret;
adisuciu 0:f32d3fb1d3e2 365 int8_t ready = 0;
adisuciu 0:f32d3fb1d3e2 366
adisuciu 0:f32d3fb1d3e2 367 regs = this->regs;
adisuciu 0:f32d3fb1d3e2 368
adisuciu 0:f32d3fb1d3e2 369 while(!ready && --timeout) {
adisuciu 0:f32d3fb1d3e2 370 /* Read the value of the Error Register */
adisuciu 0:f32d3fb1d3e2 371 ret = ReadRegister(&regs[AD7124_Error]);
adisuciu 0:f32d3fb1d3e2 372 if(ret < 0)
adisuciu 0:f32d3fb1d3e2 373 return ret;
adisuciu 0:f32d3fb1d3e2 374
adisuciu 0:f32d3fb1d3e2 375 /* Check the SPI IGNORE Error bit in the Error Register */
adisuciu 0:f32d3fb1d3e2 376 ready = (regs[AD7124_Error].value &
adisuciu 0:f32d3fb1d3e2 377 AD7124_ERR_REG_SPI_IGNORE_ERR) == 0;
adisuciu 0:f32d3fb1d3e2 378 }
adisuciu 0:f32d3fb1d3e2 379
adisuciu 0:f32d3fb1d3e2 380 return timeout ? 0 : TIMEOUT;
adisuciu 0:f32d3fb1d3e2 381 }
adisuciu 0:f32d3fb1d3e2 382
adisuciu 0:f32d3fb1d3e2 383 /***************************************************************************//**
adisuciu 0:f32d3fb1d3e2 384 * @brief Waits until a new conversion result is available.
adisuciu 0:f32d3fb1d3e2 385 *
adisuciu 0:f32d3fb1d3e2 386 * @param device - The handler of the instance of the driver.
adisuciu 0:f32d3fb1d3e2 387 * @param timeout - Count representing the number of polls to be done until the
adisuciu 0:f32d3fb1d3e2 388 * function returns if no new data is available.
adisuciu 0:f32d3fb1d3e2 389 *
adisuciu 0:f32d3fb1d3e2 390 * @return Returns 0 for success or negative error code.
adisuciu 0:f32d3fb1d3e2 391 *******************************************************************************/
adisuciu 0:f32d3fb1d3e2 392 int32_t AD7124::WaitForConvReady(uint32_t timeout)
adisuciu 0:f32d3fb1d3e2 393 {
adisuciu 0:f32d3fb1d3e2 394 ad7124_st_reg *regs;
adisuciu 0:f32d3fb1d3e2 395 int32_t ret;
adisuciu 0:f32d3fb1d3e2 396 int8_t ready = 0;
adisuciu 0:f32d3fb1d3e2 397
adisuciu 0:f32d3fb1d3e2 398 regs = this->regs;
adisuciu 0:f32d3fb1d3e2 399
adisuciu 0:f32d3fb1d3e2 400 while(!ready && --timeout) {
adisuciu 0:f32d3fb1d3e2 401 /* Read the value of the Status Register */
adisuciu 0:f32d3fb1d3e2 402 ret = ReadRegister(&regs[AD7124_Status]);
adisuciu 0:f32d3fb1d3e2 403 if(ret < 0)
adisuciu 0:f32d3fb1d3e2 404 return ret;
adisuciu 0:f32d3fb1d3e2 405
adisuciu 0:f32d3fb1d3e2 406 /* Check the RDY bit in the Status Register */
adisuciu 0:f32d3fb1d3e2 407 ready = (regs[AD7124_Status].value &
adisuciu 0:f32d3fb1d3e2 408 AD7124_STATUS_REG_RDY) == 0;
adisuciu 0:f32d3fb1d3e2 409 wait_ms(1);
adisuciu 0:f32d3fb1d3e2 410 }
adisuciu 0:f32d3fb1d3e2 411
adisuciu 0:f32d3fb1d3e2 412 return timeout ? 0 : TIMEOUT;
adisuciu 0:f32d3fb1d3e2 413 }
adisuciu 0:f32d3fb1d3e2 414
adisuciu 0:f32d3fb1d3e2 415 bool AD7124::get_miso()
adisuciu 0:f32d3fb1d3e2 416 {
adisuciu 0:f32d3fb1d3e2 417 return miso.read();
adisuciu 0:f32d3fb1d3e2 418 }
adisuciu 0:f32d3fb1d3e2 419
adisuciu 0:f32d3fb1d3e2 420 /***************************************************************************//**
adisuciu 0:f32d3fb1d3e2 421 * @brief Reads the conversion result from the device.
adisuciu 0:f32d3fb1d3e2 422 *
adisuciu 0:f32d3fb1d3e2 423 * @param device - The handler of the instance of the driver.
adisuciu 0:f32d3fb1d3e2 424 * @param pData - Pointer to store the read data.
adisuciu 0:f32d3fb1d3e2 425 *
adisuciu 0:f32d3fb1d3e2 426 * @return Returns 0 for success or negative error code.
adisuciu 0:f32d3fb1d3e2 427 *******************************************************************************/
adisuciu 0:f32d3fb1d3e2 428 int32_t AD7124::ReadData( int32_t* pData)
adisuciu 0:f32d3fb1d3e2 429 {
adisuciu 0:f32d3fb1d3e2 430 int32_t ret = 0;
adisuciu 0:f32d3fb1d3e2 431 uint8_t check8 = 0;
adisuciu 0:f32d3fb1d3e2 432 uint8_t buffer[8] = {0, 0, 0, 0, 0, 0, 0, 0};
adisuciu 0:f32d3fb1d3e2 433 uint8_t i = 0;
adisuciu 0:f32d3fb1d3e2 434 uint8_t msgBuf[8] = {0, 0, 0, 0, 0, 0, 0, 0};
adisuciu 0:f32d3fb1d3e2 435 ad7124_st_reg *pReg;
adisuciu 0:f32d3fb1d3e2 436
adisuciu 0:f32d3fb1d3e2 437 if( !pData)
adisuciu 0:f32d3fb1d3e2 438 return INVALID_VAL;
adisuciu 0:f32d3fb1d3e2 439
adisuciu 0:f32d3fb1d3e2 440 pReg = &regs[AD7124_Data];
adisuciu 0:f32d3fb1d3e2 441
adisuciu 0:f32d3fb1d3e2 442 /* Build the Command word */
adisuciu 0:f32d3fb1d3e2 443 buffer[0] = AD7124_COMM_REG_WEN | AD7124_COMM_REG_RD |
adisuciu 0:f32d3fb1d3e2 444 AD7124_COMM_REG_RA(pReg->addr);
adisuciu 0:f32d3fb1d3e2 445
adisuciu 0:f32d3fb1d3e2 446
adisuciu 0:f32d3fb1d3e2 447 /* Read data from the device */
adisuciu 0:f32d3fb1d3e2 448 ret = SPI_Read(buffer,
adisuciu 0:f32d3fb1d3e2 449 ((useCRC != AD7124_DISABLE_CRC) ? pReg->size + 1
adisuciu 0:f32d3fb1d3e2 450 : pReg->size) + 2);
adisuciu 0:f32d3fb1d3e2 451
adisuciu 0:f32d3fb1d3e2 452 if(ret < 0)
adisuciu 0:f32d3fb1d3e2 453 return ret;
adisuciu 0:f32d3fb1d3e2 454
adisuciu 0:f32d3fb1d3e2 455 /* Check the CRC */
adisuciu 0:f32d3fb1d3e2 456 if(check8 == AD7124_USE_CRC) {
adisuciu 0:f32d3fb1d3e2 457 msgBuf[0] = AD7124_COMM_REG_WEN | AD7124_COMM_REG_RD |
adisuciu 0:f32d3fb1d3e2 458 AD7124_COMM_REG_RA(pReg->addr);
adisuciu 0:f32d3fb1d3e2 459 for(i = 1; i < pReg->size + 2; ++i) {
adisuciu 0:f32d3fb1d3e2 460 msgBuf[i] = buffer[i];
adisuciu 0:f32d3fb1d3e2 461 }
adisuciu 0:f32d3fb1d3e2 462 check8 = ComputeCRC8(msgBuf, pReg->size + 3);
adisuciu 0:f32d3fb1d3e2 463 }
adisuciu 0:f32d3fb1d3e2 464
adisuciu 0:f32d3fb1d3e2 465 if(check8 != 0) {
adisuciu 0:f32d3fb1d3e2 466 /* ReadRegister checksum failed. */
adisuciu 0:f32d3fb1d3e2 467 return COMM_ERR;
adisuciu 0:f32d3fb1d3e2 468 }
adisuciu 0:f32d3fb1d3e2 469
adisuciu 0:f32d3fb1d3e2 470 /* Build the result */
adisuciu 0:f32d3fb1d3e2 471 *pData = 0;
adisuciu 0:f32d3fb1d3e2 472 for(i = 1; i < pReg->size + 2; i++) {
adisuciu 0:f32d3fb1d3e2 473 *pData <<= 8;
adisuciu 0:f32d3fb1d3e2 474 *pData += buffer[i];
adisuciu 0:f32d3fb1d3e2 475 }
adisuciu 0:f32d3fb1d3e2 476 wait_ms(500);
adisuciu 0:f32d3fb1d3e2 477 return ret;
adisuciu 0:f32d3fb1d3e2 478 }
adisuciu 0:f32d3fb1d3e2 479
adisuciu 0:f32d3fb1d3e2 480 /***************************************************************************//**
adisuciu 0:f32d3fb1d3e2 481 * @brief Computes the CRC checksum for a data buffer.
adisuciu 0:f32d3fb1d3e2 482 *
adisuciu 0:f32d3fb1d3e2 483 * @param pBuf - Data buffer
adisuciu 0:f32d3fb1d3e2 484 * @param bufSize - Data buffer size in bytes
adisuciu 0:f32d3fb1d3e2 485 *
adisuciu 0:f32d3fb1d3e2 486 * @return Returns the computed CRC checksum.
adisuciu 0:f32d3fb1d3e2 487 *******************************************************************************/
adisuciu 0:f32d3fb1d3e2 488 uint8_t AD7124::ComputeCRC8(uint8_t * pBuf, uint8_t bufSize)
adisuciu 0:f32d3fb1d3e2 489 {
adisuciu 0:f32d3fb1d3e2 490 uint8_t i = 0;
adisuciu 0:f32d3fb1d3e2 491 uint8_t crc = 0;
adisuciu 0:f32d3fb1d3e2 492
adisuciu 0:f32d3fb1d3e2 493 while(bufSize) {
adisuciu 0:f32d3fb1d3e2 494 for(i = 0x80; i != 0; i >>= 1) {
adisuciu 0:f32d3fb1d3e2 495 if(((crc & 0x80) != 0) != ((*pBuf & i) != 0)) { /* MSB of CRC register XOR input Bit from Data */
adisuciu 0:f32d3fb1d3e2 496 crc <<= 1;
adisuciu 0:f32d3fb1d3e2 497 crc ^= AD7124_CRC8_POLYNOMIAL_REPRESENTATION;
adisuciu 0:f32d3fb1d3e2 498 } else {
adisuciu 0:f32d3fb1d3e2 499 crc <<= 1;
adisuciu 0:f32d3fb1d3e2 500 }
adisuciu 0:f32d3fb1d3e2 501 }
adisuciu 0:f32d3fb1d3e2 502 pBuf++;
adisuciu 0:f32d3fb1d3e2 503 bufSize--;
adisuciu 0:f32d3fb1d3e2 504 }
adisuciu 0:f32d3fb1d3e2 505 return crc;
adisuciu 0:f32d3fb1d3e2 506 }
adisuciu 0:f32d3fb1d3e2 507
adisuciu 0:f32d3fb1d3e2 508
adisuciu 0:f32d3fb1d3e2 509 /***************************************************************************//**
adisuciu 0:f32d3fb1d3e2 510 * @brief Updates the device SPI interface settings.
adisuciu 0:f32d3fb1d3e2 511 *
adisuciu 0:f32d3fb1d3e2 512 * @param device - The handler of the instance of the driver.
adisuciu 0:f32d3fb1d3e2 513 *
adisuciu 0:f32d3fb1d3e2 514 * @return None.
adisuciu 0:f32d3fb1d3e2 515 *******************************************************************************/
adisuciu 0:f32d3fb1d3e2 516 void AD7124::UpdateDevSpiSettings()
adisuciu 0:f32d3fb1d3e2 517 {
adisuciu 0:f32d3fb1d3e2 518 ad7124_st_reg *regs;
adisuciu 0:f32d3fb1d3e2 519
adisuciu 0:f32d3fb1d3e2 520 regs = this->regs;
adisuciu 0:f32d3fb1d3e2 521
adisuciu 0:f32d3fb1d3e2 522 if (regs[AD7124_Error_En].value & AD7124_ERREN_REG_SPI_IGNORE_ERR_EN) {
adisuciu 0:f32d3fb1d3e2 523 check_ready = 1;
adisuciu 0:f32d3fb1d3e2 524 } else {
adisuciu 0:f32d3fb1d3e2 525 check_ready = 0;
adisuciu 0:f32d3fb1d3e2 526 }
adisuciu 0:f32d3fb1d3e2 527 }
adisuciu 0:f32d3fb1d3e2 528
adisuciu 0:f32d3fb1d3e2 529 /***************************************************************************//**
adisuciu 0:f32d3fb1d3e2 530 * @brief Initializes the AD7124.
adisuciu 0:f32d3fb1d3e2 531 *
adisuciu 0:f32d3fb1d3e2 532 * @param device - The handler of the instance of the driver.
adisuciu 0:f32d3fb1d3e2 533 * @param slave_select - The Slave Chip Select Id to be passed to the SPI calls.
adisuciu 0:f32d3fb1d3e2 534 * @param regs - The list of registers of the device (initialized or not) to be
adisuciu 0:f32d3fb1d3e2 535 * added to the instance of the driver.
adisuciu 0:f32d3fb1d3e2 536 *
adisuciu 0:f32d3fb1d3e2 537 * @return Returns 0 for success or negative error code.
adisuciu 0:f32d3fb1d3e2 538 *******************************************************************************/
adisuciu 0:f32d3fb1d3e2 539 int32_t AD7124::Setup()
adisuciu 0:f32d3fb1d3e2 540 {
adisuciu 0:f32d3fb1d3e2 541 int32_t ret;
adisuciu 0:f32d3fb1d3e2 542 uint8_t regNr;
adisuciu 0:f32d3fb1d3e2 543
adisuciu 0:f32d3fb1d3e2 544
adisuciu 0:f32d3fb1d3e2 545 spi_rdy_poll_cnt = 25000;
adisuciu 0:f32d3fb1d3e2 546
adisuciu 0:f32d3fb1d3e2 547 /* Initialize the SPI communication. */
adisuciu 0:f32d3fb1d3e2 548 /*ret = SPI_Init(0, 2500000, 1, 0);
adisuciu 0:f32d3fb1d3e2 549 if (ret < 0)
adisuciu 0:f32d3fb1d3e2 550 return ret;*/
adisuciu 0:f32d3fb1d3e2 551
adisuciu 0:f32d3fb1d3e2 552 /* Reset the device interface.*/
adisuciu 0:f32d3fb1d3e2 553 ret = Reset();
adisuciu 0:f32d3fb1d3e2 554 if (ret < 0)
adisuciu 0:f32d3fb1d3e2 555 return ret;
adisuciu 0:f32d3fb1d3e2 556
adisuciu 0:f32d3fb1d3e2 557 check_ready = 1;
adisuciu 0:f32d3fb1d3e2 558
adisuciu 0:f32d3fb1d3e2 559 /* Initialize registers AD7124_ADC_Control through AD7124_Filter_7. */
adisuciu 0:f32d3fb1d3e2 560 for(regNr = static_cast<uint8_t>(AD7124_Status); (regNr < static_cast<uint8_t>(AD7124_Offset_0)) && !(ret < 0);
adisuciu 0:f32d3fb1d3e2 561 regNr++) {
adisuciu 0:f32d3fb1d3e2 562 if (regs[regNr].rw == AD7124_RW) {
adisuciu 0:f32d3fb1d3e2 563 ret = WriteRegister(regs[regNr]);
adisuciu 0:f32d3fb1d3e2 564 if (ret < 0)
adisuciu 0:f32d3fb1d3e2 565 break;
adisuciu 0:f32d3fb1d3e2 566 }
adisuciu 0:f32d3fb1d3e2 567
adisuciu 0:f32d3fb1d3e2 568 /* Get CRC State and device SPI interface settings */
adisuciu 0:f32d3fb1d3e2 569 if (regNr == AD7124_Error_En) {
adisuciu 0:f32d3fb1d3e2 570 UpdateDevSpiSettings();
adisuciu 0:f32d3fb1d3e2 571 }
adisuciu 0:f32d3fb1d3e2 572 }
adisuciu 0:f32d3fb1d3e2 573
adisuciu 0:f32d3fb1d3e2 574 return ret;
adisuciu 0:f32d3fb1d3e2 575 }
adisuciu 0:f32d3fb1d3e2 576
adisuciu 0:f32d3fb1d3e2 577 uint8_t AD7124::SPI_Read(uint8_t *data, uint8_t bytes_number)
adisuciu 0:f32d3fb1d3e2 578 {
adisuciu 0:f32d3fb1d3e2 579 cs = false;
adisuciu 0:f32d3fb1d3e2 580 for(uint8_t byte = 0; byte < bytes_number; byte++) {
adisuciu 0:f32d3fb1d3e2 581 data[byte] = ad7124.write(data[byte]);
adisuciu 0:f32d3fb1d3e2 582 }
adisuciu 0:f32d3fb1d3e2 583 cs = true;
adisuciu 0:f32d3fb1d3e2 584 return bytes_number;
adisuciu 0:f32d3fb1d3e2 585 }
adisuciu 0:f32d3fb1d3e2 586
adisuciu 0:f32d3fb1d3e2 587 uint8_t AD7124::SPI_Write(uint8_t *data, uint8_t bytes_number)
adisuciu 0:f32d3fb1d3e2 588 {
adisuciu 0:f32d3fb1d3e2 589 cs = false;
adisuciu 0:f32d3fb1d3e2 590 for(uint8_t byte = 0; byte < bytes_number; byte++) {
adisuciu 0:f32d3fb1d3e2 591 ad7124.write(data[byte]);
adisuciu 0:f32d3fb1d3e2 592 }
adisuciu 0:f32d3fb1d3e2 593
adisuciu 0:f32d3fb1d3e2 594 cs = true;
adisuciu 0:f32d3fb1d3e2 595 return bytes_number;
adisuciu 0:f32d3fb1d3e2 596
adisuciu 0:f32d3fb1d3e2 597 }