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Dependencies: BLE_API eMPL_MPU6050 nRF51822
Fork of Seeed_Tiny_BLE_Flash by
mbed-src/targets/cmsis/TARGET_STM/TARGET_STM32F3XX/stm32f30x_adc.c@5:b8c02645e6af, 2015-11-17 (annotated)
- Committer:
- yihui
- Date:
- Tue Nov 17 07:48:56 2015 +0000
- Revision:
- 5:b8c02645e6af
fix i2c & spi conflict
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| yihui | 5:b8c02645e6af | 1 | /** |
| yihui | 5:b8c02645e6af | 2 | ****************************************************************************** |
| yihui | 5:b8c02645e6af | 3 | * @file stm32f30x_adc.c |
| yihui | 5:b8c02645e6af | 4 | * @author MCD Application Team |
| yihui | 5:b8c02645e6af | 5 | * @version V1.1.0 |
| yihui | 5:b8c02645e6af | 6 | * @date 27-February-2014 |
| yihui | 5:b8c02645e6af | 7 | * @brief This file provides firmware functions to manage the following |
| yihui | 5:b8c02645e6af | 8 | * functionalities of the Analog to Digital Convertor (ADC) peripheral: |
| yihui | 5:b8c02645e6af | 9 | * + Initialization and Configuration |
| yihui | 5:b8c02645e6af | 10 | * + Analog Watchdog configuration |
| yihui | 5:b8c02645e6af | 11 | * + Temperature Sensor, Vbat & Vrefint (Internal Reference Voltage) management |
| yihui | 5:b8c02645e6af | 12 | * + Regular Channels Configuration |
| yihui | 5:b8c02645e6af | 13 | * + Regular Channels DMA Configuration |
| yihui | 5:b8c02645e6af | 14 | * + Injected channels Configuration |
| yihui | 5:b8c02645e6af | 15 | * + Interrupts and flags management |
| yihui | 5:b8c02645e6af | 16 | * + Dual mode configuration |
| yihui | 5:b8c02645e6af | 17 | * |
| yihui | 5:b8c02645e6af | 18 | @verbatim |
| yihui | 5:b8c02645e6af | 19 | ============================================================================== |
| yihui | 5:b8c02645e6af | 20 | ##### How to use this driver ##### |
| yihui | 5:b8c02645e6af | 21 | ============================================================================== |
| yihui | 5:b8c02645e6af | 22 | [..] |
| yihui | 5:b8c02645e6af | 23 | (#) select the ADC clock using the function RCC_ADCCLKConfig() |
| yihui | 5:b8c02645e6af | 24 | (#) Enable the ADC interface clock using RCC_AHBPeriphClockCmd(); |
| yihui | 5:b8c02645e6af | 25 | (#) ADC pins configuration |
| yihui | 5:b8c02645e6af | 26 | (++) Enable the clock for the ADC GPIOs using the following function: |
| yihui | 5:b8c02645e6af | 27 | RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOx, ENABLE); |
| yihui | 5:b8c02645e6af | 28 | (++) Configure these ADC pins in analog mode using GPIO_Init(); |
| yihui | 5:b8c02645e6af | 29 | (#) Configure the ADC conversion resolution, data alignment, external |
| yihui | 5:b8c02645e6af | 30 | trigger and edge, sequencer lenght and Enable/Disable the continuous mode |
| yihui | 5:b8c02645e6af | 31 | using the ADC_Init() function. |
| yihui | 5:b8c02645e6af | 32 | (#) Activate the ADC peripheral using ADC_Cmd() function. |
| yihui | 5:b8c02645e6af | 33 | |
| yihui | 5:b8c02645e6af | 34 | *** ADC channels group configuration *** |
| yihui | 5:b8c02645e6af | 35 | ======================================== |
| yihui | 5:b8c02645e6af | 36 | [..] |
| yihui | 5:b8c02645e6af | 37 | (+) To configure the ADC channels features, use ADC_Init(), ADC_InjectedInit() |
| yihui | 5:b8c02645e6af | 38 | and/or ADC_RegularChannelConfig() functions. |
| yihui | 5:b8c02645e6af | 39 | (+) To activate the continuous mode, use the ADC_ContinuousModeCmd() |
| yihui | 5:b8c02645e6af | 40 | function. |
| yihui | 5:b8c02645e6af | 41 | (+) To activate the Discontinuous mode, use the ADC_DiscModeCmd() functions. |
| yihui | 5:b8c02645e6af | 42 | (+) To activate the overrun mode, use the ADC_OverrunModeCmd() functions. |
| yihui | 5:b8c02645e6af | 43 | (+) To activate the calibration mode, use the ADC_StartCalibration() functions. |
| yihui | 5:b8c02645e6af | 44 | (+) To read the ADC converted values, use the ADC_GetConversionValue() |
| yihui | 5:b8c02645e6af | 45 | function. |
| yihui | 5:b8c02645e6af | 46 | |
| yihui | 5:b8c02645e6af | 47 | *** DMA for ADC channels features configuration *** |
| yihui | 5:b8c02645e6af | 48 | =================================================== |
| yihui | 5:b8c02645e6af | 49 | [..] |
| yihui | 5:b8c02645e6af | 50 | (+) To enable the DMA mode for ADC channels group, use the ADC_DMACmd() function. |
| yihui | 5:b8c02645e6af | 51 | (+) To configure the DMA transfer request, use ADC_DMAConfig() function. |
| yihui | 5:b8c02645e6af | 52 | |
| yihui | 5:b8c02645e6af | 53 | @endverbatim |
| yihui | 5:b8c02645e6af | 54 | * |
| yihui | 5:b8c02645e6af | 55 | ****************************************************************************** |
| yihui | 5:b8c02645e6af | 56 | * @attention |
| yihui | 5:b8c02645e6af | 57 | * |
| yihui | 5:b8c02645e6af | 58 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| yihui | 5:b8c02645e6af | 59 | * |
| yihui | 5:b8c02645e6af | 60 | * Redistribution and use in source and binary forms, with or without modification, |
| yihui | 5:b8c02645e6af | 61 | * are permitted provided that the following conditions are met: |
| yihui | 5:b8c02645e6af | 62 | * 1. Redistributions of source code must retain the above copyright notice, |
| yihui | 5:b8c02645e6af | 63 | * this list of conditions and the following disclaimer. |
| yihui | 5:b8c02645e6af | 64 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| yihui | 5:b8c02645e6af | 65 | * this list of conditions and the following disclaimer in the documentation |
| yihui | 5:b8c02645e6af | 66 | * and/or other materials provided with the distribution. |
| yihui | 5:b8c02645e6af | 67 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| yihui | 5:b8c02645e6af | 68 | * may be used to endorse or promote products derived from this software |
| yihui | 5:b8c02645e6af | 69 | * without specific prior written permission. |
| yihui | 5:b8c02645e6af | 70 | * |
| yihui | 5:b8c02645e6af | 71 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| yihui | 5:b8c02645e6af | 72 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| yihui | 5:b8c02645e6af | 73 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| yihui | 5:b8c02645e6af | 74 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| yihui | 5:b8c02645e6af | 75 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| yihui | 5:b8c02645e6af | 76 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| yihui | 5:b8c02645e6af | 77 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| yihui | 5:b8c02645e6af | 78 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| yihui | 5:b8c02645e6af | 79 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| yihui | 5:b8c02645e6af | 80 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| yihui | 5:b8c02645e6af | 81 | * |
| yihui | 5:b8c02645e6af | 82 | ****************************************************************************** |
| yihui | 5:b8c02645e6af | 83 | */ |
| yihui | 5:b8c02645e6af | 84 | |
| yihui | 5:b8c02645e6af | 85 | /* Includes ------------------------------------------------------------------*/ |
| yihui | 5:b8c02645e6af | 86 | #include "stm32f30x_adc.h" |
| yihui | 5:b8c02645e6af | 87 | #include "stm32f30x_rcc.h" |
| yihui | 5:b8c02645e6af | 88 | |
| yihui | 5:b8c02645e6af | 89 | /** @addtogroup STM32F30x_StdPeriph_Driver |
| yihui | 5:b8c02645e6af | 90 | * @{ |
| yihui | 5:b8c02645e6af | 91 | */ |
| yihui | 5:b8c02645e6af | 92 | |
| yihui | 5:b8c02645e6af | 93 | /** @defgroup ADC |
| yihui | 5:b8c02645e6af | 94 | * @brief ADC driver modules |
| yihui | 5:b8c02645e6af | 95 | * @{ |
| yihui | 5:b8c02645e6af | 96 | */ |
| yihui | 5:b8c02645e6af | 97 | |
| yihui | 5:b8c02645e6af | 98 | /* Private typedef -----------------------------------------------------------*/ |
| yihui | 5:b8c02645e6af | 99 | /* Private define ------------------------------------------------------------*/ |
| yihui | 5:b8c02645e6af | 100 | |
| yihui | 5:b8c02645e6af | 101 | /* CFGR register Mask */ |
| yihui | 5:b8c02645e6af | 102 | #define CFGR_CLEAR_Mask ((uint32_t)0xFDFFC007) |
| yihui | 5:b8c02645e6af | 103 | |
| yihui | 5:b8c02645e6af | 104 | /* JSQR register Mask */ |
| yihui | 5:b8c02645e6af | 105 | #define JSQR_CLEAR_Mask ((uint32_t)0x00000000) |
| yihui | 5:b8c02645e6af | 106 | |
| yihui | 5:b8c02645e6af | 107 | /* ADC ADON mask */ |
| yihui | 5:b8c02645e6af | 108 | #define CCR_CLEAR_MASK ((uint32_t)0xFFFC10E0) |
| yihui | 5:b8c02645e6af | 109 | |
| yihui | 5:b8c02645e6af | 110 | /* ADC JDRx registers offset */ |
| yihui | 5:b8c02645e6af | 111 | #define JDR_Offset ((uint8_t)0x80) |
| yihui | 5:b8c02645e6af | 112 | |
| yihui | 5:b8c02645e6af | 113 | /* Private macro -------------------------------------------------------------*/ |
| yihui | 5:b8c02645e6af | 114 | /* Private variables ---------------------------------------------------------*/ |
| yihui | 5:b8c02645e6af | 115 | /* Private function prototypes -----------------------------------------------*/ |
| yihui | 5:b8c02645e6af | 116 | /* Private functions ---------------------------------------------------------*/ |
| yihui | 5:b8c02645e6af | 117 | |
| yihui | 5:b8c02645e6af | 118 | /** @defgroup ADC_Private_Functions |
| yihui | 5:b8c02645e6af | 119 | * @{ |
| yihui | 5:b8c02645e6af | 120 | */ |
| yihui | 5:b8c02645e6af | 121 | |
| yihui | 5:b8c02645e6af | 122 | /** @defgroup ADC_Group1 Initialization and Configuration functions |
| yihui | 5:b8c02645e6af | 123 | * @brief Initialization and Configuration functions |
| yihui | 5:b8c02645e6af | 124 | * |
| yihui | 5:b8c02645e6af | 125 | @verbatim |
| yihui | 5:b8c02645e6af | 126 | =============================================================================== |
| yihui | 5:b8c02645e6af | 127 | ##### Initialization and Configuration functions ##### |
| yihui | 5:b8c02645e6af | 128 | =============================================================================== |
| yihui | 5:b8c02645e6af | 129 | [..] |
| yihui | 5:b8c02645e6af | 130 | This section provides functions allowing to: |
| yihui | 5:b8c02645e6af | 131 | (#) Initialize and configure the ADC injected and/or regular channels and dual mode. |
| yihui | 5:b8c02645e6af | 132 | (#) Management of the calibration process |
| yihui | 5:b8c02645e6af | 133 | (#) ADC Power-on Power-off |
| yihui | 5:b8c02645e6af | 134 | (#) Single ended or differential mode |
| yihui | 5:b8c02645e6af | 135 | (#) Enabling the queue of context and the auto delay mode |
| yihui | 5:b8c02645e6af | 136 | (#) The number of ADC conversions that will be done using the sequencer for regular |
| yihui | 5:b8c02645e6af | 137 | channel group |
| yihui | 5:b8c02645e6af | 138 | (#) Enable or disable the ADC peripheral |
| yihui | 5:b8c02645e6af | 139 | |
| yihui | 5:b8c02645e6af | 140 | @endverbatim |
| yihui | 5:b8c02645e6af | 141 | * @{ |
| yihui | 5:b8c02645e6af | 142 | */ |
| yihui | 5:b8c02645e6af | 143 | |
| yihui | 5:b8c02645e6af | 144 | /** |
| yihui | 5:b8c02645e6af | 145 | * @brief Deinitializes the ADCx peripheral registers to their default reset values. |
| yihui | 5:b8c02645e6af | 146 | * @param ADCx: where x can be 1, 2,3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 147 | * @retval None |
| yihui | 5:b8c02645e6af | 148 | */ |
| yihui | 5:b8c02645e6af | 149 | void ADC_DeInit(ADC_TypeDef* ADCx) |
| yihui | 5:b8c02645e6af | 150 | { |
| yihui | 5:b8c02645e6af | 151 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 152 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 153 | |
| yihui | 5:b8c02645e6af | 154 | |
| yihui | 5:b8c02645e6af | 155 | if((ADCx == ADC1) || (ADCx == ADC2)) |
| yihui | 5:b8c02645e6af | 156 | { |
| yihui | 5:b8c02645e6af | 157 | /* Enable ADC1/ADC2 reset state */ |
| yihui | 5:b8c02645e6af | 158 | RCC_AHBPeriphResetCmd(RCC_AHBPeriph_ADC12, ENABLE); |
| yihui | 5:b8c02645e6af | 159 | /* Release ADC1/ADC2 from reset state */ |
| yihui | 5:b8c02645e6af | 160 | RCC_AHBPeriphResetCmd(RCC_AHBPeriph_ADC12, DISABLE); |
| yihui | 5:b8c02645e6af | 161 | } |
| yihui | 5:b8c02645e6af | 162 | else if((ADCx == ADC3) || (ADCx == ADC4)) |
| yihui | 5:b8c02645e6af | 163 | { |
| yihui | 5:b8c02645e6af | 164 | /* Enable ADC3/ADC4 reset state */ |
| yihui | 5:b8c02645e6af | 165 | RCC_AHBPeriphResetCmd(RCC_AHBPeriph_ADC34, ENABLE); |
| yihui | 5:b8c02645e6af | 166 | /* Release ADC3/ADC4 from reset state */ |
| yihui | 5:b8c02645e6af | 167 | RCC_AHBPeriphResetCmd(RCC_AHBPeriph_ADC34, DISABLE); |
| yihui | 5:b8c02645e6af | 168 | } |
| yihui | 5:b8c02645e6af | 169 | } |
| yihui | 5:b8c02645e6af | 170 | /** |
| yihui | 5:b8c02645e6af | 171 | * @brief Initializes the ADCx peripheral according to the specified parameters |
| yihui | 5:b8c02645e6af | 172 | * in the ADC_InitStruct. |
| yihui | 5:b8c02645e6af | 173 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 174 | * @param ADC_InitStruct: pointer to an ADC_InitTypeDef structure that contains |
| yihui | 5:b8c02645e6af | 175 | * the configuration information for the specified ADC peripheral. |
| yihui | 5:b8c02645e6af | 176 | * @retval None |
| yihui | 5:b8c02645e6af | 177 | */ |
| yihui | 5:b8c02645e6af | 178 | void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct) |
| yihui | 5:b8c02645e6af | 179 | { |
| yihui | 5:b8c02645e6af | 180 | uint32_t tmpreg1 = 0; |
| yihui | 5:b8c02645e6af | 181 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 182 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 183 | assert_param(IS_ADC_CONVMODE(ADC_InitStruct->ADC_ContinuousConvMode)); |
| yihui | 5:b8c02645e6af | 184 | assert_param(IS_ADC_RESOLUTION(ADC_InitStruct->ADC_Resolution)); |
| yihui | 5:b8c02645e6af | 185 | assert_param(IS_ADC_EXT_TRIG(ADC_InitStruct->ADC_ExternalTrigConvEvent)); |
| yihui | 5:b8c02645e6af | 186 | assert_param(IS_EXTERNALTRIG_EDGE(ADC_InitStruct->ADC_ExternalTrigEventEdge)); |
| yihui | 5:b8c02645e6af | 187 | assert_param(IS_ADC_DATA_ALIGN(ADC_InitStruct->ADC_DataAlign)); |
| yihui | 5:b8c02645e6af | 188 | assert_param(IS_ADC_OVRUNMODE(ADC_InitStruct->ADC_OverrunMode)); |
| yihui | 5:b8c02645e6af | 189 | assert_param(IS_ADC_AUTOINJECMODE(ADC_InitStruct->ADC_AutoInjMode)); |
| yihui | 5:b8c02645e6af | 190 | assert_param(IS_ADC_REGULAR_LENGTH(ADC_InitStruct->ADC_NbrOfRegChannel)); |
| yihui | 5:b8c02645e6af | 191 | |
| yihui | 5:b8c02645e6af | 192 | /*---------------------------- ADCx CFGR Configuration -----------------*/ |
| yihui | 5:b8c02645e6af | 193 | /* Get the ADCx CFGR value */ |
| yihui | 5:b8c02645e6af | 194 | tmpreg1 = ADCx->CFGR; |
| yihui | 5:b8c02645e6af | 195 | /* Clear SCAN bit */ |
| yihui | 5:b8c02645e6af | 196 | tmpreg1 &= CFGR_CLEAR_Mask; |
| yihui | 5:b8c02645e6af | 197 | /* Configure ADCx: scan conversion mode */ |
| yihui | 5:b8c02645e6af | 198 | /* Set SCAN bit according to ADC_ScanConvMode value */ |
| yihui | 5:b8c02645e6af | 199 | tmpreg1 |= (uint32_t)ADC_InitStruct->ADC_ContinuousConvMode | |
| yihui | 5:b8c02645e6af | 200 | ADC_InitStruct->ADC_Resolution| |
| yihui | 5:b8c02645e6af | 201 | ADC_InitStruct->ADC_ExternalTrigConvEvent| |
| yihui | 5:b8c02645e6af | 202 | ADC_InitStruct->ADC_ExternalTrigEventEdge| |
| yihui | 5:b8c02645e6af | 203 | ADC_InitStruct->ADC_DataAlign| |
| yihui | 5:b8c02645e6af | 204 | ADC_InitStruct->ADC_OverrunMode| |
| yihui | 5:b8c02645e6af | 205 | ADC_InitStruct->ADC_AutoInjMode; |
| yihui | 5:b8c02645e6af | 206 | |
| yihui | 5:b8c02645e6af | 207 | /* Write to ADCx CFGR */ |
| yihui | 5:b8c02645e6af | 208 | ADCx->CFGR = tmpreg1; |
| yihui | 5:b8c02645e6af | 209 | |
| yihui | 5:b8c02645e6af | 210 | /*---------------------------- ADCx SQR1 Configuration -----------------*/ |
| yihui | 5:b8c02645e6af | 211 | /* Get the ADCx SQR1 value */ |
| yihui | 5:b8c02645e6af | 212 | tmpreg1 = ADCx->SQR1; |
| yihui | 5:b8c02645e6af | 213 | /* Clear L bits */ |
| yihui | 5:b8c02645e6af | 214 | tmpreg1 &= ~(uint32_t)(ADC_SQR1_L); |
| yihui | 5:b8c02645e6af | 215 | /* Configure ADCx: regular channel sequence length */ |
| yihui | 5:b8c02645e6af | 216 | /* Set L bits according to ADC_NbrOfRegChannel value */ |
| yihui | 5:b8c02645e6af | 217 | tmpreg1 |= (uint32_t) (ADC_InitStruct->ADC_NbrOfRegChannel - 1); |
| yihui | 5:b8c02645e6af | 218 | /* Write to ADCx SQR1 */ |
| yihui | 5:b8c02645e6af | 219 | ADCx->SQR1 = tmpreg1; |
| yihui | 5:b8c02645e6af | 220 | |
| yihui | 5:b8c02645e6af | 221 | } |
| yihui | 5:b8c02645e6af | 222 | |
| yihui | 5:b8c02645e6af | 223 | /** |
| yihui | 5:b8c02645e6af | 224 | * @brief Fills each ADC_InitStruct member with its default value. |
| yihui | 5:b8c02645e6af | 225 | * @param ADC_InitStruct : pointer to an ADC_InitTypeDef structure which will be initialized. |
| yihui | 5:b8c02645e6af | 226 | * @retval None |
| yihui | 5:b8c02645e6af | 227 | */ |
| yihui | 5:b8c02645e6af | 228 | void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct) |
| yihui | 5:b8c02645e6af | 229 | { |
| yihui | 5:b8c02645e6af | 230 | /* Reset ADC init structure parameters values */ |
| yihui | 5:b8c02645e6af | 231 | ADC_InitStruct->ADC_ContinuousConvMode = DISABLE; |
| yihui | 5:b8c02645e6af | 232 | ADC_InitStruct->ADC_Resolution = ADC_Resolution_12b; |
| yihui | 5:b8c02645e6af | 233 | ADC_InitStruct->ADC_ExternalTrigConvEvent = ADC_ExternalTrigConvEvent_0; |
| yihui | 5:b8c02645e6af | 234 | ADC_InitStruct->ADC_ExternalTrigEventEdge = ADC_ExternalTrigEventEdge_None; |
| yihui | 5:b8c02645e6af | 235 | ADC_InitStruct->ADC_DataAlign = ADC_DataAlign_Right; |
| yihui | 5:b8c02645e6af | 236 | ADC_InitStruct->ADC_OverrunMode = DISABLE; |
| yihui | 5:b8c02645e6af | 237 | ADC_InitStruct->ADC_AutoInjMode = DISABLE; |
| yihui | 5:b8c02645e6af | 238 | ADC_InitStruct->ADC_NbrOfRegChannel = 1; |
| yihui | 5:b8c02645e6af | 239 | } |
| yihui | 5:b8c02645e6af | 240 | |
| yihui | 5:b8c02645e6af | 241 | /** |
| yihui | 5:b8c02645e6af | 242 | * @brief Initializes the ADCx peripheral according to the specified parameters |
| yihui | 5:b8c02645e6af | 243 | * in the ADC_InitStruct. |
| yihui | 5:b8c02645e6af | 244 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 245 | * @param ADC_InjectInitStruct: pointer to an ADC_InjecInitTypeDef structure that contains |
| yihui | 5:b8c02645e6af | 246 | * the configuration information for the specified ADC injected channel. |
| yihui | 5:b8c02645e6af | 247 | * @retval None |
| yihui | 5:b8c02645e6af | 248 | */ |
| yihui | 5:b8c02645e6af | 249 | void ADC_InjectedInit(ADC_TypeDef* ADCx, ADC_InjectedInitTypeDef* ADC_InjectedInitStruct) |
| yihui | 5:b8c02645e6af | 250 | { |
| yihui | 5:b8c02645e6af | 251 | uint32_t tmpreg1 = 0; |
| yihui | 5:b8c02645e6af | 252 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 253 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 254 | assert_param(IS_ADC_EXT_INJEC_TRIG(ADC_InjectedInitStruct->ADC_ExternalTrigInjecConvEvent)); |
| yihui | 5:b8c02645e6af | 255 | assert_param(IS_EXTERNALTRIGINJ_EDGE(ADC_InjectedInitStruct->ADC_ExternalTrigInjecEventEdge)); |
| yihui | 5:b8c02645e6af | 256 | assert_param(IS_ADC_INJECTED_LENGTH(ADC_InjectedInitStruct->ADC_NbrOfInjecChannel)); |
| yihui | 5:b8c02645e6af | 257 | assert_param(IS_ADC_INJECTED_CHANNEL(ADC_InjectedInitStruct->ADC_InjecSequence1)); |
| yihui | 5:b8c02645e6af | 258 | assert_param(IS_ADC_INJECTED_CHANNEL(ADC_InjectedInitStruct->ADC_InjecSequence2)); |
| yihui | 5:b8c02645e6af | 259 | assert_param(IS_ADC_INJECTED_CHANNEL(ADC_InjectedInitStruct->ADC_InjecSequence3)); |
| yihui | 5:b8c02645e6af | 260 | assert_param(IS_ADC_INJECTED_CHANNEL(ADC_InjectedInitStruct->ADC_InjecSequence4)); |
| yihui | 5:b8c02645e6af | 261 | |
| yihui | 5:b8c02645e6af | 262 | /*---------------------------- ADCx JSQR Configuration -----------------*/ |
| yihui | 5:b8c02645e6af | 263 | /* Get the ADCx JSQR value */ |
| yihui | 5:b8c02645e6af | 264 | tmpreg1 = ADCx->JSQR; |
| yihui | 5:b8c02645e6af | 265 | /* Clear L bits */ |
| yihui | 5:b8c02645e6af | 266 | tmpreg1 &= JSQR_CLEAR_Mask; |
| yihui | 5:b8c02645e6af | 267 | /* Configure ADCx: Injected channel sequence length, external trigger, |
| yihui | 5:b8c02645e6af | 268 | external trigger edge and sequences |
| yihui | 5:b8c02645e6af | 269 | */ |
| yihui | 5:b8c02645e6af | 270 | tmpreg1 = (uint32_t) ((ADC_InjectedInitStruct->ADC_NbrOfInjecChannel - (uint8_t)1) | |
| yihui | 5:b8c02645e6af | 271 | ADC_InjectedInitStruct->ADC_ExternalTrigInjecConvEvent | |
| yihui | 5:b8c02645e6af | 272 | ADC_InjectedInitStruct->ADC_ExternalTrigInjecEventEdge | |
| yihui | 5:b8c02645e6af | 273 | (uint32_t)((ADC_InjectedInitStruct->ADC_InjecSequence1) << 8) | |
| yihui | 5:b8c02645e6af | 274 | (uint32_t)((ADC_InjectedInitStruct->ADC_InjecSequence2) << 14) | |
| yihui | 5:b8c02645e6af | 275 | (uint32_t)((ADC_InjectedInitStruct->ADC_InjecSequence3) << 20) | |
| yihui | 5:b8c02645e6af | 276 | (uint32_t)((ADC_InjectedInitStruct->ADC_InjecSequence4) << 26)); |
| yihui | 5:b8c02645e6af | 277 | /* Write to ADCx SQR1 */ |
| yihui | 5:b8c02645e6af | 278 | ADCx->JSQR = tmpreg1; |
| yihui | 5:b8c02645e6af | 279 | } |
| yihui | 5:b8c02645e6af | 280 | |
| yihui | 5:b8c02645e6af | 281 | /** |
| yihui | 5:b8c02645e6af | 282 | * @brief Fills each ADC_InjectedInitStruct member with its default value. |
| yihui | 5:b8c02645e6af | 283 | * @param ADC_InjectedInitStruct : pointer to an ADC_InjectedInitTypeDef structure which will be initialized. |
| yihui | 5:b8c02645e6af | 284 | * @retval None |
| yihui | 5:b8c02645e6af | 285 | */ |
| yihui | 5:b8c02645e6af | 286 | void ADC_InjectedStructInit(ADC_InjectedInitTypeDef* ADC_InjectedInitStruct) |
| yihui | 5:b8c02645e6af | 287 | { |
| yihui | 5:b8c02645e6af | 288 | ADC_InjectedInitStruct->ADC_ExternalTrigInjecConvEvent = ADC_ExternalTrigInjecConvEvent_0; |
| yihui | 5:b8c02645e6af | 289 | ADC_InjectedInitStruct->ADC_ExternalTrigInjecEventEdge = ADC_ExternalTrigInjecEventEdge_None; |
| yihui | 5:b8c02645e6af | 290 | ADC_InjectedInitStruct->ADC_NbrOfInjecChannel = 1; |
| yihui | 5:b8c02645e6af | 291 | ADC_InjectedInitStruct->ADC_InjecSequence1 = ADC_InjectedChannel_1; |
| yihui | 5:b8c02645e6af | 292 | ADC_InjectedInitStruct->ADC_InjecSequence2 = ADC_InjectedChannel_1; |
| yihui | 5:b8c02645e6af | 293 | ADC_InjectedInitStruct->ADC_InjecSequence3 = ADC_InjectedChannel_1; |
| yihui | 5:b8c02645e6af | 294 | ADC_InjectedInitStruct->ADC_InjecSequence4 = ADC_InjectedChannel_1; |
| yihui | 5:b8c02645e6af | 295 | } |
| yihui | 5:b8c02645e6af | 296 | |
| yihui | 5:b8c02645e6af | 297 | /** |
| yihui | 5:b8c02645e6af | 298 | * @brief Initializes the ADCs peripherals according to the specified parameters |
| yihui | 5:b8c02645e6af | 299 | * in the ADC_CommonInitStruct. |
| yihui | 5:b8c02645e6af | 300 | * @param ADCx: where x can be 1 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 301 | * @param ADC_CommonInitStruct: pointer to an ADC_CommonInitTypeDef structure |
| yihui | 5:b8c02645e6af | 302 | * that contains the configuration information for All ADCs peripherals. |
| yihui | 5:b8c02645e6af | 303 | * @retval None |
| yihui | 5:b8c02645e6af | 304 | */ |
| yihui | 5:b8c02645e6af | 305 | void ADC_CommonInit(ADC_TypeDef* ADCx, ADC_CommonInitTypeDef* ADC_CommonInitStruct) |
| yihui | 5:b8c02645e6af | 306 | { |
| yihui | 5:b8c02645e6af | 307 | uint32_t tmpreg1 = 0; |
| yihui | 5:b8c02645e6af | 308 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 309 | assert_param(IS_ADC_MODE(ADC_CommonInitStruct->ADC_Mode)); |
| yihui | 5:b8c02645e6af | 310 | assert_param(IS_ADC_CLOCKMODE(ADC_CommonInitStruct->ADC_Clock)); |
| yihui | 5:b8c02645e6af | 311 | assert_param(IS_ADC_DMA_MODE(ADC_CommonInitStruct->ADC_DMAMode)); |
| yihui | 5:b8c02645e6af | 312 | assert_param(IS_ADC_DMA_ACCESS_MODE(ADC_CommonInitStruct->ADC_DMAAccessMode)); |
| yihui | 5:b8c02645e6af | 313 | assert_param(IS_ADC_TWOSAMPLING_DELAY(ADC_CommonInitStruct->ADC_TwoSamplingDelay)); |
| yihui | 5:b8c02645e6af | 314 | |
| yihui | 5:b8c02645e6af | 315 | if((ADCx == ADC1) || (ADCx == ADC2)) |
| yihui | 5:b8c02645e6af | 316 | { |
| yihui | 5:b8c02645e6af | 317 | /* Get the ADC CCR value */ |
| yihui | 5:b8c02645e6af | 318 | tmpreg1 = ADC1_2->CCR; |
| yihui | 5:b8c02645e6af | 319 | |
| yihui | 5:b8c02645e6af | 320 | /* Clear MULTI, DELAY, DMA and ADCPRE bits */ |
| yihui | 5:b8c02645e6af | 321 | tmpreg1 &= CCR_CLEAR_MASK; |
| yihui | 5:b8c02645e6af | 322 | } |
| yihui | 5:b8c02645e6af | 323 | else |
| yihui | 5:b8c02645e6af | 324 | { |
| yihui | 5:b8c02645e6af | 325 | /* Get the ADC CCR value */ |
| yihui | 5:b8c02645e6af | 326 | tmpreg1 = ADC3_4->CCR; |
| yihui | 5:b8c02645e6af | 327 | |
| yihui | 5:b8c02645e6af | 328 | /* Clear MULTI, DELAY, DMA and ADCPRE bits */ |
| yihui | 5:b8c02645e6af | 329 | tmpreg1 &= CCR_CLEAR_MASK; |
| yihui | 5:b8c02645e6af | 330 | } |
| yihui | 5:b8c02645e6af | 331 | /*---------------------------- ADC CCR Configuration -----------------*/ |
| yihui | 5:b8c02645e6af | 332 | /* Configure ADCx: Multi mode, Delay between two sampling time, ADC clock, DMA mode |
| yihui | 5:b8c02645e6af | 333 | and DMA access mode for dual mode */ |
| yihui | 5:b8c02645e6af | 334 | /* Set MULTI bits according to ADC_Mode value */ |
| yihui | 5:b8c02645e6af | 335 | /* Set CKMODE bits according to ADC_Clock value */ |
| yihui | 5:b8c02645e6af | 336 | /* Set MDMA bits according to ADC_DMAAccessMode value */ |
| yihui | 5:b8c02645e6af | 337 | /* Set DMACFG bits according to ADC_DMAMode value */ |
| yihui | 5:b8c02645e6af | 338 | /* Set DELAY bits according to ADC_TwoSamplingDelay value */ |
| yihui | 5:b8c02645e6af | 339 | tmpreg1 |= (uint32_t)(ADC_CommonInitStruct->ADC_Mode | |
| yihui | 5:b8c02645e6af | 340 | ADC_CommonInitStruct->ADC_Clock | |
| yihui | 5:b8c02645e6af | 341 | ADC_CommonInitStruct->ADC_DMAAccessMode | |
| yihui | 5:b8c02645e6af | 342 | (uint32_t)(ADC_CommonInitStruct->ADC_DMAMode << 12) | |
| yihui | 5:b8c02645e6af | 343 | (uint32_t)((uint32_t)ADC_CommonInitStruct->ADC_TwoSamplingDelay << 8)); |
| yihui | 5:b8c02645e6af | 344 | |
| yihui | 5:b8c02645e6af | 345 | if((ADCx == ADC1) || (ADCx == ADC2)) |
| yihui | 5:b8c02645e6af | 346 | { |
| yihui | 5:b8c02645e6af | 347 | /* Write to ADC CCR */ |
| yihui | 5:b8c02645e6af | 348 | ADC1_2->CCR = tmpreg1; |
| yihui | 5:b8c02645e6af | 349 | } |
| yihui | 5:b8c02645e6af | 350 | else |
| yihui | 5:b8c02645e6af | 351 | { |
| yihui | 5:b8c02645e6af | 352 | /* Write to ADC CCR */ |
| yihui | 5:b8c02645e6af | 353 | ADC3_4->CCR = tmpreg1; |
| yihui | 5:b8c02645e6af | 354 | } |
| yihui | 5:b8c02645e6af | 355 | } |
| yihui | 5:b8c02645e6af | 356 | |
| yihui | 5:b8c02645e6af | 357 | /** |
| yihui | 5:b8c02645e6af | 358 | * @brief Fills each ADC_CommonInitStruct member with its default value. |
| yihui | 5:b8c02645e6af | 359 | * @param ADC_CommonInitStruct: pointer to an ADC_CommonInitTypeDef structure |
| yihui | 5:b8c02645e6af | 360 | * which will be initialized. |
| yihui | 5:b8c02645e6af | 361 | * @retval None |
| yihui | 5:b8c02645e6af | 362 | */ |
| yihui | 5:b8c02645e6af | 363 | void ADC_CommonStructInit(ADC_CommonInitTypeDef* ADC_CommonInitStruct) |
| yihui | 5:b8c02645e6af | 364 | { |
| yihui | 5:b8c02645e6af | 365 | /* Initialize the ADC_Mode member */ |
| yihui | 5:b8c02645e6af | 366 | ADC_CommonInitStruct->ADC_Mode = ADC_Mode_Independent; |
| yihui | 5:b8c02645e6af | 367 | |
| yihui | 5:b8c02645e6af | 368 | /* initialize the ADC_Clock member */ |
| yihui | 5:b8c02645e6af | 369 | ADC_CommonInitStruct->ADC_Clock = ADC_Clock_AsynClkMode; |
| yihui | 5:b8c02645e6af | 370 | |
| yihui | 5:b8c02645e6af | 371 | /* Initialize the ADC_DMAAccessMode member */ |
| yihui | 5:b8c02645e6af | 372 | ADC_CommonInitStruct->ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled; |
| yihui | 5:b8c02645e6af | 373 | |
| yihui | 5:b8c02645e6af | 374 | /* Initialize the ADC_DMAMode member */ |
| yihui | 5:b8c02645e6af | 375 | ADC_CommonInitStruct->ADC_DMAMode = ADC_DMAMode_OneShot; |
| yihui | 5:b8c02645e6af | 376 | |
| yihui | 5:b8c02645e6af | 377 | /* Initialize the ADC_TwoSamplingDelay member */ |
| yihui | 5:b8c02645e6af | 378 | ADC_CommonInitStruct->ADC_TwoSamplingDelay = 0; |
| yihui | 5:b8c02645e6af | 379 | |
| yihui | 5:b8c02645e6af | 380 | } |
| yihui | 5:b8c02645e6af | 381 | |
| yihui | 5:b8c02645e6af | 382 | /** |
| yihui | 5:b8c02645e6af | 383 | * @brief Enables or disables the specified ADC peripheral. |
| yihui | 5:b8c02645e6af | 384 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 385 | * @param NewState: new state of the ADCx peripheral. |
| yihui | 5:b8c02645e6af | 386 | * This parameter can be: ENABLE or DISABLE. |
| yihui | 5:b8c02645e6af | 387 | * @retval None |
| yihui | 5:b8c02645e6af | 388 | */ |
| yihui | 5:b8c02645e6af | 389 | void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState) |
| yihui | 5:b8c02645e6af | 390 | { |
| yihui | 5:b8c02645e6af | 391 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 392 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 393 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
| yihui | 5:b8c02645e6af | 394 | |
| yihui | 5:b8c02645e6af | 395 | if (NewState != DISABLE) |
| yihui | 5:b8c02645e6af | 396 | { |
| yihui | 5:b8c02645e6af | 397 | /* Set the ADEN bit */ |
| yihui | 5:b8c02645e6af | 398 | ADCx->CR |= ADC_CR_ADEN; |
| yihui | 5:b8c02645e6af | 399 | } |
| yihui | 5:b8c02645e6af | 400 | else |
| yihui | 5:b8c02645e6af | 401 | { |
| yihui | 5:b8c02645e6af | 402 | /* Disable the selected ADC peripheral: Set the ADDIS bit */ |
| yihui | 5:b8c02645e6af | 403 | ADCx->CR |= ADC_CR_ADDIS; |
| yihui | 5:b8c02645e6af | 404 | } |
| yihui | 5:b8c02645e6af | 405 | } |
| yihui | 5:b8c02645e6af | 406 | |
| yihui | 5:b8c02645e6af | 407 | /** |
| yihui | 5:b8c02645e6af | 408 | * @brief Starts the selected ADC calibration process. |
| yihui | 5:b8c02645e6af | 409 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 410 | * @retval None |
| yihui | 5:b8c02645e6af | 411 | */ |
| yihui | 5:b8c02645e6af | 412 | void ADC_StartCalibration(ADC_TypeDef* ADCx) |
| yihui | 5:b8c02645e6af | 413 | { |
| yihui | 5:b8c02645e6af | 414 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 415 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 416 | |
| yihui | 5:b8c02645e6af | 417 | /* Set the ADCAL bit */ |
| yihui | 5:b8c02645e6af | 418 | ADCx->CR |= ADC_CR_ADCAL; |
| yihui | 5:b8c02645e6af | 419 | } |
| yihui | 5:b8c02645e6af | 420 | |
| yihui | 5:b8c02645e6af | 421 | /** |
| yihui | 5:b8c02645e6af | 422 | * @brief Returns the ADCx calibration value. |
| yihui | 5:b8c02645e6af | 423 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 424 | * @retval None |
| yihui | 5:b8c02645e6af | 425 | */ |
| yihui | 5:b8c02645e6af | 426 | uint32_t ADC_GetCalibrationValue(ADC_TypeDef* ADCx) |
| yihui | 5:b8c02645e6af | 427 | { |
| yihui | 5:b8c02645e6af | 428 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 429 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 430 | |
| yihui | 5:b8c02645e6af | 431 | /* Return the selected ADC calibration value */ |
| yihui | 5:b8c02645e6af | 432 | return (uint32_t)ADCx->CALFACT; |
| yihui | 5:b8c02645e6af | 433 | } |
| yihui | 5:b8c02645e6af | 434 | |
| yihui | 5:b8c02645e6af | 435 | /** |
| yihui | 5:b8c02645e6af | 436 | * @brief Sets the ADCx calibration register. |
| yihui | 5:b8c02645e6af | 437 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 438 | * @retval None |
| yihui | 5:b8c02645e6af | 439 | */ |
| yihui | 5:b8c02645e6af | 440 | void ADC_SetCalibrationValue(ADC_TypeDef* ADCx, uint32_t ADC_Calibration) |
| yihui | 5:b8c02645e6af | 441 | { |
| yihui | 5:b8c02645e6af | 442 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 443 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 444 | |
| yihui | 5:b8c02645e6af | 445 | /* Set the ADC calibration register value */ |
| yihui | 5:b8c02645e6af | 446 | ADCx->CALFACT = ADC_Calibration; |
| yihui | 5:b8c02645e6af | 447 | } |
| yihui | 5:b8c02645e6af | 448 | |
| yihui | 5:b8c02645e6af | 449 | /** |
| yihui | 5:b8c02645e6af | 450 | * @brief Select the ADC calibration mode. |
| yihui | 5:b8c02645e6af | 451 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 452 | * @param ADC_CalibrationMode: the ADC calibration mode. |
| yihui | 5:b8c02645e6af | 453 | * This parameter can be one of the following values: |
| yihui | 5:b8c02645e6af | 454 | * @arg ADC_CalibrationMode_Single: to select the calibration for single channel |
| yihui | 5:b8c02645e6af | 455 | * @arg ADC_CalibrationMode_Differential: to select the calibration for differential channel |
| yihui | 5:b8c02645e6af | 456 | * @retval None |
| yihui | 5:b8c02645e6af | 457 | */ |
| yihui | 5:b8c02645e6af | 458 | void ADC_SelectCalibrationMode(ADC_TypeDef* ADCx, uint32_t ADC_CalibrationMode) |
| yihui | 5:b8c02645e6af | 459 | { |
| yihui | 5:b8c02645e6af | 460 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 461 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 462 | assert_param(IS_ADC_CALIBRATION_MODE(ADC_CalibrationMode)); |
| yihui | 5:b8c02645e6af | 463 | /* Set or Reset the ADCALDIF bit */ |
| yihui | 5:b8c02645e6af | 464 | ADCx->CR &= (~ADC_CR_ADCALDIF); |
| yihui | 5:b8c02645e6af | 465 | ADCx->CR |= ADC_CalibrationMode; |
| yihui | 5:b8c02645e6af | 466 | |
| yihui | 5:b8c02645e6af | 467 | } |
| yihui | 5:b8c02645e6af | 468 | |
| yihui | 5:b8c02645e6af | 469 | /** |
| yihui | 5:b8c02645e6af | 470 | * @brief Gets the selected ADC calibration status. |
| yihui | 5:b8c02645e6af | 471 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 472 | * @retval The new state of ADC calibration (SET or RESET). |
| yihui | 5:b8c02645e6af | 473 | */ |
| yihui | 5:b8c02645e6af | 474 | FlagStatus ADC_GetCalibrationStatus(ADC_TypeDef* ADCx) |
| yihui | 5:b8c02645e6af | 475 | { |
| yihui | 5:b8c02645e6af | 476 | FlagStatus bitstatus = RESET; |
| yihui | 5:b8c02645e6af | 477 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 478 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 479 | /* Check the status of CAL bit */ |
| yihui | 5:b8c02645e6af | 480 | if ((ADCx->CR & ADC_CR_ADCAL) != (uint32_t)RESET) |
| yihui | 5:b8c02645e6af | 481 | { |
| yihui | 5:b8c02645e6af | 482 | /* CAL bit is set: calibration on going */ |
| yihui | 5:b8c02645e6af | 483 | bitstatus = SET; |
| yihui | 5:b8c02645e6af | 484 | } |
| yihui | 5:b8c02645e6af | 485 | else |
| yihui | 5:b8c02645e6af | 486 | { |
| yihui | 5:b8c02645e6af | 487 | /* CAL bit is reset: end of calibration */ |
| yihui | 5:b8c02645e6af | 488 | bitstatus = RESET; |
| yihui | 5:b8c02645e6af | 489 | } |
| yihui | 5:b8c02645e6af | 490 | /* Return the CAL bit status */ |
| yihui | 5:b8c02645e6af | 491 | return bitstatus; |
| yihui | 5:b8c02645e6af | 492 | } |
| yihui | 5:b8c02645e6af | 493 | |
| yihui | 5:b8c02645e6af | 494 | /** |
| yihui | 5:b8c02645e6af | 495 | * @brief ADC Disable Command. |
| yihui | 5:b8c02645e6af | 496 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 497 | * @retval None |
| yihui | 5:b8c02645e6af | 498 | */ |
| yihui | 5:b8c02645e6af | 499 | void ADC_DisableCmd(ADC_TypeDef* ADCx) |
| yihui | 5:b8c02645e6af | 500 | { |
| yihui | 5:b8c02645e6af | 501 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 502 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 503 | |
| yihui | 5:b8c02645e6af | 504 | /* Set the ADDIS bit */ |
| yihui | 5:b8c02645e6af | 505 | ADCx->CR |= ADC_CR_ADDIS; |
| yihui | 5:b8c02645e6af | 506 | } |
| yihui | 5:b8c02645e6af | 507 | |
| yihui | 5:b8c02645e6af | 508 | |
| yihui | 5:b8c02645e6af | 509 | /** |
| yihui | 5:b8c02645e6af | 510 | * @brief Gets the selected ADC disable command Status. |
| yihui | 5:b8c02645e6af | 511 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 512 | * @retval The new state of ADC ADC disable command (SET or RESET). |
| yihui | 5:b8c02645e6af | 513 | */ |
| yihui | 5:b8c02645e6af | 514 | FlagStatus ADC_GetDisableCmdStatus(ADC_TypeDef* ADCx) |
| yihui | 5:b8c02645e6af | 515 | { |
| yihui | 5:b8c02645e6af | 516 | FlagStatus bitstatus = RESET; |
| yihui | 5:b8c02645e6af | 517 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 518 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 519 | |
| yihui | 5:b8c02645e6af | 520 | /* Check the status of ADDIS bit */ |
| yihui | 5:b8c02645e6af | 521 | if ((ADCx->CR & ADC_CR_ADDIS) != (uint32_t)RESET) |
| yihui | 5:b8c02645e6af | 522 | { |
| yihui | 5:b8c02645e6af | 523 | /* ADDIS bit is set */ |
| yihui | 5:b8c02645e6af | 524 | bitstatus = SET; |
| yihui | 5:b8c02645e6af | 525 | } |
| yihui | 5:b8c02645e6af | 526 | else |
| yihui | 5:b8c02645e6af | 527 | { |
| yihui | 5:b8c02645e6af | 528 | /* ADDIS bit is reset */ |
| yihui | 5:b8c02645e6af | 529 | bitstatus = RESET; |
| yihui | 5:b8c02645e6af | 530 | } |
| yihui | 5:b8c02645e6af | 531 | /* Return the ADDIS bit status */ |
| yihui | 5:b8c02645e6af | 532 | return bitstatus; |
| yihui | 5:b8c02645e6af | 533 | } |
| yihui | 5:b8c02645e6af | 534 | |
| yihui | 5:b8c02645e6af | 535 | /** |
| yihui | 5:b8c02645e6af | 536 | * @brief Enables or disables the specified ADC Voltage Regulator. |
| yihui | 5:b8c02645e6af | 537 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 538 | * @param NewState: new state of the ADCx Voltage Regulator. |
| yihui | 5:b8c02645e6af | 539 | * This parameter can be: ENABLE or DISABLE. |
| yihui | 5:b8c02645e6af | 540 | * @retval None |
| yihui | 5:b8c02645e6af | 541 | */ |
| yihui | 5:b8c02645e6af | 542 | void ADC_VoltageRegulatorCmd(ADC_TypeDef* ADCx, FunctionalState NewState) |
| yihui | 5:b8c02645e6af | 543 | { |
| yihui | 5:b8c02645e6af | 544 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 545 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 546 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
| yihui | 5:b8c02645e6af | 547 | |
| yihui | 5:b8c02645e6af | 548 | /* set the intermediate state before moving the ADC voltage regulator |
| yihui | 5:b8c02645e6af | 549 | from enable state to disable state or from disable state to enable state */ |
| yihui | 5:b8c02645e6af | 550 | ADCx->CR &= ~(ADC_CR_ADVREGEN); |
| yihui | 5:b8c02645e6af | 551 | |
| yihui | 5:b8c02645e6af | 552 | if (NewState != DISABLE) |
| yihui | 5:b8c02645e6af | 553 | { |
| yihui | 5:b8c02645e6af | 554 | /* Set the ADVREGEN bit 0 */ |
| yihui | 5:b8c02645e6af | 555 | ADCx->CR |= ADC_CR_ADVREGEN_0; |
| yihui | 5:b8c02645e6af | 556 | } |
| yihui | 5:b8c02645e6af | 557 | else |
| yihui | 5:b8c02645e6af | 558 | { |
| yihui | 5:b8c02645e6af | 559 | /* Set the ADVREGEN bit 1 */ |
| yihui | 5:b8c02645e6af | 560 | ADCx->CR |=ADC_CR_ADVREGEN_1; |
| yihui | 5:b8c02645e6af | 561 | } |
| yihui | 5:b8c02645e6af | 562 | } |
| yihui | 5:b8c02645e6af | 563 | |
| yihui | 5:b8c02645e6af | 564 | /** |
| yihui | 5:b8c02645e6af | 565 | * @brief Selectes the differential mode for a specific channel |
| yihui | 5:b8c02645e6af | 566 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 567 | * @param ADC_Channel: the ADC channel to configure for the analog watchdog. |
| yihui | 5:b8c02645e6af | 568 | * This parameter can be one of the following values: |
| yihui | 5:b8c02645e6af | 569 | * @arg ADC_Channel_1: ADC Channel1 selected |
| yihui | 5:b8c02645e6af | 570 | * @arg ADC_Channel_2: ADC Channel2 selected |
| yihui | 5:b8c02645e6af | 571 | * @arg ADC_Channel_3: ADC Channel3 selected |
| yihui | 5:b8c02645e6af | 572 | * @arg ADC_Channel_4: ADC Channel4 selected |
| yihui | 5:b8c02645e6af | 573 | * @arg ADC_Channel_5: ADC Channel5 selected |
| yihui | 5:b8c02645e6af | 574 | * @arg ADC_Channel_6: ADC Channel6 selected |
| yihui | 5:b8c02645e6af | 575 | * @arg ADC_Channel_7: ADC Channel7 selected |
| yihui | 5:b8c02645e6af | 576 | * @arg ADC_Channel_8: ADC Channel8 selected |
| yihui | 5:b8c02645e6af | 577 | * @arg ADC_Channel_9: ADC Channel9 selected |
| yihui | 5:b8c02645e6af | 578 | * @arg ADC_Channel_10: ADC Channel10 selected |
| yihui | 5:b8c02645e6af | 579 | * @arg ADC_Channel_11: ADC Channel11 selected |
| yihui | 5:b8c02645e6af | 580 | * @arg ADC_Channel_12: ADC Channel12 selected |
| yihui | 5:b8c02645e6af | 581 | * @arg ADC_Channel_13: ADC Channel13 selected |
| yihui | 5:b8c02645e6af | 582 | * @arg ADC_Channel_14: ADC Channel14 selected |
| yihui | 5:b8c02645e6af | 583 | * @note : Channel 15, 16 and 17 are fixed to single-ended inputs mode. |
| yihui | 5:b8c02645e6af | 584 | * @retval None |
| yihui | 5:b8c02645e6af | 585 | */ |
| yihui | 5:b8c02645e6af | 586 | void ADC_SelectDifferentialMode(ADC_TypeDef* ADCx, uint8_t ADC_Channel, FunctionalState NewState) |
| yihui | 5:b8c02645e6af | 587 | { |
| yihui | 5:b8c02645e6af | 588 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 589 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 590 | assert_param(IS_ADC_DIFFCHANNEL(ADC_Channel)); |
| yihui | 5:b8c02645e6af | 591 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
| yihui | 5:b8c02645e6af | 592 | |
| yihui | 5:b8c02645e6af | 593 | if (NewState != DISABLE) |
| yihui | 5:b8c02645e6af | 594 | { |
| yihui | 5:b8c02645e6af | 595 | /* Set the DIFSEL bit */ |
| yihui | 5:b8c02645e6af | 596 | ADCx->DIFSEL |= (uint32_t)(1 << ADC_Channel ); |
| yihui | 5:b8c02645e6af | 597 | } |
| yihui | 5:b8c02645e6af | 598 | else |
| yihui | 5:b8c02645e6af | 599 | { |
| yihui | 5:b8c02645e6af | 600 | /* Reset the DIFSEL bit */ |
| yihui | 5:b8c02645e6af | 601 | ADCx->DIFSEL &= ~(uint32_t)(1 << ADC_Channel); |
| yihui | 5:b8c02645e6af | 602 | } |
| yihui | 5:b8c02645e6af | 603 | } |
| yihui | 5:b8c02645e6af | 604 | |
| yihui | 5:b8c02645e6af | 605 | /** |
| yihui | 5:b8c02645e6af | 606 | * @brief Selects the Queue Of Context Mode for injected channels. |
| yihui | 5:b8c02645e6af | 607 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 608 | * @param NewState: new state of the Queue Of Context Mode. |
| yihui | 5:b8c02645e6af | 609 | * This parameter can be: ENABLE or DISABLE. |
| yihui | 5:b8c02645e6af | 610 | * @retval None |
| yihui | 5:b8c02645e6af | 611 | */ |
| yihui | 5:b8c02645e6af | 612 | void ADC_SelectQueueOfContextMode(ADC_TypeDef* ADCx, FunctionalState NewState) |
| yihui | 5:b8c02645e6af | 613 | { |
| yihui | 5:b8c02645e6af | 614 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 615 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 616 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
| yihui | 5:b8c02645e6af | 617 | |
| yihui | 5:b8c02645e6af | 618 | if (NewState != DISABLE) |
| yihui | 5:b8c02645e6af | 619 | { |
| yihui | 5:b8c02645e6af | 620 | /* Set the JQM bit */ |
| yihui | 5:b8c02645e6af | 621 | ADCx->CFGR |= (uint32_t)(ADC_CFGR_JQM ); |
| yihui | 5:b8c02645e6af | 622 | } |
| yihui | 5:b8c02645e6af | 623 | else |
| yihui | 5:b8c02645e6af | 624 | { |
| yihui | 5:b8c02645e6af | 625 | /* Reset the JQM bit */ |
| yihui | 5:b8c02645e6af | 626 | ADCx->CFGR &= ~(uint32_t)(ADC_CFGR_JQM); |
| yihui | 5:b8c02645e6af | 627 | } |
| yihui | 5:b8c02645e6af | 628 | } |
| yihui | 5:b8c02645e6af | 629 | |
| yihui | 5:b8c02645e6af | 630 | /** |
| yihui | 5:b8c02645e6af | 631 | * @brief Selects the ADC Delayed Conversion Mode. |
| yihui | 5:b8c02645e6af | 632 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 633 | * @param NewState: new state of the ADC Delayed Conversion Mode. |
| yihui | 5:b8c02645e6af | 634 | * This parameter can be: ENABLE or DISABLE. |
| yihui | 5:b8c02645e6af | 635 | * @retval None |
| yihui | 5:b8c02645e6af | 636 | */ |
| yihui | 5:b8c02645e6af | 637 | void ADC_AutoDelayCmd(ADC_TypeDef* ADCx, FunctionalState NewState) |
| yihui | 5:b8c02645e6af | 638 | { |
| yihui | 5:b8c02645e6af | 639 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 640 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 641 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
| yihui | 5:b8c02645e6af | 642 | |
| yihui | 5:b8c02645e6af | 643 | if (NewState != DISABLE) |
| yihui | 5:b8c02645e6af | 644 | { |
| yihui | 5:b8c02645e6af | 645 | /* Set the AUTDLY bit */ |
| yihui | 5:b8c02645e6af | 646 | ADCx->CFGR |= (uint32_t)(ADC_CFGR_AUTDLY ); |
| yihui | 5:b8c02645e6af | 647 | } |
| yihui | 5:b8c02645e6af | 648 | else |
| yihui | 5:b8c02645e6af | 649 | { |
| yihui | 5:b8c02645e6af | 650 | /* Reset the AUTDLY bit */ |
| yihui | 5:b8c02645e6af | 651 | ADCx->CFGR &= ~(uint32_t)(ADC_CFGR_AUTDLY); |
| yihui | 5:b8c02645e6af | 652 | } |
| yihui | 5:b8c02645e6af | 653 | } |
| yihui | 5:b8c02645e6af | 654 | |
| yihui | 5:b8c02645e6af | 655 | /** |
| yihui | 5:b8c02645e6af | 656 | * @} |
| yihui | 5:b8c02645e6af | 657 | */ |
| yihui | 5:b8c02645e6af | 658 | |
| yihui | 5:b8c02645e6af | 659 | /** @defgroup ADC_Group2 Analog Watchdog configuration functions |
| yihui | 5:b8c02645e6af | 660 | * @brief Analog Watchdog configuration functions |
| yihui | 5:b8c02645e6af | 661 | * |
| yihui | 5:b8c02645e6af | 662 | @verbatim |
| yihui | 5:b8c02645e6af | 663 | =============================================================================== |
| yihui | 5:b8c02645e6af | 664 | ##### Analog Watchdog configuration functions ##### |
| yihui | 5:b8c02645e6af | 665 | =============================================================================== |
| yihui | 5:b8c02645e6af | 666 | |
| yihui | 5:b8c02645e6af | 667 | [..] This section provides functions allowing to configure the 3 Analog Watchdogs |
| yihui | 5:b8c02645e6af | 668 | (AWDG1, AWDG2 and AWDG3) in the ADC. |
| yihui | 5:b8c02645e6af | 669 | |
| yihui | 5:b8c02645e6af | 670 | [..] A typical configuration Analog Watchdog is done following these steps : |
| yihui | 5:b8c02645e6af | 671 | (#) The ADC guarded channel(s) is (are) selected using the functions: |
| yihui | 5:b8c02645e6af | 672 | (++) ADC_AnalogWatchdog1SingleChannelConfig(). |
| yihui | 5:b8c02645e6af | 673 | (++) ADC_AnalogWatchdog2SingleChannelConfig(). |
| yihui | 5:b8c02645e6af | 674 | (++) ADC_AnalogWatchdog3SingleChannelConfig(). |
| yihui | 5:b8c02645e6af | 675 | |
| yihui | 5:b8c02645e6af | 676 | (#) The Analog watchdog lower and higher threshold are configured using the functions: |
| yihui | 5:b8c02645e6af | 677 | (++) ADC_AnalogWatchdog1ThresholdsConfig(). |
| yihui | 5:b8c02645e6af | 678 | (++) ADC_AnalogWatchdog2ThresholdsConfig(). |
| yihui | 5:b8c02645e6af | 679 | (++) ADC_AnalogWatchdog3ThresholdsConfig(). |
| yihui | 5:b8c02645e6af | 680 | |
| yihui | 5:b8c02645e6af | 681 | (#) The Analog watchdog is enabled and configured to enable the check, on one |
| yihui | 5:b8c02645e6af | 682 | or more channels, using the function: |
| yihui | 5:b8c02645e6af | 683 | (++) ADC_AnalogWatchdogCmd(). |
| yihui | 5:b8c02645e6af | 684 | |
| yihui | 5:b8c02645e6af | 685 | @endverbatim |
| yihui | 5:b8c02645e6af | 686 | * @{ |
| yihui | 5:b8c02645e6af | 687 | */ |
| yihui | 5:b8c02645e6af | 688 | |
| yihui | 5:b8c02645e6af | 689 | /** |
| yihui | 5:b8c02645e6af | 690 | * @brief Enables or disables the analog watchdog on single/all regular |
| yihui | 5:b8c02645e6af | 691 | * or injected channels |
| yihui | 5:b8c02645e6af | 692 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 693 | * @param ADC_AnalogWatchdog: the ADC analog watchdog configuration. |
| yihui | 5:b8c02645e6af | 694 | * This parameter can be one of the following values: |
| yihui | 5:b8c02645e6af | 695 | * @arg ADC_AnalogWatchdog_SingleRegEnable: Analog watchdog on a single regular channel |
| yihui | 5:b8c02645e6af | 696 | * @arg ADC_AnalogWatchdog_SingleInjecEnable: Analog watchdog on a single injected channel |
| yihui | 5:b8c02645e6af | 697 | * @arg ADC_AnalogWatchdog_SingleRegOrInjecEnable: Analog watchdog on a single regular or injected channel |
| yihui | 5:b8c02645e6af | 698 | * @arg ADC_AnalogWatchdog_AllRegEnable: Analog watchdog on all regular channel |
| yihui | 5:b8c02645e6af | 699 | * @arg ADC_AnalogWatchdog_AllInjecEnable: Analog watchdog on all injected channel |
| yihui | 5:b8c02645e6af | 700 | * @arg ADC_AnalogWatchdog_AllRegAllInjecEnable: Analog watchdog on all regular and injected channels |
| yihui | 5:b8c02645e6af | 701 | * @arg ADC_AnalogWatchdog_None: No channel guarded by the analog watchdog |
| yihui | 5:b8c02645e6af | 702 | * @retval None |
| yihui | 5:b8c02645e6af | 703 | */ |
| yihui | 5:b8c02645e6af | 704 | void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog) |
| yihui | 5:b8c02645e6af | 705 | { |
| yihui | 5:b8c02645e6af | 706 | uint32_t tmpreg = 0; |
| yihui | 5:b8c02645e6af | 707 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 708 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 709 | assert_param(IS_ADC_ANALOG_WATCHDOG(ADC_AnalogWatchdog)); |
| yihui | 5:b8c02645e6af | 710 | /* Get the old register value */ |
| yihui | 5:b8c02645e6af | 711 | tmpreg = ADCx->CFGR; |
| yihui | 5:b8c02645e6af | 712 | /* Clear AWDEN, AWDENJ and AWDSGL bits */ |
| yihui | 5:b8c02645e6af | 713 | tmpreg &= ~(uint32_t)(ADC_CFGR_AWD1SGL|ADC_CFGR_AWD1EN|ADC_CFGR_JAWD1EN); |
| yihui | 5:b8c02645e6af | 714 | /* Set the analog watchdog enable mode */ |
| yihui | 5:b8c02645e6af | 715 | tmpreg |= ADC_AnalogWatchdog; |
| yihui | 5:b8c02645e6af | 716 | /* Store the new register value */ |
| yihui | 5:b8c02645e6af | 717 | ADCx->CFGR = tmpreg; |
| yihui | 5:b8c02645e6af | 718 | } |
| yihui | 5:b8c02645e6af | 719 | |
| yihui | 5:b8c02645e6af | 720 | /** |
| yihui | 5:b8c02645e6af | 721 | * @brief Configures the high and low thresholds of the analog watchdog1. |
| yihui | 5:b8c02645e6af | 722 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 723 | * @param HighThreshold: the ADC analog watchdog High threshold value. |
| yihui | 5:b8c02645e6af | 724 | * This parameter must be a 12bit value. |
| yihui | 5:b8c02645e6af | 725 | * @param LowThreshold: the ADC analog watchdog Low threshold value. |
| yihui | 5:b8c02645e6af | 726 | * This parameter must be a 12bit value. |
| yihui | 5:b8c02645e6af | 727 | * @retval None |
| yihui | 5:b8c02645e6af | 728 | */ |
| yihui | 5:b8c02645e6af | 729 | void ADC_AnalogWatchdog1ThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold, |
| yihui | 5:b8c02645e6af | 730 | uint16_t LowThreshold) |
| yihui | 5:b8c02645e6af | 731 | { |
| yihui | 5:b8c02645e6af | 732 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 733 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 734 | assert_param(IS_ADC_THRESHOLD(HighThreshold)); |
| yihui | 5:b8c02645e6af | 735 | assert_param(IS_ADC_THRESHOLD(LowThreshold)); |
| yihui | 5:b8c02645e6af | 736 | /* Set the ADCx high threshold */ |
| yihui | 5:b8c02645e6af | 737 | ADCx->TR1 &= ~(uint32_t)ADC_TR1_HT1; |
| yihui | 5:b8c02645e6af | 738 | ADCx->TR1 |= (uint32_t)((uint32_t)HighThreshold << 16); |
| yihui | 5:b8c02645e6af | 739 | |
| yihui | 5:b8c02645e6af | 740 | /* Set the ADCx low threshold */ |
| yihui | 5:b8c02645e6af | 741 | ADCx->TR1 &= ~(uint32_t)ADC_TR1_LT1; |
| yihui | 5:b8c02645e6af | 742 | ADCx->TR1 |= LowThreshold; |
| yihui | 5:b8c02645e6af | 743 | } |
| yihui | 5:b8c02645e6af | 744 | |
| yihui | 5:b8c02645e6af | 745 | /** |
| yihui | 5:b8c02645e6af | 746 | * @brief Configures the high and low thresholds of the analog watchdog2. |
| yihui | 5:b8c02645e6af | 747 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 748 | * @param HighThreshold: the ADC analog watchdog High threshold value. |
| yihui | 5:b8c02645e6af | 749 | * This parameter must be a 8bit value. |
| yihui | 5:b8c02645e6af | 750 | * @param LowThreshold: the ADC analog watchdog Low threshold value. |
| yihui | 5:b8c02645e6af | 751 | * This parameter must be a 8bit value. |
| yihui | 5:b8c02645e6af | 752 | * @retval None |
| yihui | 5:b8c02645e6af | 753 | */ |
| yihui | 5:b8c02645e6af | 754 | void ADC_AnalogWatchdog2ThresholdsConfig(ADC_TypeDef* ADCx, uint8_t HighThreshold, |
| yihui | 5:b8c02645e6af | 755 | uint8_t LowThreshold) |
| yihui | 5:b8c02645e6af | 756 | { |
| yihui | 5:b8c02645e6af | 757 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 758 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 759 | |
| yihui | 5:b8c02645e6af | 760 | /* Set the ADCx high threshold */ |
| yihui | 5:b8c02645e6af | 761 | ADCx->TR2 &= ~(uint32_t)ADC_TR2_HT2; |
| yihui | 5:b8c02645e6af | 762 | ADCx->TR2 |= (uint32_t)((uint32_t)HighThreshold << 16); |
| yihui | 5:b8c02645e6af | 763 | |
| yihui | 5:b8c02645e6af | 764 | /* Set the ADCx low threshold */ |
| yihui | 5:b8c02645e6af | 765 | ADCx->TR2 &= ~(uint32_t)ADC_TR2_LT2; |
| yihui | 5:b8c02645e6af | 766 | ADCx->TR2 |= LowThreshold; |
| yihui | 5:b8c02645e6af | 767 | } |
| yihui | 5:b8c02645e6af | 768 | |
| yihui | 5:b8c02645e6af | 769 | /** |
| yihui | 5:b8c02645e6af | 770 | * @brief Configures the high and low thresholds of the analog watchdog3. |
| yihui | 5:b8c02645e6af | 771 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 772 | * @param HighThreshold: the ADC analog watchdog High threshold value. |
| yihui | 5:b8c02645e6af | 773 | * This parameter must be a 8bit value. |
| yihui | 5:b8c02645e6af | 774 | * @param LowThreshold: the ADC analog watchdog Low threshold value. |
| yihui | 5:b8c02645e6af | 775 | * This parameter must be a 8bit value. |
| yihui | 5:b8c02645e6af | 776 | * @retval None |
| yihui | 5:b8c02645e6af | 777 | */ |
| yihui | 5:b8c02645e6af | 778 | void ADC_AnalogWatchdog3ThresholdsConfig(ADC_TypeDef* ADCx, uint8_t HighThreshold, |
| yihui | 5:b8c02645e6af | 779 | uint8_t LowThreshold) |
| yihui | 5:b8c02645e6af | 780 | { |
| yihui | 5:b8c02645e6af | 781 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 782 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 783 | |
| yihui | 5:b8c02645e6af | 784 | /* Set the ADCx high threshold */ |
| yihui | 5:b8c02645e6af | 785 | ADCx->TR3 &= ~(uint32_t)ADC_TR3_HT3; |
| yihui | 5:b8c02645e6af | 786 | ADCx->TR3 |= (uint32_t)((uint32_t)HighThreshold << 16); |
| yihui | 5:b8c02645e6af | 787 | |
| yihui | 5:b8c02645e6af | 788 | /* Set the ADCx low threshold */ |
| yihui | 5:b8c02645e6af | 789 | ADCx->TR3 &= ~(uint32_t)ADC_TR3_LT3; |
| yihui | 5:b8c02645e6af | 790 | ADCx->TR3 |= LowThreshold; |
| yihui | 5:b8c02645e6af | 791 | } |
| yihui | 5:b8c02645e6af | 792 | |
| yihui | 5:b8c02645e6af | 793 | /** |
| yihui | 5:b8c02645e6af | 794 | * @brief Configures the analog watchdog 2 guarded single channel |
| yihui | 5:b8c02645e6af | 795 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 796 | * @param ADC_Channel: the ADC channel to configure for the analog watchdog. |
| yihui | 5:b8c02645e6af | 797 | * This parameter can be one of the following values: |
| yihui | 5:b8c02645e6af | 798 | * @arg ADC_Channel_1: ADC Channel1 selected |
| yihui | 5:b8c02645e6af | 799 | * @arg ADC_Channel_2: ADC Channel2 selected |
| yihui | 5:b8c02645e6af | 800 | * @arg ADC_Channel_3: ADC Channel3 selected |
| yihui | 5:b8c02645e6af | 801 | * @arg ADC_Channel_4: ADC Channel4 selected |
| yihui | 5:b8c02645e6af | 802 | * @arg ADC_Channel_5: ADC Channel5 selected |
| yihui | 5:b8c02645e6af | 803 | * @arg ADC_Channel_6: ADC Channel6 selected |
| yihui | 5:b8c02645e6af | 804 | * @arg ADC_Channel_7: ADC Channel7 selected |
| yihui | 5:b8c02645e6af | 805 | * @arg ADC_Channel_8: ADC Channel8 selected |
| yihui | 5:b8c02645e6af | 806 | * @arg ADC_Channel_9: ADC Channel9 selected |
| yihui | 5:b8c02645e6af | 807 | * @arg ADC_Channel_10: ADC Channel10 selected |
| yihui | 5:b8c02645e6af | 808 | * @arg ADC_Channel_11: ADC Channel11 selected |
| yihui | 5:b8c02645e6af | 809 | * @arg ADC_Channel_12: ADC Channel12 selected |
| yihui | 5:b8c02645e6af | 810 | * @arg ADC_Channel_13: ADC Channel13 selected |
| yihui | 5:b8c02645e6af | 811 | * @arg ADC_Channel_14: ADC Channel14 selected |
| yihui | 5:b8c02645e6af | 812 | * @arg ADC_Channel_15: ADC Channel15 selected |
| yihui | 5:b8c02645e6af | 813 | * @arg ADC_Channel_16: ADC Channel16 selected |
| yihui | 5:b8c02645e6af | 814 | * @arg ADC_Channel_17: ADC Channel17 selected |
| yihui | 5:b8c02645e6af | 815 | * @arg ADC_Channel_18: ADC Channel18 selected |
| yihui | 5:b8c02645e6af | 816 | * @retval None |
| yihui | 5:b8c02645e6af | 817 | */ |
| yihui | 5:b8c02645e6af | 818 | void ADC_AnalogWatchdog1SingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel) |
| yihui | 5:b8c02645e6af | 819 | { |
| yihui | 5:b8c02645e6af | 820 | uint32_t tmpreg = 0; |
| yihui | 5:b8c02645e6af | 821 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 822 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 823 | assert_param(IS_ADC_CHANNEL(ADC_Channel)); |
| yihui | 5:b8c02645e6af | 824 | /* Get the old register value */ |
| yihui | 5:b8c02645e6af | 825 | tmpreg = ADCx->CFGR; |
| yihui | 5:b8c02645e6af | 826 | /* Clear the Analog watchdog channel select bits */ |
| yihui | 5:b8c02645e6af | 827 | tmpreg &= ~(uint32_t)ADC_CFGR_AWD1CH; |
| yihui | 5:b8c02645e6af | 828 | /* Set the Analog watchdog channel */ |
| yihui | 5:b8c02645e6af | 829 | tmpreg |= (uint32_t)((uint32_t)ADC_Channel << 26); |
| yihui | 5:b8c02645e6af | 830 | /* Store the new register value */ |
| yihui | 5:b8c02645e6af | 831 | ADCx->CFGR = tmpreg; |
| yihui | 5:b8c02645e6af | 832 | } |
| yihui | 5:b8c02645e6af | 833 | |
| yihui | 5:b8c02645e6af | 834 | /** |
| yihui | 5:b8c02645e6af | 835 | * @brief Configures the analog watchdog 2 guarded single channel |
| yihui | 5:b8c02645e6af | 836 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 837 | * @param ADC_Channel: the ADC channel to configure for the analog watchdog. |
| yihui | 5:b8c02645e6af | 838 | * This parameter can be one of the following values: |
| yihui | 5:b8c02645e6af | 839 | * @arg ADC_Channel_1: ADC Channel1 selected |
| yihui | 5:b8c02645e6af | 840 | * @arg ADC_Channel_2: ADC Channel2 selected |
| yihui | 5:b8c02645e6af | 841 | * @arg ADC_Channel_3: ADC Channel3 selected |
| yihui | 5:b8c02645e6af | 842 | * @arg ADC_Channel_4: ADC Channel4 selected |
| yihui | 5:b8c02645e6af | 843 | * @arg ADC_Channel_5: ADC Channel5 selected |
| yihui | 5:b8c02645e6af | 844 | * @arg ADC_Channel_6: ADC Channel6 selected |
| yihui | 5:b8c02645e6af | 845 | * @arg ADC_Channel_7: ADC Channel7 selected |
| yihui | 5:b8c02645e6af | 846 | * @arg ADC_Channel_8: ADC Channel8 selected |
| yihui | 5:b8c02645e6af | 847 | * @arg ADC_Channel_9: ADC Channel9 selected |
| yihui | 5:b8c02645e6af | 848 | * @arg ADC_Channel_10: ADC Channel10 selected |
| yihui | 5:b8c02645e6af | 849 | * @arg ADC_Channel_11: ADC Channel11 selected |
| yihui | 5:b8c02645e6af | 850 | * @arg ADC_Channel_12: ADC Channel12 selected |
| yihui | 5:b8c02645e6af | 851 | * @arg ADC_Channel_13: ADC Channel13 selected |
| yihui | 5:b8c02645e6af | 852 | * @arg ADC_Channel_14: ADC Channel14 selected |
| yihui | 5:b8c02645e6af | 853 | * @arg ADC_Channel_15: ADC Channel15 selected |
| yihui | 5:b8c02645e6af | 854 | * @arg ADC_Channel_16: ADC Channel16 selected |
| yihui | 5:b8c02645e6af | 855 | * @arg ADC_Channel_17: ADC Channel17 selected |
| yihui | 5:b8c02645e6af | 856 | * @arg ADC_Channel_18: ADC Channel18 selected |
| yihui | 5:b8c02645e6af | 857 | * @retval None |
| yihui | 5:b8c02645e6af | 858 | */ |
| yihui | 5:b8c02645e6af | 859 | void ADC_AnalogWatchdog2SingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel) |
| yihui | 5:b8c02645e6af | 860 | { |
| yihui | 5:b8c02645e6af | 861 | uint32_t tmpreg = 0; |
| yihui | 5:b8c02645e6af | 862 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 863 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 864 | assert_param(IS_ADC_CHANNEL(ADC_Channel)); |
| yihui | 5:b8c02645e6af | 865 | /* Get the old register value */ |
| yihui | 5:b8c02645e6af | 866 | tmpreg = ADCx->AWD2CR; |
| yihui | 5:b8c02645e6af | 867 | /* Clear the Analog watchdog channel select bits */ |
| yihui | 5:b8c02645e6af | 868 | tmpreg &= ~(uint32_t)ADC_AWD2CR_AWD2CH; |
| yihui | 5:b8c02645e6af | 869 | /* Set the Analog watchdog channel */ |
| yihui | 5:b8c02645e6af | 870 | tmpreg |= (uint32_t)1 << (ADC_Channel); |
| yihui | 5:b8c02645e6af | 871 | /* Store the new register value */ |
| yihui | 5:b8c02645e6af | 872 | ADCx->AWD2CR |= tmpreg; |
| yihui | 5:b8c02645e6af | 873 | } |
| yihui | 5:b8c02645e6af | 874 | |
| yihui | 5:b8c02645e6af | 875 | /** |
| yihui | 5:b8c02645e6af | 876 | * @brief Configures the analog watchdog 3 guarded single channel |
| yihui | 5:b8c02645e6af | 877 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 878 | * @param ADC_Channel: the ADC channel to configure for the analog watchdog. |
| yihui | 5:b8c02645e6af | 879 | * This parameter can be one of the following values: |
| yihui | 5:b8c02645e6af | 880 | * @arg ADC_Channel_1: ADC Channel1 selected |
| yihui | 5:b8c02645e6af | 881 | * @arg ADC_Channel_2: ADC Channel2 selected |
| yihui | 5:b8c02645e6af | 882 | * @arg ADC_Channel_3: ADC Channel3 selected |
| yihui | 5:b8c02645e6af | 883 | * @arg ADC_Channel_4: ADC Channel4 selected |
| yihui | 5:b8c02645e6af | 884 | * @arg ADC_Channel_5: ADC Channel5 selected |
| yihui | 5:b8c02645e6af | 885 | * @arg ADC_Channel_6: ADC Channel6 selected |
| yihui | 5:b8c02645e6af | 886 | * @arg ADC_Channel_7: ADC Channel7 selected |
| yihui | 5:b8c02645e6af | 887 | * @arg ADC_Channel_8: ADC Channel8 selected |
| yihui | 5:b8c02645e6af | 888 | * @arg ADC_Channel_9: ADC Channel9 selected |
| yihui | 5:b8c02645e6af | 889 | * @arg ADC_Channel_10: ADC Channel10 selected |
| yihui | 5:b8c02645e6af | 890 | * @arg ADC_Channel_11: ADC Channel11 selected |
| yihui | 5:b8c02645e6af | 891 | * @arg ADC_Channel_12: ADC Channel12 selected |
| yihui | 5:b8c02645e6af | 892 | * @arg ADC_Channel_13: ADC Channel13 selected |
| yihui | 5:b8c02645e6af | 893 | * @arg ADC_Channel_14: ADC Channel14 selected |
| yihui | 5:b8c02645e6af | 894 | * @arg ADC_Channel_15: ADC Channel15 selected |
| yihui | 5:b8c02645e6af | 895 | * @arg ADC_Channel_16: ADC Channel16 selected |
| yihui | 5:b8c02645e6af | 896 | * @arg ADC_Channel_17: ADC Channel17 selected |
| yihui | 5:b8c02645e6af | 897 | * @arg ADC_Channel_18: ADC Channel18 selected |
| yihui | 5:b8c02645e6af | 898 | * @retval None |
| yihui | 5:b8c02645e6af | 899 | */ |
| yihui | 5:b8c02645e6af | 900 | void ADC_AnalogWatchdog3SingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel) |
| yihui | 5:b8c02645e6af | 901 | { |
| yihui | 5:b8c02645e6af | 902 | uint32_t tmpreg = 0; |
| yihui | 5:b8c02645e6af | 903 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 904 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 905 | assert_param(IS_ADC_CHANNEL(ADC_Channel)); |
| yihui | 5:b8c02645e6af | 906 | /* Get the old register value */ |
| yihui | 5:b8c02645e6af | 907 | tmpreg = ADCx->AWD3CR; |
| yihui | 5:b8c02645e6af | 908 | /* Clear the Analog watchdog channel select bits */ |
| yihui | 5:b8c02645e6af | 909 | tmpreg &= ~(uint32_t)ADC_AWD3CR_AWD3CH; |
| yihui | 5:b8c02645e6af | 910 | /* Set the Analog watchdog channel */ |
| yihui | 5:b8c02645e6af | 911 | tmpreg |= (uint32_t)1 << (ADC_Channel); |
| yihui | 5:b8c02645e6af | 912 | /* Store the new register value */ |
| yihui | 5:b8c02645e6af | 913 | ADCx->AWD3CR |= tmpreg; |
| yihui | 5:b8c02645e6af | 914 | } |
| yihui | 5:b8c02645e6af | 915 | |
| yihui | 5:b8c02645e6af | 916 | /** |
| yihui | 5:b8c02645e6af | 917 | * @} |
| yihui | 5:b8c02645e6af | 918 | */ |
| yihui | 5:b8c02645e6af | 919 | |
| yihui | 5:b8c02645e6af | 920 | /** @defgroup ADC_Group3 Temperature Sensor - Vrefint (Internal Reference Voltage) and VBAT management functions |
| yihui | 5:b8c02645e6af | 921 | * @brief Vbat, Temperature Sensor & Vrefint (Internal Reference Voltage) management function |
| yihui | 5:b8c02645e6af | 922 | * |
| yihui | 5:b8c02645e6af | 923 | @verbatim |
| yihui | 5:b8c02645e6af | 924 | ==================================================================================================== |
| yihui | 5:b8c02645e6af | 925 | ##### Temperature Sensor - Vrefint (Internal Reference Voltage) and VBAT management functions ##### |
| yihui | 5:b8c02645e6af | 926 | ==================================================================================================== |
| yihui | 5:b8c02645e6af | 927 | |
| yihui | 5:b8c02645e6af | 928 | [..] This section provides a function allowing to enable/ disable the internal |
| yihui | 5:b8c02645e6af | 929 | connections between the ADC and the Vbat/2, Temperature Sensor and the Vrefint source. |
| yihui | 5:b8c02645e6af | 930 | |
| yihui | 5:b8c02645e6af | 931 | [..] A typical configuration to get the Temperature sensor and Vrefint channels |
| yihui | 5:b8c02645e6af | 932 | voltages is done following these steps : |
| yihui | 5:b8c02645e6af | 933 | (#) Enable the internal connection of Vbat/2, Temperature sensor and Vrefint sources |
| yihui | 5:b8c02645e6af | 934 | with the ADC channels using: |
| yihui | 5:b8c02645e6af | 935 | (++) ADC_TempSensorCmd() |
| yihui | 5:b8c02645e6af | 936 | (++) ADC_VrefintCmd() |
| yihui | 5:b8c02645e6af | 937 | (++) ADC_VbatCmd() |
| yihui | 5:b8c02645e6af | 938 | |
| yihui | 5:b8c02645e6af | 939 | (#) select the ADC_Channel_TempSensor and/or ADC_Channel_Vrefint and/or ADC_Channel_Vbat using |
| yihui | 5:b8c02645e6af | 940 | (++) ADC_RegularChannelConfig() or |
| yihui | 5:b8c02645e6af | 941 | (++) ADC_InjectedInit() functions |
| yihui | 5:b8c02645e6af | 942 | |
| yihui | 5:b8c02645e6af | 943 | (#) Get the voltage values, using: |
| yihui | 5:b8c02645e6af | 944 | (++) ADC_GetConversionValue() or |
| yihui | 5:b8c02645e6af | 945 | (++) ADC_GetInjectedConversionValue(). |
| yihui | 5:b8c02645e6af | 946 | |
| yihui | 5:b8c02645e6af | 947 | @endverbatim |
| yihui | 5:b8c02645e6af | 948 | * @{ |
| yihui | 5:b8c02645e6af | 949 | */ |
| yihui | 5:b8c02645e6af | 950 | |
| yihui | 5:b8c02645e6af | 951 | /** |
| yihui | 5:b8c02645e6af | 952 | * @brief Enables or disables the temperature sensor channel. |
| yihui | 5:b8c02645e6af | 953 | * @param ADCx: where x can be 1 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 954 | * @param NewState: new state of the temperature sensor. |
| yihui | 5:b8c02645e6af | 955 | * This parameter can be: ENABLE or DISABLE. |
| yihui | 5:b8c02645e6af | 956 | * @retval None |
| yihui | 5:b8c02645e6af | 957 | */ |
| yihui | 5:b8c02645e6af | 958 | void ADC_TempSensorCmd(ADC_TypeDef* ADCx, FunctionalState NewState) |
| yihui | 5:b8c02645e6af | 959 | { |
| yihui | 5:b8c02645e6af | 960 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 961 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
| yihui | 5:b8c02645e6af | 962 | |
| yihui | 5:b8c02645e6af | 963 | if (NewState != DISABLE) |
| yihui | 5:b8c02645e6af | 964 | { |
| yihui | 5:b8c02645e6af | 965 | /* Enable the temperature sensor channel*/ |
| yihui | 5:b8c02645e6af | 966 | ADC1_2->CCR |= ADC12_CCR_TSEN; |
| yihui | 5:b8c02645e6af | 967 | } |
| yihui | 5:b8c02645e6af | 968 | else |
| yihui | 5:b8c02645e6af | 969 | { |
| yihui | 5:b8c02645e6af | 970 | /* Disable the temperature sensor channel*/ |
| yihui | 5:b8c02645e6af | 971 | ADC1_2->CCR &= ~(uint32_t)ADC12_CCR_TSEN; |
| yihui | 5:b8c02645e6af | 972 | } |
| yihui | 5:b8c02645e6af | 973 | } |
| yihui | 5:b8c02645e6af | 974 | |
| yihui | 5:b8c02645e6af | 975 | /** |
| yihui | 5:b8c02645e6af | 976 | * @brief Enables or disables the Vrefint channel. |
| yihui | 5:b8c02645e6af | 977 | * @param ADCx: where x can be 1 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 978 | * @param NewState: new state of the Vrefint. |
| yihui | 5:b8c02645e6af | 979 | * This parameter can be: ENABLE or DISABLE. |
| yihui | 5:b8c02645e6af | 980 | * @retval None |
| yihui | 5:b8c02645e6af | 981 | */ |
| yihui | 5:b8c02645e6af | 982 | void ADC_VrefintCmd(ADC_TypeDef* ADCx, FunctionalState NewState) |
| yihui | 5:b8c02645e6af | 983 | { |
| yihui | 5:b8c02645e6af | 984 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 985 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 986 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
| yihui | 5:b8c02645e6af | 987 | |
| yihui | 5:b8c02645e6af | 988 | if((ADCx == ADC1) || (ADCx == ADC2)) |
| yihui | 5:b8c02645e6af | 989 | { |
| yihui | 5:b8c02645e6af | 990 | if (NewState != DISABLE) |
| yihui | 5:b8c02645e6af | 991 | { |
| yihui | 5:b8c02645e6af | 992 | /* Enable the Vrefint channel*/ |
| yihui | 5:b8c02645e6af | 993 | ADC1_2->CCR |= ADC12_CCR_VREFEN; |
| yihui | 5:b8c02645e6af | 994 | } |
| yihui | 5:b8c02645e6af | 995 | else |
| yihui | 5:b8c02645e6af | 996 | { |
| yihui | 5:b8c02645e6af | 997 | /* Disable the Vrefint channel*/ |
| yihui | 5:b8c02645e6af | 998 | ADC1_2->CCR &= ~(uint32_t)ADC12_CCR_VREFEN; |
| yihui | 5:b8c02645e6af | 999 | } |
| yihui | 5:b8c02645e6af | 1000 | } |
| yihui | 5:b8c02645e6af | 1001 | else |
| yihui | 5:b8c02645e6af | 1002 | { |
| yihui | 5:b8c02645e6af | 1003 | if (NewState != DISABLE) |
| yihui | 5:b8c02645e6af | 1004 | { |
| yihui | 5:b8c02645e6af | 1005 | /* Enable the Vrefint channel*/ |
| yihui | 5:b8c02645e6af | 1006 | ADC3_4->CCR |= ADC34_CCR_VREFEN; |
| yihui | 5:b8c02645e6af | 1007 | } |
| yihui | 5:b8c02645e6af | 1008 | else |
| yihui | 5:b8c02645e6af | 1009 | { |
| yihui | 5:b8c02645e6af | 1010 | /* Disable the Vrefint channel*/ |
| yihui | 5:b8c02645e6af | 1011 | ADC3_4->CCR &= ~(uint32_t)ADC34_CCR_VREFEN; |
| yihui | 5:b8c02645e6af | 1012 | } |
| yihui | 5:b8c02645e6af | 1013 | } |
| yihui | 5:b8c02645e6af | 1014 | } |
| yihui | 5:b8c02645e6af | 1015 | |
| yihui | 5:b8c02645e6af | 1016 | /** |
| yihui | 5:b8c02645e6af | 1017 | * @brief Enables or disables the Vbat channel. |
| yihui | 5:b8c02645e6af | 1018 | * @param ADCx: where x can be 1 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 1019 | * @param NewState: new state of the Vbat. |
| yihui | 5:b8c02645e6af | 1020 | * This parameter can be: ENABLE or DISABLE. |
| yihui | 5:b8c02645e6af | 1021 | * @retval None |
| yihui | 5:b8c02645e6af | 1022 | */ |
| yihui | 5:b8c02645e6af | 1023 | void ADC_VbatCmd(ADC_TypeDef* ADCx, FunctionalState NewState) |
| yihui | 5:b8c02645e6af | 1024 | { |
| yihui | 5:b8c02645e6af | 1025 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 1026 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
| yihui | 5:b8c02645e6af | 1027 | |
| yihui | 5:b8c02645e6af | 1028 | if (NewState != DISABLE) |
| yihui | 5:b8c02645e6af | 1029 | { |
| yihui | 5:b8c02645e6af | 1030 | /* Enable the Vbat channel*/ |
| yihui | 5:b8c02645e6af | 1031 | ADC1_2->CCR |= ADC12_CCR_VBATEN; |
| yihui | 5:b8c02645e6af | 1032 | } |
| yihui | 5:b8c02645e6af | 1033 | else |
| yihui | 5:b8c02645e6af | 1034 | { |
| yihui | 5:b8c02645e6af | 1035 | /* Disable the Vbat channel*/ |
| yihui | 5:b8c02645e6af | 1036 | ADC1_2->CCR &= ~(uint32_t)ADC12_CCR_VBATEN; |
| yihui | 5:b8c02645e6af | 1037 | } |
| yihui | 5:b8c02645e6af | 1038 | } |
| yihui | 5:b8c02645e6af | 1039 | |
| yihui | 5:b8c02645e6af | 1040 | /** |
| yihui | 5:b8c02645e6af | 1041 | * @} |
| yihui | 5:b8c02645e6af | 1042 | */ |
| yihui | 5:b8c02645e6af | 1043 | |
| yihui | 5:b8c02645e6af | 1044 | /** @defgroup ADC_Group4 Regular Channels Configuration functions |
| yihui | 5:b8c02645e6af | 1045 | * @brief Regular Channels Configuration functions |
| yihui | 5:b8c02645e6af | 1046 | * |
| yihui | 5:b8c02645e6af | 1047 | @verbatim |
| yihui | 5:b8c02645e6af | 1048 | =============================================================================== |
| yihui | 5:b8c02645e6af | 1049 | ##### Channels Configuration functions ##### |
| yihui | 5:b8c02645e6af | 1050 | =============================================================================== |
| yihui | 5:b8c02645e6af | 1051 | |
| yihui | 5:b8c02645e6af | 1052 | [..] This section provides functions allowing to manage the ADC regular channels. |
| yihui | 5:b8c02645e6af | 1053 | |
| yihui | 5:b8c02645e6af | 1054 | [..] To configure a regular sequence of channels use: |
| yihui | 5:b8c02645e6af | 1055 | (#) ADC_RegularChannelConfig() |
| yihui | 5:b8c02645e6af | 1056 | this fuction allows: |
| yihui | 5:b8c02645e6af | 1057 | (++) Configure the rank in the regular group sequencer for each channel |
| yihui | 5:b8c02645e6af | 1058 | (++) Configure the sampling time for each channel |
| yihui | 5:b8c02645e6af | 1059 | |
| yihui | 5:b8c02645e6af | 1060 | (#) ADC_RegularChannelSequencerLengthConfig() to set the length of the regular sequencer |
| yihui | 5:b8c02645e6af | 1061 | |
| yihui | 5:b8c02645e6af | 1062 | [..] The regular trigger is configured using the following functions: |
| yihui | 5:b8c02645e6af | 1063 | (#) ADC_SelectExternalTrigger() |
| yihui | 5:b8c02645e6af | 1064 | (#) ADC_ExternalTriggerPolarityConfig() |
| yihui | 5:b8c02645e6af | 1065 | |
| yihui | 5:b8c02645e6af | 1066 | [..] The start and the stop conversion are controlled by: |
| yihui | 5:b8c02645e6af | 1067 | (#) ADC_StartConversion() |
| yihui | 5:b8c02645e6af | 1068 | (#) ADC_StopConversion() |
| yihui | 5:b8c02645e6af | 1069 | |
| yihui | 5:b8c02645e6af | 1070 | [..] |
| yihui | 5:b8c02645e6af | 1071 | (@)Please Note that the following features for regular channels are configurated |
| yihui | 5:b8c02645e6af | 1072 | using the ADC_Init() function : |
| yihui | 5:b8c02645e6af | 1073 | (++) continuous mode activation |
| yihui | 5:b8c02645e6af | 1074 | (++) Resolution |
| yihui | 5:b8c02645e6af | 1075 | (++) Data Alignement |
| yihui | 5:b8c02645e6af | 1076 | (++) Overrun Mode. |
| yihui | 5:b8c02645e6af | 1077 | |
| yihui | 5:b8c02645e6af | 1078 | [..] Get the conversion data: This subsection provides an important function in |
| yihui | 5:b8c02645e6af | 1079 | the ADC peripheral since it returns the converted data of the current |
| yihui | 5:b8c02645e6af | 1080 | regular channel. When the Conversion value is read, the EOC Flag is |
| yihui | 5:b8c02645e6af | 1081 | automatically cleared. |
| yihui | 5:b8c02645e6af | 1082 | |
| yihui | 5:b8c02645e6af | 1083 | [..] To configure the discontinous mode, the following functions should be used: |
| yihui | 5:b8c02645e6af | 1084 | (#) ADC_DiscModeChannelCountConfig() to configure the number of discontinuous channel to be converted. |
| yihui | 5:b8c02645e6af | 1085 | (#) ADC_DiscModeCmd() to enable the discontinuous mode. |
| yihui | 5:b8c02645e6af | 1086 | |
| yihui | 5:b8c02645e6af | 1087 | [..] To configure and enable/disable the Channel offset use the functions: |
| yihui | 5:b8c02645e6af | 1088 | (++) ADC_SetChannelOffset1() |
| yihui | 5:b8c02645e6af | 1089 | (++) ADC_SetChannelOffset2() |
| yihui | 5:b8c02645e6af | 1090 | (++) ADC_SetChannelOffset3() |
| yihui | 5:b8c02645e6af | 1091 | (++) ADC_SetChannelOffset4() |
| yihui | 5:b8c02645e6af | 1092 | (++) ADC_ChannelOffset1Cmd() |
| yihui | 5:b8c02645e6af | 1093 | (++) ADC_ChannelOffset2Cmd() |
| yihui | 5:b8c02645e6af | 1094 | (++) ADC_ChannelOffset3Cmd() |
| yihui | 5:b8c02645e6af | 1095 | (++) ADC_ChannelOffset4Cmd() |
| yihui | 5:b8c02645e6af | 1096 | |
| yihui | 5:b8c02645e6af | 1097 | @endverbatim |
| yihui | 5:b8c02645e6af | 1098 | * @{ |
| yihui | 5:b8c02645e6af | 1099 | */ |
| yihui | 5:b8c02645e6af | 1100 | |
| yihui | 5:b8c02645e6af | 1101 | /** |
| yihui | 5:b8c02645e6af | 1102 | * @brief Configures for the selected ADC regular channel its corresponding |
| yihui | 5:b8c02645e6af | 1103 | * rank in the sequencer and its sample time. |
| yihui | 5:b8c02645e6af | 1104 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 1105 | * @param ADC_Channel: the ADC channel to configure. |
| yihui | 5:b8c02645e6af | 1106 | * This parameter can be one of the following values: |
| yihui | 5:b8c02645e6af | 1107 | * @arg ADC_Channel_1: ADC Channel1 selected |
| yihui | 5:b8c02645e6af | 1108 | * @arg ADC_Channel_2: ADC Channel2 selected |
| yihui | 5:b8c02645e6af | 1109 | * @arg ADC_Channel_3: ADC Channel3 selected |
| yihui | 5:b8c02645e6af | 1110 | * @arg ADC_Channel_4: ADC Channel4 selected |
| yihui | 5:b8c02645e6af | 1111 | * @arg ADC_Channel_5: ADC Channel5 selected |
| yihui | 5:b8c02645e6af | 1112 | * @arg ADC_Channel_6: ADC Channel6 selected |
| yihui | 5:b8c02645e6af | 1113 | * @arg ADC_Channel_7: ADC Channel7 selected |
| yihui | 5:b8c02645e6af | 1114 | * @arg ADC_Channel_8: ADC Channel8 selected |
| yihui | 5:b8c02645e6af | 1115 | * @arg ADC_Channel_9: ADC Channel9 selected |
| yihui | 5:b8c02645e6af | 1116 | * @arg ADC_Channel_10: ADC Channel10 selected |
| yihui | 5:b8c02645e6af | 1117 | * @arg ADC_Channel_11: ADC Channel11 selected |
| yihui | 5:b8c02645e6af | 1118 | * @arg ADC_Channel_12: ADC Channel12 selected |
| yihui | 5:b8c02645e6af | 1119 | * @arg ADC_Channel_13: ADC Channel13 selected |
| yihui | 5:b8c02645e6af | 1120 | * @arg ADC_Channel_14: ADC Channel14 selected |
| yihui | 5:b8c02645e6af | 1121 | * @arg ADC_Channel_15: ADC Channel15 selected |
| yihui | 5:b8c02645e6af | 1122 | * @arg ADC_Channel_16: ADC Channel16 selected |
| yihui | 5:b8c02645e6af | 1123 | * @arg ADC_Channel_17: ADC Channel17 selected |
| yihui | 5:b8c02645e6af | 1124 | * @arg ADC_Channel_18: ADC Channel18 selected |
| yihui | 5:b8c02645e6af | 1125 | * @param Rank: The rank in the regular group sequencer. This parameter must be between 1 to 16. |
| yihui | 5:b8c02645e6af | 1126 | * @param ADC_SampleTime: The sample time value to be set for the selected channel. |
| yihui | 5:b8c02645e6af | 1127 | * This parameter can be one of the following values: |
| yihui | 5:b8c02645e6af | 1128 | * @arg ADC_SampleTime_1Cycles5: Sample time equal to 1.5 cycles |
| yihui | 5:b8c02645e6af | 1129 | * @arg ADC_SampleTime_2Cycles5: Sample time equal to 2.5 cycles |
| yihui | 5:b8c02645e6af | 1130 | * @arg ADC_SampleTime_4Cycles5: Sample time equal to 4.5 cycles |
| yihui | 5:b8c02645e6af | 1131 | * @arg ADC_SampleTime_7Cycles5: Sample time equal to 7.5 cycles |
| yihui | 5:b8c02645e6af | 1132 | * @arg ADC_SampleTime_19Cycles5: Sample time equal to 19.5 cycles |
| yihui | 5:b8c02645e6af | 1133 | * @arg ADC_SampleTime_61Cycles5: Sample time equal to 61.5 cycles |
| yihui | 5:b8c02645e6af | 1134 | * @arg ADC_SampleTime_181Cycles5: Sample time equal to 181.5 cycles |
| yihui | 5:b8c02645e6af | 1135 | * @arg ADC_SampleTime_601Cycles5: Sample time equal to 601.5 cycles |
| yihui | 5:b8c02645e6af | 1136 | * @retval None |
| yihui | 5:b8c02645e6af | 1137 | */ |
| yihui | 5:b8c02645e6af | 1138 | void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime) |
| yihui | 5:b8c02645e6af | 1139 | { |
| yihui | 5:b8c02645e6af | 1140 | uint32_t tmpreg1 = 0, tmpreg2 = 0; |
| yihui | 5:b8c02645e6af | 1141 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 1142 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 1143 | assert_param(IS_ADC_CHANNEL(ADC_Channel)); |
| yihui | 5:b8c02645e6af | 1144 | assert_param(IS_ADC_SAMPLE_TIME(ADC_SampleTime)); |
| yihui | 5:b8c02645e6af | 1145 | |
| yihui | 5:b8c02645e6af | 1146 | /* Regular sequence configuration */ |
| yihui | 5:b8c02645e6af | 1147 | /* For Rank 1 to 4 */ |
| yihui | 5:b8c02645e6af | 1148 | if (Rank < 5) |
| yihui | 5:b8c02645e6af | 1149 | { |
| yihui | 5:b8c02645e6af | 1150 | /* Get the old register value */ |
| yihui | 5:b8c02645e6af | 1151 | tmpreg1 = ADCx->SQR1; |
| yihui | 5:b8c02645e6af | 1152 | /* Calculate the mask to clear */ |
| yihui | 5:b8c02645e6af | 1153 | tmpreg2 = 0x1F << (6 * (Rank )); |
| yihui | 5:b8c02645e6af | 1154 | /* Clear the old SQx bits for the selected rank */ |
| yihui | 5:b8c02645e6af | 1155 | tmpreg1 &= ~tmpreg2; |
| yihui | 5:b8c02645e6af | 1156 | /* Calculate the mask to set */ |
| yihui | 5:b8c02645e6af | 1157 | tmpreg2 = (uint32_t)(ADC_Channel) << (6 * (Rank)); |
| yihui | 5:b8c02645e6af | 1158 | /* Set the SQx bits for the selected rank */ |
| yihui | 5:b8c02645e6af | 1159 | tmpreg1 |= tmpreg2; |
| yihui | 5:b8c02645e6af | 1160 | /* Store the new register value */ |
| yihui | 5:b8c02645e6af | 1161 | ADCx->SQR1 = tmpreg1; |
| yihui | 5:b8c02645e6af | 1162 | } |
| yihui | 5:b8c02645e6af | 1163 | /* For Rank 5 to 9 */ |
| yihui | 5:b8c02645e6af | 1164 | else if (Rank < 10) |
| yihui | 5:b8c02645e6af | 1165 | { |
| yihui | 5:b8c02645e6af | 1166 | /* Get the old register value */ |
| yihui | 5:b8c02645e6af | 1167 | tmpreg1 = ADCx->SQR2; |
| yihui | 5:b8c02645e6af | 1168 | /* Calculate the mask to clear */ |
| yihui | 5:b8c02645e6af | 1169 | tmpreg2 = ADC_SQR2_SQ5 << (6 * (Rank - 5)); |
| yihui | 5:b8c02645e6af | 1170 | /* Clear the old SQx bits for the selected rank */ |
| yihui | 5:b8c02645e6af | 1171 | tmpreg1 &= ~tmpreg2; |
| yihui | 5:b8c02645e6af | 1172 | /* Calculate the mask to set */ |
| yihui | 5:b8c02645e6af | 1173 | tmpreg2 = (uint32_t)(ADC_Channel) << (6 * (Rank - 5)); |
| yihui | 5:b8c02645e6af | 1174 | /* Set the SQx bits for the selected rank */ |
| yihui | 5:b8c02645e6af | 1175 | tmpreg1 |= tmpreg2; |
| yihui | 5:b8c02645e6af | 1176 | /* Store the new register value */ |
| yihui | 5:b8c02645e6af | 1177 | ADCx->SQR2 = tmpreg1; |
| yihui | 5:b8c02645e6af | 1178 | } |
| yihui | 5:b8c02645e6af | 1179 | /* For Rank 10 to 14 */ |
| yihui | 5:b8c02645e6af | 1180 | else if (Rank < 15) |
| yihui | 5:b8c02645e6af | 1181 | { |
| yihui | 5:b8c02645e6af | 1182 | /* Get the old register value */ |
| yihui | 5:b8c02645e6af | 1183 | tmpreg1 = ADCx->SQR3; |
| yihui | 5:b8c02645e6af | 1184 | /* Calculate the mask to clear */ |
| yihui | 5:b8c02645e6af | 1185 | tmpreg2 = ADC_SQR3_SQ10 << (6 * (Rank - 10)); |
| yihui | 5:b8c02645e6af | 1186 | /* Clear the old SQx bits for the selected rank */ |
| yihui | 5:b8c02645e6af | 1187 | tmpreg1 &= ~tmpreg2; |
| yihui | 5:b8c02645e6af | 1188 | /* Calculate the mask to set */ |
| yihui | 5:b8c02645e6af | 1189 | tmpreg2 = (uint32_t)(ADC_Channel) << (6 * (Rank - 10)); |
| yihui | 5:b8c02645e6af | 1190 | /* Set the SQx bits for the selected rank */ |
| yihui | 5:b8c02645e6af | 1191 | tmpreg1 |= tmpreg2; |
| yihui | 5:b8c02645e6af | 1192 | /* Store the new register value */ |
| yihui | 5:b8c02645e6af | 1193 | ADCx->SQR3 = tmpreg1; |
| yihui | 5:b8c02645e6af | 1194 | } |
| yihui | 5:b8c02645e6af | 1195 | else |
| yihui | 5:b8c02645e6af | 1196 | { |
| yihui | 5:b8c02645e6af | 1197 | /* Get the old register value */ |
| yihui | 5:b8c02645e6af | 1198 | tmpreg1 = ADCx->SQR4; |
| yihui | 5:b8c02645e6af | 1199 | /* Calculate the mask to clear */ |
| yihui | 5:b8c02645e6af | 1200 | tmpreg2 = ADC_SQR3_SQ15 << (6 * (Rank - 15)); |
| yihui | 5:b8c02645e6af | 1201 | /* Clear the old SQx bits for the selected rank */ |
| yihui | 5:b8c02645e6af | 1202 | tmpreg1 &= ~tmpreg2; |
| yihui | 5:b8c02645e6af | 1203 | /* Calculate the mask to set */ |
| yihui | 5:b8c02645e6af | 1204 | tmpreg2 = (uint32_t)(ADC_Channel) << (6 * (Rank - 15)); |
| yihui | 5:b8c02645e6af | 1205 | /* Set the SQx bits for the selected rank */ |
| yihui | 5:b8c02645e6af | 1206 | tmpreg1 |= tmpreg2; |
| yihui | 5:b8c02645e6af | 1207 | /* Store the new register value */ |
| yihui | 5:b8c02645e6af | 1208 | ADCx->SQR4 = tmpreg1; |
| yihui | 5:b8c02645e6af | 1209 | } |
| yihui | 5:b8c02645e6af | 1210 | |
| yihui | 5:b8c02645e6af | 1211 | /* Channel sampling configuration */ |
| yihui | 5:b8c02645e6af | 1212 | /* if ADC_Channel_10 ... ADC_Channel_18 is selected */ |
| yihui | 5:b8c02645e6af | 1213 | if (ADC_Channel > ADC_Channel_9) |
| yihui | 5:b8c02645e6af | 1214 | { |
| yihui | 5:b8c02645e6af | 1215 | /* Get the old register value */ |
| yihui | 5:b8c02645e6af | 1216 | tmpreg1 = ADCx->SMPR2; |
| yihui | 5:b8c02645e6af | 1217 | /* Calculate the mask to clear */ |
| yihui | 5:b8c02645e6af | 1218 | tmpreg2 = ADC_SMPR2_SMP10 << (3 * (ADC_Channel - 10)); |
| yihui | 5:b8c02645e6af | 1219 | /* Clear the old channel sample time */ |
| yihui | 5:b8c02645e6af | 1220 | ADCx->SMPR2 &= ~tmpreg2; |
| yihui | 5:b8c02645e6af | 1221 | /* Calculate the mask to set */ |
| yihui | 5:b8c02645e6af | 1222 | ADCx->SMPR2 |= (uint32_t)ADC_SampleTime << (3 * (ADC_Channel - 10)); |
| yihui | 5:b8c02645e6af | 1223 | |
| yihui | 5:b8c02645e6af | 1224 | } |
| yihui | 5:b8c02645e6af | 1225 | else /* ADC_Channel include in ADC_Channel_[0..9] */ |
| yihui | 5:b8c02645e6af | 1226 | { |
| yihui | 5:b8c02645e6af | 1227 | /* Get the old register value */ |
| yihui | 5:b8c02645e6af | 1228 | tmpreg1 = ADCx->SMPR1; |
| yihui | 5:b8c02645e6af | 1229 | /* Calculate the mask to clear */ |
| yihui | 5:b8c02645e6af | 1230 | tmpreg2 = ADC_SMPR1_SMP1 << (3 * (ADC_Channel - 1)); |
| yihui | 5:b8c02645e6af | 1231 | /* Clear the old channel sample time */ |
| yihui | 5:b8c02645e6af | 1232 | ADCx->SMPR1 &= ~tmpreg2; |
| yihui | 5:b8c02645e6af | 1233 | /* Calculate the mask to set */ |
| yihui | 5:b8c02645e6af | 1234 | ADCx->SMPR1 |= (uint32_t)ADC_SampleTime << (3 * (ADC_Channel)); |
| yihui | 5:b8c02645e6af | 1235 | } |
| yihui | 5:b8c02645e6af | 1236 | } |
| yihui | 5:b8c02645e6af | 1237 | |
| yihui | 5:b8c02645e6af | 1238 | /** |
| yihui | 5:b8c02645e6af | 1239 | * @brief Sets the ADC regular channel sequence lenght. |
| yihui | 5:b8c02645e6af | 1240 | * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 1241 | * @param SequenceLength: The Regular sequence length. This parameter must be between 1 to 16. |
| yihui | 5:b8c02645e6af | 1242 | * This parameter can be: ENABLE or DISABLE. |
| yihui | 5:b8c02645e6af | 1243 | * @retval None |
| yihui | 5:b8c02645e6af | 1244 | */ |
| yihui | 5:b8c02645e6af | 1245 | void ADC_RegularChannelSequencerLengthConfig(ADC_TypeDef* ADCx, uint8_t SequencerLength) |
| yihui | 5:b8c02645e6af | 1246 | { |
| yihui | 5:b8c02645e6af | 1247 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 1248 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 1249 | |
| yihui | 5:b8c02645e6af | 1250 | /* Configure the ADC sequence lenght */ |
| yihui | 5:b8c02645e6af | 1251 | ADCx->SQR1 &= ~(uint32_t)ADC_SQR1_L; |
| yihui | 5:b8c02645e6af | 1252 | ADCx->SQR1 |= (uint32_t)(SequencerLength - 1); |
| yihui | 5:b8c02645e6af | 1253 | } |
| yihui | 5:b8c02645e6af | 1254 | |
| yihui | 5:b8c02645e6af | 1255 | /** |
| yihui | 5:b8c02645e6af | 1256 | * @brief External Trigger Enable and Polarity Selection for regular channels. |
| yihui | 5:b8c02645e6af | 1257 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 1258 | * @param ADC_ExternalTrigConvEvent: ADC external Trigger source. |
| yihui | 5:b8c02645e6af | 1259 | * This parameter can be one of the following values: |
| yihui | 5:b8c02645e6af | 1260 | * @arg ADC_ExternalTrigger_Event0: External trigger event 0 |
| yihui | 5:b8c02645e6af | 1261 | * @arg ADC_ExternalTrigger_Event1: External trigger event 1 |
| yihui | 5:b8c02645e6af | 1262 | * @arg ADC_ExternalTrigger_Event2: External trigger event 2 |
| yihui | 5:b8c02645e6af | 1263 | * @arg ADC_ExternalTrigger_Event3: External trigger event 3 |
| yihui | 5:b8c02645e6af | 1264 | * @arg ADC_ExternalTrigger_Event4: External trigger event 4 |
| yihui | 5:b8c02645e6af | 1265 | * @arg ADC_ExternalTrigger_Event5: External trigger event 5 |
| yihui | 5:b8c02645e6af | 1266 | * @arg ADC_ExternalTrigger_Event6: External trigger event 6 |
| yihui | 5:b8c02645e6af | 1267 | * @arg ADC_ExternalTrigger_Event7: External trigger event 7 |
| yihui | 5:b8c02645e6af | 1268 | * @arg ADC_ExternalTrigger_Event8: External trigger event 8 |
| yihui | 5:b8c02645e6af | 1269 | * @arg ADC_ExternalTrigger_Event9: External trigger event 9 |
| yihui | 5:b8c02645e6af | 1270 | * @arg ADC_ExternalTrigger_Event10: External trigger event 10 |
| yihui | 5:b8c02645e6af | 1271 | * @arg ADC_ExternalTrigger_Event11: External trigger event 11 |
| yihui | 5:b8c02645e6af | 1272 | * @arg ADC_ExternalTrigger_Event12: External trigger event 12 |
| yihui | 5:b8c02645e6af | 1273 | * @arg ADC_ExternalTrigger_Event13: External trigger event 13 |
| yihui | 5:b8c02645e6af | 1274 | * @arg ADC_ExternalTrigger_Event14: External trigger event 14 |
| yihui | 5:b8c02645e6af | 1275 | * @arg ADC_ExternalTrigger_Event15: External trigger event 15 |
| yihui | 5:b8c02645e6af | 1276 | * @param ADC_ExternalTrigEventEdge: ADC external Trigger Polarity. |
| yihui | 5:b8c02645e6af | 1277 | * This parameter can be one of the following values: |
| yihui | 5:b8c02645e6af | 1278 | * @arg ADC_ExternalTrigEventEdge_OFF: Hardware trigger detection disabled |
| yihui | 5:b8c02645e6af | 1279 | * (conversions can be launched by software) |
| yihui | 5:b8c02645e6af | 1280 | * @arg ADC_ExternalTrigEventEdge_RisingEdge: Hardware trigger detection on the rising edge |
| yihui | 5:b8c02645e6af | 1281 | * @arg ADC_ExternalTrigEventEdge_FallingEdge: Hardware trigger detection on the falling edge |
| yihui | 5:b8c02645e6af | 1282 | * @arg ADC_ExternalTrigEventEdge_BothEdge: Hardware trigger detection on both the rising and falling edges |
| yihui | 5:b8c02645e6af | 1283 | * @retval None |
| yihui | 5:b8c02645e6af | 1284 | */ |
| yihui | 5:b8c02645e6af | 1285 | void ADC_ExternalTriggerConfig(ADC_TypeDef* ADCx, uint16_t ADC_ExternalTrigConvEvent, uint16_t ADC_ExternalTrigEventEdge) |
| yihui | 5:b8c02645e6af | 1286 | { |
| yihui | 5:b8c02645e6af | 1287 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 1288 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 1289 | assert_param(IS_ADC_EXT_TRIG(ADC_ExternalTrigConvEvent)); |
| yihui | 5:b8c02645e6af | 1290 | assert_param(IS_EXTERNALTRIG_EDGE(ADC_ExternalTrigEventEdge)); |
| yihui | 5:b8c02645e6af | 1291 | |
| yihui | 5:b8c02645e6af | 1292 | /* Disable the selected ADC conversion on external event */ |
| yihui | 5:b8c02645e6af | 1293 | ADCx->CFGR &= ~(ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL); |
| yihui | 5:b8c02645e6af | 1294 | ADCx->CFGR |= (uint32_t)(ADC_ExternalTrigEventEdge | ADC_ExternalTrigConvEvent); |
| yihui | 5:b8c02645e6af | 1295 | } |
| yihui | 5:b8c02645e6af | 1296 | |
| yihui | 5:b8c02645e6af | 1297 | /** |
| yihui | 5:b8c02645e6af | 1298 | * @brief Enables or disables the selected ADC start conversion . |
| yihui | 5:b8c02645e6af | 1299 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 1300 | * @retval None |
| yihui | 5:b8c02645e6af | 1301 | */ |
| yihui | 5:b8c02645e6af | 1302 | void ADC_StartConversion(ADC_TypeDef* ADCx) |
| yihui | 5:b8c02645e6af | 1303 | { |
| yihui | 5:b8c02645e6af | 1304 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 1305 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 1306 | |
| yihui | 5:b8c02645e6af | 1307 | /* Set the ADSTART bit */ |
| yihui | 5:b8c02645e6af | 1308 | ADCx->CR |= ADC_CR_ADSTART; |
| yihui | 5:b8c02645e6af | 1309 | } |
| yihui | 5:b8c02645e6af | 1310 | |
| yihui | 5:b8c02645e6af | 1311 | /** |
| yihui | 5:b8c02645e6af | 1312 | * @brief Gets the selected ADC start conversion Status. |
| yihui | 5:b8c02645e6af | 1313 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 1314 | * @retval The new state of ADC start conversion (SET or RESET). |
| yihui | 5:b8c02645e6af | 1315 | */ |
| yihui | 5:b8c02645e6af | 1316 | FlagStatus ADC_GetStartConversionStatus(ADC_TypeDef* ADCx) |
| yihui | 5:b8c02645e6af | 1317 | { |
| yihui | 5:b8c02645e6af | 1318 | FlagStatus bitstatus = RESET; |
| yihui | 5:b8c02645e6af | 1319 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 1320 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 1321 | /* Check the status of ADSTART bit */ |
| yihui | 5:b8c02645e6af | 1322 | if ((ADCx->CR & ADC_CR_ADSTART) != (uint32_t)RESET) |
| yihui | 5:b8c02645e6af | 1323 | { |
| yihui | 5:b8c02645e6af | 1324 | /* ADSTART bit is set */ |
| yihui | 5:b8c02645e6af | 1325 | bitstatus = SET; |
| yihui | 5:b8c02645e6af | 1326 | } |
| yihui | 5:b8c02645e6af | 1327 | else |
| yihui | 5:b8c02645e6af | 1328 | { |
| yihui | 5:b8c02645e6af | 1329 | /* ADSTART bit is reset */ |
| yihui | 5:b8c02645e6af | 1330 | bitstatus = RESET; |
| yihui | 5:b8c02645e6af | 1331 | } |
| yihui | 5:b8c02645e6af | 1332 | /* Return the ADSTART bit status */ |
| yihui | 5:b8c02645e6af | 1333 | return bitstatus; |
| yihui | 5:b8c02645e6af | 1334 | } |
| yihui | 5:b8c02645e6af | 1335 | |
| yihui | 5:b8c02645e6af | 1336 | /** |
| yihui | 5:b8c02645e6af | 1337 | * @brief Stops the selected ADC ongoing conversion. |
| yihui | 5:b8c02645e6af | 1338 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 1339 | * @retval None |
| yihui | 5:b8c02645e6af | 1340 | */ |
| yihui | 5:b8c02645e6af | 1341 | void ADC_StopConversion(ADC_TypeDef* ADCx) |
| yihui | 5:b8c02645e6af | 1342 | { |
| yihui | 5:b8c02645e6af | 1343 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 1344 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 1345 | |
| yihui | 5:b8c02645e6af | 1346 | /* Set the ADSTP bit */ |
| yihui | 5:b8c02645e6af | 1347 | ADCx->CR |= ADC_CR_ADSTP; |
| yihui | 5:b8c02645e6af | 1348 | } |
| yihui | 5:b8c02645e6af | 1349 | |
| yihui | 5:b8c02645e6af | 1350 | |
| yihui | 5:b8c02645e6af | 1351 | /** |
| yihui | 5:b8c02645e6af | 1352 | * @brief Configures the discontinuous mode for the selected ADC regular |
| yihui | 5:b8c02645e6af | 1353 | * group channel. |
| yihui | 5:b8c02645e6af | 1354 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 1355 | * @param Number: specifies the discontinuous mode regular channel |
| yihui | 5:b8c02645e6af | 1356 | * count value. This number must be between 1 and 8. |
| yihui | 5:b8c02645e6af | 1357 | * @retval None |
| yihui | 5:b8c02645e6af | 1358 | */ |
| yihui | 5:b8c02645e6af | 1359 | void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number) |
| yihui | 5:b8c02645e6af | 1360 | { |
| yihui | 5:b8c02645e6af | 1361 | uint32_t tmpreg1 = 0; |
| yihui | 5:b8c02645e6af | 1362 | uint32_t tmpreg2 = 0; |
| yihui | 5:b8c02645e6af | 1363 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 1364 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 1365 | assert_param(IS_ADC_REGULAR_DISC_NUMBER(Number)); |
| yihui | 5:b8c02645e6af | 1366 | /* Get the old register value */ |
| yihui | 5:b8c02645e6af | 1367 | tmpreg1 = ADCx->CFGR; |
| yihui | 5:b8c02645e6af | 1368 | /* Clear the old discontinuous mode channel count */ |
| yihui | 5:b8c02645e6af | 1369 | tmpreg1 &= ~(uint32_t)(ADC_CFGR_DISCNUM); |
| yihui | 5:b8c02645e6af | 1370 | /* Set the discontinuous mode channel count */ |
| yihui | 5:b8c02645e6af | 1371 | tmpreg2 = Number - 1; |
| yihui | 5:b8c02645e6af | 1372 | tmpreg1 |= tmpreg2 << 17; |
| yihui | 5:b8c02645e6af | 1373 | /* Store the new register value */ |
| yihui | 5:b8c02645e6af | 1374 | ADCx->CFGR = tmpreg1; |
| yihui | 5:b8c02645e6af | 1375 | } |
| yihui | 5:b8c02645e6af | 1376 | |
| yihui | 5:b8c02645e6af | 1377 | /** |
| yihui | 5:b8c02645e6af | 1378 | * @brief Enables or disables the discontinuous mode on regular group |
| yihui | 5:b8c02645e6af | 1379 | * channel for the specified ADC |
| yihui | 5:b8c02645e6af | 1380 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 1381 | * @param NewState: new state of the selected ADC discontinuous mode |
| yihui | 5:b8c02645e6af | 1382 | * on regular group channel. |
| yihui | 5:b8c02645e6af | 1383 | * This parameter can be: ENABLE or DISABLE. |
| yihui | 5:b8c02645e6af | 1384 | * @retval None |
| yihui | 5:b8c02645e6af | 1385 | */ |
| yihui | 5:b8c02645e6af | 1386 | void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState) |
| yihui | 5:b8c02645e6af | 1387 | { |
| yihui | 5:b8c02645e6af | 1388 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 1389 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 1390 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
| yihui | 5:b8c02645e6af | 1391 | if (NewState != DISABLE) |
| yihui | 5:b8c02645e6af | 1392 | { |
| yihui | 5:b8c02645e6af | 1393 | /* Enable the selected ADC regular discontinuous mode */ |
| yihui | 5:b8c02645e6af | 1394 | ADCx->CFGR |= ADC_CFGR_DISCEN; |
| yihui | 5:b8c02645e6af | 1395 | } |
| yihui | 5:b8c02645e6af | 1396 | else |
| yihui | 5:b8c02645e6af | 1397 | { |
| yihui | 5:b8c02645e6af | 1398 | /* Disable the selected ADC regular discontinuous mode */ |
| yihui | 5:b8c02645e6af | 1399 | ADCx->CFGR &= ~(uint32_t)(ADC_CFGR_DISCEN); |
| yihui | 5:b8c02645e6af | 1400 | } |
| yihui | 5:b8c02645e6af | 1401 | } |
| yihui | 5:b8c02645e6af | 1402 | |
| yihui | 5:b8c02645e6af | 1403 | /** |
| yihui | 5:b8c02645e6af | 1404 | * @brief Returns the last ADCx conversion result data for regular channel. |
| yihui | 5:b8c02645e6af | 1405 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 1406 | * @retval The Data conversion value. |
| yihui | 5:b8c02645e6af | 1407 | */ |
| yihui | 5:b8c02645e6af | 1408 | uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx) |
| yihui | 5:b8c02645e6af | 1409 | { |
| yihui | 5:b8c02645e6af | 1410 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 1411 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 1412 | /* Return the selected ADC conversion value */ |
| yihui | 5:b8c02645e6af | 1413 | return (uint16_t) ADCx->DR; |
| yihui | 5:b8c02645e6af | 1414 | } |
| yihui | 5:b8c02645e6af | 1415 | |
| yihui | 5:b8c02645e6af | 1416 | /** |
| yihui | 5:b8c02645e6af | 1417 | * @brief Returns the last ADC1, ADC2, ADC3 and ADC4 regular conversions results |
| yihui | 5:b8c02645e6af | 1418 | * data in the selected dual mode. |
| yihui | 5:b8c02645e6af | 1419 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 1420 | * @retval The Data conversion value. |
| yihui | 5:b8c02645e6af | 1421 | * @note In dual mode, the value returned by this function is as following |
| yihui | 5:b8c02645e6af | 1422 | * Data[15:0] : these bits contain the regular data of the Master ADC. |
| yihui | 5:b8c02645e6af | 1423 | * Data[31:16]: these bits contain the regular data of the Slave ADC. |
| yihui | 5:b8c02645e6af | 1424 | */ |
| yihui | 5:b8c02645e6af | 1425 | uint32_t ADC_GetDualModeConversionValue(ADC_TypeDef* ADCx) |
| yihui | 5:b8c02645e6af | 1426 | { |
| yihui | 5:b8c02645e6af | 1427 | uint32_t tmpreg1 = 0; |
| yihui | 5:b8c02645e6af | 1428 | |
| yihui | 5:b8c02645e6af | 1429 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 1430 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 1431 | |
| yihui | 5:b8c02645e6af | 1432 | if((ADCx == ADC1) || (ADCx== ADC2)) |
| yihui | 5:b8c02645e6af | 1433 | { |
| yihui | 5:b8c02645e6af | 1434 | /* Get the dual mode conversion value */ |
| yihui | 5:b8c02645e6af | 1435 | tmpreg1 = ADC1_2->CDR; |
| yihui | 5:b8c02645e6af | 1436 | } |
| yihui | 5:b8c02645e6af | 1437 | else |
| yihui | 5:b8c02645e6af | 1438 | { |
| yihui | 5:b8c02645e6af | 1439 | /* Get the dual mode conversion value */ |
| yihui | 5:b8c02645e6af | 1440 | tmpreg1 = ADC3_4->CDR; |
| yihui | 5:b8c02645e6af | 1441 | } |
| yihui | 5:b8c02645e6af | 1442 | /* Return the dual mode conversion value */ |
| yihui | 5:b8c02645e6af | 1443 | return (uint32_t) tmpreg1; |
| yihui | 5:b8c02645e6af | 1444 | } |
| yihui | 5:b8c02645e6af | 1445 | |
| yihui | 5:b8c02645e6af | 1446 | /** |
| yihui | 5:b8c02645e6af | 1447 | * @brief Set the ADC channels conversion value offset1 |
| yihui | 5:b8c02645e6af | 1448 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 1449 | * @param ADC_Channel: the ADC channel to configure. |
| yihui | 5:b8c02645e6af | 1450 | * This parameter can be one of the following values: |
| yihui | 5:b8c02645e6af | 1451 | * @arg ADC_Channel_1: ADC Channel1 selected |
| yihui | 5:b8c02645e6af | 1452 | * @arg ADC_Channel_2: ADC Channel2 selected |
| yihui | 5:b8c02645e6af | 1453 | * @arg ADC_Channel_3: ADC Channel3 selected |
| yihui | 5:b8c02645e6af | 1454 | * @arg ADC_Channel_4: ADC Channel4 selected |
| yihui | 5:b8c02645e6af | 1455 | * @arg ADC_Channel_5: ADC Channel5 selected |
| yihui | 5:b8c02645e6af | 1456 | * @arg ADC_Channel_6: ADC Channel6 selected |
| yihui | 5:b8c02645e6af | 1457 | * @arg ADC_Channel_7: ADC Channel7 selected |
| yihui | 5:b8c02645e6af | 1458 | * @arg ADC_Channel_8: ADC Channel8 selected |
| yihui | 5:b8c02645e6af | 1459 | * @arg ADC_Channel_9: ADC Channel9 selected |
| yihui | 5:b8c02645e6af | 1460 | * @arg ADC_Channel_10: ADC Channel10 selected |
| yihui | 5:b8c02645e6af | 1461 | * @arg ADC_Channel_11: ADC Channel11 selected |
| yihui | 5:b8c02645e6af | 1462 | * @arg ADC_Channel_12: ADC Channel12 selected |
| yihui | 5:b8c02645e6af | 1463 | * @arg ADC_Channel_13: ADC Channel13 selected |
| yihui | 5:b8c02645e6af | 1464 | * @arg ADC_Channel_14: ADC Channel14 selected |
| yihui | 5:b8c02645e6af | 1465 | * @arg ADC_Channel_15: ADC Channel15 selected |
| yihui | 5:b8c02645e6af | 1466 | * @arg ADC_Channel_16: ADC Channel16 selected |
| yihui | 5:b8c02645e6af | 1467 | * @arg ADC_Channel_17: ADC Channel17 selected |
| yihui | 5:b8c02645e6af | 1468 | * @arg ADC_Channel_18: ADC Channel18 selected |
| yihui | 5:b8c02645e6af | 1469 | * @param Offset: the offset value for the selected ADC Channel |
| yihui | 5:b8c02645e6af | 1470 | * This parameter must be a 12bit value. |
| yihui | 5:b8c02645e6af | 1471 | * @retval None |
| yihui | 5:b8c02645e6af | 1472 | */ |
| yihui | 5:b8c02645e6af | 1473 | void ADC_SetChannelOffset1(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint16_t Offset) |
| yihui | 5:b8c02645e6af | 1474 | { |
| yihui | 5:b8c02645e6af | 1475 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 1476 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 1477 | assert_param(IS_ADC_CHANNEL(ADC_Channel)); |
| yihui | 5:b8c02645e6af | 1478 | assert_param(IS_ADC_OFFSET(Offset)); |
| yihui | 5:b8c02645e6af | 1479 | |
| yihui | 5:b8c02645e6af | 1480 | /* Select the Channel */ |
| yihui | 5:b8c02645e6af | 1481 | ADCx->OFR1 &= ~ (uint32_t) ADC_OFR1_OFFSET1_CH; |
| yihui | 5:b8c02645e6af | 1482 | ADCx->OFR1 |= (uint32_t)((uint32_t)ADC_Channel << 26); |
| yihui | 5:b8c02645e6af | 1483 | |
| yihui | 5:b8c02645e6af | 1484 | /* Set the data offset */ |
| yihui | 5:b8c02645e6af | 1485 | ADCx->OFR1 &= ~ (uint32_t) ADC_OFR1_OFFSET1; |
| yihui | 5:b8c02645e6af | 1486 | ADCx->OFR1 |= (uint32_t)Offset; |
| yihui | 5:b8c02645e6af | 1487 | } |
| yihui | 5:b8c02645e6af | 1488 | |
| yihui | 5:b8c02645e6af | 1489 | /** |
| yihui | 5:b8c02645e6af | 1490 | * @brief Set the ADC channels conversion value offset2 |
| yihui | 5:b8c02645e6af | 1491 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 1492 | * @param ADC_Channel: the ADC channel to configure. |
| yihui | 5:b8c02645e6af | 1493 | * This parameter can be one of the following values: |
| yihui | 5:b8c02645e6af | 1494 | * @arg ADC_Channel_1: ADC Channel1 selected |
| yihui | 5:b8c02645e6af | 1495 | * @arg ADC_Channel_2: ADC Channel2 selected |
| yihui | 5:b8c02645e6af | 1496 | * @arg ADC_Channel_3: ADC Channel3 selected |
| yihui | 5:b8c02645e6af | 1497 | * @arg ADC_Channel_4: ADC Channel4 selected |
| yihui | 5:b8c02645e6af | 1498 | * @arg ADC_Channel_5: ADC Channel5 selected |
| yihui | 5:b8c02645e6af | 1499 | * @arg ADC_Channel_6: ADC Channel6 selected |
| yihui | 5:b8c02645e6af | 1500 | * @arg ADC_Channel_7: ADC Channel7 selected |
| yihui | 5:b8c02645e6af | 1501 | * @arg ADC_Channel_8: ADC Channel8 selected |
| yihui | 5:b8c02645e6af | 1502 | * @arg ADC_Channel_9: ADC Channel9 selected |
| yihui | 5:b8c02645e6af | 1503 | * @arg ADC_Channel_10: ADC Channel10 selected |
| yihui | 5:b8c02645e6af | 1504 | * @arg ADC_Channel_11: ADC Channel11 selected |
| yihui | 5:b8c02645e6af | 1505 | * @arg ADC_Channel_12: ADC Channel12 selected |
| yihui | 5:b8c02645e6af | 1506 | * @arg ADC_Channel_13: ADC Channel13 selected |
| yihui | 5:b8c02645e6af | 1507 | * @arg ADC_Channel_14: ADC Channel14 selected |
| yihui | 5:b8c02645e6af | 1508 | * @arg ADC_Channel_15: ADC Channel15 selected |
| yihui | 5:b8c02645e6af | 1509 | * @arg ADC_Channel_16: ADC Channel16 selected |
| yihui | 5:b8c02645e6af | 1510 | * @arg ADC_Channel_17: ADC Channel17 selected |
| yihui | 5:b8c02645e6af | 1511 | * @arg ADC_Channel_18: ADC Channel18 selected |
| yihui | 5:b8c02645e6af | 1512 | * @param Offset: the offset value for the selected ADC Channel |
| yihui | 5:b8c02645e6af | 1513 | * This parameter must be a 12bit value. |
| yihui | 5:b8c02645e6af | 1514 | * @retval None |
| yihui | 5:b8c02645e6af | 1515 | */ |
| yihui | 5:b8c02645e6af | 1516 | void ADC_SetChannelOffset2(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint16_t Offset) |
| yihui | 5:b8c02645e6af | 1517 | { |
| yihui | 5:b8c02645e6af | 1518 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 1519 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 1520 | assert_param(IS_ADC_CHANNEL(ADC_Channel)); |
| yihui | 5:b8c02645e6af | 1521 | assert_param(IS_ADC_OFFSET(Offset)); |
| yihui | 5:b8c02645e6af | 1522 | |
| yihui | 5:b8c02645e6af | 1523 | /* Select the Channel */ |
| yihui | 5:b8c02645e6af | 1524 | ADCx->OFR2 &= ~ (uint32_t) ADC_OFR2_OFFSET2_CH; |
| yihui | 5:b8c02645e6af | 1525 | ADCx->OFR2 |= (uint32_t)((uint32_t)ADC_Channel << 26); |
| yihui | 5:b8c02645e6af | 1526 | |
| yihui | 5:b8c02645e6af | 1527 | /* Set the data offset */ |
| yihui | 5:b8c02645e6af | 1528 | ADCx->OFR2 &= ~ (uint32_t) ADC_OFR2_OFFSET2; |
| yihui | 5:b8c02645e6af | 1529 | ADCx->OFR2 |= (uint32_t)Offset; |
| yihui | 5:b8c02645e6af | 1530 | } |
| yihui | 5:b8c02645e6af | 1531 | |
| yihui | 5:b8c02645e6af | 1532 | /** |
| yihui | 5:b8c02645e6af | 1533 | * @brief Set the ADC channels conversion value offset3 |
| yihui | 5:b8c02645e6af | 1534 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 1535 | * @param ADC_Channel: the ADC channel to configure. |
| yihui | 5:b8c02645e6af | 1536 | * This parameter can be one of the following values: |
| yihui | 5:b8c02645e6af | 1537 | * @arg ADC_Channel_1: ADC Channel1 selected |
| yihui | 5:b8c02645e6af | 1538 | * @arg ADC_Channel_2: ADC Channel2 selected |
| yihui | 5:b8c02645e6af | 1539 | * @arg ADC_Channel_3: ADC Channel3 selected |
| yihui | 5:b8c02645e6af | 1540 | * @arg ADC_Channel_4: ADC Channel4 selected |
| yihui | 5:b8c02645e6af | 1541 | * @arg ADC_Channel_5: ADC Channel5 selected |
| yihui | 5:b8c02645e6af | 1542 | * @arg ADC_Channel_6: ADC Channel6 selected |
| yihui | 5:b8c02645e6af | 1543 | * @arg ADC_Channel_7: ADC Channel7 selected |
| yihui | 5:b8c02645e6af | 1544 | * @arg ADC_Channel_8: ADC Channel8 selected |
| yihui | 5:b8c02645e6af | 1545 | * @arg ADC_Channel_9: ADC Channel9 selected |
| yihui | 5:b8c02645e6af | 1546 | * @arg ADC_Channel_10: ADC Channel10 selected |
| yihui | 5:b8c02645e6af | 1547 | * @arg ADC_Channel_11: ADC Channel11 selected |
| yihui | 5:b8c02645e6af | 1548 | * @arg ADC_Channel_12: ADC Channel12 selected |
| yihui | 5:b8c02645e6af | 1549 | * @arg ADC_Channel_13: ADC Channel13 selected |
| yihui | 5:b8c02645e6af | 1550 | * @arg ADC_Channel_14: ADC Channel14 selected |
| yihui | 5:b8c02645e6af | 1551 | * @arg ADC_Channel_15: ADC Channel15 selected |
| yihui | 5:b8c02645e6af | 1552 | * @arg ADC_Channel_16: ADC Channel16 selected |
| yihui | 5:b8c02645e6af | 1553 | * @arg ADC_Channel_17: ADC Channel17 selected |
| yihui | 5:b8c02645e6af | 1554 | * @arg ADC_Channel_18: ADC Channel18 selected |
| yihui | 5:b8c02645e6af | 1555 | * @param Offset: the offset value for the selected ADC Channel |
| yihui | 5:b8c02645e6af | 1556 | * This parameter must be a 12bit value. |
| yihui | 5:b8c02645e6af | 1557 | * @retval None |
| yihui | 5:b8c02645e6af | 1558 | */ |
| yihui | 5:b8c02645e6af | 1559 | void ADC_SetChannelOffset3(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint16_t Offset) |
| yihui | 5:b8c02645e6af | 1560 | { |
| yihui | 5:b8c02645e6af | 1561 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 1562 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 1563 | assert_param(IS_ADC_CHANNEL(ADC_Channel)); |
| yihui | 5:b8c02645e6af | 1564 | assert_param(IS_ADC_OFFSET(Offset)); |
| yihui | 5:b8c02645e6af | 1565 | |
| yihui | 5:b8c02645e6af | 1566 | /* Select the Channel */ |
| yihui | 5:b8c02645e6af | 1567 | ADCx->OFR3 &= ~ (uint32_t) ADC_OFR3_OFFSET3_CH; |
| yihui | 5:b8c02645e6af | 1568 | ADCx->OFR3 |= (uint32_t)((uint32_t)ADC_Channel << 26); |
| yihui | 5:b8c02645e6af | 1569 | |
| yihui | 5:b8c02645e6af | 1570 | /* Set the data offset */ |
| yihui | 5:b8c02645e6af | 1571 | ADCx->OFR3 &= ~ (uint32_t) ADC_OFR3_OFFSET3; |
| yihui | 5:b8c02645e6af | 1572 | ADCx->OFR3 |= (uint32_t)Offset; |
| yihui | 5:b8c02645e6af | 1573 | } |
| yihui | 5:b8c02645e6af | 1574 | |
| yihui | 5:b8c02645e6af | 1575 | /** |
| yihui | 5:b8c02645e6af | 1576 | * @brief Set the ADC channels conversion value offset4 |
| yihui | 5:b8c02645e6af | 1577 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 1578 | * @param ADC_Channel: the ADC channel to configure. |
| yihui | 5:b8c02645e6af | 1579 | * This parameter can be one of the following values: |
| yihui | 5:b8c02645e6af | 1580 | * @arg ADC_Channel_1: ADC Channel1 selected |
| yihui | 5:b8c02645e6af | 1581 | * @arg ADC_Channel_2: ADC Channel2 selected |
| yihui | 5:b8c02645e6af | 1582 | * @arg ADC_Channel_3: ADC Channel3 selected |
| yihui | 5:b8c02645e6af | 1583 | * @arg ADC_Channel_4: ADC Channel4 selected |
| yihui | 5:b8c02645e6af | 1584 | * @arg ADC_Channel_5: ADC Channel5 selected |
| yihui | 5:b8c02645e6af | 1585 | * @arg ADC_Channel_6: ADC Channel6 selected |
| yihui | 5:b8c02645e6af | 1586 | * @arg ADC_Channel_7: ADC Channel7 selected |
| yihui | 5:b8c02645e6af | 1587 | * @arg ADC_Channel_8: ADC Channel8 selected |
| yihui | 5:b8c02645e6af | 1588 | * @arg ADC_Channel_9: ADC Channel9 selected |
| yihui | 5:b8c02645e6af | 1589 | * @arg ADC_Channel_10: ADC Channel10 selected |
| yihui | 5:b8c02645e6af | 1590 | * @arg ADC_Channel_11: ADC Channel11 selected |
| yihui | 5:b8c02645e6af | 1591 | * @arg ADC_Channel_12: ADC Channel12 selected |
| yihui | 5:b8c02645e6af | 1592 | * @arg ADC_Channel_13: ADC Channel13 selected |
| yihui | 5:b8c02645e6af | 1593 | * @arg ADC_Channel_14: ADC Channel14 selected |
| yihui | 5:b8c02645e6af | 1594 | * @arg ADC_Channel_15: ADC Channel15 selected |
| yihui | 5:b8c02645e6af | 1595 | * @arg ADC_Channel_16: ADC Channel16 selected |
| yihui | 5:b8c02645e6af | 1596 | * @arg ADC_Channel_17: ADC Channel17 selected |
| yihui | 5:b8c02645e6af | 1597 | * @arg ADC_Channel_18: ADC Channel18 selected |
| yihui | 5:b8c02645e6af | 1598 | * @param Offset: the offset value for the selected ADC Channel |
| yihui | 5:b8c02645e6af | 1599 | * This parameter must be a 12bit value. |
| yihui | 5:b8c02645e6af | 1600 | * @retval None |
| yihui | 5:b8c02645e6af | 1601 | */ |
| yihui | 5:b8c02645e6af | 1602 | void ADC_SetChannelOffset4(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint16_t Offset) |
| yihui | 5:b8c02645e6af | 1603 | { |
| yihui | 5:b8c02645e6af | 1604 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 1605 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 1606 | assert_param(IS_ADC_CHANNEL(ADC_Channel)); |
| yihui | 5:b8c02645e6af | 1607 | assert_param(IS_ADC_OFFSET(Offset)); |
| yihui | 5:b8c02645e6af | 1608 | |
| yihui | 5:b8c02645e6af | 1609 | /* Select the Channel */ |
| yihui | 5:b8c02645e6af | 1610 | ADCx->OFR4 &= ~ (uint32_t) ADC_OFR4_OFFSET4_CH; |
| yihui | 5:b8c02645e6af | 1611 | ADCx->OFR4 |= (uint32_t)((uint32_t)ADC_Channel << 26); |
| yihui | 5:b8c02645e6af | 1612 | |
| yihui | 5:b8c02645e6af | 1613 | /* Set the data offset */ |
| yihui | 5:b8c02645e6af | 1614 | ADCx->OFR4 &= ~ (uint32_t) ADC_OFR4_OFFSET4; |
| yihui | 5:b8c02645e6af | 1615 | ADCx->OFR4 |= (uint32_t)Offset; |
| yihui | 5:b8c02645e6af | 1616 | } |
| yihui | 5:b8c02645e6af | 1617 | |
| yihui | 5:b8c02645e6af | 1618 | /** |
| yihui | 5:b8c02645e6af | 1619 | * @brief Enables or disables the Offset1. |
| yihui | 5:b8c02645e6af | 1620 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 1621 | * @param NewState: new state of the ADCx offset1. |
| yihui | 5:b8c02645e6af | 1622 | * This parameter can be: ENABLE or DISABLE. |
| yihui | 5:b8c02645e6af | 1623 | * @retval None |
| yihui | 5:b8c02645e6af | 1624 | */ |
| yihui | 5:b8c02645e6af | 1625 | void ADC_ChannelOffset1Cmd(ADC_TypeDef* ADCx, FunctionalState NewState) |
| yihui | 5:b8c02645e6af | 1626 | { |
| yihui | 5:b8c02645e6af | 1627 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 1628 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 1629 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
| yihui | 5:b8c02645e6af | 1630 | |
| yihui | 5:b8c02645e6af | 1631 | if (NewState != DISABLE) |
| yihui | 5:b8c02645e6af | 1632 | { |
| yihui | 5:b8c02645e6af | 1633 | /* Set the OFFSET1_EN bit */ |
| yihui | 5:b8c02645e6af | 1634 | ADCx->OFR1 |= ADC_OFR1_OFFSET1_EN; |
| yihui | 5:b8c02645e6af | 1635 | } |
| yihui | 5:b8c02645e6af | 1636 | else |
| yihui | 5:b8c02645e6af | 1637 | { |
| yihui | 5:b8c02645e6af | 1638 | /* Reset the OFFSET1_EN bit */ |
| yihui | 5:b8c02645e6af | 1639 | ADCx->OFR1 &= ~(ADC_OFR1_OFFSET1_EN); |
| yihui | 5:b8c02645e6af | 1640 | } |
| yihui | 5:b8c02645e6af | 1641 | } |
| yihui | 5:b8c02645e6af | 1642 | |
| yihui | 5:b8c02645e6af | 1643 | /** |
| yihui | 5:b8c02645e6af | 1644 | * @brief Enables or disables the Offset2. |
| yihui | 5:b8c02645e6af | 1645 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 1646 | * @param NewState: new state of the ADCx offset2. |
| yihui | 5:b8c02645e6af | 1647 | * This parameter can be: ENABLE or DISABLE. |
| yihui | 5:b8c02645e6af | 1648 | * @retval None |
| yihui | 5:b8c02645e6af | 1649 | */ |
| yihui | 5:b8c02645e6af | 1650 | void ADC_ChannelOffset2Cmd(ADC_TypeDef* ADCx, FunctionalState NewState) |
| yihui | 5:b8c02645e6af | 1651 | { |
| yihui | 5:b8c02645e6af | 1652 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 1653 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 1654 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
| yihui | 5:b8c02645e6af | 1655 | |
| yihui | 5:b8c02645e6af | 1656 | if (NewState != DISABLE) |
| yihui | 5:b8c02645e6af | 1657 | { |
| yihui | 5:b8c02645e6af | 1658 | /* Set the OFFSET1_EN bit */ |
| yihui | 5:b8c02645e6af | 1659 | ADCx->OFR2 |= ADC_OFR2_OFFSET2_EN; |
| yihui | 5:b8c02645e6af | 1660 | } |
| yihui | 5:b8c02645e6af | 1661 | else |
| yihui | 5:b8c02645e6af | 1662 | { |
| yihui | 5:b8c02645e6af | 1663 | /* Reset the OFFSET1_EN bit */ |
| yihui | 5:b8c02645e6af | 1664 | ADCx->OFR2 &= ~(ADC_OFR2_OFFSET2_EN); |
| yihui | 5:b8c02645e6af | 1665 | } |
| yihui | 5:b8c02645e6af | 1666 | } |
| yihui | 5:b8c02645e6af | 1667 | |
| yihui | 5:b8c02645e6af | 1668 | /** |
| yihui | 5:b8c02645e6af | 1669 | * @brief Enables or disables the Offset3. |
| yihui | 5:b8c02645e6af | 1670 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 1671 | * @param NewState: new state of the ADCx offset3. |
| yihui | 5:b8c02645e6af | 1672 | * This parameter can be: ENABLE or DISABLE. |
| yihui | 5:b8c02645e6af | 1673 | * @retval None |
| yihui | 5:b8c02645e6af | 1674 | */ |
| yihui | 5:b8c02645e6af | 1675 | void ADC_ChannelOffset3Cmd(ADC_TypeDef* ADCx, FunctionalState NewState) |
| yihui | 5:b8c02645e6af | 1676 | { |
| yihui | 5:b8c02645e6af | 1677 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 1678 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 1679 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
| yihui | 5:b8c02645e6af | 1680 | |
| yihui | 5:b8c02645e6af | 1681 | if (NewState != DISABLE) |
| yihui | 5:b8c02645e6af | 1682 | { |
| yihui | 5:b8c02645e6af | 1683 | /* Set the OFFSET1_EN bit */ |
| yihui | 5:b8c02645e6af | 1684 | ADCx->OFR3 |= ADC_OFR3_OFFSET3_EN; |
| yihui | 5:b8c02645e6af | 1685 | } |
| yihui | 5:b8c02645e6af | 1686 | else |
| yihui | 5:b8c02645e6af | 1687 | { |
| yihui | 5:b8c02645e6af | 1688 | /* Reset the OFFSET1_EN bit */ |
| yihui | 5:b8c02645e6af | 1689 | ADCx->OFR3 &= ~(ADC_OFR3_OFFSET3_EN); |
| yihui | 5:b8c02645e6af | 1690 | } |
| yihui | 5:b8c02645e6af | 1691 | } |
| yihui | 5:b8c02645e6af | 1692 | |
| yihui | 5:b8c02645e6af | 1693 | /** |
| yihui | 5:b8c02645e6af | 1694 | * @brief Enables or disables the Offset4. |
| yihui | 5:b8c02645e6af | 1695 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 1696 | * @param NewState: new state of the ADCx offset4. |
| yihui | 5:b8c02645e6af | 1697 | * This parameter can be: ENABLE or DISABLE. |
| yihui | 5:b8c02645e6af | 1698 | * @retval None |
| yihui | 5:b8c02645e6af | 1699 | */ |
| yihui | 5:b8c02645e6af | 1700 | void ADC_ChannelOffset4Cmd(ADC_TypeDef* ADCx, FunctionalState NewState) |
| yihui | 5:b8c02645e6af | 1701 | { |
| yihui | 5:b8c02645e6af | 1702 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 1703 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 1704 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
| yihui | 5:b8c02645e6af | 1705 | |
| yihui | 5:b8c02645e6af | 1706 | if (NewState != DISABLE) |
| yihui | 5:b8c02645e6af | 1707 | { |
| yihui | 5:b8c02645e6af | 1708 | /* Set the OFFSET1_EN bit */ |
| yihui | 5:b8c02645e6af | 1709 | ADCx->OFR4 |= ADC_OFR4_OFFSET4_EN; |
| yihui | 5:b8c02645e6af | 1710 | } |
| yihui | 5:b8c02645e6af | 1711 | else |
| yihui | 5:b8c02645e6af | 1712 | { |
| yihui | 5:b8c02645e6af | 1713 | /* Reset the OFFSET1_EN bit */ |
| yihui | 5:b8c02645e6af | 1714 | ADCx->OFR4 &= ~(ADC_OFR4_OFFSET4_EN); |
| yihui | 5:b8c02645e6af | 1715 | } |
| yihui | 5:b8c02645e6af | 1716 | } |
| yihui | 5:b8c02645e6af | 1717 | |
| yihui | 5:b8c02645e6af | 1718 | /** |
| yihui | 5:b8c02645e6af | 1719 | * @} |
| yihui | 5:b8c02645e6af | 1720 | */ |
| yihui | 5:b8c02645e6af | 1721 | |
| yihui | 5:b8c02645e6af | 1722 | /** @defgroup ADC_Group5 Regular Channels DMA Configuration functions |
| yihui | 5:b8c02645e6af | 1723 | * @brief Regular Channels DMA Configuration functions |
| yihui | 5:b8c02645e6af | 1724 | * |
| yihui | 5:b8c02645e6af | 1725 | @verbatim |
| yihui | 5:b8c02645e6af | 1726 | =============================================================================== |
| yihui | 5:b8c02645e6af | 1727 | ##### Regular Channels DMA Configuration functions ##### |
| yihui | 5:b8c02645e6af | 1728 | =============================================================================== |
| yihui | 5:b8c02645e6af | 1729 | |
| yihui | 5:b8c02645e6af | 1730 | [..] This section provides functions allowing to configure the DMA for ADC regular |
| yihui | 5:b8c02645e6af | 1731 | channels. Since converted regular channel values are stored into a unique data register, |
| yihui | 5:b8c02645e6af | 1732 | it is useful to use DMA for conversion of more than one regular channel. This |
| yihui | 5:b8c02645e6af | 1733 | avoids the loss of the data already stored in the ADC Data register. |
| yihui | 5:b8c02645e6af | 1734 | |
| yihui | 5:b8c02645e6af | 1735 | (#) ADC_DMACmd() function is used to enable the ADC DMA mode, after each |
| yihui | 5:b8c02645e6af | 1736 | conversion of a regular channel, a DMA request is generated. |
| yihui | 5:b8c02645e6af | 1737 | (#) ADC_DMAConfig() function is used to select between the one shot DMA mode |
| yihui | 5:b8c02645e6af | 1738 | or the circular DMA mode |
| yihui | 5:b8c02645e6af | 1739 | |
| yihui | 5:b8c02645e6af | 1740 | @endverbatim |
| yihui | 5:b8c02645e6af | 1741 | * @{ |
| yihui | 5:b8c02645e6af | 1742 | */ |
| yihui | 5:b8c02645e6af | 1743 | |
| yihui | 5:b8c02645e6af | 1744 | /** |
| yihui | 5:b8c02645e6af | 1745 | * @brief Enables or disables the specified ADC DMA request. |
| yihui | 5:b8c02645e6af | 1746 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 1747 | * @param NewState: new state of the selected ADC DMA transfer. |
| yihui | 5:b8c02645e6af | 1748 | * This parameter can be: ENABLE or DISABLE. |
| yihui | 5:b8c02645e6af | 1749 | * @retval None |
| yihui | 5:b8c02645e6af | 1750 | */ |
| yihui | 5:b8c02645e6af | 1751 | void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState) |
| yihui | 5:b8c02645e6af | 1752 | { |
| yihui | 5:b8c02645e6af | 1753 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 1754 | assert_param(IS_ADC_DMA_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 1755 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
| yihui | 5:b8c02645e6af | 1756 | if (NewState != DISABLE) |
| yihui | 5:b8c02645e6af | 1757 | { |
| yihui | 5:b8c02645e6af | 1758 | /* Enable the selected ADC DMA request */ |
| yihui | 5:b8c02645e6af | 1759 | ADCx->CFGR |= ADC_CFGR_DMAEN; |
| yihui | 5:b8c02645e6af | 1760 | } |
| yihui | 5:b8c02645e6af | 1761 | else |
| yihui | 5:b8c02645e6af | 1762 | { |
| yihui | 5:b8c02645e6af | 1763 | /* Disable the selected ADC DMA request */ |
| yihui | 5:b8c02645e6af | 1764 | ADCx->CFGR &= ~(uint32_t)ADC_CFGR_DMAEN; |
| yihui | 5:b8c02645e6af | 1765 | } |
| yihui | 5:b8c02645e6af | 1766 | } |
| yihui | 5:b8c02645e6af | 1767 | |
| yihui | 5:b8c02645e6af | 1768 | /** |
| yihui | 5:b8c02645e6af | 1769 | * @brief Configure ADC DMA mode. |
| yihui | 5:b8c02645e6af | 1770 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 1771 | * @param ADC_DMAMode: select the ADC DMA mode. |
| yihui | 5:b8c02645e6af | 1772 | * This parameter can be one of the following values: |
| yihui | 5:b8c02645e6af | 1773 | * @arg ADC_DMAMode_OneShot: ADC DMA Oneshot mode |
| yihui | 5:b8c02645e6af | 1774 | * @arg ADC_DMAMode_Circular: ADC DMA circular mode |
| yihui | 5:b8c02645e6af | 1775 | * @retval None |
| yihui | 5:b8c02645e6af | 1776 | */ |
| yihui | 5:b8c02645e6af | 1777 | void ADC_DMAConfig(ADC_TypeDef* ADCx, uint32_t ADC_DMAMode) |
| yihui | 5:b8c02645e6af | 1778 | { |
| yihui | 5:b8c02645e6af | 1779 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 1780 | assert_param(IS_ADC_DMA_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 1781 | assert_param(IS_ADC_DMA_MODE(ADC_DMAMode)); |
| yihui | 5:b8c02645e6af | 1782 | |
| yihui | 5:b8c02645e6af | 1783 | /* Set or reset the DMACFG bit */ |
| yihui | 5:b8c02645e6af | 1784 | ADCx->CFGR &= ~(uint32_t)ADC_CFGR_DMACFG; |
| yihui | 5:b8c02645e6af | 1785 | ADCx->CFGR |= ADC_DMAMode; |
| yihui | 5:b8c02645e6af | 1786 | } |
| yihui | 5:b8c02645e6af | 1787 | |
| yihui | 5:b8c02645e6af | 1788 | /** |
| yihui | 5:b8c02645e6af | 1789 | * @} |
| yihui | 5:b8c02645e6af | 1790 | */ |
| yihui | 5:b8c02645e6af | 1791 | |
| yihui | 5:b8c02645e6af | 1792 | /** @defgroup ADC_Group6 Injected channels Configuration functions |
| yihui | 5:b8c02645e6af | 1793 | * @brief Injected channels Configuration functions |
| yihui | 5:b8c02645e6af | 1794 | * |
| yihui | 5:b8c02645e6af | 1795 | @verbatim |
| yihui | 5:b8c02645e6af | 1796 | =============================================================================== |
| yihui | 5:b8c02645e6af | 1797 | ##### Injected channels Configuration functions ##### |
| yihui | 5:b8c02645e6af | 1798 | =============================================================================== |
| yihui | 5:b8c02645e6af | 1799 | |
| yihui | 5:b8c02645e6af | 1800 | [..] This section provide functions allowing to manage the ADC Injected channels, |
| yihui | 5:b8c02645e6af | 1801 | it is composed of : |
| yihui | 5:b8c02645e6af | 1802 | |
| yihui | 5:b8c02645e6af | 1803 | (#) Configuration functions for Injected channels sample time |
| yihui | 5:b8c02645e6af | 1804 | (#) Functions to start and stop the injected conversion |
| yihui | 5:b8c02645e6af | 1805 | (#) unction to select the discontinuous mode |
| yihui | 5:b8c02645e6af | 1806 | (#) Function to get the Specified Injected channel conversion data: This subsection |
| yihui | 5:b8c02645e6af | 1807 | provides an important function in the ADC peripheral since it returns the |
| yihui | 5:b8c02645e6af | 1808 | converted data of the specific injected channel. |
| yihui | 5:b8c02645e6af | 1809 | |
| yihui | 5:b8c02645e6af | 1810 | @endverbatim |
| yihui | 5:b8c02645e6af | 1811 | * @{ |
| yihui | 5:b8c02645e6af | 1812 | */ |
| yihui | 5:b8c02645e6af | 1813 | |
| yihui | 5:b8c02645e6af | 1814 | /** |
| yihui | 5:b8c02645e6af | 1815 | * @brief Configures for the selected ADC injected channel its corresponding |
| yihui | 5:b8c02645e6af | 1816 | * sample time. |
| yihui | 5:b8c02645e6af | 1817 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 1818 | * @param ADC_Channel: the ADC channel to configure. |
| yihui | 5:b8c02645e6af | 1819 | * This parameter can be one of the following values: |
| yihui | 5:b8c02645e6af | 1820 | * @arg ADC_InjectedChannel_1: ADC Channel1 selected |
| yihui | 5:b8c02645e6af | 1821 | * @arg ADC_InjectedChannel_2: ADC Channel2 selected |
| yihui | 5:b8c02645e6af | 1822 | * @arg ADC_InjectedChannel_3: ADC Channel3 selected |
| yihui | 5:b8c02645e6af | 1823 | * @arg ADC_InjectedChannel_4: ADC Channel4 selected |
| yihui | 5:b8c02645e6af | 1824 | * @arg ADC_InjectedChannel_5: ADC Channel5 selected |
| yihui | 5:b8c02645e6af | 1825 | * @arg ADC_InjectedChannel_6: ADC Channel6 selected |
| yihui | 5:b8c02645e6af | 1826 | * @arg ADC_InjectedChannel_7: ADC Channel7 selected |
| yihui | 5:b8c02645e6af | 1827 | * @arg ADC_InjectedChannel_8: ADC Channel8 selected |
| yihui | 5:b8c02645e6af | 1828 | * @arg ADC_InjectedChannel_9: ADC Channel9 selected |
| yihui | 5:b8c02645e6af | 1829 | * @arg ADC_InjectedChannel_10: ADC Channel10 selected |
| yihui | 5:b8c02645e6af | 1830 | * @arg ADC_InjectedChannel_11: ADC Channel11 selected |
| yihui | 5:b8c02645e6af | 1831 | * @arg ADC_InjectedChannel_12: ADC Channel12 selected |
| yihui | 5:b8c02645e6af | 1832 | * @arg ADC_InjectedChannel_13: ADC Channel13 selected |
| yihui | 5:b8c02645e6af | 1833 | * @arg ADC_InjectedChannel_14: ADC Channel14 selected |
| yihui | 5:b8c02645e6af | 1834 | * @arg ADC_InjectedChannel_15: ADC Channel15 selected |
| yihui | 5:b8c02645e6af | 1835 | * @arg ADC_InjectedChannel_16: ADC Channel16 selected |
| yihui | 5:b8c02645e6af | 1836 | * @arg ADC_InjectedChannel_17: ADC Channel17 selected |
| yihui | 5:b8c02645e6af | 1837 | * @arg ADC_InjectedChannel_18: ADC Channel18 selected |
| yihui | 5:b8c02645e6af | 1838 | * @param ADC_SampleTime: The sample time value to be set for the selected channel. |
| yihui | 5:b8c02645e6af | 1839 | * This parameter can be one of the following values: |
| yihui | 5:b8c02645e6af | 1840 | * @arg ADC_SampleTime_1Cycles5: Sample time equal to 1.5 cycles |
| yihui | 5:b8c02645e6af | 1841 | * @arg ADC_SampleTime_2Cycles5: Sample time equal to 2.5 cycles |
| yihui | 5:b8c02645e6af | 1842 | * @arg ADC_SampleTime_4Cycles5: Sample time equal to 4.5 cycles |
| yihui | 5:b8c02645e6af | 1843 | * @arg ADC_SampleTime_7Cycles5: Sample time equal to 7.5 cycles |
| yihui | 5:b8c02645e6af | 1844 | * @arg ADC_SampleTime_19Cycles5: Sample time equal to 19.5 cycles |
| yihui | 5:b8c02645e6af | 1845 | * @arg ADC_SampleTime_61Cycles5: Sample time equal to 61.5 cycles |
| yihui | 5:b8c02645e6af | 1846 | * @arg ADC_SampleTime_181Cycles5: Sample time equal to 181.5 cycles |
| yihui | 5:b8c02645e6af | 1847 | * @arg ADC_SampleTime_601Cycles5: Sample time equal to 601.5 cycles |
| yihui | 5:b8c02645e6af | 1848 | * @retval None |
| yihui | 5:b8c02645e6af | 1849 | */ |
| yihui | 5:b8c02645e6af | 1850 | void ADC_InjectedChannelSampleTimeConfig(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel, uint8_t ADC_SampleTime) |
| yihui | 5:b8c02645e6af | 1851 | { |
| yihui | 5:b8c02645e6af | 1852 | uint32_t tmpreg1 = 0; |
| yihui | 5:b8c02645e6af | 1853 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 1854 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 1855 | assert_param(IS_ADC_INJECTED_CHANNEL(ADC_InjectedChannel)); |
| yihui | 5:b8c02645e6af | 1856 | assert_param(IS_ADC_SAMPLE_TIME(ADC_SampleTime)); |
| yihui | 5:b8c02645e6af | 1857 | |
| yihui | 5:b8c02645e6af | 1858 | /* Channel sampling configuration */ |
| yihui | 5:b8c02645e6af | 1859 | /* if ADC_InjectedChannel_10 ... ADC_InjectedChannel_18 is selected */ |
| yihui | 5:b8c02645e6af | 1860 | if (ADC_InjectedChannel > ADC_InjectedChannel_9) |
| yihui | 5:b8c02645e6af | 1861 | { |
| yihui | 5:b8c02645e6af | 1862 | /* Calculate the mask to clear */ |
| yihui | 5:b8c02645e6af | 1863 | tmpreg1 = ADC_SMPR2_SMP10 << (3 * (ADC_InjectedChannel - 10)); |
| yihui | 5:b8c02645e6af | 1864 | /* Clear the old channel sample time */ |
| yihui | 5:b8c02645e6af | 1865 | ADCx->SMPR2 &= ~tmpreg1; |
| yihui | 5:b8c02645e6af | 1866 | /* Calculate the mask to set */ |
| yihui | 5:b8c02645e6af | 1867 | ADCx->SMPR2 |= (uint32_t)ADC_SampleTime << (3 * (ADC_InjectedChannel - 10)); |
| yihui | 5:b8c02645e6af | 1868 | |
| yihui | 5:b8c02645e6af | 1869 | } |
| yihui | 5:b8c02645e6af | 1870 | else /* ADC_InjectedChannel include in ADC_InjectedChannel_[0..9] */ |
| yihui | 5:b8c02645e6af | 1871 | { |
| yihui | 5:b8c02645e6af | 1872 | /* Calculate the mask to clear */ |
| yihui | 5:b8c02645e6af | 1873 | tmpreg1 = ADC_SMPR1_SMP1 << (3 * (ADC_InjectedChannel - 1)); |
| yihui | 5:b8c02645e6af | 1874 | /* Clear the old channel sample time */ |
| yihui | 5:b8c02645e6af | 1875 | ADCx->SMPR1 &= ~tmpreg1; |
| yihui | 5:b8c02645e6af | 1876 | /* Calculate the mask to set */ |
| yihui | 5:b8c02645e6af | 1877 | ADCx->SMPR1 |= (uint32_t)ADC_SampleTime << (3 * (ADC_InjectedChannel)); |
| yihui | 5:b8c02645e6af | 1878 | } |
| yihui | 5:b8c02645e6af | 1879 | } |
| yihui | 5:b8c02645e6af | 1880 | |
| yihui | 5:b8c02645e6af | 1881 | /** |
| yihui | 5:b8c02645e6af | 1882 | * @brief Enables or disables the selected ADC start of the injected |
| yihui | 5:b8c02645e6af | 1883 | * channels conversion. |
| yihui | 5:b8c02645e6af | 1884 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 1885 | * @param NewState: new state of the selected ADC software start injected conversion. |
| yihui | 5:b8c02645e6af | 1886 | * This parameter can be: ENABLE or DISABLE. |
| yihui | 5:b8c02645e6af | 1887 | * @retval None |
| yihui | 5:b8c02645e6af | 1888 | */ |
| yihui | 5:b8c02645e6af | 1889 | void ADC_StartInjectedConversion(ADC_TypeDef* ADCx) |
| yihui | 5:b8c02645e6af | 1890 | { |
| yihui | 5:b8c02645e6af | 1891 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 1892 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 1893 | |
| yihui | 5:b8c02645e6af | 1894 | /* Enable the selected ADC conversion for injected group on external event and start the selected |
| yihui | 5:b8c02645e6af | 1895 | ADC injected conversion */ |
| yihui | 5:b8c02645e6af | 1896 | ADCx->CR |= ADC_CR_JADSTART; |
| yihui | 5:b8c02645e6af | 1897 | } |
| yihui | 5:b8c02645e6af | 1898 | |
| yihui | 5:b8c02645e6af | 1899 | /** |
| yihui | 5:b8c02645e6af | 1900 | * @brief Stops the selected ADC ongoing injected conversion. |
| yihui | 5:b8c02645e6af | 1901 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 1902 | * @retval None |
| yihui | 5:b8c02645e6af | 1903 | */ |
| yihui | 5:b8c02645e6af | 1904 | void ADC_StopInjectedConversion(ADC_TypeDef* ADCx) |
| yihui | 5:b8c02645e6af | 1905 | { |
| yihui | 5:b8c02645e6af | 1906 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 1907 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 1908 | |
| yihui | 5:b8c02645e6af | 1909 | /* Set the JADSTP bit */ |
| yihui | 5:b8c02645e6af | 1910 | ADCx->CR |= ADC_CR_JADSTP; |
| yihui | 5:b8c02645e6af | 1911 | } |
| yihui | 5:b8c02645e6af | 1912 | |
| yihui | 5:b8c02645e6af | 1913 | /** |
| yihui | 5:b8c02645e6af | 1914 | * @brief Gets the selected ADC Software start injected conversion Status. |
| yihui | 5:b8c02645e6af | 1915 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 1916 | * @retval The new state of ADC start injected conversion (SET or RESET). |
| yihui | 5:b8c02645e6af | 1917 | */ |
| yihui | 5:b8c02645e6af | 1918 | FlagStatus ADC_GetStartInjectedConversionStatus(ADC_TypeDef* ADCx) |
| yihui | 5:b8c02645e6af | 1919 | { |
| yihui | 5:b8c02645e6af | 1920 | FlagStatus bitstatus = RESET; |
| yihui | 5:b8c02645e6af | 1921 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 1922 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 1923 | |
| yihui | 5:b8c02645e6af | 1924 | /* Check the status of JADSTART bit */ |
| yihui | 5:b8c02645e6af | 1925 | if ((ADCx->CR & ADC_CR_JADSTART) != (uint32_t)RESET) |
| yihui | 5:b8c02645e6af | 1926 | { |
| yihui | 5:b8c02645e6af | 1927 | /* JADSTART bit is set */ |
| yihui | 5:b8c02645e6af | 1928 | bitstatus = SET; |
| yihui | 5:b8c02645e6af | 1929 | } |
| yihui | 5:b8c02645e6af | 1930 | else |
| yihui | 5:b8c02645e6af | 1931 | { |
| yihui | 5:b8c02645e6af | 1932 | /* JADSTART bit is reset */ |
| yihui | 5:b8c02645e6af | 1933 | bitstatus = RESET; |
| yihui | 5:b8c02645e6af | 1934 | } |
| yihui | 5:b8c02645e6af | 1935 | /* Return the JADSTART bit status */ |
| yihui | 5:b8c02645e6af | 1936 | return bitstatus; |
| yihui | 5:b8c02645e6af | 1937 | } |
| yihui | 5:b8c02645e6af | 1938 | |
| yihui | 5:b8c02645e6af | 1939 | /** |
| yihui | 5:b8c02645e6af | 1940 | * @brief Enables or disables the selected ADC automatic injected group |
| yihui | 5:b8c02645e6af | 1941 | * conversion after regular one. |
| yihui | 5:b8c02645e6af | 1942 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 1943 | * @param NewState: new state of the selected ADC auto injected conversion |
| yihui | 5:b8c02645e6af | 1944 | * This parameter can be: ENABLE or DISABLE. |
| yihui | 5:b8c02645e6af | 1945 | * @retval None |
| yihui | 5:b8c02645e6af | 1946 | */ |
| yihui | 5:b8c02645e6af | 1947 | void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState) |
| yihui | 5:b8c02645e6af | 1948 | { |
| yihui | 5:b8c02645e6af | 1949 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 1950 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 1951 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
| yihui | 5:b8c02645e6af | 1952 | if (NewState != DISABLE) |
| yihui | 5:b8c02645e6af | 1953 | { |
| yihui | 5:b8c02645e6af | 1954 | /* Enable the selected ADC automatic injected group conversion */ |
| yihui | 5:b8c02645e6af | 1955 | ADCx->CFGR |= ADC_CFGR_JAUTO; |
| yihui | 5:b8c02645e6af | 1956 | } |
| yihui | 5:b8c02645e6af | 1957 | else |
| yihui | 5:b8c02645e6af | 1958 | { |
| yihui | 5:b8c02645e6af | 1959 | /* Disable the selected ADC automatic injected group conversion */ |
| yihui | 5:b8c02645e6af | 1960 | ADCx->CFGR &= ~ADC_CFGR_JAUTO; |
| yihui | 5:b8c02645e6af | 1961 | } |
| yihui | 5:b8c02645e6af | 1962 | } |
| yihui | 5:b8c02645e6af | 1963 | |
| yihui | 5:b8c02645e6af | 1964 | /** |
| yihui | 5:b8c02645e6af | 1965 | * @brief Enables or disables the discontinuous mode for injected group |
| yihui | 5:b8c02645e6af | 1966 | * channel for the specified ADC |
| yihui | 5:b8c02645e6af | 1967 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 1968 | * @param NewState: new state of the selected ADC discontinuous mode |
| yihui | 5:b8c02645e6af | 1969 | * on injected group channel. |
| yihui | 5:b8c02645e6af | 1970 | * This parameter can be: ENABLE or DISABLE. |
| yihui | 5:b8c02645e6af | 1971 | * @retval None |
| yihui | 5:b8c02645e6af | 1972 | */ |
| yihui | 5:b8c02645e6af | 1973 | void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState) |
| yihui | 5:b8c02645e6af | 1974 | { |
| yihui | 5:b8c02645e6af | 1975 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 1976 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 1977 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
| yihui | 5:b8c02645e6af | 1978 | if (NewState != DISABLE) |
| yihui | 5:b8c02645e6af | 1979 | { |
| yihui | 5:b8c02645e6af | 1980 | /* Enable the selected ADC injected discontinuous mode */ |
| yihui | 5:b8c02645e6af | 1981 | ADCx->CFGR |= ADC_CFGR_JDISCEN; |
| yihui | 5:b8c02645e6af | 1982 | } |
| yihui | 5:b8c02645e6af | 1983 | else |
| yihui | 5:b8c02645e6af | 1984 | { |
| yihui | 5:b8c02645e6af | 1985 | /* Disable the selected ADC injected discontinuous mode */ |
| yihui | 5:b8c02645e6af | 1986 | ADCx->CFGR &= ~ADC_CFGR_JDISCEN; |
| yihui | 5:b8c02645e6af | 1987 | } |
| yihui | 5:b8c02645e6af | 1988 | } |
| yihui | 5:b8c02645e6af | 1989 | |
| yihui | 5:b8c02645e6af | 1990 | /** |
| yihui | 5:b8c02645e6af | 1991 | * @brief Returns the ADC injected channel conversion result |
| yihui | 5:b8c02645e6af | 1992 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 1993 | * @param ADC_InjectedSequence: the converted ADC injected sequence. |
| yihui | 5:b8c02645e6af | 1994 | * This parameter can be one of the following values: |
| yihui | 5:b8c02645e6af | 1995 | * @arg ADC_InjectedSequence_1: Injected Sequence1 selected |
| yihui | 5:b8c02645e6af | 1996 | * @arg ADC_InjectedSequence_2: Injected Sequence2 selected |
| yihui | 5:b8c02645e6af | 1997 | * @arg ADC_InjectedSequence_3: Injected Sequence3 selected |
| yihui | 5:b8c02645e6af | 1998 | * @arg ADC_InjectedSequence_4: Injected Sequence4 selected |
| yihui | 5:b8c02645e6af | 1999 | * @retval The Data conversion value. |
| yihui | 5:b8c02645e6af | 2000 | */ |
| yihui | 5:b8c02645e6af | 2001 | uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint8_t ADC_InjectedSequence) |
| yihui | 5:b8c02645e6af | 2002 | { |
| yihui | 5:b8c02645e6af | 2003 | __IO uint32_t tmp = 0; |
| yihui | 5:b8c02645e6af | 2004 | |
| yihui | 5:b8c02645e6af | 2005 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 2006 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 2007 | assert_param(IS_ADC_INJECTED_SEQUENCE(ADC_InjectedSequence)); |
| yihui | 5:b8c02645e6af | 2008 | |
| yihui | 5:b8c02645e6af | 2009 | tmp = (uint32_t)ADCx; |
| yihui | 5:b8c02645e6af | 2010 | tmp += ((ADC_InjectedSequence - 1 )<< 2) + JDR_Offset; |
| yihui | 5:b8c02645e6af | 2011 | |
| yihui | 5:b8c02645e6af | 2012 | /* Returns the selected injected channel conversion data value */ |
| yihui | 5:b8c02645e6af | 2013 | return (uint16_t) (*(__IO uint32_t*) tmp); |
| yihui | 5:b8c02645e6af | 2014 | } |
| yihui | 5:b8c02645e6af | 2015 | |
| yihui | 5:b8c02645e6af | 2016 | /** |
| yihui | 5:b8c02645e6af | 2017 | * @} |
| yihui | 5:b8c02645e6af | 2018 | */ |
| yihui | 5:b8c02645e6af | 2019 | |
| yihui | 5:b8c02645e6af | 2020 | /** @defgroup ADC_Group7 Interrupts and flags management functions |
| yihui | 5:b8c02645e6af | 2021 | * @brief Interrupts and flags management functions |
| yihui | 5:b8c02645e6af | 2022 | * |
| yihui | 5:b8c02645e6af | 2023 | @verbatim |
| yihui | 5:b8c02645e6af | 2024 | =============================================================================== |
| yihui | 5:b8c02645e6af | 2025 | ##### Interrupts and flags management functions ##### |
| yihui | 5:b8c02645e6af | 2026 | =============================================================================== |
| yihui | 5:b8c02645e6af | 2027 | |
| yihui | 5:b8c02645e6af | 2028 | [..] This section provides functions allowing to configure the ADC Interrupts, get |
| yihui | 5:b8c02645e6af | 2029 | the status and clear flags and Interrupts pending bits. |
| yihui | 5:b8c02645e6af | 2030 | |
| yihui | 5:b8c02645e6af | 2031 | [..] The ADC provide 11 Interrupts sources and 11 Flags which can be divided into 3 groups: |
| yihui | 5:b8c02645e6af | 2032 | |
| yihui | 5:b8c02645e6af | 2033 | (#) Flags and Interrupts for ADC regular channels |
| yihui | 5:b8c02645e6af | 2034 | (##)Flags |
| yihui | 5:b8c02645e6af | 2035 | (+) ADC_FLAG_RDY: ADC Ready flag |
| yihui | 5:b8c02645e6af | 2036 | (+) ADC_FLAG_EOSMP: ADC End of Sampling flag |
| yihui | 5:b8c02645e6af | 2037 | (+) ADC_FLAG_EOC: ADC End of Regular Conversion flag. |
| yihui | 5:b8c02645e6af | 2038 | (+) ADC_FLAG_EOS: ADC End of Regular sequence of Conversions flag |
| yihui | 5:b8c02645e6af | 2039 | (+) ADC_FLAG_OVR: ADC overrun flag |
| yihui | 5:b8c02645e6af | 2040 | |
| yihui | 5:b8c02645e6af | 2041 | (##) Interrupts |
| yihui | 5:b8c02645e6af | 2042 | (+) ADC_IT_RDY: ADC Ready interrupt source |
| yihui | 5:b8c02645e6af | 2043 | (+) ADC_IT_EOSMP: ADC End of Sampling interrupt source |
| yihui | 5:b8c02645e6af | 2044 | (+) ADC_IT_EOC: ADC End of Regular Conversion interrupt source |
| yihui | 5:b8c02645e6af | 2045 | (+) ADC_IT_EOS: ADC End of Regular sequence of Conversions interrupt |
| yihui | 5:b8c02645e6af | 2046 | (+) ADC_IT_OVR: ADC overrun interrupt source |
| yihui | 5:b8c02645e6af | 2047 | |
| yihui | 5:b8c02645e6af | 2048 | |
| yihui | 5:b8c02645e6af | 2049 | (#) Flags and Interrupts for ADC regular channels |
| yihui | 5:b8c02645e6af | 2050 | (##)Flags |
| yihui | 5:b8c02645e6af | 2051 | (+) ADC_FLAG_JEOC: ADC Ready flag |
| yihui | 5:b8c02645e6af | 2052 | (+) ADC_FLAG_JEOS: ADC End of Sampling flag |
| yihui | 5:b8c02645e6af | 2053 | (+) ADC_FLAG_JQOVF: ADC End of Regular Conversion flag. |
| yihui | 5:b8c02645e6af | 2054 | |
| yihui | 5:b8c02645e6af | 2055 | (##) Interrupts |
| yihui | 5:b8c02645e6af | 2056 | (+) ADC_IT_JEOC: ADC End of Injected Conversion interrupt source |
| yihui | 5:b8c02645e6af | 2057 | (+) ADC_IT_JEOS: ADC End of Injected sequence of Conversions interrupt source |
| yihui | 5:b8c02645e6af | 2058 | (+) ADC_IT_JQOVF: ADC Injected Context Queue Overflow interrupt source |
| yihui | 5:b8c02645e6af | 2059 | |
| yihui | 5:b8c02645e6af | 2060 | (#) General Flags and Interrupts for the ADC |
| yihui | 5:b8c02645e6af | 2061 | (##)Flags |
| yihui | 5:b8c02645e6af | 2062 | (+) ADC_FLAG_AWD1: ADC Analog watchdog 1 flag |
| yihui | 5:b8c02645e6af | 2063 | (+) ADC_FLAG_AWD2: ADC Analog watchdog 2 flag |
| yihui | 5:b8c02645e6af | 2064 | (+) ADC_FLAG_AWD3: ADC Analog watchdog 3 flag |
| yihui | 5:b8c02645e6af | 2065 | |
| yihui | 5:b8c02645e6af | 2066 | (##)Flags |
| yihui | 5:b8c02645e6af | 2067 | (+) ADC_IT_AWD1: ADC Analog watchdog 1 interrupt source |
| yihui | 5:b8c02645e6af | 2068 | (+) ADC_IT_AWD2: ADC Analog watchdog 2 interrupt source |
| yihui | 5:b8c02645e6af | 2069 | (+) ADC_IT_AWD3: ADC Analog watchdog 3 interrupt source |
| yihui | 5:b8c02645e6af | 2070 | |
| yihui | 5:b8c02645e6af | 2071 | (#) Flags for ADC dual mode |
| yihui | 5:b8c02645e6af | 2072 | (##)Flags for Master |
| yihui | 5:b8c02645e6af | 2073 | (+) ADC_FLAG_MSTRDY: ADC master Ready (ADRDY) flag |
| yihui | 5:b8c02645e6af | 2074 | (+) ADC_FLAG_MSTEOSMP: ADC master End of Sampling flag |
| yihui | 5:b8c02645e6af | 2075 | (+) ADC_FLAG_MSTEOC: ADC master End of Regular Conversion flag |
| yihui | 5:b8c02645e6af | 2076 | (+) ADC_FLAG_MSTEOS: ADC master End of Regular sequence of Conversions flag |
| yihui | 5:b8c02645e6af | 2077 | (+) ADC_FLAG_MSTOVR: ADC master overrun flag |
| yihui | 5:b8c02645e6af | 2078 | (+) ADC_FLAG_MSTJEOC: ADC master End of Injected Conversion flag |
| yihui | 5:b8c02645e6af | 2079 | (+) ADC_FLAG_MSTJEOS: ADC master End of Injected sequence of Conversions flag |
| yihui | 5:b8c02645e6af | 2080 | (+) ADC_FLAG_MSTAWD1: ADC master Analog watchdog 1 flag |
| yihui | 5:b8c02645e6af | 2081 | (+) ADC_FLAG_MSTAWD2: ADC master Analog watchdog 2 flag |
| yihui | 5:b8c02645e6af | 2082 | (+) ADC_FLAG_MSTAWD3: ADC master Analog watchdog 3 flag |
| yihui | 5:b8c02645e6af | 2083 | (+) ADC_FLAG_MSTJQOVF: ADC master Injected Context Queue Overflow flag |
| yihui | 5:b8c02645e6af | 2084 | |
| yihui | 5:b8c02645e6af | 2085 | (##) Flags for Slave |
| yihui | 5:b8c02645e6af | 2086 | (+) ADC_FLAG_SLVRDY: ADC slave Ready (ADRDY) flag |
| yihui | 5:b8c02645e6af | 2087 | (+) ADC_FLAG_SLVEOSMP: ADC slave End of Sampling flag |
| yihui | 5:b8c02645e6af | 2088 | (+) ADC_FLAG_SLVEOC: ADC slave End of Regular Conversion flag |
| yihui | 5:b8c02645e6af | 2089 | (+) ADC_FLAG_SLVEOS: ADC slave End of Regular sequence of Conversions flag |
| yihui | 5:b8c02645e6af | 2090 | (+) ADC_FLAG_SLVOVR: ADC slave overrun flag |
| yihui | 5:b8c02645e6af | 2091 | (+) ADC_FLAG_SLVJEOC: ADC slave End of Injected Conversion flag |
| yihui | 5:b8c02645e6af | 2092 | (+) ADC_FLAG_SLVJEOS: ADC slave End of Injected sequence of Conversions flag |
| yihui | 5:b8c02645e6af | 2093 | (+) ADC_FLAG_SLVAWD1: ADC slave Analog watchdog 1 flag |
| yihui | 5:b8c02645e6af | 2094 | (+) ADC_FLAG_SLVAWD2: ADC slave Analog watchdog 2 flag |
| yihui | 5:b8c02645e6af | 2095 | (+) ADC_FLAG_SLVAWD3: ADC slave Analog watchdog 3 flag |
| yihui | 5:b8c02645e6af | 2096 | (+) ADC_FLAG_SLVJQOVF: ADC slave Injected Context Queue Overflow flag |
| yihui | 5:b8c02645e6af | 2097 | |
| yihui | 5:b8c02645e6af | 2098 | The user should identify which mode will be used in his application to manage |
| yihui | 5:b8c02645e6af | 2099 | the ADC controller events: Polling mode or Interrupt mode. |
| yihui | 5:b8c02645e6af | 2100 | |
| yihui | 5:b8c02645e6af | 2101 | In the Polling Mode it is advised to use the following functions: |
| yihui | 5:b8c02645e6af | 2102 | - ADC_GetFlagStatus() : to check if flags events occur. |
| yihui | 5:b8c02645e6af | 2103 | - ADC_ClearFlag() : to clear the flags events. |
| yihui | 5:b8c02645e6af | 2104 | |
| yihui | 5:b8c02645e6af | 2105 | In the Interrupt Mode it is advised to use the following functions: |
| yihui | 5:b8c02645e6af | 2106 | - ADC_ITConfig() : to enable or disable the interrupt source. |
| yihui | 5:b8c02645e6af | 2107 | - ADC_GetITStatus() : to check if Interrupt occurs. |
| yihui | 5:b8c02645e6af | 2108 | - ADC_ClearITPendingBit() : to clear the Interrupt pending Bit |
| yihui | 5:b8c02645e6af | 2109 | (corresponding Flag). |
| yihui | 5:b8c02645e6af | 2110 | @endverbatim |
| yihui | 5:b8c02645e6af | 2111 | * @{ |
| yihui | 5:b8c02645e6af | 2112 | */ |
| yihui | 5:b8c02645e6af | 2113 | |
| yihui | 5:b8c02645e6af | 2114 | /** |
| yihui | 5:b8c02645e6af | 2115 | * @brief Enables or disables the specified ADC interrupts. |
| yihui | 5:b8c02645e6af | 2116 | * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 2117 | * @param ADC_IT: specifies the ADC interrupt sources to be enabled or disabled. |
| yihui | 5:b8c02645e6af | 2118 | * This parameter can be any combination of the following values: |
| yihui | 5:b8c02645e6af | 2119 | * @arg ADC_IT_RDY: ADC Ready (ADRDY) interrupt source |
| yihui | 5:b8c02645e6af | 2120 | * @arg ADC_IT_EOSMP: ADC End of Sampling interrupt source |
| yihui | 5:b8c02645e6af | 2121 | * @arg ADC_IT_EOC: ADC End of Regular Conversion interrupt source |
| yihui | 5:b8c02645e6af | 2122 | * @arg ADC_IT_EOS: ADC End of Regular sequence of Conversions interrupt source |
| yihui | 5:b8c02645e6af | 2123 | * @arg ADC_IT_OVR: ADC overrun interrupt source |
| yihui | 5:b8c02645e6af | 2124 | * @arg ADC_IT_JEOC: ADC End of Injected Conversion interrupt source |
| yihui | 5:b8c02645e6af | 2125 | * @arg ADC_IT_JEOS: ADC End of Injected sequence of Conversions interrupt source |
| yihui | 5:b8c02645e6af | 2126 | * @arg ADC_IT_AWD1: ADC Analog watchdog 1 interrupt source |
| yihui | 5:b8c02645e6af | 2127 | * @arg ADC_IT_AWD2: ADC Analog watchdog 2 interrupt source |
| yihui | 5:b8c02645e6af | 2128 | * @arg ADC_IT_AWD3: ADC Analog watchdog 3 interrupt source |
| yihui | 5:b8c02645e6af | 2129 | * @arg ADC_IT_JQOVF: ADC Injected Context Queue Overflow interrupt source |
| yihui | 5:b8c02645e6af | 2130 | * @param NewState: new state of the specified ADC interrupts. |
| yihui | 5:b8c02645e6af | 2131 | * This parameter can be: ENABLE or DISABLE. |
| yihui | 5:b8c02645e6af | 2132 | * @retval None |
| yihui | 5:b8c02645e6af | 2133 | */ |
| yihui | 5:b8c02645e6af | 2134 | void ADC_ITConfig(ADC_TypeDef* ADCx, uint32_t ADC_IT, FunctionalState NewState) |
| yihui | 5:b8c02645e6af | 2135 | { |
| yihui | 5:b8c02645e6af | 2136 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 2137 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 2138 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
| yihui | 5:b8c02645e6af | 2139 | assert_param(IS_ADC_IT(ADC_IT)); |
| yihui | 5:b8c02645e6af | 2140 | |
| yihui | 5:b8c02645e6af | 2141 | if (NewState != DISABLE) |
| yihui | 5:b8c02645e6af | 2142 | { |
| yihui | 5:b8c02645e6af | 2143 | /* Enable the selected ADC interrupts */ |
| yihui | 5:b8c02645e6af | 2144 | ADCx->IER |= ADC_IT; |
| yihui | 5:b8c02645e6af | 2145 | } |
| yihui | 5:b8c02645e6af | 2146 | else |
| yihui | 5:b8c02645e6af | 2147 | { |
| yihui | 5:b8c02645e6af | 2148 | /* Disable the selected ADC interrupts */ |
| yihui | 5:b8c02645e6af | 2149 | ADCx->IER &= (~(uint32_t)ADC_IT); |
| yihui | 5:b8c02645e6af | 2150 | } |
| yihui | 5:b8c02645e6af | 2151 | } |
| yihui | 5:b8c02645e6af | 2152 | |
| yihui | 5:b8c02645e6af | 2153 | /** |
| yihui | 5:b8c02645e6af | 2154 | * @brief Checks whether the specified ADC flag is set or not. |
| yihui | 5:b8c02645e6af | 2155 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 2156 | * @param ADC_FLAG: specifies the flag to check. |
| yihui | 5:b8c02645e6af | 2157 | * This parameter can be one of the following values: |
| yihui | 5:b8c02645e6af | 2158 | * @arg ADC_FLAG_RDY: ADC Ready (ADRDY) flag |
| yihui | 5:b8c02645e6af | 2159 | * @arg ADC_FLAG_EOSMP: ADC End of Sampling flag |
| yihui | 5:b8c02645e6af | 2160 | * @arg ADC_FLAG_EOC: ADC End of Regular Conversion flag |
| yihui | 5:b8c02645e6af | 2161 | * @arg ADC_FLAG_EOS: ADC End of Regular sequence of Conversions flag |
| yihui | 5:b8c02645e6af | 2162 | * @arg ADC_FLAG_OVR: ADC overrun flag |
| yihui | 5:b8c02645e6af | 2163 | * @arg ADC_FLAG_JEOC: ADC End of Injected Conversion flag |
| yihui | 5:b8c02645e6af | 2164 | * @arg ADC_FLAG_JEOS: ADC End of Injected sequence of Conversions flag |
| yihui | 5:b8c02645e6af | 2165 | * @arg ADC_FLAG_AWD1: ADC Analog watchdog 1 flag |
| yihui | 5:b8c02645e6af | 2166 | * @arg ADC_FLAG_AWD2: ADC Analog watchdog 2 flag |
| yihui | 5:b8c02645e6af | 2167 | * @arg ADC_FLAG_AWD3: ADC Analog watchdog 3 flag |
| yihui | 5:b8c02645e6af | 2168 | * @arg ADC_FLAG_JQOVF: ADC Injected Context Queue Overflow flag |
| yihui | 5:b8c02645e6af | 2169 | * @retval The new state of ADC_FLAG (SET or RESET). |
| yihui | 5:b8c02645e6af | 2170 | */ |
| yihui | 5:b8c02645e6af | 2171 | FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint32_t ADC_FLAG) |
| yihui | 5:b8c02645e6af | 2172 | { |
| yihui | 5:b8c02645e6af | 2173 | FlagStatus bitstatus = RESET; |
| yihui | 5:b8c02645e6af | 2174 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 2175 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 2176 | assert_param(IS_ADC_GET_FLAG(ADC_FLAG)); |
| yihui | 5:b8c02645e6af | 2177 | |
| yihui | 5:b8c02645e6af | 2178 | /* Check the status of the specified ADC flag */ |
| yihui | 5:b8c02645e6af | 2179 | if ((ADCx->ISR & ADC_FLAG) != (uint32_t)RESET) |
| yihui | 5:b8c02645e6af | 2180 | { |
| yihui | 5:b8c02645e6af | 2181 | /* ADC_FLAG is set */ |
| yihui | 5:b8c02645e6af | 2182 | bitstatus = SET; |
| yihui | 5:b8c02645e6af | 2183 | } |
| yihui | 5:b8c02645e6af | 2184 | else |
| yihui | 5:b8c02645e6af | 2185 | { |
| yihui | 5:b8c02645e6af | 2186 | /* ADC_FLAG is reset */ |
| yihui | 5:b8c02645e6af | 2187 | bitstatus = RESET; |
| yihui | 5:b8c02645e6af | 2188 | } |
| yihui | 5:b8c02645e6af | 2189 | /* Return the ADC_FLAG status */ |
| yihui | 5:b8c02645e6af | 2190 | return bitstatus; |
| yihui | 5:b8c02645e6af | 2191 | } |
| yihui | 5:b8c02645e6af | 2192 | |
| yihui | 5:b8c02645e6af | 2193 | /** |
| yihui | 5:b8c02645e6af | 2194 | * @brief Clears the ADCx's pending flags. |
| yihui | 5:b8c02645e6af | 2195 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 2196 | * @param ADC_FLAG: specifies the flag to clear. |
| yihui | 5:b8c02645e6af | 2197 | * This parameter can be any combination of the following values: |
| yihui | 5:b8c02645e6af | 2198 | * @arg ADC_FLAG_RDY: ADC Ready (ADRDY) flag |
| yihui | 5:b8c02645e6af | 2199 | * @arg ADC_FLAG_EOSMP: ADC End of Sampling flag |
| yihui | 5:b8c02645e6af | 2200 | * @arg ADC_FLAG_EOC: ADC End of Regular Conversion flag |
| yihui | 5:b8c02645e6af | 2201 | * @arg ADC_FLAG_EOS: ADC End of Regular sequence of Conversions flag |
| yihui | 5:b8c02645e6af | 2202 | * @arg ADC_FLAG_OVR: ADC overrun flag |
| yihui | 5:b8c02645e6af | 2203 | * @arg ADC_FLAG_JEOC: ADC End of Injected Conversion flag |
| yihui | 5:b8c02645e6af | 2204 | * @arg ADC_FLAG_JEOS: ADC End of Injected sequence of Conversions flag |
| yihui | 5:b8c02645e6af | 2205 | * @arg ADC_FLAG_AWD1: ADC Analog watchdog 1 flag |
| yihui | 5:b8c02645e6af | 2206 | * @arg ADC_FLAG_AWD2: ADC Analog watchdog 2 flag |
| yihui | 5:b8c02645e6af | 2207 | * @arg ADC_FLAG_AWD3: ADC Analog watchdog 3 flag |
| yihui | 5:b8c02645e6af | 2208 | * @arg ADC_FLAG_JQOVF: ADC Injected Context Queue Overflow flag |
| yihui | 5:b8c02645e6af | 2209 | * @retval None |
| yihui | 5:b8c02645e6af | 2210 | */ |
| yihui | 5:b8c02645e6af | 2211 | void ADC_ClearFlag(ADC_TypeDef* ADCx, uint32_t ADC_FLAG) |
| yihui | 5:b8c02645e6af | 2212 | { |
| yihui | 5:b8c02645e6af | 2213 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 2214 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 2215 | assert_param(IS_ADC_CLEAR_FLAG(ADC_FLAG)); |
| yihui | 5:b8c02645e6af | 2216 | /* Clear the selected ADC flags */ |
| yihui | 5:b8c02645e6af | 2217 | ADCx->ISR = (uint32_t)ADC_FLAG; |
| yihui | 5:b8c02645e6af | 2218 | } |
| yihui | 5:b8c02645e6af | 2219 | |
| yihui | 5:b8c02645e6af | 2220 | /** |
| yihui | 5:b8c02645e6af | 2221 | * @brief Checks whether the specified ADC flag is set or not. |
| yihui | 5:b8c02645e6af | 2222 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 2223 | * @param ADC_FLAG: specifies the master or slave flag to check. |
| yihui | 5:b8c02645e6af | 2224 | * This parameter can be one of the following values: |
| yihui | 5:b8c02645e6af | 2225 | * @arg ADC_FLAG_MSTRDY: ADC master Ready (ADRDY) flag |
| yihui | 5:b8c02645e6af | 2226 | * @arg ADC_FLAG_MSTEOSMP: ADC master End of Sampling flag |
| yihui | 5:b8c02645e6af | 2227 | * @arg ADC_FLAG_MSTEOC: ADC master End of Regular Conversion flag |
| yihui | 5:b8c02645e6af | 2228 | * @arg ADC_FLAG_MSTEOS: ADC master End of Regular sequence of Conversions flag |
| yihui | 5:b8c02645e6af | 2229 | * @arg ADC_FLAG_MSTOVR: ADC master overrun flag |
| yihui | 5:b8c02645e6af | 2230 | * @arg ADC_FLAG_MSTJEOC: ADC master End of Injected Conversion flag |
| yihui | 5:b8c02645e6af | 2231 | * @arg ADC_FLAG_MSTJEOS: ADC master End of Injected sequence of Conversions flag |
| yihui | 5:b8c02645e6af | 2232 | * @arg ADC_FLAG_MSTAWD1: ADC master Analog watchdog 1 flag |
| yihui | 5:b8c02645e6af | 2233 | * @arg ADC_FLAG_MSTAWD2: ADC master Analog watchdog 2 flag |
| yihui | 5:b8c02645e6af | 2234 | * @arg ADC_FLAG_MSTAWD3: ADC master Analog watchdog 3 flag |
| yihui | 5:b8c02645e6af | 2235 | * @arg ADC_FLAG_MSTJQOVF: ADC master Injected Context Queue Overflow flag |
| yihui | 5:b8c02645e6af | 2236 | * @arg ADC_FLAG_SLVRDY: ADC slave Ready (ADRDY) flag |
| yihui | 5:b8c02645e6af | 2237 | * @arg ADC_FLAG_SLVEOSMP: ADC slave End of Sampling flag |
| yihui | 5:b8c02645e6af | 2238 | * @arg ADC_FLAG_SLVEOC: ADC slave End of Regular Conversion flag |
| yihui | 5:b8c02645e6af | 2239 | * @arg ADC_FLAG_SLVEOS: ADC slave End of Regular sequence of Conversions flag |
| yihui | 5:b8c02645e6af | 2240 | * @arg ADC_FLAG_SLVOVR: ADC slave overrun flag |
| yihui | 5:b8c02645e6af | 2241 | * @arg ADC_FLAG_SLVJEOC: ADC slave End of Injected Conversion flag |
| yihui | 5:b8c02645e6af | 2242 | * @arg ADC_FLAG_SLVJEOS: ADC slave End of Injected sequence of Conversions flag |
| yihui | 5:b8c02645e6af | 2243 | * @arg ADC_FLAG_SLVAWD1: ADC slave Analog watchdog 1 flag |
| yihui | 5:b8c02645e6af | 2244 | * @arg ADC_FLAG_SLVAWD2: ADC slave Analog watchdog 2 flag |
| yihui | 5:b8c02645e6af | 2245 | * @arg ADC_FLAG_SLVAWD3: ADC slave Analog watchdog 3 flag |
| yihui | 5:b8c02645e6af | 2246 | * @arg ADC_FLAG_SLVJQOVF: ADC slave Injected Context Queue Overflow flag |
| yihui | 5:b8c02645e6af | 2247 | * @retval The new state of ADC_FLAG (SET or RESET). |
| yihui | 5:b8c02645e6af | 2248 | */ |
| yihui | 5:b8c02645e6af | 2249 | FlagStatus ADC_GetCommonFlagStatus(ADC_TypeDef* ADCx, uint32_t ADC_FLAG) |
| yihui | 5:b8c02645e6af | 2250 | { |
| yihui | 5:b8c02645e6af | 2251 | uint32_t tmpreg1 = 0; |
| yihui | 5:b8c02645e6af | 2252 | FlagStatus bitstatus = RESET; |
| yihui | 5:b8c02645e6af | 2253 | |
| yihui | 5:b8c02645e6af | 2254 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 2255 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 2256 | assert_param(IS_ADC_GET_COMMONFLAG(ADC_FLAG)); |
| yihui | 5:b8c02645e6af | 2257 | |
| yihui | 5:b8c02645e6af | 2258 | if((ADCx == ADC1) || (ADCx == ADC2)) |
| yihui | 5:b8c02645e6af | 2259 | { |
| yihui | 5:b8c02645e6af | 2260 | tmpreg1 = ADC1_2->CSR; |
| yihui | 5:b8c02645e6af | 2261 | } |
| yihui | 5:b8c02645e6af | 2262 | else |
| yihui | 5:b8c02645e6af | 2263 | { |
| yihui | 5:b8c02645e6af | 2264 | tmpreg1 = ADC3_4->CSR; |
| yihui | 5:b8c02645e6af | 2265 | } |
| yihui | 5:b8c02645e6af | 2266 | /* Check the status of the specified ADC flag */ |
| yihui | 5:b8c02645e6af | 2267 | if ((tmpreg1 & ADC_FLAG) != (uint32_t)RESET) |
| yihui | 5:b8c02645e6af | 2268 | { |
| yihui | 5:b8c02645e6af | 2269 | /* ADC_FLAG is set */ |
| yihui | 5:b8c02645e6af | 2270 | bitstatus = SET; |
| yihui | 5:b8c02645e6af | 2271 | } |
| yihui | 5:b8c02645e6af | 2272 | else |
| yihui | 5:b8c02645e6af | 2273 | { |
| yihui | 5:b8c02645e6af | 2274 | /* ADC_FLAG is reset */ |
| yihui | 5:b8c02645e6af | 2275 | bitstatus = RESET; |
| yihui | 5:b8c02645e6af | 2276 | } |
| yihui | 5:b8c02645e6af | 2277 | /* Return the ADC_FLAG status */ |
| yihui | 5:b8c02645e6af | 2278 | return bitstatus; |
| yihui | 5:b8c02645e6af | 2279 | } |
| yihui | 5:b8c02645e6af | 2280 | |
| yihui | 5:b8c02645e6af | 2281 | /** |
| yihui | 5:b8c02645e6af | 2282 | * @brief Clears the ADCx's pending flags. |
| yihui | 5:b8c02645e6af | 2283 | * @param ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 2284 | * @param ADC_FLAG: specifies the master or slave flag to clear. |
| yihui | 5:b8c02645e6af | 2285 | * This parameter can be one of the following values: |
| yihui | 5:b8c02645e6af | 2286 | * @arg ADC_FLAG_MSTRDY: ADC master Ready (ADRDY) flag |
| yihui | 5:b8c02645e6af | 2287 | * @arg ADC_FLAG_MSTEOSMP: ADC master End of Sampling flag |
| yihui | 5:b8c02645e6af | 2288 | * @arg ADC_FLAG_MSTEOC: ADC master End of Regular Conversion flag |
| yihui | 5:b8c02645e6af | 2289 | * @arg ADC_FLAG_MSTEOS: ADC master End of Regular sequence of Conversions flag |
| yihui | 5:b8c02645e6af | 2290 | * @arg ADC_FLAG_MSTOVR: ADC master overrun flag |
| yihui | 5:b8c02645e6af | 2291 | * @arg ADC_FLAG_MSTJEOC: ADC master End of Injected Conversion flag |
| yihui | 5:b8c02645e6af | 2292 | * @arg ADC_FLAG_MSTJEOS: ADC master End of Injected sequence of Conversions flag |
| yihui | 5:b8c02645e6af | 2293 | * @arg ADC_FLAG_MSTAWD1: ADC master Analog watchdog 1 flag |
| yihui | 5:b8c02645e6af | 2294 | * @arg ADC_FLAG_MSTAWD2: ADC master Analog watchdog 2 flag |
| yihui | 5:b8c02645e6af | 2295 | * @arg ADC_FLAG_MSTAWD3: ADC master Analog watchdog 3 flag |
| yihui | 5:b8c02645e6af | 2296 | * @arg ADC_FLAG_MSTJQOVF: ADC master Injected Context Queue Overflow flag |
| yihui | 5:b8c02645e6af | 2297 | * @arg ADC_FLAG_SLVRDY: ADC slave Ready (ADRDY) flag |
| yihui | 5:b8c02645e6af | 2298 | * @arg ADC_FLAG_SLVEOSMP: ADC slave End of Sampling flag |
| yihui | 5:b8c02645e6af | 2299 | * @arg ADC_FLAG_SLVEOC: ADC slave End of Regular Conversion flag |
| yihui | 5:b8c02645e6af | 2300 | * @arg ADC_FLAG_SLVEOS: ADC slave End of Regular sequence of Conversions flag |
| yihui | 5:b8c02645e6af | 2301 | * @arg ADC_FLAG_SLVOVR: ADC slave overrun flag |
| yihui | 5:b8c02645e6af | 2302 | * @arg ADC_FLAG_SLVJEOC: ADC slave End of Injected Conversion flag |
| yihui | 5:b8c02645e6af | 2303 | * @arg ADC_FLAG_SLVJEOS: ADC slave End of Injected sequence of Conversions flag |
| yihui | 5:b8c02645e6af | 2304 | * @arg ADC_FLAG_SLVAWD1: ADC slave Analog watchdog 1 flag |
| yihui | 5:b8c02645e6af | 2305 | * @arg ADC_FLAG_SLVAWD2: ADC slave Analog watchdog 2 flag |
| yihui | 5:b8c02645e6af | 2306 | * @arg ADC_FLAG_SLVAWD3: ADC slave Analog watchdog 3 flag |
| yihui | 5:b8c02645e6af | 2307 | * @arg ADC_FLAG_SLVJQOVF: ADC slave Injected Context Queue Overflow flag |
| yihui | 5:b8c02645e6af | 2308 | * @retval None |
| yihui | 5:b8c02645e6af | 2309 | */ |
| yihui | 5:b8c02645e6af | 2310 | void ADC_ClearCommonFlag(ADC_TypeDef* ADCx, uint32_t ADC_FLAG) |
| yihui | 5:b8c02645e6af | 2311 | { |
| yihui | 5:b8c02645e6af | 2312 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 2313 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 2314 | assert_param(IS_ADC_CLEAR_COMMONFLAG(ADC_FLAG)); |
| yihui | 5:b8c02645e6af | 2315 | |
| yihui | 5:b8c02645e6af | 2316 | if((ADCx == ADC1) || (ADCx == ADC2)) |
| yihui | 5:b8c02645e6af | 2317 | { |
| yihui | 5:b8c02645e6af | 2318 | /* Clear the selected ADC flags */ |
| yihui | 5:b8c02645e6af | 2319 | ADC1_2->CSR |= (uint32_t)ADC_FLAG; |
| yihui | 5:b8c02645e6af | 2320 | } |
| yihui | 5:b8c02645e6af | 2321 | else |
| yihui | 5:b8c02645e6af | 2322 | { |
| yihui | 5:b8c02645e6af | 2323 | /* Clear the selected ADC flags */ |
| yihui | 5:b8c02645e6af | 2324 | ADC3_4->CSR |= (uint32_t)ADC_FLAG; |
| yihui | 5:b8c02645e6af | 2325 | } |
| yihui | 5:b8c02645e6af | 2326 | } |
| yihui | 5:b8c02645e6af | 2327 | |
| yihui | 5:b8c02645e6af | 2328 | /** |
| yihui | 5:b8c02645e6af | 2329 | * @brief Checks whether the specified ADC interrupt has occurred or not. |
| yihui | 5:b8c02645e6af | 2330 | * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 2331 | * @param ADC_IT: specifies the ADC interrupt source to check. |
| yihui | 5:b8c02645e6af | 2332 | * This parameter can be one of the following values: |
| yihui | 5:b8c02645e6af | 2333 | * @arg ADC_IT_RDY: ADC Ready (ADRDY) interrupt source |
| yihui | 5:b8c02645e6af | 2334 | * @arg ADC_IT_EOSMP: ADC End of Sampling interrupt source |
| yihui | 5:b8c02645e6af | 2335 | * @arg ADC_IT_EOC: ADC End of Regular Conversion interrupt source |
| yihui | 5:b8c02645e6af | 2336 | * @arg ADC_IT_EOS: ADC End of Regular sequence of Conversions interrupt source |
| yihui | 5:b8c02645e6af | 2337 | * @arg ADC_IT_OVR: ADC overrun interrupt source |
| yihui | 5:b8c02645e6af | 2338 | * @arg ADC_IT_JEOC: ADC End of Injected Conversion interrupt source |
| yihui | 5:b8c02645e6af | 2339 | * @arg ADC_IT_JEOS: ADC End of Injected sequence of Conversions interrupt source |
| yihui | 5:b8c02645e6af | 2340 | * @arg ADC_IT_AWD1: ADC Analog watchdog 1 interrupt source |
| yihui | 5:b8c02645e6af | 2341 | * @arg ADC_IT_AWD2: ADC Analog watchdog 2 interrupt source |
| yihui | 5:b8c02645e6af | 2342 | * @arg ADC_IT_AWD3: ADC Analog watchdog 3 interrupt source |
| yihui | 5:b8c02645e6af | 2343 | * @arg ADC_IT_JQOVF: ADC Injected Context Queue Overflow interrupt source |
| yihui | 5:b8c02645e6af | 2344 | * @retval The new state of ADC_IT (SET or RESET). |
| yihui | 5:b8c02645e6af | 2345 | */ |
| yihui | 5:b8c02645e6af | 2346 | ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint32_t ADC_IT) |
| yihui | 5:b8c02645e6af | 2347 | { |
| yihui | 5:b8c02645e6af | 2348 | ITStatus bitstatus = RESET; |
| yihui | 5:b8c02645e6af | 2349 | uint16_t itstatus = 0x0, itenable = 0x0; |
| yihui | 5:b8c02645e6af | 2350 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 2351 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 2352 | assert_param(IS_ADC_GET_IT(ADC_IT)); |
| yihui | 5:b8c02645e6af | 2353 | |
| yihui | 5:b8c02645e6af | 2354 | itstatus = ADCx->ISR & ADC_IT; |
| yihui | 5:b8c02645e6af | 2355 | |
| yihui | 5:b8c02645e6af | 2356 | itenable = ADCx->IER & ADC_IT; |
| yihui | 5:b8c02645e6af | 2357 | if ((itstatus != (uint32_t)RESET) && (itenable != (uint32_t)RESET)) |
| yihui | 5:b8c02645e6af | 2358 | { |
| yihui | 5:b8c02645e6af | 2359 | bitstatus = SET; |
| yihui | 5:b8c02645e6af | 2360 | } |
| yihui | 5:b8c02645e6af | 2361 | else |
| yihui | 5:b8c02645e6af | 2362 | { |
| yihui | 5:b8c02645e6af | 2363 | bitstatus = RESET; |
| yihui | 5:b8c02645e6af | 2364 | } |
| yihui | 5:b8c02645e6af | 2365 | return bitstatus; |
| yihui | 5:b8c02645e6af | 2366 | } |
| yihui | 5:b8c02645e6af | 2367 | |
| yihui | 5:b8c02645e6af | 2368 | /** |
| yihui | 5:b8c02645e6af | 2369 | * @brief Clears the ADCx's interrupt pending bits. |
| yihui | 5:b8c02645e6af | 2370 | * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. |
| yihui | 5:b8c02645e6af | 2371 | * @param ADC_IT: specifies the ADC interrupt pending bit to clear. |
| yihui | 5:b8c02645e6af | 2372 | * This parameter can be any combination of the following values: |
| yihui | 5:b8c02645e6af | 2373 | * @arg ADC_IT_RDY: ADC Ready (ADRDY) interrupt source |
| yihui | 5:b8c02645e6af | 2374 | * @arg ADC_IT_EOSMP: ADC End of Sampling interrupt source |
| yihui | 5:b8c02645e6af | 2375 | * @arg ADC_IT_EOC: ADC End of Regular Conversion interrupt source |
| yihui | 5:b8c02645e6af | 2376 | * @arg ADC_IT_EOS: ADC End of Regular sequence of Conversions interrupt source |
| yihui | 5:b8c02645e6af | 2377 | * @arg ADC_IT_OVR: ADC overrun interrupt source |
| yihui | 5:b8c02645e6af | 2378 | * @arg ADC_IT_JEOC: ADC End of Injected Conversion interrupt source |
| yihui | 5:b8c02645e6af | 2379 | * @arg ADC_IT_JEOS: ADC End of Injected sequence of Conversions interrupt source |
| yihui | 5:b8c02645e6af | 2380 | * @arg ADC_IT_AWD1: ADC Analog watchdog 1 interrupt source |
| yihui | 5:b8c02645e6af | 2381 | * @arg ADC_IT_AWD2: ADC Analog watchdog 2 interrupt source |
| yihui | 5:b8c02645e6af | 2382 | * @arg ADC_IT_AWD3: ADC Analog watchdog 3 interrupt source |
| yihui | 5:b8c02645e6af | 2383 | * @arg ADC_IT_JQOVF: ADC Injected Context Queue Overflow interrupt source |
| yihui | 5:b8c02645e6af | 2384 | * @retval None |
| yihui | 5:b8c02645e6af | 2385 | */ |
| yihui | 5:b8c02645e6af | 2386 | void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint32_t ADC_IT) |
| yihui | 5:b8c02645e6af | 2387 | { |
| yihui | 5:b8c02645e6af | 2388 | /* Check the parameters */ |
| yihui | 5:b8c02645e6af | 2389 | assert_param(IS_ADC_ALL_PERIPH(ADCx)); |
| yihui | 5:b8c02645e6af | 2390 | assert_param(IS_ADC_IT(ADC_IT)); |
| yihui | 5:b8c02645e6af | 2391 | /* Clear the selected ADC interrupt pending bit */ |
| yihui | 5:b8c02645e6af | 2392 | ADCx->ISR = (uint32_t)ADC_IT; |
| yihui | 5:b8c02645e6af | 2393 | } |
| yihui | 5:b8c02645e6af | 2394 | |
| yihui | 5:b8c02645e6af | 2395 | /** |
| yihui | 5:b8c02645e6af | 2396 | * @} |
| yihui | 5:b8c02645e6af | 2397 | */ |
| yihui | 5:b8c02645e6af | 2398 | |
| yihui | 5:b8c02645e6af | 2399 | /** |
| yihui | 5:b8c02645e6af | 2400 | * @} |
| yihui | 5:b8c02645e6af | 2401 | */ |
| yihui | 5:b8c02645e6af | 2402 | |
| yihui | 5:b8c02645e6af | 2403 | /** |
| yihui | 5:b8c02645e6af | 2404 | * @} |
| yihui | 5:b8c02645e6af | 2405 | */ |
| yihui | 5:b8c02645e6af | 2406 | |
| yihui | 5:b8c02645e6af | 2407 | /** |
| yihui | 5:b8c02645e6af | 2408 | * @} |
| yihui | 5:b8c02645e6af | 2409 | */ |
| yihui | 5:b8c02645e6af | 2410 | |
| yihui | 5:b8c02645e6af | 2411 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
