Test code for Grove Node BLE

Dependencies:   BLE_API nRF51822

Fork of BLE_LoopbackUART by Bluetooth Low Energy

Committer:
yihui
Date:
Thu Nov 27 09:30:36 2014 +0000
Revision:
10:22480ac31879
Parent:
9:05f0b5a3a70a
change to new revision hardware

Who changed what in which revision?

UserRevisionLine numberNew contents of line
yihui 9:05f0b5a3a70a 1 /* mbed Microcontroller Library
yihui 9:05f0b5a3a70a 2 * Copyright (c) 2013 Nordic Semiconductor
yihui 9:05f0b5a3a70a 3 *
yihui 9:05f0b5a3a70a 4 * Licensed under the Apache License, Version 2.0 (the "License");
yihui 9:05f0b5a3a70a 5 * you may not use this file except in compliance with the License.
yihui 9:05f0b5a3a70a 6 * You may obtain a copy of the License at
yihui 9:05f0b5a3a70a 7 *
yihui 9:05f0b5a3a70a 8 * http://www.apache.org/licenses/LICENSE-2.0
yihui 9:05f0b5a3a70a 9 *
yihui 9:05f0b5a3a70a 10 * Unless required by applicable law or agreed to in writing, software
yihui 9:05f0b5a3a70a 11 * distributed under the License is distributed on an "AS IS" BASIS,
yihui 9:05f0b5a3a70a 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
yihui 9:05f0b5a3a70a 13 * See the License for the specific language governing permissions and
yihui 9:05f0b5a3a70a 14 * limitations under the License.
yihui 9:05f0b5a3a70a 15 */
yihui 9:05f0b5a3a70a 16 #include "port_api.h"
yihui 9:05f0b5a3a70a 17 #include "pinmap.h"
yihui 9:05f0b5a3a70a 18 #include "gpio_api.h"
yihui 9:05f0b5a3a70a 19
yihui 9:05f0b5a3a70a 20 PinName port_pin(PortName port, int pin_n)
yihui 9:05f0b5a3a70a 21 {
yihui 9:05f0b5a3a70a 22 return (PinName)(pin_n);
yihui 9:05f0b5a3a70a 23 }
yihui 9:05f0b5a3a70a 24
yihui 9:05f0b5a3a70a 25 void port_init(port_t *obj, PortName port, int mask, PinDirection dir)
yihui 9:05f0b5a3a70a 26 {
yihui 9:05f0b5a3a70a 27 obj->port = port;
yihui 9:05f0b5a3a70a 28 obj->mask = mask;
yihui 9:05f0b5a3a70a 29
yihui 9:05f0b5a3a70a 30 obj->reg_out = &NRF_GPIO->OUT;
yihui 9:05f0b5a3a70a 31 obj->reg_in = &NRF_GPIO->IN;
yihui 9:05f0b5a3a70a 32 obj->reg_cnf = NRF_GPIO->PIN_CNF;
yihui 9:05f0b5a3a70a 33
yihui 9:05f0b5a3a70a 34 port_dir(obj, dir);
yihui 9:05f0b5a3a70a 35 }
yihui 9:05f0b5a3a70a 36
yihui 9:05f0b5a3a70a 37 void port_mode(port_t *obj, PinMode mode)
yihui 9:05f0b5a3a70a 38 {
yihui 9:05f0b5a3a70a 39 uint32_t i;
yihui 9:05f0b5a3a70a 40 // The mode is set per pin: reuse pinmap logic
yihui 9:05f0b5a3a70a 41 for (i = 0; i<31; i++) {
yihui 9:05f0b5a3a70a 42 if (obj->mask & (1 << i)) {
yihui 9:05f0b5a3a70a 43 pin_mode(port_pin(obj->port, i), mode);
yihui 9:05f0b5a3a70a 44 }
yihui 9:05f0b5a3a70a 45 }
yihui 9:05f0b5a3a70a 46 }
yihui 9:05f0b5a3a70a 47
yihui 9:05f0b5a3a70a 48 void port_dir(port_t *obj, PinDirection dir)
yihui 9:05f0b5a3a70a 49 {
yihui 9:05f0b5a3a70a 50 int i;
yihui 9:05f0b5a3a70a 51 switch (dir) {
yihui 9:05f0b5a3a70a 52 case PIN_INPUT:
yihui 9:05f0b5a3a70a 53 for (i = 0; i<31; i++) {
yihui 9:05f0b5a3a70a 54 if (obj->mask & (1 << i)) {
yihui 9:05f0b5a3a70a 55 obj->reg_cnf[i] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
yihui 9:05f0b5a3a70a 56 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
yihui 9:05f0b5a3a70a 57 | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
yihui 9:05f0b5a3a70a 58 | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
yihui 9:05f0b5a3a70a 59 }
yihui 9:05f0b5a3a70a 60 }
yihui 9:05f0b5a3a70a 61 break;
yihui 9:05f0b5a3a70a 62 case PIN_OUTPUT:
yihui 9:05f0b5a3a70a 63 for (i = 0; i<31; i++) {
yihui 9:05f0b5a3a70a 64 if (obj->mask & (1 << i)) {
yihui 9:05f0b5a3a70a 65 obj->reg_cnf[i] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
yihui 9:05f0b5a3a70a 66 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
yihui 9:05f0b5a3a70a 67 | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
yihui 9:05f0b5a3a70a 68 | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
yihui 9:05f0b5a3a70a 69 | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
yihui 9:05f0b5a3a70a 70 }
yihui 9:05f0b5a3a70a 71 }
yihui 9:05f0b5a3a70a 72 break;
yihui 9:05f0b5a3a70a 73 }
yihui 9:05f0b5a3a70a 74 }
yihui 9:05f0b5a3a70a 75
yihui 9:05f0b5a3a70a 76 void port_write(port_t *obj, int value)
yihui 9:05f0b5a3a70a 77 {
yihui 9:05f0b5a3a70a 78 *obj->reg_out = value;
yihui 9:05f0b5a3a70a 79 }
yihui 9:05f0b5a3a70a 80
yihui 9:05f0b5a3a70a 81 int port_read(port_t *obj)
yihui 9:05f0b5a3a70a 82 {
yihui 9:05f0b5a3a70a 83 return (*obj->reg_in);
yihui 9:05f0b5a3a70a 84 }