Yihui Xiong / BLE_NODE_TEST

Test code for Grove Node BLE

Dependencies:   BLE_API nRF51822

Fork of BLE_LoopbackUART by Bluetooth Low Energy

mbed-src/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/gpio_irq_api.c@10:22480ac31879, 2014-11-27 (annotated)

Committer:
yihui
Date:
Thu Nov 27 09:30:36 2014 +0000
Revision:
10:22480ac31879
Parent:
9:05f0b5a3a70a 
change to new revision hardware

Who changed what in which revision?

UserRevisionLine numberNew contents of line
yihui 9:05f0b5a3a70a 1 /* mbed Microcontroller Library
yihui 9:05f0b5a3a70a 2 * Copyright (c) 2013 Nordic Semiconductor
yihui 9:05f0b5a3a70a 3 *
yihui 9:05f0b5a3a70a 4 * Licensed under the Apache License, Version 2.0 (the "License");
yihui 9:05f0b5a3a70a 5 * you may not use this file except in compliance with the License.
yihui 9:05f0b5a3a70a 6 * You may obtain a copy of the License at
yihui 9:05f0b5a3a70a 7 *
yihui 9:05f0b5a3a70a 8 * http://www.apache.org/licenses/LICENSE-2.0
yihui 9:05f0b5a3a70a 9 *
yihui 9:05f0b5a3a70a 10 * Unless required by applicable law or agreed to in writing, software
yihui 9:05f0b5a3a70a 11 * distributed under the License is distributed on an "AS IS" BASIS,
yihui 9:05f0b5a3a70a 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
yihui 9:05f0b5a3a70a 13 * See the License for the specific language governing permissions and
yihui 9:05f0b5a3a70a 14 * limitations under the License.
yihui 9:05f0b5a3a70a 15 */
yihui 9:05f0b5a3a70a 16 #include <stddef.h>
yihui 9:05f0b5a3a70a 17 #include "cmsis.h"
yihui 9:05f0b5a3a70a 18
yihui 9:05f0b5a3a70a 19 #include "gpio_irq_api.h"
yihui 9:05f0b5a3a70a 20 #include "mbed_error.h"
yihui 9:05f0b5a3a70a 21
yihui 9:05f0b5a3a70a 22 #define CHANNEL_NUM 31
yihui 9:05f0b5a3a70a 23
yihui 9:05f0b5a3a70a 24 static uint32_t channel_ids[CHANNEL_NUM] = {0}; //each pin will be given an id, if id is 0 the pin can be ignored.
yihui 9:05f0b5a3a70a 25 static uint8_t channel_enabled[CHANNEL_NUM] = {0};
yihui 9:05f0b5a3a70a 26 static uint32_t portRISE = 0;
yihui 9:05f0b5a3a70a 27 static uint32_t portFALL = 0;
yihui 9:05f0b5a3a70a 28 static gpio_irq_handler irq_handler;
yihui 9:05f0b5a3a70a 29
yihui 9:05f0b5a3a70a 30 #ifdef __cplusplus
yihui 9:05f0b5a3a70a 31 extern "C" {
yihui 9:05f0b5a3a70a 32 #endif
yihui 9:05f0b5a3a70a 33 void GPIOTE_IRQHandler(void)
yihui 9:05f0b5a3a70a 34 {
yihui 9:05f0b5a3a70a 35 volatile uint32_t newVal = NRF_GPIO->IN;
yihui 9:05f0b5a3a70a 36
yihui 9:05f0b5a3a70a 37 if ((NRF_GPIOTE->EVENTS_PORT != 0) && ((NRF_GPIOTE->INTENSET & GPIOTE_INTENSET_PORT_Msk) != 0)) {
yihui 9:05f0b5a3a70a 38 NRF_GPIOTE->EVENTS_PORT = 0;
yihui 9:05f0b5a3a70a 39
yihui 9:05f0b5a3a70a 40 for (uint8_t i = 0; i<31; i++) {
yihui 9:05f0b5a3a70a 41 if (channel_ids[i]>0) {
yihui 9:05f0b5a3a70a 42 if (channel_enabled[i]) {
yihui 9:05f0b5a3a70a 43 if( ((newVal>>i)&1) && ( ( (NRF_GPIO->PIN_CNF[i] >>GPIO_PIN_CNF_SENSE_Pos) & GPIO_PIN_CNF_SENSE_Low) != GPIO_PIN_CNF_SENSE_Low) && ( (portRISE>>i)&1) ){
yihui 9:05f0b5a3a70a 44 irq_handler(channel_ids[i], IRQ_RISE);
yihui 9:05f0b5a3a70a 45 } else if ((((newVal >> i) & 1) == 0) &&
yihui 9:05f0b5a3a70a 46 (((NRF_GPIO->PIN_CNF[i] >> GPIO_PIN_CNF_SENSE_Pos) & GPIO_PIN_CNF_SENSE_Low) == GPIO_PIN_CNF_SENSE_Low) &&
yihui 9:05f0b5a3a70a 47 ((portFALL >> i) & 1)) {
yihui 9:05f0b5a3a70a 48 irq_handler(channel_ids[i], IRQ_FALL);
yihui 9:05f0b5a3a70a 49 }
yihui 9:05f0b5a3a70a 50 }
yihui 9:05f0b5a3a70a 51
yihui 9:05f0b5a3a70a 52 if (NRF_GPIO->PIN_CNF[i] & GPIO_PIN_CNF_SENSE_Msk) {
yihui 9:05f0b5a3a70a 53 NRF_GPIO->PIN_CNF[i] &= ~(GPIO_PIN_CNF_SENSE_Msk);
yihui 9:05f0b5a3a70a 54
yihui 9:05f0b5a3a70a 55 if (newVal >> i & 1) {
yihui 9:05f0b5a3a70a 56 NRF_GPIO->PIN_CNF[i] |= (GPIO_PIN_CNF_SENSE_Low << GPIO_PIN_CNF_SENSE_Pos);
yihui 9:05f0b5a3a70a 57 } else {
yihui 9:05f0b5a3a70a 58 NRF_GPIO->PIN_CNF[i] |= (GPIO_PIN_CNF_SENSE_High << GPIO_PIN_CNF_SENSE_Pos);
yihui 9:05f0b5a3a70a 59 }
yihui 9:05f0b5a3a70a 60 }
yihui 9:05f0b5a3a70a 61 }
yihui 9:05f0b5a3a70a 62 }
yihui 9:05f0b5a3a70a 63 }
yihui 9:05f0b5a3a70a 64 }
yihui 9:05f0b5a3a70a 65
yihui 9:05f0b5a3a70a 66 #ifdef __cplusplus
yihui 9:05f0b5a3a70a 67 }
yihui 9:05f0b5a3a70a 68 #endif
yihui 9:05f0b5a3a70a 69
yihui 9:05f0b5a3a70a 70 int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id)
yihui 9:05f0b5a3a70a 71 {
yihui 9:05f0b5a3a70a 72 if (pin == NC) {
yihui 9:05f0b5a3a70a 73 return -1;
yihui 9:05f0b5a3a70a 74 }
yihui 9:05f0b5a3a70a 75
yihui 9:05f0b5a3a70a 76 irq_handler = handler;
yihui 9:05f0b5a3a70a 77 obj->ch = pin;
yihui 9:05f0b5a3a70a 78 NRF_GPIOTE->EVENTS_PORT = 0;
yihui 9:05f0b5a3a70a 79 channel_ids[pin] = id;
yihui 9:05f0b5a3a70a 80 channel_enabled[pin] = 1;
yihui 9:05f0b5a3a70a 81 NRF_GPIOTE->INTENSET = GPIOTE_INTENSET_PORT_Set << GPIOTE_INTENSET_PORT_Pos;
yihui 9:05f0b5a3a70a 82
yihui 9:05f0b5a3a70a 83 NVIC_SetPriority(GPIOTE_IRQn, 3);
yihui 9:05f0b5a3a70a 84 NVIC_EnableIRQ (GPIOTE_IRQn);
yihui 9:05f0b5a3a70a 85 return 0;
yihui 9:05f0b5a3a70a 86 }
yihui 9:05f0b5a3a70a 87
yihui 9:05f0b5a3a70a 88 void gpio_irq_free(gpio_irq_t *obj)
yihui 9:05f0b5a3a70a 89 {
yihui 9:05f0b5a3a70a 90 channel_ids[obj->ch] = 0;
yihui 9:05f0b5a3a70a 91 }
yihui 9:05f0b5a3a70a 92
yihui 9:05f0b5a3a70a 93 void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
yihui 9:05f0b5a3a70a 94 {
yihui 9:05f0b5a3a70a 95 NRF_GPIO->PIN_CNF[obj->ch] &= ~(GPIO_PIN_CNF_SENSE_Msk);
yihui 9:05f0b5a3a70a 96 if (enable) {
yihui 9:05f0b5a3a70a 97 if (event == IRQ_RISE) {
yihui 9:05f0b5a3a70a 98 portRISE |= (1 << obj->ch);
yihui 9:05f0b5a3a70a 99 } else if (event == IRQ_FALL) {
yihui 9:05f0b5a3a70a 100 portFALL |= (1 << obj->ch);
yihui 9:05f0b5a3a70a 101 }
yihui 9:05f0b5a3a70a 102 } else {
yihui 9:05f0b5a3a70a 103 if (event == IRQ_RISE) {
yihui 9:05f0b5a3a70a 104 portRISE &= ~(1 << obj->ch);
yihui 9:05f0b5a3a70a 105 } else if (event == IRQ_FALL) {
yihui 9:05f0b5a3a70a 106 portFALL &= ~(1 << obj->ch);
yihui 9:05f0b5a3a70a 107 }
yihui 9:05f0b5a3a70a 108 }
yihui 9:05f0b5a3a70a 109
yihui 9:05f0b5a3a70a 110 if (((portRISE >> obj->ch) & 1) || ((portFALL >> obj->ch) & 1)) {
yihui 9:05f0b5a3a70a 111 if ((NRF_GPIO->IN >> obj->ch) & 1) {
yihui 9:05f0b5a3a70a 112 NRF_GPIO->PIN_CNF[obj->ch] |= (GPIO_PIN_CNF_SENSE_Low << GPIO_PIN_CNF_SENSE_Pos); // | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos);
yihui 9:05f0b5a3a70a 113 } else {
yihui 9:05f0b5a3a70a 114 NRF_GPIO->PIN_CNF[obj->ch] |= (GPIO_PIN_CNF_SENSE_High << GPIO_PIN_CNF_SENSE_Pos); //| (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos);
yihui 9:05f0b5a3a70a 115 }
yihui 9:05f0b5a3a70a 116 }
yihui 9:05f0b5a3a70a 117 }
yihui 9:05f0b5a3a70a 118
yihui 9:05f0b5a3a70a 119 void gpio_irq_enable(gpio_irq_t *obj)
yihui 9:05f0b5a3a70a 120 {
yihui 9:05f0b5a3a70a 121 channel_enabled[obj->ch] = 1;
yihui 9:05f0b5a3a70a 122 }
yihui 9:05f0b5a3a70a 123
yihui 9:05f0b5a3a70a 124 void gpio_irq_disable(gpio_irq_t *obj)
yihui 9:05f0b5a3a70a 125 {
yihui 9:05f0b5a3a70a 126 channel_enabled[obj->ch] = 0;
yihui 9:05f0b5a3a70a 127 }