8:4 Matrix Multiplexer

Fork of max14661 by Maxim Integrated

This is an untested driver for the MAX14724.

Revision:
9:27cfbbce3094
Parent:
8:44257d87fa9e
--- a/max14661.h	Thu Mar 12 19:36:17 2015 +0000
+++ b/max14661.h	Tue Mar 17 00:05:40 2015 +0000
@@ -53,87 +53,6 @@
 #include "mbed.h"
 
 
-/**
-* max14661_i2c_adrs_t - enumerated MAX14661 I2C Addresses
-*/
-typedef enum
-{
-    MAX14661_I2C_ADRS0 = 0x4C,
-    MAX14661_I2C_ADRS1,
-    MAX14661_I2C_ADRS2,
-    MAX14661_I2C_ADRS3
-}max14661_i2c_adrs_t;
-
-
-/**
-* max14661_regs_t - enumerated MAX14661 register addresses
-*/
-typedef enum
-{
-    DIR0,         //Switches 8A–1A direct read/write access
-    DIR1,         //Switches 16A–9A direct read/write access
-    DIR2,         //Switches 8B–1B direct read/write access
-    DIR3,         //Switches 16B–9B direct read/write access
-    SHDW0 = 0x10, //Switches 8A–1A shadow read/write access
-    SHDW1,        //Switches 16A–9A shadow read/write access
-    SHDW2,        //Switches 8B–1B shadow read/write access
-    SHDW3,        //Switches 16B–9B shadow read/write access
-    CMD_A,        //Set mux A command (reads 0x00)
-    CMD_B         //Set mux B command (reads 0x00)
-}max14661_regs_t;
-
-
-/**
-* max14661_cmds_t - enumerated MAX14661 commands
-*/
-typedef enum
-{
-    ENABLE_SW01,     //enables sw1 on bank only
-    ENABLE_SW02,     //enables sw2 on bank only
-    ENABLE_SW03,     //enables sw3 on bank only
-    ENABLE_SW04,     //enables sw4 on bank only
-    ENABLE_SW05,     //enables sw5 on bank only
-    ENABLE_SW06,     //enables sw6 on bank only
-    ENABLE_SW07,     //enables sw7 on bank only
-    ENABLE_SW08,     //enables sw8 on bank only
-    ENABLE_SW09,     //enables sw9 on bank only
-    ENABLE_SW10,     //enables sw10 on bank only
-    ENABLE_SW11,     //enables sw11 on bank only
-    ENABLE_SW12,     //enables sw12 on bank only
-    ENABLE_SW13,     //enables sw13 on bank only
-    ENABLE_SW14,     //enables sw14 on bank only
-    ENABLE_SW15,     //enables sw15 on bank only
-    ENABLE_SW16,     //enables sw16 on bank only
-    DISABLE_BANK,    //opens all switches on bank
-    COPY_SHADOW,     //copies both shadow registers for bank
-    NO_CHANGE,
-}max14661_cmds_t;
-
-
-/**
-* max14661_sw_t - enumerated MAX14661 switch bitmasks
-*/
-typedef enum
-{
-    SW01 = (1 << 0),
-    SW02 = (1 << 1),
-    SW03 = (1 << 2),
-    SW04 = (1 << 3),
-    SW05 = (1 << 4),
-    SW06 = (1 << 5),
-    SW07 = (1 << 6),
-    SW08 = (1 << 7),
-    SW09 = (1 << 8),
-    SW10 = (1 << 9),
-    SW11 = (1 << 10),
-    SW12 = (1 << 11),
-    SW13 = (1 << 12),
-    SW14 = (1 << 13),
-    SW15 = (1 << 14),
-    SW16 = (1 << 15)
-}max14661_sw_t;
-    
-
 /******************************************************************//**
 * Max14661 Class
 **********************************************************************/
@@ -142,6 +61,88 @@
     uint8_t w_adrs, r_adrs;
     
     public:
+    
+        /**
+        * max14661_i2c_adrs_t - enumerated MAX14661 I2C Addresses
+        */
+        typedef enum
+        {
+            MAX14661_I2C_ADRS0 = 0x4C,
+            MAX14661_I2C_ADRS1,
+            MAX14661_I2C_ADRS2,
+            MAX14661_I2C_ADRS3
+        }max14661_i2c_adrs_t;
+        
+        
+        /**
+        * max14661_regs_t - enumerated MAX14661 register addresses
+        */
+        typedef enum
+        {
+            DIR0,         //Switches 8A–1A direct read/write access
+            DIR1,         //Switches 16A–9A direct read/write access
+            DIR2,         //Switches 8B–1B direct read/write access
+            DIR3,         //Switches 16B–9B direct read/write access
+            SHDW0 = 0x10, //Switches 8A–1A shadow read/write access
+            SHDW1,        //Switches 16A–9A shadow read/write access
+            SHDW2,        //Switches 8B–1B shadow read/write access
+            SHDW3,        //Switches 16B–9B shadow read/write access
+            CMD_A,        //Set mux A command (reads 0x00)
+            CMD_B         //Set mux B command (reads 0x00)
+        }max14661_regs_t;
+        
+        
+        /**
+        * max14661_cmds_t - enumerated MAX14661 commands
+        */
+        typedef enum
+        {
+            ENABLE_SW01,     //enables sw1 on bank only
+            ENABLE_SW02,     //enables sw2 on bank only
+            ENABLE_SW03,     //enables sw3 on bank only
+            ENABLE_SW04,     //enables sw4 on bank only
+            ENABLE_SW05,     //enables sw5 on bank only
+            ENABLE_SW06,     //enables sw6 on bank only
+            ENABLE_SW07,     //enables sw7 on bank only
+            ENABLE_SW08,     //enables sw8 on bank only
+            ENABLE_SW09,     //enables sw9 on bank only
+            ENABLE_SW10,     //enables sw10 on bank only
+            ENABLE_SW11,     //enables sw11 on bank only
+            ENABLE_SW12,     //enables sw12 on bank only
+            ENABLE_SW13,     //enables sw13 on bank only
+            ENABLE_SW14,     //enables sw14 on bank only
+            ENABLE_SW15,     //enables sw15 on bank only
+            ENABLE_SW16,     //enables sw16 on bank only
+            DISABLE_BANK,    //opens all switches on bank
+            COPY_SHADOW,     //copies both shadow registers for bank
+            NO_CHANGE,
+        }max14661_cmds_t;
+        
+        
+        /**
+        * max14661_sw_t - enumerated MAX14661 switch bitmasks
+        */
+        typedef enum
+        {
+            SW01 = (1 << 0),
+            SW02 = (1 << 1),
+            SW03 = (1 << 2),
+            SW04 = (1 << 3),
+            SW05 = (1 << 4),
+            SW06 = (1 << 5),
+            SW07 = (1 << 6),
+            SW08 = (1 << 7),
+            SW09 = (1 << 8),
+            SW10 = (1 << 9),
+            SW11 = (1 << 10),
+            SW12 = (1 << 11),
+            SW13 = (1 << 12),
+            SW14 = (1 << 13),
+            SW15 = (1 << 14),
+            SW16 = (1 << 15)
+        }max14661_sw_t;
+        
+        
         /**********************************************************//**
         * Constructor for Max14661 Class
         *