Wesley Schon / Mbed 2 deprecated ECE4180Lab3_RTOS

Running multiple threads on mbed using RTOS

Dependencies:   4DGL-uLCD-SE SDFileSystem mbed-rtos mbed wave_player_appbd

USBHostMSD/USBHost/USBHostTypes.h@4:5fdadaef5b1f, 2016-02-29 (annotated)

Committer:
wschon
Date:
Mon Feb 29 03:46:10 2016 +0000
Revision:
4:5fdadaef5b1f
Parent:
1:2129bb91c172 
fixed EVERYTHING

Who changed what in which revision?

UserRevisionLine numberNew contents of line
wschon 1:2129bb91c172 1 /* mbed USBHost Library
wschon 1:2129bb91c172 2 * Copyright (c) 2006-2013 ARM Limited
wschon 1:2129bb91c172 3 *
wschon 1:2129bb91c172 4 * Licensed under the Apache License, Version 2.0 (the "License");
wschon 1:2129bb91c172 5 * you may not use this file except in compliance with the License.
wschon 1:2129bb91c172 6 * You may obtain a copy of the License at
wschon 1:2129bb91c172 7 *
wschon 1:2129bb91c172 8 * http://www.apache.org/licenses/LICENSE-2.0
wschon 1:2129bb91c172 9 *
wschon 1:2129bb91c172 10 * Unless required by applicable law or agreed to in writing, software
wschon 1:2129bb91c172 11 * distributed under the License is distributed on an "AS IS" BASIS,
wschon 1:2129bb91c172 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
wschon 1:2129bb91c172 13 * See the License for the specific language governing permissions and
wschon 1:2129bb91c172 14 * limitations under the License.
wschon 1:2129bb91c172 15 */
wschon 1:2129bb91c172 16
wschon 1:2129bb91c172 17 #ifndef USB_INC_H
wschon 1:2129bb91c172 18 #define USB_INC_H
wschon 1:2129bb91c172 19
wschon 1:2129bb91c172 20 #include "mbed.h"
wschon 1:2129bb91c172 21
wschon 1:2129bb91c172 22 enum USB_TYPE {
wschon 1:2129bb91c172 23 USB_TYPE_OK = 0,
wschon 1:2129bb91c172 24
wschon 1:2129bb91c172 25 // completion code
wschon 1:2129bb91c172 26 USB_TYPE_CRC_ERROR = 1,
wschon 1:2129bb91c172 27 USB_TYPE_BIT_STUFFING_ERROR = 2,
wschon 1:2129bb91c172 28 USB_TYPE_DATA_TOGGLE_MISMATCH_ERROR = 3,
wschon 1:2129bb91c172 29 USB_TYPE_STALL_ERROR = 4,
wschon 1:2129bb91c172 30 USB_TYPE_DEVICE_NOT_RESPONDING_ERROR = 5,
wschon 1:2129bb91c172 31 USB_TYPE_PID_CHECK_FAILURE_ERROR = 6,
wschon 1:2129bb91c172 32 USB_TYPE_UNEXPECTED_PID_ERROR = 7,
wschon 1:2129bb91c172 33 USB_TYPE_DATA_OVERRUN_ERROR = 8,
wschon 1:2129bb91c172 34 USB_TYPE_DATA_UNDERRUN_ERROR = 9,
wschon 1:2129bb91c172 35 USB_TYPE_RESERVED = 9,
wschon 1:2129bb91c172 36 USB_TYPE_RESERVED_ = 10,
wschon 1:2129bb91c172 37 USB_TYPE_BUFFER_OVERRUN_ERROR = 12,
wschon 1:2129bb91c172 38 USB_TYPE_BUFFER_UNDERRUN_ERROR = 13,
wschon 1:2129bb91c172 39
wschon 1:2129bb91c172 40 // general usb state
wschon 1:2129bb91c172 41 USB_TYPE_DISCONNECTED = 14,
wschon 1:2129bb91c172 42 USB_TYPE_FREE = 15,
wschon 1:2129bb91c172 43 USB_TYPE_IDLE = 16,
wschon 1:2129bb91c172 44 USB_TYPE_PROCESSING = 17,
wschon 1:2129bb91c172 45
wschon 1:2129bb91c172 46 USB_TYPE_ERROR = 18,
wschon 1:2129bb91c172 47 };
wschon 1:2129bb91c172 48
wschon 1:2129bb91c172 49
wschon 1:2129bb91c172 50 enum ENDPOINT_DIRECTION {
wschon 1:2129bb91c172 51 OUT = 1,
wschon 1:2129bb91c172 52 IN
wschon 1:2129bb91c172 53 };
wschon 1:2129bb91c172 54
wschon 1:2129bb91c172 55 enum ENDPOINT_TYPE {
wschon 1:2129bb91c172 56 CONTROL_ENDPOINT = 0,
wschon 1:2129bb91c172 57 ISOCHRONOUS_ENDPOINT,
wschon 1:2129bb91c172 58 BULK_ENDPOINT,
wschon 1:2129bb91c172 59 INTERRUPT_ENDPOINT
wschon 1:2129bb91c172 60 };
wschon 1:2129bb91c172 61
wschon 1:2129bb91c172 62 #define AUDIO_CLASS 0x01
wschon 1:2129bb91c172 63 #define CDC_CLASS 0x02
wschon 1:2129bb91c172 64 #define HID_CLASS 0x03
wschon 1:2129bb91c172 65 #define MSD_CLASS 0x08
wschon 1:2129bb91c172 66 #define HUB_CLASS 0x09
wschon 1:2129bb91c172 67 #define SERIAL_CLASS 0x0A
wschon 1:2129bb91c172 68
wschon 1:2129bb91c172 69 // ------------------ HcControl Register ---------------------
wschon 1:2129bb91c172 70 #define OR_CONTROL_PLE 0x00000004
wschon 1:2129bb91c172 71 #define OR_CONTROL_CLE 0x00000010
wschon 1:2129bb91c172 72 #define OR_CONTROL_BLE 0x00000020
wschon 1:2129bb91c172 73 #define OR_CONTROL_HCFS 0x000000C0
wschon 1:2129bb91c172 74 #define OR_CONTROL_HC_OPER 0x00000080
wschon 1:2129bb91c172 75 // ----------------- HcCommandStatus Register -----------------
wschon 1:2129bb91c172 76 #define OR_CMD_STATUS_HCR 0x00000001
wschon 1:2129bb91c172 77 #define OR_CMD_STATUS_CLF 0x00000002
wschon 1:2129bb91c172 78 #define OR_CMD_STATUS_BLF 0x00000004
wschon 1:2129bb91c172 79 // --------------- HcInterruptStatus Register -----------------
wschon 1:2129bb91c172 80 #define OR_INTR_STATUS_WDH 0x00000002
wschon 1:2129bb91c172 81 #define OR_INTR_STATUS_RHSC 0x00000040
wschon 1:2129bb91c172 82 #define OR_INTR_STATUS_UE 0x00000010
wschon 1:2129bb91c172 83 // --------------- HcInterruptEnable Register -----------------
wschon 1:2129bb91c172 84 #define OR_INTR_ENABLE_WDH 0x00000002
wschon 1:2129bb91c172 85 #define OR_INTR_ENABLE_RHSC 0x00000040
wschon 1:2129bb91c172 86 #define OR_INTR_ENABLE_MIE 0x80000000
wschon 1:2129bb91c172 87 // ---------------- HcRhDescriptorA Register ------------------
wschon 1:2129bb91c172 88 #define OR_RH_STATUS_LPSC 0x00010000
wschon 1:2129bb91c172 89 #define OR_RH_STATUS_DRWE 0x00008000
wschon 1:2129bb91c172 90 // -------------- HcRhPortStatus[1:NDP] Register --------------
wschon 1:2129bb91c172 91 #define OR_RH_PORT_CCS 0x00000001
wschon 1:2129bb91c172 92 #define OR_RH_PORT_PRS 0x00000010
wschon 1:2129bb91c172 93 #define OR_RH_PORT_CSC 0x00010000
wschon 1:2129bb91c172 94 #define OR_RH_PORT_PRSC 0x00100000
wschon 1:2129bb91c172 95 #define OR_RH_PORT_LSDA 0x00000200
wschon 1:2129bb91c172 96
wschon 1:2129bb91c172 97 #define FI 0x2EDF // 12000 bits per frame (-1)
wschon 1:2129bb91c172 98 #define DEFAULT_FMINTERVAL ((((6 * (FI - 210)) / 7) << 16) | FI)
wschon 1:2129bb91c172 99
wschon 1:2129bb91c172 100 #define ED_SKIP (uint32_t) (0x00001000) // Skip this ep in queue
wschon 1:2129bb91c172 101
wschon 1:2129bb91c172 102 #define TD_ROUNDING (uint32_t) (0x00040000) // Buffer Rounding
wschon 1:2129bb91c172 103 #define TD_SETUP (uint32_t)(0) // Direction of Setup Packet
wschon 1:2129bb91c172 104 #define TD_IN (uint32_t)(0x00100000) // Direction In
wschon 1:2129bb91c172 105 #define TD_OUT (uint32_t)(0x00080000) // Direction Out
wschon 1:2129bb91c172 106 #define TD_DELAY_INT(x) (uint32_t)((x) << 21) // Delay Interrupt
wschon 1:2129bb91c172 107 #define TD_TOGGLE_0 (uint32_t)(0x02000000) // Toggle 0
wschon 1:2129bb91c172 108 #define TD_TOGGLE_1 (uint32_t)(0x03000000) // Toggle 1
wschon 1:2129bb91c172 109 #define TD_CC (uint32_t)(0xF0000000) // Completion Code
wschon 1:2129bb91c172 110
wschon 1:2129bb91c172 111 #define DEVICE_DESCRIPTOR (1)
wschon 1:2129bb91c172 112 #define CONFIGURATION_DESCRIPTOR (2)
wschon 1:2129bb91c172 113 #define INTERFACE_DESCRIPTOR (4)
wschon 1:2129bb91c172 114 #define ENDPOINT_DESCRIPTOR (5)
wschon 1:2129bb91c172 115 #define HID_DESCRIPTOR (33)
wschon 1:2129bb91c172 116
wschon 1:2129bb91c172 117 // ----------- Control RequestType Fields -----------
wschon 1:2129bb91c172 118 #define USB_DEVICE_TO_HOST 0x80
wschon 1:2129bb91c172 119 #define USB_HOST_TO_DEVICE 0x00
wschon 1:2129bb91c172 120 #define USB_REQUEST_TYPE_CLASS 0x20
wschon 1:2129bb91c172 121 #define USB_REQUEST_TYPE_STANDARD 0x00
wschon 1:2129bb91c172 122 #define USB_RECIPIENT_DEVICE 0x00
wschon 1:2129bb91c172 123 #define USB_RECIPIENT_INTERFACE 0x01
wschon 1:2129bb91c172 124 #define USB_RECIPIENT_ENDPOINT 0x02
wschon 1:2129bb91c172 125
wschon 1:2129bb91c172 126 // -------------- USB Standard Requests --------------
wschon 1:2129bb91c172 127 #define SET_ADDRESS 0x05
wschon 1:2129bb91c172 128 #define GET_DESCRIPTOR 0x06
wschon 1:2129bb91c172 129 #define SET_CONFIGURATION 0x09
wschon 1:2129bb91c172 130 #define SET_INTERFACE 0x0b
wschon 1:2129bb91c172 131 #define CLEAR_FEATURE 0x01
wschon 1:2129bb91c172 132
wschon 1:2129bb91c172 133 // -------------- USB Descriptor Length --------------
wschon 1:2129bb91c172 134 #define DEVICE_DESCRIPTOR_LENGTH 0x12
wschon 1:2129bb91c172 135 #define CONFIGURATION_DESCRIPTOR_LENGTH 0x09
wschon 1:2129bb91c172 136
wschon 1:2129bb91c172 137 // ------------ HostController Transfer Descriptor ------------
wschon 1:2129bb91c172 138 typedef __packed struct HCTD {
wschon 1:2129bb91c172 139 __IO uint32_t control; // Transfer descriptor control
wschon 1:2129bb91c172 140 __IO uint8_t * currBufPtr; // Physical address of current buffer pointer
wschon 1:2129bb91c172 141 __IO HCTD * nextTD; // Physical pointer to next Transfer Descriptor
wschon 1:2129bb91c172 142 __IO uint8_t * bufEnd; // Physical address of end of buffer
wschon 1:2129bb91c172 143 void * ep; // ep address where a td is linked in
wschon 1:2129bb91c172 144 uint32_t dummy[3]; // padding
wschon 1:2129bb91c172 145 } HCTD;
wschon 1:2129bb91c172 146
wschon 1:2129bb91c172 147 // ----------- HostController EndPoint Descriptor -------------
wschon 1:2129bb91c172 148 typedef __packed struct hcEd {
wschon 1:2129bb91c172 149 __IO uint32_t control; // Endpoint descriptor control
wschon 1:2129bb91c172 150 __IO HCTD * tailTD; // Physical address of tail in Transfer descriptor list
wschon 1:2129bb91c172 151 __IO HCTD * headTD; // Physcial address of head in Transfer descriptor list
wschon 1:2129bb91c172 152 __IO hcEd * nextED; // Physical address of next Endpoint descriptor
wschon 1:2129bb91c172 153 } HCED;
wschon 1:2129bb91c172 154
wschon 1:2129bb91c172 155
wschon 1:2129bb91c172 156 // ----------- Host Controller Communication Area ------------
wschon 1:2129bb91c172 157 typedef __packed struct hcca {
wschon 1:2129bb91c172 158 __IO uint32_t IntTable[32]; // Interrupt Table
wschon 1:2129bb91c172 159 __IO uint32_t FrameNumber; // Frame Number
wschon 1:2129bb91c172 160 __IO uint32_t DoneHead; // Done Head
wschon 1:2129bb91c172 161 volatile uint8_t Reserved[116]; // Reserved for future use
wschon 1:2129bb91c172 162 volatile uint8_t Unknown[4]; // Unused
wschon 1:2129bb91c172 163 } HCCA;
wschon 1:2129bb91c172 164
wschon 1:2129bb91c172 165 typedef __packed struct {
wschon 1:2129bb91c172 166 uint8_t bLength;
wschon 1:2129bb91c172 167 uint8_t bDescriptorType;
wschon 1:2129bb91c172 168 uint16_t bcdUSB;
wschon 1:2129bb91c172 169 uint8_t bDeviceClass;
wschon 1:2129bb91c172 170 uint8_t bDeviceSubClass;
wschon 1:2129bb91c172 171 uint8_t bDeviceProtocol;
wschon 1:2129bb91c172 172 uint8_t bMaxPacketSize;
wschon 1:2129bb91c172 173 uint16_t idVendor;
wschon 1:2129bb91c172 174 uint16_t idProduct;
wschon 1:2129bb91c172 175 uint16_t bcdDevice;
wschon 1:2129bb91c172 176 uint8_t iManufacturer;
wschon 1:2129bb91c172 177 uint8_t iProduct;
wschon 1:2129bb91c172 178 uint8_t iSerialNumber;
wschon 1:2129bb91c172 179 uint8_t bNumConfigurations;
wschon 1:2129bb91c172 180 } DeviceDescriptor;
wschon 1:2129bb91c172 181
wschon 1:2129bb91c172 182 typedef __packed struct {
wschon 1:2129bb91c172 183 uint8_t bLength;
wschon 1:2129bb91c172 184 uint8_t bDescriptorType;
wschon 1:2129bb91c172 185 uint16_t wTotalLength;
wschon 1:2129bb91c172 186 uint8_t bNumInterfaces;
wschon 1:2129bb91c172 187 uint8_t bConfigurationValue;
wschon 1:2129bb91c172 188 uint8_t iConfiguration;
wschon 1:2129bb91c172 189 uint8_t bmAttributes;
wschon 1:2129bb91c172 190 uint8_t bMaxPower;
wschon 1:2129bb91c172 191 } ConfigurationDescriptor;
wschon 1:2129bb91c172 192
wschon 1:2129bb91c172 193 typedef struct {
wschon 1:2129bb91c172 194 uint8_t bLength;
wschon 1:2129bb91c172 195 uint8_t bDescriptorType;
wschon 1:2129bb91c172 196 uint8_t bInterfaceNumber;
wschon 1:2129bb91c172 197 uint8_t bAlternateSetting;
wschon 1:2129bb91c172 198 uint8_t bNumEndpoints;
wschon 1:2129bb91c172 199 uint8_t bInterfaceClass;
wschon 1:2129bb91c172 200 uint8_t bInterfaceSubClass;
wschon 1:2129bb91c172 201 uint8_t bInterfaceProtocol;
wschon 1:2129bb91c172 202 uint8_t iInterface;
wschon 1:2129bb91c172 203 } InterfaceDescriptor;
wschon 1:2129bb91c172 204
wschon 1:2129bb91c172 205 typedef struct {
wschon 1:2129bb91c172 206 uint8_t bLength;
wschon 1:2129bb91c172 207 uint8_t bDescriptorType;
wschon 1:2129bb91c172 208 uint8_t bEndpointAddress;
wschon 1:2129bb91c172 209 uint8_t bmAttributes;
wschon 1:2129bb91c172 210 uint16_t wMaxPacketSize;
wschon 1:2129bb91c172 211 uint8_t bInterval;
wschon 1:2129bb91c172 212 } EndpointDescriptor;
wschon 1:2129bb91c172 213
wschon 1:2129bb91c172 214 typedef struct {
wschon 1:2129bb91c172 215 uint8_t bDescLength;
wschon 1:2129bb91c172 216 uint8_t bDescriptorType;
wschon 1:2129bb91c172 217 uint8_t bNbrPorts;
wschon 1:2129bb91c172 218 uint16_t wHubCharacteristics;
wschon 1:2129bb91c172 219 uint8_t bPwrOn2PwrGood;
wschon 1:2129bb91c172 220 uint8_t bHubContrCurrent;
wschon 1:2129bb91c172 221 uint8_t DeviceRemovable;
wschon 1:2129bb91c172 222 uint8_t PortPweCtrlMak;
wschon 1:2129bb91c172 223 } HubDescriptor;
wschon 1:2129bb91c172 224
wschon 1:2129bb91c172 225 #endif