Mark Underwood
Test program running on MAX32625MBED. Control through USB Serial commands using a terminal emulator such as teraterm or putty.
Dependencies: MaximTinyTester CmdLine MAX541 USBDevice
Diff: MAX11043/MAX11043.cpp
- Revision:
- 59:47538bcf6cda
- Parent:
- 58:2fea32db466b
- Child:
- 60:d1d1eaa90fb7
diff -r 2fea32db466b -r 47538bcf6cda MAX11043/MAX11043.cpp
--- a/MAX11043/MAX11043.cpp Fri Feb 14 03:22:31 2020 +0000
+++ b/MAX11043/MAX11043.cpp Mon Feb 17 23:35:43 2020 +0000
@@ -579,16 +579,32 @@
{
//----------------------------------------
- // TODO1: AC79 MAX11043 AIN0-AIN1 reference voltage, in Volts
- VRef_xxxxxx = 2.500;
+ // reference voltage, in Volts
+ VRef = 2.500;
+
+ //----------------------------------------
+ // shadow of register config CMD_0010_0010_d16_Rd08_Configuration
+ config = 0x6000;
+
+ //----------------------------------------
+ // shadow of register status CMD_0001_1110_d8_Rd07_Status
+ status = 0x00;
//----------------------------------------
- // shadow of register ctrl CMD_r000_1001_dddd_dddd_CTRL
- ctrl = 0x01;
+ // shadow of register ADCa CMD_0000_0010_d16o8_Rd00_ADCa
+ adca = 0x0000;
//----------------------------------------
- // set by Configure_PGA gain index register pga CMD_r000_1110_xxdd_xddd_PGA
- pgaGain = 1;
+ // shadow of register ADCb CMD_0000_0110_d16o8_Rd01_ADCb
+ adcb = 0x0000;
+
+ //----------------------------------------
+ // shadow of register ADCc CMD_0000_1010_d16o8_Rd02_ADCc
+ adcc = 0x0000;
+
+ //----------------------------------------
+ // shadow of register ADCd CMD_0000_1110_d16o8_Rd03_ADCd
+ adcd = 0x0000;
//----------------------------------------
// init (based on old EV kit GUI)
@@ -605,7 +621,7 @@
// bool bScanMode = 0;
//----------------------------------------
- // Device ID Validation
+ // Device ID Validation -- not used, no device ID register
#warning "Not Implemented Yet: MAX11043::Init Device ID Validation..."
// const uint32_t part_id_expect = 0x000F02;
// uint32_t part_id_readback;
@@ -613,14 +629,6 @@
// if (part_id_readback != part_id_expect) return 0;
//----------------------------------------
- // write8 0x00 PD = 0x03 (Reset Registers; enter Standby mode)
- // RegWrite(xxxxxxxxxxxCMD_r000_0000_xxxx_xxdd_PD, PD_11_Reset);
-
- //----------------------------------------
- // write8 0x00 PD = 0x00 (NOP)
- // RegWrite(xxxxxxxxxxxxCMD_r000_0000_xxxx_xxdd_PD, PD_00_Normal);
-
- //----------------------------------------
// Active-High Shutdown Input. Drive high to shut down the MAX11043.
SHDNoutputValue(0); // SHDN Inactive
@@ -776,7 +784,10 @@
SPIoutputCS(0);
int16_t misoData16 = SPIreadWrite16bits(mosiData16);
SPIoutputCS(1);
- (*ptrRegData) = (misoData16 & 0x00FF);
+ if (ptrRegData) { (*ptrRegData) = (misoData16 & 0x00FF); }
+ if (commandByte == CMD_0001_1110_d8_Rd07_Status) {
+ // TODO1: update status
+ }
}
break;
case 16: // 16-bit register size
@@ -791,7 +802,22 @@
SPIoutputCS(0);
int32_t misoData32 = SPIreadWrite32bits(mosiData32);
SPIoutputCS(1);
- (*ptrRegData) = ((misoData32 >> 8) & 0x00FFFF);
+ if (ptrRegData) { (*ptrRegData) = ((misoData32 >> 8) & 0x00FFFF); }
+ if (commandByte == CMD_0010_0010_d16_Rd08_Configuration) {
+ // TODO1: update config
+ }
+ if (commandByte == CMD_0000_0010_d16o8_Rd00_ADCa) {
+ // TODO1: update adca
+ }
+ if (commandByte == CMD_0000_0110_d16o8_Rd01_ADCb) {
+ // TODO1: update adcb
+ }
+ if (commandByte == CMD_0000_1010_d16o8_Rd02_ADCc) {
+ // TODO1: update adcc
+ }
+ if (commandByte == CMD_0000_1110_d16o8_Rd03_ADCd) {
+ // TODO1: update adcd
+ }
}
break;
case 24: // 24-bit register size
@@ -803,7 +829,127 @@
SPIoutputCS(0);
int32_t misoData32 = SPIreadWrite32bits(mosiData32);
SPIoutputCS(1);
- (*ptrRegData) = (misoData32 & 0x00FFFFFF);
+ if (ptrRegData) { (*ptrRegData) = (misoData32 & 0x00FFFFFF); }
+ if (commandByte == CMD_0000_0010_d16o8_Rd00_ADCa) {
+ // TODO1: update adca
+ }
+ if (commandByte == CMD_0000_0110_d16o8_Rd01_ADCb) {
+ // TODO1: update adcb
+ }
+ if (commandByte == CMD_0000_1010_d16o8_Rd02_ADCc) {
+ // TODO1: update adcc
+ }
+ if (commandByte == CMD_0000_1110_d16o8_Rd03_ADCd) {
+ // TODO1: update adcd
+ }
+ }
+ break;
+ case 32: // 32-bit register size CMD_0001_0010_d24_d24_Rd04_ADCab, CMD_0001_0110_d24_d24_Rd05_ADCcd
+ //
+ #warning "Not Implemented Yet: MAX11043::RegRead 32-bit CMD_0001_0010_d24_d24_Rd04_ADCab"
+ // TODO: support long SPI read CMD_0001_0010_d24_d24_Rd04_ADCab
+ // %SW 0x12 (0 0) (0 0) -- for 16-bit read A,B
+ // update adca, adcb
+ //
+ // TODO: support long SPI read CMD_0001_0110_d24_d24_Rd05_ADCcd
+ // %SW 0x16 (0 0) (0 0) -- for 16-bit read C,D
+ // update adcc, adcd
+ //
+ {
+ // SPI 32-bit transfer
+ // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000_0000_0000
+ // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd_dddd_dddd
+ int32_t mosiData32 = ((CMDOP_0aaa_aa10_ReadRegister | (int32_t)commandByte) << 24);
+ SPIoutputCS(0);
+ int32_t misoData32 = SPIreadWrite32bits(mosiData32);
+ SPIoutputCS(1);
+ if (ptrRegData) { (*ptrRegData) = (misoData32 & 0x00FFFFFF); }
+ if (commandByte == CMD_0001_0010_d24_d24_Rd04_ADCab) {
+ // TODO1: update adca
+ // TODO1: update adcb
+ }
+ if (commandByte == CMD_0001_0110_d24_d24_Rd05_ADCcd) {
+ // TODO1: update adcc
+ // TODO1: update adcd
+ }
+ }
+ break;
+ case 48: // 48-bit register size CMD_0001_0010_d24_d24_Rd04_ADCab, CMD_0001_0110_d24_d24_Rd05_ADCcd
+ //
+ #warning "Not Implemented Yet: MAX11043::RegRead 48-bit CMD_0001_0010_d24_d24_Rd04_ADCab"
+ // TODO: support long SPI read CMD_0001_0010_d24_d24_Rd04_ADCab
+ // %SW 0x12 (0 0 0) (0 0 0) -- for 24-bit read A,B
+ // update adca, adcb
+ //
+ // TODO: support long SPI read CMD_0001_0110_d24_d24_Rd05_ADCcd
+ // %SW 0x16 (0 0 0) (0 0 0) -- for 24-bit read C,D
+ // update adcc, adcd
+ //
+ {
+ // SPI 32-bit transfer
+ // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000_0000_0000
+ // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd_dddd_dddd
+ int32_t mosiData32 = ((CMDOP_0aaa_aa10_ReadRegister | (int32_t)commandByte) << 24);
+ SPIoutputCS(0);
+ int32_t misoData32 = SPIreadWrite32bits(mosiData32);
+ SPIoutputCS(1);
+ if (ptrRegData) { (*ptrRegData) = (misoData32 & 0x00FFFFFF); }
+ if (commandByte == CMD_0001_0010_d24_d24_Rd04_ADCab) {
+ // TODO1: update adca
+ // TODO1: update adcb
+ }
+ if (commandByte == CMD_0001_0110_d24_d24_Rd05_ADCcd) {
+ // TODO1: update adcc
+ // TODO1: update adcd
+ }
+ }
+ break;
+ case 64: // 64-bit register size CMD_0001_1010_d24_d24_d24_d24_Rd06_ADCabcd
+ //
+ #warning "Not Implemented Yet: MAX11043::RegRead 64-bit CMD_0001_1010_d24_d24_d24_d24_Rd06_ADCabcd"
+ // TODO: support long SPI read CMD_0001_1010_d24_d24_d24_d24_Rd06_ADCabcd
+ // %SW 0x1A (0 0) (0 0) (0 0) (0 0) -- for 16-bit read A,B,C,D
+ // update adca, adcb, adcc, adcd
+ //
+ {
+ // SPI 32-bit transfer
+ // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000_0000_0000
+ // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd_dddd_dddd
+ int32_t mosiData32 = ((CMDOP_0aaa_aa10_ReadRegister | (int32_t)commandByte) << 24);
+ SPIoutputCS(0);
+ int32_t misoData32 = SPIreadWrite32bits(mosiData32);
+ SPIoutputCS(1);
+ if (ptrRegData) { (*ptrRegData) = (misoData32 & 0x00FFFFFF); }
+ if (commandByte == CMD_0001_1010_d24_d24_d24_d24_Rd06_ADCabcd) {
+ // TODO1: update adca
+ // TODO1: update adcb
+ // TODO1: update adcc
+ // TODO1: update adcd
+ }
+ }
+ break;
+ case 96: // 96-bit register size CMD_0001_1010_d24_d24_d24_d24_Rd06_ADCabcd
+ //
+ #warning "Not Implemented Yet: MAX11043::RegRead 96-bit CMD_0001_1010_d24_d24_d24_d24_Rd06_ADCabcd"
+ // TODO: support long SPI read CMD_0001_1010_d24_d24_d24_d24_Rd06_ADCabcd
+ // %SW 0x1A (0 0 0) (0 0 0) (0 0 0) (0 0 0) -- for 24-bit read A,B,C,D
+ // update adca, adcb, adcc, adcd
+ //
+ {
+ // SPI 32-bit transfer
+ // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000_0000_0000
+ // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd_dddd_dddd
+ int32_t mosiData32 = ((CMDOP_0aaa_aa10_ReadRegister | (int32_t)commandByte) << 24);
+ SPIoutputCS(0);
+ int32_t misoData32 = SPIreadWrite32bits(mosiData32);
+ SPIoutputCS(1);
+ if (ptrRegData) { (*ptrRegData) = (misoData32 & 0x00FFFFFF); }
+ if (commandByte == CMD_0001_1010_d24_d24_d24_d24_Rd06_ADCabcd) {
+ // TODO1: update adca
+ // TODO1: update adcb
+ // TODO1: update adcc
+ // TODO1: update adcd
+ }
}
break;
}
@@ -868,16 +1014,43 @@
case CMD_0110_1010_d16_Rd1A_FlashDataIn:
case CMD_0110_1110_d16_Rd1B_FlashDataOut:
return 16; // 16-bit register size
- case CMD_0000_0010_d24_Rd00_ADCa:
- case CMD_0000_0110_d24_Rd01_ADCb:
- case CMD_0000_1010_d24_Rd02_ADCc:
- case CMD_0000_1110_d24_Rd03_ADCd:
- return 24; // 24-bit register size
+ case CMD_0000_0010_d16o8_Rd00_ADCa:
+ case CMD_0000_0110_d16o8_Rd01_ADCb:
+ case CMD_0000_1010_d16o8_Rd02_ADCc:
+ case CMD_0000_1110_d16o8_Rd03_ADCd:
+ if (config & CONFIG_xxxx_xxxx_xx1x_xxxx_24BIT)
+ {
+ // %SW 0x02 (0 0 0) -- for 24-bit read
+ return 24; // 24-bit register size
+ }
+ // %SW 0x02 (0 0) -- for 16-bit read
+ //
+ return 16; // 16-bit register size
case CMD_0001_0010_d24_d24_Rd04_ADCab:
case CMD_0001_0110_d24_d24_Rd05_ADCcd:
- return 48; // 24-bit register size
+ //
+ // TODO: support long SPI read
+ if (config & CONFIG_xxxx_xxxx_xx1x_xxxx_24BIT)
+ {
+ // %SW 0x12 (0 0 0) (0 0 0) -- for 24-bit read A,B
+ // %SW 0x16 (0 0 0) (0 0 0) -- for 24-bit read C,D
+ return 48; // 48-bit register size: 2*(24)
+ }
+ // %SW 0x12 (0 0) (0 0) -- for 16-bit read A,B
+ // %SW 0x16 (0 0) (0 0) -- for 16-bit read C,D
+ //
+ return 32; // 32-bit register size: 2*(16)
case CMD_0001_1010_d24_d24_d24_d24_Rd06_ADCabcd:
- return 96; // 24-bit register size
+ //
+ // TODO: support long SPI read
+ if (config & CONFIG_xxxx_xxxx_xx1x_xxxx_24BIT)
+ {
+ // %SW 0x1A (0 0 0) (0 0 0) (0 0 0) (0 0 0) -- for 24-bit read A,B,C,D
+ return 96; // 96-bit register size: 4*(24)
+ }
+ // %SW 0x1A (0 0) (0 0) (0 0) (0 0) -- for 16-bit read A,B,C,D
+ //
+ return 64; // 64-bit register size: 4*(16)
case CMD_0101_1000_d32_Wr16_FilterCDataOut:
case CMD_0101_1010_d32_Rd16_FilterCDataOut:
case CMD_0101_1100_d32_Wr17_FilterCDataIn:
@@ -947,10 +1120,10 @@
// case CMDOP_0aaa_aa00_WriteRegister: return "_______";
// case CMDOP_0aaa_aa10_ReadRegister: return "_______";
// case CMDOP_1111_1111_NoOperationMOSIidleHigh: return "_______";
- case CMD_0000_0010_d24_Rd00_ADCa: return "ADCa";
- case CMD_0000_0110_d24_Rd01_ADCb: return "ADCb";
- case CMD_0000_1010_d24_Rd02_ADCc: return "ADCc";
- case CMD_0000_1110_d24_Rd03_ADCd: return "ADCd";
+ case CMD_0000_0010_d16o8_Rd00_ADCa: return "ADCa";
+ case CMD_0000_0110_d16o8_Rd01_ADCb: return "ADCb";
+ case CMD_0000_1010_d16o8_Rd02_ADCc: return "ADCc";
+ case CMD_0000_1110_d16o8_Rd03_ADCd: return "ADCd";
case CMD_0001_0010_d24_d24_Rd04_ADCab: return "ADCab";
case CMD_0001_0110_d24_d24_Rd05_ADCcd: return "ADCcd";
case CMD_0001_1010_d24_d24_d24_d24_Rd06_ADCabcd: return "ADCabcd";
@@ -997,5 +1170,45 @@
}
}
+//----------------------------------------
+// Menu item 'XX'
+//
+// @return 1 on success; 0 on failure
+uint8_t MAX11043::Configure_XXXXX(uint8_t linef, uint8_t rate)
+{
+
+ //----------------------------------------
+ // warning -- WIP work in progress
+ #warning "Not Tested Yet: MAX11043::Configure_XXXXX..."
+
+ //----------------------------------------
+ // read register
+ RegRead(CMD_0000_0010_d16o8_Rd00_ADCa, &adca);
+
+ //----------------------------------------
+ // success
+ return 1;
+}
+
+//----------------------------------------
+// Menu item 'XY'
+//
+// @return 1 on success; 0 on failure
+uint8_t MAX11043::Configure_XXXXY(uint8_t linef, uint8_t rate)
+{
+
+ //----------------------------------------
+ // warning -- WIP work in progress
+ #warning "Not Tested Yet: MAX11043::Configure_XXXXY..."
+
+ //----------------------------------------
+ // read register
+ RegRead(CMD_0001_1110_d8_Rd07_Status, &status);
+
+ //----------------------------------------
+ // success
+ return 1;
+}
+
// End of file