This is code is part of a Technion course project in advanced IoT, implementing a device to receive and present sensors data from a Formula racing car built by students at Technion - Israel Institute of Technology.

Dependencies:   mbed Buffer

Fork of DISCO-L072CZ-LRWAN1_LoRa_PingPong by ST

This is code is part of a Technion course project in advanced IoT, implementing a device to receive sensors data from another L072CZ-LRWAN1 installed on a Formula racing car (built by students at Technion - Israel Institute of Technology), and sends it to a GUI presenting the data (GUI project: github.com/ward-mattar/TechnionFormulaGUI).

How to install

  • Create an account on Mbed: https://os.mbed.com/account/signup/
  • Import project into Compiler
  • In the Program Workspace select "Formula_Nucleo_Receiver"
  • Select a Platform like so:
  1. Click button at top-left
  2. Add Board
  3. Search "NUCLEO F103RB" and then "Add to your Mbed Compiler"
  • Finally click "Compile", if the build was successful, the binary would download automatically
  • To install it on device simply plug it in to a PC, open device drive and drag then drop binary file in it
Committer:
wardm
Date:
Sat May 19 15:42:38 2018 +0000
Revision:
12:046346a16ff4
V1.0.0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
wardm 12:046346a16ff4 1 /*
wardm 12:046346a16ff4 2 / _____) _ | |
wardm 12:046346a16ff4 3 ( (____ _____ ____ _| |_ _____ ____| |__
wardm 12:046346a16ff4 4 \____ \| ___ | (_ _) ___ |/ ___) _ \
wardm 12:046346a16ff4 5 _____) ) ____| | | || |_| ____( (___| | | |
wardm 12:046346a16ff4 6 (______/|_____)_|_|_| \__)_____)\____)_| |_|
wardm 12:046346a16ff4 7 (C) 2014 Semtech
wardm 12:046346a16ff4 8
wardm 12:046346a16ff4 9 Description: SX1276 FSK modem registers and bits definitions
wardm 12:046346a16ff4 10
wardm 12:046346a16ff4 11 License: Revised BSD License, see LICENSE.TXT file include in the project
wardm 12:046346a16ff4 12
wardm 12:046346a16ff4 13 Maintainer: Miguel Luis and Gregory Cristian
wardm 12:046346a16ff4 14 */
wardm 12:046346a16ff4 15 #ifndef __SX1276_REGS_FSK_H__
wardm 12:046346a16ff4 16 #define __SX1276_REGS_FSK_H__
wardm 12:046346a16ff4 17
wardm 12:046346a16ff4 18 /*!
wardm 12:046346a16ff4 19 * ============================================================================
wardm 12:046346a16ff4 20 * SX1276 Internal registers Address
wardm 12:046346a16ff4 21 * ============================================================================
wardm 12:046346a16ff4 22 */
wardm 12:046346a16ff4 23 #define REG_FIFO 0x00
wardm 12:046346a16ff4 24 // Common settings
wardm 12:046346a16ff4 25 #define REG_OPMODE 0x01
wardm 12:046346a16ff4 26 #define REG_BITRATEMSB 0x02
wardm 12:046346a16ff4 27 #define REG_BITRATELSB 0x03
wardm 12:046346a16ff4 28 #define REG_FDEVMSB 0x04
wardm 12:046346a16ff4 29 #define REG_FDEVLSB 0x05
wardm 12:046346a16ff4 30 #define REG_FRFMSB 0x06
wardm 12:046346a16ff4 31 #define REG_FRFMID 0x07
wardm 12:046346a16ff4 32 #define REG_FRFLSB 0x08
wardm 12:046346a16ff4 33 // Tx settings
wardm 12:046346a16ff4 34 #define REG_PACONFIG 0x09
wardm 12:046346a16ff4 35 #define REG_PARAMP 0x0A
wardm 12:046346a16ff4 36 #define REG_OCP 0x0B
wardm 12:046346a16ff4 37 // Rx settings
wardm 12:046346a16ff4 38 #define REG_LNA 0x0C
wardm 12:046346a16ff4 39 #define REG_RXCONFIG 0x0D
wardm 12:046346a16ff4 40 #define REG_RSSICONFIG 0x0E
wardm 12:046346a16ff4 41 #define REG_RSSICOLLISION 0x0F
wardm 12:046346a16ff4 42 #define REG_RSSITHRESH 0x10
wardm 12:046346a16ff4 43 #define REG_RSSIVALUE 0x11
wardm 12:046346a16ff4 44 #define REG_RXBW 0x12
wardm 12:046346a16ff4 45 #define REG_AFCBW 0x13
wardm 12:046346a16ff4 46 #define REG_OOKPEAK 0x14
wardm 12:046346a16ff4 47 #define REG_OOKFIX 0x15
wardm 12:046346a16ff4 48 #define REG_OOKAVG 0x16
wardm 12:046346a16ff4 49 #define REG_RES17 0x17
wardm 12:046346a16ff4 50 #define REG_RES18 0x18
wardm 12:046346a16ff4 51 #define REG_RES19 0x19
wardm 12:046346a16ff4 52 #define REG_AFCFEI 0x1A
wardm 12:046346a16ff4 53 #define REG_AFCMSB 0x1B
wardm 12:046346a16ff4 54 #define REG_AFCLSB 0x1C
wardm 12:046346a16ff4 55 #define REG_FEIMSB 0x1D
wardm 12:046346a16ff4 56 #define REG_FEILSB 0x1E
wardm 12:046346a16ff4 57 #define REG_PREAMBLEDETECT 0x1F
wardm 12:046346a16ff4 58 #define REG_RXTIMEOUT1 0x20
wardm 12:046346a16ff4 59 #define REG_RXTIMEOUT2 0x21
wardm 12:046346a16ff4 60 #define REG_RXTIMEOUT3 0x22
wardm 12:046346a16ff4 61 #define REG_RXDELAY 0x23
wardm 12:046346a16ff4 62 // Oscillator settings
wardm 12:046346a16ff4 63 #define REG_OSC 0x24
wardm 12:046346a16ff4 64 // Packet handler settings
wardm 12:046346a16ff4 65 #define REG_PREAMBLEMSB 0x25
wardm 12:046346a16ff4 66 #define REG_PREAMBLELSB 0x26
wardm 12:046346a16ff4 67 #define REG_SYNCCONFIG 0x27
wardm 12:046346a16ff4 68 #define REG_SYNCVALUE1 0x28
wardm 12:046346a16ff4 69 #define REG_SYNCVALUE2 0x29
wardm 12:046346a16ff4 70 #define REG_SYNCVALUE3 0x2A
wardm 12:046346a16ff4 71 #define REG_SYNCVALUE4 0x2B
wardm 12:046346a16ff4 72 #define REG_SYNCVALUE5 0x2C
wardm 12:046346a16ff4 73 #define REG_SYNCVALUE6 0x2D
wardm 12:046346a16ff4 74 #define REG_SYNCVALUE7 0x2E
wardm 12:046346a16ff4 75 #define REG_SYNCVALUE8 0x2F
wardm 12:046346a16ff4 76 #define REG_PACKETCONFIG1 0x30
wardm 12:046346a16ff4 77 #define REG_PACKETCONFIG2 0x31
wardm 12:046346a16ff4 78 #define REG_PAYLOADLENGTH 0x32
wardm 12:046346a16ff4 79 #define REG_NODEADRS 0x33
wardm 12:046346a16ff4 80 #define REG_BROADCASTADRS 0x34
wardm 12:046346a16ff4 81 #define REG_FIFOTHRESH 0x35
wardm 12:046346a16ff4 82 // SM settings
wardm 12:046346a16ff4 83 #define REG_SEQCONFIG1 0x36
wardm 12:046346a16ff4 84 #define REG_SEQCONFIG2 0x37
wardm 12:046346a16ff4 85 #define REG_TIMERRESOL 0x38
wardm 12:046346a16ff4 86 #define REG_TIMER1COEF 0x39
wardm 12:046346a16ff4 87 #define REG_TIMER2COEF 0x3A
wardm 12:046346a16ff4 88 // Service settings
wardm 12:046346a16ff4 89 #define REG_IMAGECAL 0x3B
wardm 12:046346a16ff4 90 #define REG_TEMP 0x3C
wardm 12:046346a16ff4 91 #define REG_LOWBAT 0x3D
wardm 12:046346a16ff4 92 // Status
wardm 12:046346a16ff4 93 #define REG_IRQFLAGS1 0x3E
wardm 12:046346a16ff4 94 #define REG_IRQFLAGS2 0x3F
wardm 12:046346a16ff4 95 // I/O settings
wardm 12:046346a16ff4 96 #define REG_DIOMAPPING1 0x40
wardm 12:046346a16ff4 97 #define REG_DIOMAPPING2 0x41
wardm 12:046346a16ff4 98 // Version
wardm 12:046346a16ff4 99 #define REG_VERSION 0x42
wardm 12:046346a16ff4 100 // Additional settings
wardm 12:046346a16ff4 101 #define REG_PLLHOP 0x44
wardm 12:046346a16ff4 102 #define REG_TCXO 0x4B
wardm 12:046346a16ff4 103 #define REG_PADAC 0x4D
wardm 12:046346a16ff4 104 #define REG_FORMERTEMP 0x5B
wardm 12:046346a16ff4 105 #define REG_BITRATEFRAC 0x5D
wardm 12:046346a16ff4 106 #define REG_AGCREF 0x61
wardm 12:046346a16ff4 107 #define REG_AGCTHRESH1 0x62
wardm 12:046346a16ff4 108 #define REG_AGCTHRESH2 0x63
wardm 12:046346a16ff4 109 #define REG_AGCTHRESH3 0x64
wardm 12:046346a16ff4 110 #define REG_PLL 0x70
wardm 12:046346a16ff4 111
wardm 12:046346a16ff4 112 /*!
wardm 12:046346a16ff4 113 * ============================================================================
wardm 12:046346a16ff4 114 * SX1276 FSK bits control definition
wardm 12:046346a16ff4 115 * ============================================================================
wardm 12:046346a16ff4 116 */
wardm 12:046346a16ff4 117
wardm 12:046346a16ff4 118 /*!
wardm 12:046346a16ff4 119 * RegFifo
wardm 12:046346a16ff4 120 */
wardm 12:046346a16ff4 121
wardm 12:046346a16ff4 122 /*!
wardm 12:046346a16ff4 123 * RegOpMode
wardm 12:046346a16ff4 124 */
wardm 12:046346a16ff4 125 #define RF_OPMODE_LONGRANGEMODE_MASK 0x7F
wardm 12:046346a16ff4 126 #define RF_OPMODE_LONGRANGEMODE_OFF 0x00
wardm 12:046346a16ff4 127 #define RF_OPMODE_LONGRANGEMODE_ON 0x80
wardm 12:046346a16ff4 128
wardm 12:046346a16ff4 129 #define RF_OPMODE_MODULATIONTYPE_MASK 0x9F
wardm 12:046346a16ff4 130 #define RF_OPMODE_MODULATIONTYPE_FSK 0x00 // Default
wardm 12:046346a16ff4 131 #define RF_OPMODE_MODULATIONTYPE_OOK 0x20
wardm 12:046346a16ff4 132
wardm 12:046346a16ff4 133 #define RF_OPMODE_MODULATIONSHAPING_MASK 0xE7
wardm 12:046346a16ff4 134 #define RF_OPMODE_MODULATIONSHAPING_00 0x00 // Default
wardm 12:046346a16ff4 135 #define RF_OPMODE_MODULATIONSHAPING_01 0x08
wardm 12:046346a16ff4 136 #define RF_OPMODE_MODULATIONSHAPING_10 0x10
wardm 12:046346a16ff4 137 #define RF_OPMODE_MODULATIONSHAPING_11 0x18
wardm 12:046346a16ff4 138
wardm 12:046346a16ff4 139 #define RF_OPMODE_MASK 0xF8
wardm 12:046346a16ff4 140 #define RF_OPMODE_SLEEP 0x00
wardm 12:046346a16ff4 141 #define RF_OPMODE_STANDBY 0x01 // Default
wardm 12:046346a16ff4 142 #define RF_OPMODE_SYNTHESIZER_TX 0x02
wardm 12:046346a16ff4 143 #define RF_OPMODE_TRANSMITTER 0x03
wardm 12:046346a16ff4 144 #define RF_OPMODE_SYNTHESIZER_RX 0x04
wardm 12:046346a16ff4 145 #define RF_OPMODE_RECEIVER 0x05
wardm 12:046346a16ff4 146
wardm 12:046346a16ff4 147 /*!
wardm 12:046346a16ff4 148 * RegBitRate (bits/sec)
wardm 12:046346a16ff4 149 */
wardm 12:046346a16ff4 150 #define RF_BITRATEMSB_1200_BPS 0x68
wardm 12:046346a16ff4 151 #define RF_BITRATELSB_1200_BPS 0x2B
wardm 12:046346a16ff4 152 #define RF_BITRATEMSB_2400_BPS 0x34
wardm 12:046346a16ff4 153 #define RF_BITRATELSB_2400_BPS 0x15
wardm 12:046346a16ff4 154 #define RF_BITRATEMSB_4800_BPS 0x1A // Default
wardm 12:046346a16ff4 155 #define RF_BITRATELSB_4800_BPS 0x0B // Default
wardm 12:046346a16ff4 156 #define RF_BITRATEMSB_9600_BPS 0x0D
wardm 12:046346a16ff4 157 #define RF_BITRATELSB_9600_BPS 0x05
wardm 12:046346a16ff4 158 #define RF_BITRATEMSB_15000_BPS 0x08
wardm 12:046346a16ff4 159 #define RF_BITRATELSB_15000_BPS 0x55
wardm 12:046346a16ff4 160 #define RF_BITRATEMSB_19200_BPS 0x06
wardm 12:046346a16ff4 161 #define RF_BITRATELSB_19200_BPS 0x83
wardm 12:046346a16ff4 162 #define RF_BITRATEMSB_38400_BPS 0x03
wardm 12:046346a16ff4 163 #define RF_BITRATELSB_38400_BPS 0x41
wardm 12:046346a16ff4 164 #define RF_BITRATEMSB_76800_BPS 0x01
wardm 12:046346a16ff4 165 #define RF_BITRATELSB_76800_BPS 0xA1
wardm 12:046346a16ff4 166 #define RF_BITRATEMSB_153600_BPS 0x00
wardm 12:046346a16ff4 167 #define RF_BITRATELSB_153600_BPS 0xD0
wardm 12:046346a16ff4 168 #define RF_BITRATEMSB_57600_BPS 0x02
wardm 12:046346a16ff4 169 #define RF_BITRATELSB_57600_BPS 0x2C
wardm 12:046346a16ff4 170 #define RF_BITRATEMSB_115200_BPS 0x01
wardm 12:046346a16ff4 171 #define RF_BITRATELSB_115200_BPS 0x16
wardm 12:046346a16ff4 172 #define RF_BITRATEMSB_12500_BPS 0x0A
wardm 12:046346a16ff4 173 #define RF_BITRATELSB_12500_BPS 0x00
wardm 12:046346a16ff4 174 #define RF_BITRATEMSB_25000_BPS 0x05
wardm 12:046346a16ff4 175 #define RF_BITRATELSB_25000_BPS 0x00
wardm 12:046346a16ff4 176 #define RF_BITRATEMSB_50000_BPS 0x02
wardm 12:046346a16ff4 177 #define RF_BITRATELSB_50000_BPS 0x80
wardm 12:046346a16ff4 178 #define RF_BITRATEMSB_100000_BPS 0x01
wardm 12:046346a16ff4 179 #define RF_BITRATELSB_100000_BPS 0x40
wardm 12:046346a16ff4 180 #define RF_BITRATEMSB_150000_BPS 0x00
wardm 12:046346a16ff4 181 #define RF_BITRATELSB_150000_BPS 0xD5
wardm 12:046346a16ff4 182 #define RF_BITRATEMSB_200000_BPS 0x00
wardm 12:046346a16ff4 183 #define RF_BITRATELSB_200000_BPS 0xA0
wardm 12:046346a16ff4 184 #define RF_BITRATEMSB_250000_BPS 0x00
wardm 12:046346a16ff4 185 #define RF_BITRATELSB_250000_BPS 0x80
wardm 12:046346a16ff4 186 #define RF_BITRATEMSB_32768_BPS 0x03
wardm 12:046346a16ff4 187 #define RF_BITRATELSB_32768_BPS 0xD1
wardm 12:046346a16ff4 188
wardm 12:046346a16ff4 189 /*!
wardm 12:046346a16ff4 190 * RegFdev (Hz)
wardm 12:046346a16ff4 191 */
wardm 12:046346a16ff4 192 #define RF_FDEVMSB_2000_HZ 0x00
wardm 12:046346a16ff4 193 #define RF_FDEVLSB_2000_HZ 0x21
wardm 12:046346a16ff4 194 #define RF_FDEVMSB_5000_HZ 0x00 // Default
wardm 12:046346a16ff4 195 #define RF_FDEVLSB_5000_HZ 0x52 // Default
wardm 12:046346a16ff4 196 #define RF_FDEVMSB_10000_HZ 0x00
wardm 12:046346a16ff4 197 #define RF_FDEVLSB_10000_HZ 0xA4
wardm 12:046346a16ff4 198 #define RF_FDEVMSB_15000_HZ 0x00
wardm 12:046346a16ff4 199 #define RF_FDEVLSB_15000_HZ 0xF6
wardm 12:046346a16ff4 200 #define RF_FDEVMSB_20000_HZ 0x01
wardm 12:046346a16ff4 201 #define RF_FDEVLSB_20000_HZ 0x48
wardm 12:046346a16ff4 202 #define RF_FDEVMSB_25000_HZ 0x01
wardm 12:046346a16ff4 203 #define RF_FDEVLSB_25000_HZ 0x9A
wardm 12:046346a16ff4 204 #define RF_FDEVMSB_30000_HZ 0x01
wardm 12:046346a16ff4 205 #define RF_FDEVLSB_30000_HZ 0xEC
wardm 12:046346a16ff4 206 #define RF_FDEVMSB_35000_HZ 0x02
wardm 12:046346a16ff4 207 #define RF_FDEVLSB_35000_HZ 0x3D
wardm 12:046346a16ff4 208 #define RF_FDEVMSB_40000_HZ 0x02
wardm 12:046346a16ff4 209 #define RF_FDEVLSB_40000_HZ 0x8F
wardm 12:046346a16ff4 210 #define RF_FDEVMSB_45000_HZ 0x02
wardm 12:046346a16ff4 211 #define RF_FDEVLSB_45000_HZ 0xE1
wardm 12:046346a16ff4 212 #define RF_FDEVMSB_50000_HZ 0x03
wardm 12:046346a16ff4 213 #define RF_FDEVLSB_50000_HZ 0x33
wardm 12:046346a16ff4 214 #define RF_FDEVMSB_55000_HZ 0x03
wardm 12:046346a16ff4 215 #define RF_FDEVLSB_55000_HZ 0x85
wardm 12:046346a16ff4 216 #define RF_FDEVMSB_60000_HZ 0x03
wardm 12:046346a16ff4 217 #define RF_FDEVLSB_60000_HZ 0xD7
wardm 12:046346a16ff4 218 #define RF_FDEVMSB_65000_HZ 0x04
wardm 12:046346a16ff4 219 #define RF_FDEVLSB_65000_HZ 0x29
wardm 12:046346a16ff4 220 #define RF_FDEVMSB_70000_HZ 0x04
wardm 12:046346a16ff4 221 #define RF_FDEVLSB_70000_HZ 0x7B
wardm 12:046346a16ff4 222 #define RF_FDEVMSB_75000_HZ 0x04
wardm 12:046346a16ff4 223 #define RF_FDEVLSB_75000_HZ 0xCD
wardm 12:046346a16ff4 224 #define RF_FDEVMSB_80000_HZ 0x05
wardm 12:046346a16ff4 225 #define RF_FDEVLSB_80000_HZ 0x1F
wardm 12:046346a16ff4 226 #define RF_FDEVMSB_85000_HZ 0x05
wardm 12:046346a16ff4 227 #define RF_FDEVLSB_85000_HZ 0x71
wardm 12:046346a16ff4 228 #define RF_FDEVMSB_90000_HZ 0x05
wardm 12:046346a16ff4 229 #define RF_FDEVLSB_90000_HZ 0xC3
wardm 12:046346a16ff4 230 #define RF_FDEVMSB_95000_HZ 0x06
wardm 12:046346a16ff4 231 #define RF_FDEVLSB_95000_HZ 0x14
wardm 12:046346a16ff4 232 #define RF_FDEVMSB_100000_HZ 0x06
wardm 12:046346a16ff4 233 #define RF_FDEVLSB_100000_HZ 0x66
wardm 12:046346a16ff4 234 #define RF_FDEVMSB_110000_HZ 0x07
wardm 12:046346a16ff4 235 #define RF_FDEVLSB_110000_HZ 0x0A
wardm 12:046346a16ff4 236 #define RF_FDEVMSB_120000_HZ 0x07
wardm 12:046346a16ff4 237 #define RF_FDEVLSB_120000_HZ 0xAE
wardm 12:046346a16ff4 238 #define RF_FDEVMSB_130000_HZ 0x08
wardm 12:046346a16ff4 239 #define RF_FDEVLSB_130000_HZ 0x52
wardm 12:046346a16ff4 240 #define RF_FDEVMSB_140000_HZ 0x08
wardm 12:046346a16ff4 241 #define RF_FDEVLSB_140000_HZ 0xF6
wardm 12:046346a16ff4 242 #define RF_FDEVMSB_150000_HZ 0x09
wardm 12:046346a16ff4 243 #define RF_FDEVLSB_150000_HZ 0x9A
wardm 12:046346a16ff4 244 #define RF_FDEVMSB_160000_HZ 0x0A
wardm 12:046346a16ff4 245 #define RF_FDEVLSB_160000_HZ 0x3D
wardm 12:046346a16ff4 246 #define RF_FDEVMSB_170000_HZ 0x0A
wardm 12:046346a16ff4 247 #define RF_FDEVLSB_170000_HZ 0xE1
wardm 12:046346a16ff4 248 #define RF_FDEVMSB_180000_HZ 0x0B
wardm 12:046346a16ff4 249 #define RF_FDEVLSB_180000_HZ 0x85
wardm 12:046346a16ff4 250 #define RF_FDEVMSB_190000_HZ 0x0C
wardm 12:046346a16ff4 251 #define RF_FDEVLSB_190000_HZ 0x29
wardm 12:046346a16ff4 252 #define RF_FDEVMSB_200000_HZ 0x0C
wardm 12:046346a16ff4 253 #define RF_FDEVLSB_200000_HZ 0xCD
wardm 12:046346a16ff4 254
wardm 12:046346a16ff4 255 /*!
wardm 12:046346a16ff4 256 * RegFrf (MHz)
wardm 12:046346a16ff4 257 */
wardm 12:046346a16ff4 258 #define RF_FRFMSB_863_MHZ 0xD7
wardm 12:046346a16ff4 259 #define RF_FRFMID_863_MHZ 0xC0
wardm 12:046346a16ff4 260 #define RF_FRFLSB_863_MHZ 0x00
wardm 12:046346a16ff4 261 #define RF_FRFMSB_864_MHZ 0xD8
wardm 12:046346a16ff4 262 #define RF_FRFMID_864_MHZ 0x00
wardm 12:046346a16ff4 263 #define RF_FRFLSB_864_MHZ 0x00
wardm 12:046346a16ff4 264 #define RF_FRFMSB_865_MHZ 0xD8
wardm 12:046346a16ff4 265 #define RF_FRFMID_865_MHZ 0x40
wardm 12:046346a16ff4 266 #define RF_FRFLSB_865_MHZ 0x00
wardm 12:046346a16ff4 267 #define RF_FRFMSB_866_MHZ 0xD8
wardm 12:046346a16ff4 268 #define RF_FRFMID_866_MHZ 0x80
wardm 12:046346a16ff4 269 #define RF_FRFLSB_866_MHZ 0x00
wardm 12:046346a16ff4 270 #define RF_FRFMSB_867_MHZ 0xD8
wardm 12:046346a16ff4 271 #define RF_FRFMID_867_MHZ 0xC0
wardm 12:046346a16ff4 272 #define RF_FRFLSB_867_MHZ 0x00
wardm 12:046346a16ff4 273 #define RF_FRFMSB_868_MHZ 0xD9
wardm 12:046346a16ff4 274 #define RF_FRFMID_868_MHZ 0x00
wardm 12:046346a16ff4 275 #define RF_FRFLSB_868_MHZ 0x00
wardm 12:046346a16ff4 276 #define RF_FRFMSB_869_MHZ 0xD9
wardm 12:046346a16ff4 277 #define RF_FRFMID_869_MHZ 0x40
wardm 12:046346a16ff4 278 #define RF_FRFLSB_869_MHZ 0x00
wardm 12:046346a16ff4 279 #define RF_FRFMSB_870_MHZ 0xD9
wardm 12:046346a16ff4 280 #define RF_FRFMID_870_MHZ 0x80
wardm 12:046346a16ff4 281 #define RF_FRFLSB_870_MHZ 0x00
wardm 12:046346a16ff4 282
wardm 12:046346a16ff4 283 #define RF_FRFMSB_902_MHZ 0xE1
wardm 12:046346a16ff4 284 #define RF_FRFMID_902_MHZ 0x80
wardm 12:046346a16ff4 285 #define RF_FRFLSB_902_MHZ 0x00
wardm 12:046346a16ff4 286 #define RF_FRFMSB_903_MHZ 0xE1
wardm 12:046346a16ff4 287 #define RF_FRFMID_903_MHZ 0xC0
wardm 12:046346a16ff4 288 #define RF_FRFLSB_903_MHZ 0x00
wardm 12:046346a16ff4 289 #define RF_FRFMSB_904_MHZ 0xE2
wardm 12:046346a16ff4 290 #define RF_FRFMID_904_MHZ 0x00
wardm 12:046346a16ff4 291 #define RF_FRFLSB_904_MHZ 0x00
wardm 12:046346a16ff4 292 #define RF_FRFMSB_905_MHZ 0xE2
wardm 12:046346a16ff4 293 #define RF_FRFMID_905_MHZ 0x40
wardm 12:046346a16ff4 294 #define RF_FRFLSB_905_MHZ 0x00
wardm 12:046346a16ff4 295 #define RF_FRFMSB_906_MHZ 0xE2
wardm 12:046346a16ff4 296 #define RF_FRFMID_906_MHZ 0x80
wardm 12:046346a16ff4 297 #define RF_FRFLSB_906_MHZ 0x00
wardm 12:046346a16ff4 298 #define RF_FRFMSB_907_MHZ 0xE2
wardm 12:046346a16ff4 299 #define RF_FRFMID_907_MHZ 0xC0
wardm 12:046346a16ff4 300 #define RF_FRFLSB_907_MHZ 0x00
wardm 12:046346a16ff4 301 #define RF_FRFMSB_908_MHZ 0xE3
wardm 12:046346a16ff4 302 #define RF_FRFMID_908_MHZ 0x00
wardm 12:046346a16ff4 303 #define RF_FRFLSB_908_MHZ 0x00
wardm 12:046346a16ff4 304 #define RF_FRFMSB_909_MHZ 0xE3
wardm 12:046346a16ff4 305 #define RF_FRFMID_909_MHZ 0x40
wardm 12:046346a16ff4 306 #define RF_FRFLSB_909_MHZ 0x00
wardm 12:046346a16ff4 307 #define RF_FRFMSB_910_MHZ 0xE3
wardm 12:046346a16ff4 308 #define RF_FRFMID_910_MHZ 0x80
wardm 12:046346a16ff4 309 #define RF_FRFLSB_910_MHZ 0x00
wardm 12:046346a16ff4 310 #define RF_FRFMSB_911_MHZ 0xE3
wardm 12:046346a16ff4 311 #define RF_FRFMID_911_MHZ 0xC0
wardm 12:046346a16ff4 312 #define RF_FRFLSB_911_MHZ 0x00
wardm 12:046346a16ff4 313 #define RF_FRFMSB_912_MHZ 0xE4
wardm 12:046346a16ff4 314 #define RF_FRFMID_912_MHZ 0x00
wardm 12:046346a16ff4 315 #define RF_FRFLSB_912_MHZ 0x00
wardm 12:046346a16ff4 316 #define RF_FRFMSB_913_MHZ 0xE4
wardm 12:046346a16ff4 317 #define RF_FRFMID_913_MHZ 0x40
wardm 12:046346a16ff4 318 #define RF_FRFLSB_913_MHZ 0x00
wardm 12:046346a16ff4 319 #define RF_FRFMSB_914_MHZ 0xE4
wardm 12:046346a16ff4 320 #define RF_FRFMID_914_MHZ 0x80
wardm 12:046346a16ff4 321 #define RF_FRFLSB_914_MHZ 0x00
wardm 12:046346a16ff4 322 #define RF_FRFMSB_915_MHZ 0xE4 // Default
wardm 12:046346a16ff4 323 #define RF_FRFMID_915_MHZ 0xC0 // Default
wardm 12:046346a16ff4 324 #define RF_FRFLSB_915_MHZ 0x00 // Default
wardm 12:046346a16ff4 325 #define RF_FRFMSB_916_MHZ 0xE5
wardm 12:046346a16ff4 326 #define RF_FRFMID_916_MHZ 0x00
wardm 12:046346a16ff4 327 #define RF_FRFLSB_916_MHZ 0x00
wardm 12:046346a16ff4 328 #define RF_FRFMSB_917_MHZ 0xE5
wardm 12:046346a16ff4 329 #define RF_FRFMID_917_MHZ 0x40
wardm 12:046346a16ff4 330 #define RF_FRFLSB_917_MHZ 0x00
wardm 12:046346a16ff4 331 #define RF_FRFMSB_918_MHZ 0xE5
wardm 12:046346a16ff4 332 #define RF_FRFMID_918_MHZ 0x80
wardm 12:046346a16ff4 333 #define RF_FRFLSB_918_MHZ 0x00
wardm 12:046346a16ff4 334 #define RF_FRFMSB_919_MHZ 0xE5
wardm 12:046346a16ff4 335 #define RF_FRFMID_919_MHZ 0xC0
wardm 12:046346a16ff4 336 #define RF_FRFLSB_919_MHZ 0x00
wardm 12:046346a16ff4 337 #define RF_FRFMSB_920_MHZ 0xE6
wardm 12:046346a16ff4 338 #define RF_FRFMID_920_MHZ 0x00
wardm 12:046346a16ff4 339 #define RF_FRFLSB_920_MHZ 0x00
wardm 12:046346a16ff4 340 #define RF_FRFMSB_921_MHZ 0xE6
wardm 12:046346a16ff4 341 #define RF_FRFMID_921_MHZ 0x40
wardm 12:046346a16ff4 342 #define RF_FRFLSB_921_MHZ 0x00
wardm 12:046346a16ff4 343 #define RF_FRFMSB_922_MHZ 0xE6
wardm 12:046346a16ff4 344 #define RF_FRFMID_922_MHZ 0x80
wardm 12:046346a16ff4 345 #define RF_FRFLSB_922_MHZ 0x00
wardm 12:046346a16ff4 346 #define RF_FRFMSB_923_MHZ 0xE6
wardm 12:046346a16ff4 347 #define RF_FRFMID_923_MHZ 0xC0
wardm 12:046346a16ff4 348 #define RF_FRFLSB_923_MHZ 0x00
wardm 12:046346a16ff4 349 #define RF_FRFMSB_924_MHZ 0xE7
wardm 12:046346a16ff4 350 #define RF_FRFMID_924_MHZ 0x00
wardm 12:046346a16ff4 351 #define RF_FRFLSB_924_MHZ 0x00
wardm 12:046346a16ff4 352 #define RF_FRFMSB_925_MHZ 0xE7
wardm 12:046346a16ff4 353 #define RF_FRFMID_925_MHZ 0x40
wardm 12:046346a16ff4 354 #define RF_FRFLSB_925_MHZ 0x00
wardm 12:046346a16ff4 355 #define RF_FRFMSB_926_MHZ 0xE7
wardm 12:046346a16ff4 356 #define RF_FRFMID_926_MHZ 0x80
wardm 12:046346a16ff4 357 #define RF_FRFLSB_926_MHZ 0x00
wardm 12:046346a16ff4 358 #define RF_FRFMSB_927_MHZ 0xE7
wardm 12:046346a16ff4 359 #define RF_FRFMID_927_MHZ 0xC0
wardm 12:046346a16ff4 360 #define RF_FRFLSB_927_MHZ 0x00
wardm 12:046346a16ff4 361 #define RF_FRFMSB_928_MHZ 0xE8
wardm 12:046346a16ff4 362 #define RF_FRFMID_928_MHZ 0x00
wardm 12:046346a16ff4 363 #define RF_FRFLSB_928_MHZ 0x00
wardm 12:046346a16ff4 364
wardm 12:046346a16ff4 365 /*!
wardm 12:046346a16ff4 366 * RegPaConfig
wardm 12:046346a16ff4 367 */
wardm 12:046346a16ff4 368 #define RF_PACONFIG_PASELECT_MASK 0x7F
wardm 12:046346a16ff4 369 #define RF_PACONFIG_PASELECT_PABOOST 0x80
wardm 12:046346a16ff4 370 #define RF_PACONFIG_PASELECT_RFO 0x00 // Default
wardm 12:046346a16ff4 371
wardm 12:046346a16ff4 372 #define RF_PACONFIG_MAX_POWER_MASK 0x8F
wardm 12:046346a16ff4 373
wardm 12:046346a16ff4 374 #define RF_PACONFIG_OUTPUTPOWER_MASK 0xF0
wardm 12:046346a16ff4 375
wardm 12:046346a16ff4 376 /*!
wardm 12:046346a16ff4 377 * RegPaRamp
wardm 12:046346a16ff4 378 */
wardm 12:046346a16ff4 379 #define RF_PARAMP_MODULATIONSHAPING_MASK 0x9F
wardm 12:046346a16ff4 380 #define RF_PARAMP_MODULATIONSHAPING_00 0x00 // Default
wardm 12:046346a16ff4 381 #define RF_PARAMP_MODULATIONSHAPING_01 0x20
wardm 12:046346a16ff4 382 #define RF_PARAMP_MODULATIONSHAPING_10 0x40
wardm 12:046346a16ff4 383 #define RF_PARAMP_MODULATIONSHAPING_11 0x60
wardm 12:046346a16ff4 384
wardm 12:046346a16ff4 385 #define RF_PARAMP_LOWPNTXPLL_MASK 0xEF
wardm 12:046346a16ff4 386 #define RF_PARAMP_LOWPNTXPLL_OFF 0x10
wardm 12:046346a16ff4 387 #define RF_PARAMP_LOWPNTXPLL_ON 0x00 // Default
wardm 12:046346a16ff4 388
wardm 12:046346a16ff4 389 #define RF_PARAMP_MASK 0xF0
wardm 12:046346a16ff4 390 #define RF_PARAMP_3400_US 0x00
wardm 12:046346a16ff4 391 #define RF_PARAMP_2000_US 0x01
wardm 12:046346a16ff4 392 #define RF_PARAMP_1000_US 0x02
wardm 12:046346a16ff4 393 #define RF_PARAMP_0500_US 0x03
wardm 12:046346a16ff4 394 #define RF_PARAMP_0250_US 0x04
wardm 12:046346a16ff4 395 #define RF_PARAMP_0125_US 0x05
wardm 12:046346a16ff4 396 #define RF_PARAMP_0100_US 0x06
wardm 12:046346a16ff4 397 #define RF_PARAMP_0062_US 0x07
wardm 12:046346a16ff4 398 #define RF_PARAMP_0050_US 0x08
wardm 12:046346a16ff4 399 #define RF_PARAMP_0040_US 0x09 // Default
wardm 12:046346a16ff4 400 #define RF_PARAMP_0031_US 0x0A
wardm 12:046346a16ff4 401 #define RF_PARAMP_0025_US 0x0B
wardm 12:046346a16ff4 402 #define RF_PARAMP_0020_US 0x0C
wardm 12:046346a16ff4 403 #define RF_PARAMP_0015_US 0x0D
wardm 12:046346a16ff4 404 #define RF_PARAMP_0012_US 0x0E
wardm 12:046346a16ff4 405 #define RF_PARAMP_0010_US 0x0F
wardm 12:046346a16ff4 406
wardm 12:046346a16ff4 407 /*!
wardm 12:046346a16ff4 408 * RegOcp
wardm 12:046346a16ff4 409 */
wardm 12:046346a16ff4 410 #define RF_OCP_MASK 0xDF
wardm 12:046346a16ff4 411 #define RF_OCP_ON 0x20 // Default
wardm 12:046346a16ff4 412 #define RF_OCP_OFF 0x00
wardm 12:046346a16ff4 413
wardm 12:046346a16ff4 414 #define RF_OCP_TRIM_MASK 0xE0
wardm 12:046346a16ff4 415 #define RF_OCP_TRIM_045_MA 0x00
wardm 12:046346a16ff4 416 #define RF_OCP_TRIM_050_MA 0x01
wardm 12:046346a16ff4 417 #define RF_OCP_TRIM_055_MA 0x02
wardm 12:046346a16ff4 418 #define RF_OCP_TRIM_060_MA 0x03
wardm 12:046346a16ff4 419 #define RF_OCP_TRIM_065_MA 0x04
wardm 12:046346a16ff4 420 #define RF_OCP_TRIM_070_MA 0x05
wardm 12:046346a16ff4 421 #define RF_OCP_TRIM_075_MA 0x06
wardm 12:046346a16ff4 422 #define RF_OCP_TRIM_080_MA 0x07
wardm 12:046346a16ff4 423 #define RF_OCP_TRIM_085_MA 0x08
wardm 12:046346a16ff4 424 #define RF_OCP_TRIM_090_MA 0x09
wardm 12:046346a16ff4 425 #define RF_OCP_TRIM_095_MA 0x0A
wardm 12:046346a16ff4 426 #define RF_OCP_TRIM_100_MA 0x0B // Default
wardm 12:046346a16ff4 427 #define RF_OCP_TRIM_105_MA 0x0C
wardm 12:046346a16ff4 428 #define RF_OCP_TRIM_110_MA 0x0D
wardm 12:046346a16ff4 429 #define RF_OCP_TRIM_115_MA 0x0E
wardm 12:046346a16ff4 430 #define RF_OCP_TRIM_120_MA 0x0F
wardm 12:046346a16ff4 431 #define RF_OCP_TRIM_130_MA 0x10
wardm 12:046346a16ff4 432 #define RF_OCP_TRIM_140_MA 0x11
wardm 12:046346a16ff4 433 #define RF_OCP_TRIM_150_MA 0x12
wardm 12:046346a16ff4 434 #define RF_OCP_TRIM_160_MA 0x13
wardm 12:046346a16ff4 435 #define RF_OCP_TRIM_170_MA 0x14
wardm 12:046346a16ff4 436 #define RF_OCP_TRIM_180_MA 0x15
wardm 12:046346a16ff4 437 #define RF_OCP_TRIM_190_MA 0x16
wardm 12:046346a16ff4 438 #define RF_OCP_TRIM_200_MA 0x17
wardm 12:046346a16ff4 439 #define RF_OCP_TRIM_210_MA 0x18
wardm 12:046346a16ff4 440 #define RF_OCP_TRIM_220_MA 0x19
wardm 12:046346a16ff4 441 #define RF_OCP_TRIM_230_MA 0x1A
wardm 12:046346a16ff4 442 #define RF_OCP_TRIM_240_MA 0x1B
wardm 12:046346a16ff4 443
wardm 12:046346a16ff4 444 /*!
wardm 12:046346a16ff4 445 * RegLna
wardm 12:046346a16ff4 446 */
wardm 12:046346a16ff4 447 #define RF_LNA_GAIN_MASK 0x1F
wardm 12:046346a16ff4 448 #define RF_LNA_GAIN_G1 0x20 // Default
wardm 12:046346a16ff4 449 #define RF_LNA_GAIN_G2 0x40
wardm 12:046346a16ff4 450 #define RF_LNA_GAIN_G3 0x60
wardm 12:046346a16ff4 451 #define RF_LNA_GAIN_G4 0x80
wardm 12:046346a16ff4 452 #define RF_LNA_GAIN_G5 0xA0
wardm 12:046346a16ff4 453 #define RF_LNA_GAIN_G6 0xC0
wardm 12:046346a16ff4 454
wardm 12:046346a16ff4 455 #define RF_LNA_BOOST_MASK 0xFC
wardm 12:046346a16ff4 456 #define RF_LNA_BOOST_OFF 0x00 // Default
wardm 12:046346a16ff4 457 #define RF_LNA_BOOST_ON 0x03
wardm 12:046346a16ff4 458
wardm 12:046346a16ff4 459 /*!
wardm 12:046346a16ff4 460 * RegRxConfig
wardm 12:046346a16ff4 461 */
wardm 12:046346a16ff4 462 #define RF_RXCONFIG_RESTARTRXONCOLLISION_MASK 0x7F
wardm 12:046346a16ff4 463 #define RF_RXCONFIG_RESTARTRXONCOLLISION_ON 0x80
wardm 12:046346a16ff4 464 #define RF_RXCONFIG_RESTARTRXONCOLLISION_OFF 0x00 // Default
wardm 12:046346a16ff4 465
wardm 12:046346a16ff4 466 #define RF_RXCONFIG_RESTARTRXWITHOUTPLLLOCK 0x40 // Write only
wardm 12:046346a16ff4 467
wardm 12:046346a16ff4 468 #define RF_RXCONFIG_RESTARTRXWITHPLLLOCK 0x20 // Write only
wardm 12:046346a16ff4 469
wardm 12:046346a16ff4 470 #define RF_RXCONFIG_AFCAUTO_MASK 0xEF
wardm 12:046346a16ff4 471 #define RF_RXCONFIG_AFCAUTO_ON 0x10
wardm 12:046346a16ff4 472 #define RF_RXCONFIG_AFCAUTO_OFF 0x00 // Default
wardm 12:046346a16ff4 473
wardm 12:046346a16ff4 474 #define RF_RXCONFIG_AGCAUTO_MASK 0xF7
wardm 12:046346a16ff4 475 #define RF_RXCONFIG_AGCAUTO_ON 0x08 // Default
wardm 12:046346a16ff4 476 #define RF_RXCONFIG_AGCAUTO_OFF 0x00
wardm 12:046346a16ff4 477
wardm 12:046346a16ff4 478 #define RF_RXCONFIG_RXTRIGER_MASK 0xF8
wardm 12:046346a16ff4 479 #define RF_RXCONFIG_RXTRIGER_OFF 0x00
wardm 12:046346a16ff4 480 #define RF_RXCONFIG_RXTRIGER_RSSI 0x01
wardm 12:046346a16ff4 481 #define RF_RXCONFIG_RXTRIGER_PREAMBLEDETECT 0x06 // Default
wardm 12:046346a16ff4 482 #define RF_RXCONFIG_RXTRIGER_RSSI_PREAMBLEDETECT 0x07
wardm 12:046346a16ff4 483
wardm 12:046346a16ff4 484 /*!
wardm 12:046346a16ff4 485 * RegRssiConfig
wardm 12:046346a16ff4 486 */
wardm 12:046346a16ff4 487 #define RF_RSSICONFIG_OFFSET_MASK 0x07
wardm 12:046346a16ff4 488 #define RF_RSSICONFIG_OFFSET_P_00_DB 0x00 // Default
wardm 12:046346a16ff4 489 #define RF_RSSICONFIG_OFFSET_P_01_DB 0x08
wardm 12:046346a16ff4 490 #define RF_RSSICONFIG_OFFSET_P_02_DB 0x10
wardm 12:046346a16ff4 491 #define RF_RSSICONFIG_OFFSET_P_03_DB 0x18
wardm 12:046346a16ff4 492 #define RF_RSSICONFIG_OFFSET_P_04_DB 0x20
wardm 12:046346a16ff4 493 #define RF_RSSICONFIG_OFFSET_P_05_DB 0x28
wardm 12:046346a16ff4 494 #define RF_RSSICONFIG_OFFSET_P_06_DB 0x30
wardm 12:046346a16ff4 495 #define RF_RSSICONFIG_OFFSET_P_07_DB 0x38
wardm 12:046346a16ff4 496 #define RF_RSSICONFIG_OFFSET_P_08_DB 0x40
wardm 12:046346a16ff4 497 #define RF_RSSICONFIG_OFFSET_P_09_DB 0x48
wardm 12:046346a16ff4 498 #define RF_RSSICONFIG_OFFSET_P_10_DB 0x50
wardm 12:046346a16ff4 499 #define RF_RSSICONFIG_OFFSET_P_11_DB 0x58
wardm 12:046346a16ff4 500 #define RF_RSSICONFIG_OFFSET_P_12_DB 0x60
wardm 12:046346a16ff4 501 #define RF_RSSICONFIG_OFFSET_P_13_DB 0x68
wardm 12:046346a16ff4 502 #define RF_RSSICONFIG_OFFSET_P_14_DB 0x70
wardm 12:046346a16ff4 503 #define RF_RSSICONFIG_OFFSET_P_15_DB 0x78
wardm 12:046346a16ff4 504 #define RF_RSSICONFIG_OFFSET_M_16_DB 0x80
wardm 12:046346a16ff4 505 #define RF_RSSICONFIG_OFFSET_M_15_DB 0x88
wardm 12:046346a16ff4 506 #define RF_RSSICONFIG_OFFSET_M_14_DB 0x90
wardm 12:046346a16ff4 507 #define RF_RSSICONFIG_OFFSET_M_13_DB 0x98
wardm 12:046346a16ff4 508 #define RF_RSSICONFIG_OFFSET_M_12_DB 0xA0
wardm 12:046346a16ff4 509 #define RF_RSSICONFIG_OFFSET_M_11_DB 0xA8
wardm 12:046346a16ff4 510 #define RF_RSSICONFIG_OFFSET_M_10_DB 0xB0
wardm 12:046346a16ff4 511 #define RF_RSSICONFIG_OFFSET_M_09_DB 0xB8
wardm 12:046346a16ff4 512 #define RF_RSSICONFIG_OFFSET_M_08_DB 0xC0
wardm 12:046346a16ff4 513 #define RF_RSSICONFIG_OFFSET_M_07_DB 0xC8
wardm 12:046346a16ff4 514 #define RF_RSSICONFIG_OFFSET_M_06_DB 0xD0
wardm 12:046346a16ff4 515 #define RF_RSSICONFIG_OFFSET_M_05_DB 0xD8
wardm 12:046346a16ff4 516 #define RF_RSSICONFIG_OFFSET_M_04_DB 0xE0
wardm 12:046346a16ff4 517 #define RF_RSSICONFIG_OFFSET_M_03_DB 0xE8
wardm 12:046346a16ff4 518 #define RF_RSSICONFIG_OFFSET_M_02_DB 0xF0
wardm 12:046346a16ff4 519 #define RF_RSSICONFIG_OFFSET_M_01_DB 0xF8
wardm 12:046346a16ff4 520
wardm 12:046346a16ff4 521 #define RF_RSSICONFIG_SMOOTHING_MASK 0xF8
wardm 12:046346a16ff4 522 #define RF_RSSICONFIG_SMOOTHING_2 0x00
wardm 12:046346a16ff4 523 #define RF_RSSICONFIG_SMOOTHING_4 0x01
wardm 12:046346a16ff4 524 #define RF_RSSICONFIG_SMOOTHING_8 0x02 // Default
wardm 12:046346a16ff4 525 #define RF_RSSICONFIG_SMOOTHING_16 0x03
wardm 12:046346a16ff4 526 #define RF_RSSICONFIG_SMOOTHING_32 0x04
wardm 12:046346a16ff4 527 #define RF_RSSICONFIG_SMOOTHING_64 0x05
wardm 12:046346a16ff4 528 #define RF_RSSICONFIG_SMOOTHING_128 0x06
wardm 12:046346a16ff4 529 #define RF_RSSICONFIG_SMOOTHING_256 0x07
wardm 12:046346a16ff4 530
wardm 12:046346a16ff4 531 /*!
wardm 12:046346a16ff4 532 * RegRssiCollision
wardm 12:046346a16ff4 533 */
wardm 12:046346a16ff4 534 #define RF_RSSICOLISION_THRESHOLD 0x0A // Default
wardm 12:046346a16ff4 535
wardm 12:046346a16ff4 536 /*!
wardm 12:046346a16ff4 537 * RegRssiThresh
wardm 12:046346a16ff4 538 */
wardm 12:046346a16ff4 539 #define RF_RSSITHRESH_THRESHOLD 0xFF // Default
wardm 12:046346a16ff4 540
wardm 12:046346a16ff4 541 /*!
wardm 12:046346a16ff4 542 * RegRssiValue (Read Only)
wardm 12:046346a16ff4 543 */
wardm 12:046346a16ff4 544
wardm 12:046346a16ff4 545 /*!
wardm 12:046346a16ff4 546 * RegRxBw
wardm 12:046346a16ff4 547 */
wardm 12:046346a16ff4 548 #define RF_RXBW_MANT_MASK 0xE7
wardm 12:046346a16ff4 549 #define RF_RXBW_MANT_16 0x00
wardm 12:046346a16ff4 550 #define RF_RXBW_MANT_20 0x08
wardm 12:046346a16ff4 551 #define RF_RXBW_MANT_24 0x10 // Default
wardm 12:046346a16ff4 552
wardm 12:046346a16ff4 553 #define RF_RXBW_EXP_MASK 0xF8
wardm 12:046346a16ff4 554 #define RF_RXBW_EXP_0 0x00
wardm 12:046346a16ff4 555 #define RF_RXBW_EXP_1 0x01
wardm 12:046346a16ff4 556 #define RF_RXBW_EXP_2 0x02
wardm 12:046346a16ff4 557 #define RF_RXBW_EXP_3 0x03
wardm 12:046346a16ff4 558 #define RF_RXBW_EXP_4 0x04
wardm 12:046346a16ff4 559 #define RF_RXBW_EXP_5 0x05 // Default
wardm 12:046346a16ff4 560 #define RF_RXBW_EXP_6 0x06
wardm 12:046346a16ff4 561 #define RF_RXBW_EXP_7 0x07
wardm 12:046346a16ff4 562
wardm 12:046346a16ff4 563 /*!
wardm 12:046346a16ff4 564 * RegAfcBw
wardm 12:046346a16ff4 565 */
wardm 12:046346a16ff4 566 #define RF_AFCBW_MANTAFC_MASK 0xE7
wardm 12:046346a16ff4 567 #define RF_AFCBW_MANTAFC_16 0x00
wardm 12:046346a16ff4 568 #define RF_AFCBW_MANTAFC_20 0x08 // Default
wardm 12:046346a16ff4 569 #define RF_AFCBW_MANTAFC_24 0x10
wardm 12:046346a16ff4 570
wardm 12:046346a16ff4 571 #define RF_AFCBW_EXPAFC_MASK 0xF8
wardm 12:046346a16ff4 572 #define RF_AFCBW_EXPAFC_0 0x00
wardm 12:046346a16ff4 573 #define RF_AFCBW_EXPAFC_1 0x01
wardm 12:046346a16ff4 574 #define RF_AFCBW_EXPAFC_2 0x02
wardm 12:046346a16ff4 575 #define RF_AFCBW_EXPAFC_3 0x03 // Default
wardm 12:046346a16ff4 576 #define RF_AFCBW_EXPAFC_4 0x04
wardm 12:046346a16ff4 577 #define RF_AFCBW_EXPAFC_5 0x05
wardm 12:046346a16ff4 578 #define RF_AFCBW_EXPAFC_6 0x06
wardm 12:046346a16ff4 579 #define RF_AFCBW_EXPAFC_7 0x07
wardm 12:046346a16ff4 580
wardm 12:046346a16ff4 581 /*!
wardm 12:046346a16ff4 582 * RegOokPeak
wardm 12:046346a16ff4 583 */
wardm 12:046346a16ff4 584 #define RF_OOKPEAK_BITSYNC_MASK 0xDF // Default
wardm 12:046346a16ff4 585 #define RF_OOKPEAK_BITSYNC_ON 0x20 // Default
wardm 12:046346a16ff4 586 #define RF_OOKPEAK_BITSYNC_OFF 0x00
wardm 12:046346a16ff4 587
wardm 12:046346a16ff4 588 #define RF_OOKPEAK_OOKTHRESHTYPE_MASK 0xE7
wardm 12:046346a16ff4 589 #define RF_OOKPEAK_OOKTHRESHTYPE_FIXED 0x00
wardm 12:046346a16ff4 590 #define RF_OOKPEAK_OOKTHRESHTYPE_PEAK 0x08 // Default
wardm 12:046346a16ff4 591 #define RF_OOKPEAK_OOKTHRESHTYPE_AVERAGE 0x10
wardm 12:046346a16ff4 592
wardm 12:046346a16ff4 593 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_MASK 0xF8
wardm 12:046346a16ff4 594 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_0_5_DB 0x00 // Default
wardm 12:046346a16ff4 595 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_1_0_DB 0x01
wardm 12:046346a16ff4 596 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_1_5_DB 0x02
wardm 12:046346a16ff4 597 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_2_0_DB 0x03
wardm 12:046346a16ff4 598 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_3_0_DB 0x04
wardm 12:046346a16ff4 599 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_4_0_DB 0x05
wardm 12:046346a16ff4 600 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_5_0_DB 0x06
wardm 12:046346a16ff4 601 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_6_0_DB 0x07
wardm 12:046346a16ff4 602
wardm 12:046346a16ff4 603 /*!
wardm 12:046346a16ff4 604 * RegOokFix
wardm 12:046346a16ff4 605 */
wardm 12:046346a16ff4 606 #define RF_OOKFIX_OOKFIXEDTHRESHOLD 0x0C // Default
wardm 12:046346a16ff4 607
wardm 12:046346a16ff4 608 /*!
wardm 12:046346a16ff4 609 * RegOokAvg
wardm 12:046346a16ff4 610 */
wardm 12:046346a16ff4 611 #define RF_OOKAVG_OOKPEAKTHRESHDEC_MASK 0x1F
wardm 12:046346a16ff4 612 #define RF_OOKAVG_OOKPEAKTHRESHDEC_000 0x00 // Default
wardm 12:046346a16ff4 613 #define RF_OOKAVG_OOKPEAKTHRESHDEC_001 0x20
wardm 12:046346a16ff4 614 #define RF_OOKAVG_OOKPEAKTHRESHDEC_010 0x40
wardm 12:046346a16ff4 615 #define RF_OOKAVG_OOKPEAKTHRESHDEC_011 0x60
wardm 12:046346a16ff4 616 #define RF_OOKAVG_OOKPEAKTHRESHDEC_100 0x80
wardm 12:046346a16ff4 617 #define RF_OOKAVG_OOKPEAKTHRESHDEC_101 0xA0
wardm 12:046346a16ff4 618 #define RF_OOKAVG_OOKPEAKTHRESHDEC_110 0xC0
wardm 12:046346a16ff4 619 #define RF_OOKAVG_OOKPEAKTHRESHDEC_111 0xE0
wardm 12:046346a16ff4 620
wardm 12:046346a16ff4 621 #define RF_OOKAVG_AVERAGEOFFSET_MASK 0xF3
wardm 12:046346a16ff4 622 #define RF_OOKAVG_AVERAGEOFFSET_0_DB 0x00 // Default
wardm 12:046346a16ff4 623 #define RF_OOKAVG_AVERAGEOFFSET_2_DB 0x04
wardm 12:046346a16ff4 624 #define RF_OOKAVG_AVERAGEOFFSET_4_DB 0x08
wardm 12:046346a16ff4 625 #define RF_OOKAVG_AVERAGEOFFSET_6_DB 0x0C
wardm 12:046346a16ff4 626
wardm 12:046346a16ff4 627 #define RF_OOKAVG_OOKAVERAGETHRESHFILT_MASK 0xFC
wardm 12:046346a16ff4 628 #define RF_OOKAVG_OOKAVERAGETHRESHFILT_00 0x00
wardm 12:046346a16ff4 629 #define RF_OOKAVG_OOKAVERAGETHRESHFILT_01 0x01
wardm 12:046346a16ff4 630 #define RF_OOKAVG_OOKAVERAGETHRESHFILT_10 0x02 // Default
wardm 12:046346a16ff4 631 #define RF_OOKAVG_OOKAVERAGETHRESHFILT_11 0x03
wardm 12:046346a16ff4 632
wardm 12:046346a16ff4 633 /*!
wardm 12:046346a16ff4 634 * RegAfcFei
wardm 12:046346a16ff4 635 */
wardm 12:046346a16ff4 636 #define RF_AFCFEI_AGCSTART 0x10
wardm 12:046346a16ff4 637
wardm 12:046346a16ff4 638 #define RF_AFCFEI_AFCCLEAR 0x02
wardm 12:046346a16ff4 639
wardm 12:046346a16ff4 640 #define RF_AFCFEI_AFCAUTOCLEAR_MASK 0xFE
wardm 12:046346a16ff4 641 #define RF_AFCFEI_AFCAUTOCLEAR_ON 0x01
wardm 12:046346a16ff4 642 #define RF_AFCFEI_AFCAUTOCLEAR_OFF 0x00 // Default
wardm 12:046346a16ff4 643
wardm 12:046346a16ff4 644 /*!
wardm 12:046346a16ff4 645 * RegAfcMsb (Read Only)
wardm 12:046346a16ff4 646 */
wardm 12:046346a16ff4 647
wardm 12:046346a16ff4 648 /*!
wardm 12:046346a16ff4 649 * RegAfcLsb (Read Only)
wardm 12:046346a16ff4 650 */
wardm 12:046346a16ff4 651
wardm 12:046346a16ff4 652 /*!
wardm 12:046346a16ff4 653 * RegFeiMsb (Read Only)
wardm 12:046346a16ff4 654 */
wardm 12:046346a16ff4 655
wardm 12:046346a16ff4 656 /*!
wardm 12:046346a16ff4 657 * RegFeiLsb (Read Only)
wardm 12:046346a16ff4 658 */
wardm 12:046346a16ff4 659
wardm 12:046346a16ff4 660 /*!
wardm 12:046346a16ff4 661 * RegPreambleDetect
wardm 12:046346a16ff4 662 */
wardm 12:046346a16ff4 663 #define RF_PREAMBLEDETECT_DETECTOR_MASK 0x7F
wardm 12:046346a16ff4 664 #define RF_PREAMBLEDETECT_DETECTOR_ON 0x80 // Default
wardm 12:046346a16ff4 665 #define RF_PREAMBLEDETECT_DETECTOR_OFF 0x00
wardm 12:046346a16ff4 666
wardm 12:046346a16ff4 667 #define RF_PREAMBLEDETECT_DETECTORSIZE_MASK 0x9F
wardm 12:046346a16ff4 668 #define RF_PREAMBLEDETECT_DETECTORSIZE_1 0x00
wardm 12:046346a16ff4 669 #define RF_PREAMBLEDETECT_DETECTORSIZE_2 0x20 // Default
wardm 12:046346a16ff4 670 #define RF_PREAMBLEDETECT_DETECTORSIZE_3 0x40
wardm 12:046346a16ff4 671 #define RF_PREAMBLEDETECT_DETECTORSIZE_4 0x60
wardm 12:046346a16ff4 672
wardm 12:046346a16ff4 673 #define RF_PREAMBLEDETECT_DETECTORTOL_MASK 0xE0
wardm 12:046346a16ff4 674 #define RF_PREAMBLEDETECT_DETECTORTOL_0 0x00
wardm 12:046346a16ff4 675 #define RF_PREAMBLEDETECT_DETECTORTOL_1 0x01
wardm 12:046346a16ff4 676 #define RF_PREAMBLEDETECT_DETECTORTOL_2 0x02
wardm 12:046346a16ff4 677 #define RF_PREAMBLEDETECT_DETECTORTOL_3 0x03
wardm 12:046346a16ff4 678 #define RF_PREAMBLEDETECT_DETECTORTOL_4 0x04
wardm 12:046346a16ff4 679 #define RF_PREAMBLEDETECT_DETECTORTOL_5 0x05
wardm 12:046346a16ff4 680 #define RF_PREAMBLEDETECT_DETECTORTOL_6 0x06
wardm 12:046346a16ff4 681 #define RF_PREAMBLEDETECT_DETECTORTOL_7 0x07
wardm 12:046346a16ff4 682 #define RF_PREAMBLEDETECT_DETECTORTOL_8 0x08
wardm 12:046346a16ff4 683 #define RF_PREAMBLEDETECT_DETECTORTOL_9 0x09
wardm 12:046346a16ff4 684 #define RF_PREAMBLEDETECT_DETECTORTOL_10 0x0A // Default
wardm 12:046346a16ff4 685 #define RF_PREAMBLEDETECT_DETECTORTOL_11 0x0B
wardm 12:046346a16ff4 686 #define RF_PREAMBLEDETECT_DETECTORTOL_12 0x0C
wardm 12:046346a16ff4 687 #define RF_PREAMBLEDETECT_DETECTORTOL_13 0x0D
wardm 12:046346a16ff4 688 #define RF_PREAMBLEDETECT_DETECTORTOL_14 0x0E
wardm 12:046346a16ff4 689 #define RF_PREAMBLEDETECT_DETECTORTOL_15 0x0F
wardm 12:046346a16ff4 690 #define RF_PREAMBLEDETECT_DETECTORTOL_16 0x10
wardm 12:046346a16ff4 691 #define RF_PREAMBLEDETECT_DETECTORTOL_17 0x11
wardm 12:046346a16ff4 692 #define RF_PREAMBLEDETECT_DETECTORTOL_18 0x12
wardm 12:046346a16ff4 693 #define RF_PREAMBLEDETECT_DETECTORTOL_19 0x13
wardm 12:046346a16ff4 694 #define RF_PREAMBLEDETECT_DETECTORTOL_20 0x14
wardm 12:046346a16ff4 695 #define RF_PREAMBLEDETECT_DETECTORTOL_21 0x15
wardm 12:046346a16ff4 696 #define RF_PREAMBLEDETECT_DETECTORTOL_22 0x16
wardm 12:046346a16ff4 697 #define RF_PREAMBLEDETECT_DETECTORTOL_23 0x17
wardm 12:046346a16ff4 698 #define RF_PREAMBLEDETECT_DETECTORTOL_24 0x18
wardm 12:046346a16ff4 699 #define RF_PREAMBLEDETECT_DETECTORTOL_25 0x19
wardm 12:046346a16ff4 700 #define RF_PREAMBLEDETECT_DETECTORTOL_26 0x1A
wardm 12:046346a16ff4 701 #define RF_PREAMBLEDETECT_DETECTORTOL_27 0x1B
wardm 12:046346a16ff4 702 #define RF_PREAMBLEDETECT_DETECTORTOL_28 0x1C
wardm 12:046346a16ff4 703 #define RF_PREAMBLEDETECT_DETECTORTOL_29 0x1D
wardm 12:046346a16ff4 704 #define RF_PREAMBLEDETECT_DETECTORTOL_30 0x1E
wardm 12:046346a16ff4 705 #define RF_PREAMBLEDETECT_DETECTORTOL_31 0x1F
wardm 12:046346a16ff4 706
wardm 12:046346a16ff4 707 /*!
wardm 12:046346a16ff4 708 * RegRxTimeout1
wardm 12:046346a16ff4 709 */
wardm 12:046346a16ff4 710 #define RF_RXTIMEOUT1_TIMEOUTRXRSSI 0x00 // Default
wardm 12:046346a16ff4 711
wardm 12:046346a16ff4 712 /*!
wardm 12:046346a16ff4 713 * RegRxTimeout2
wardm 12:046346a16ff4 714 */
wardm 12:046346a16ff4 715 #define RF_RXTIMEOUT2_TIMEOUTRXPREAMBLE 0x00 // Default
wardm 12:046346a16ff4 716
wardm 12:046346a16ff4 717 /*!
wardm 12:046346a16ff4 718 * RegRxTimeout3
wardm 12:046346a16ff4 719 */
wardm 12:046346a16ff4 720 #define RF_RXTIMEOUT3_TIMEOUTSIGNALSYNC 0x00 // Default
wardm 12:046346a16ff4 721
wardm 12:046346a16ff4 722 /*!
wardm 12:046346a16ff4 723 * RegRxDelay
wardm 12:046346a16ff4 724 */
wardm 12:046346a16ff4 725 #define RF_RXDELAY_INTERPACKETRXDELAY 0x00 // Default
wardm 12:046346a16ff4 726
wardm 12:046346a16ff4 727 /*!
wardm 12:046346a16ff4 728 * RegOsc
wardm 12:046346a16ff4 729 */
wardm 12:046346a16ff4 730 #define RF_OSC_RCCALSTART 0x08
wardm 12:046346a16ff4 731
wardm 12:046346a16ff4 732 #define RF_OSC_CLKOUT_MASK 0xF8
wardm 12:046346a16ff4 733 #define RF_OSC_CLKOUT_32_MHZ 0x00
wardm 12:046346a16ff4 734 #define RF_OSC_CLKOUT_16_MHZ 0x01
wardm 12:046346a16ff4 735 #define RF_OSC_CLKOUT_8_MHZ 0x02
wardm 12:046346a16ff4 736 #define RF_OSC_CLKOUT_4_MHZ 0x03
wardm 12:046346a16ff4 737 #define RF_OSC_CLKOUT_2_MHZ 0x04
wardm 12:046346a16ff4 738 #define RF_OSC_CLKOUT_1_MHZ 0x05 // Default
wardm 12:046346a16ff4 739 #define RF_OSC_CLKOUT_RC 0x06
wardm 12:046346a16ff4 740 #define RF_OSC_CLKOUT_OFF 0x07
wardm 12:046346a16ff4 741
wardm 12:046346a16ff4 742 /*!
wardm 12:046346a16ff4 743 * RegPreambleMsb/RegPreambleLsb
wardm 12:046346a16ff4 744 */
wardm 12:046346a16ff4 745 #define RF_PREAMBLEMSB_SIZE 0x00 // Default
wardm 12:046346a16ff4 746 #define RF_PREAMBLELSB_SIZE 0x03 // Default
wardm 12:046346a16ff4 747
wardm 12:046346a16ff4 748 /*!
wardm 12:046346a16ff4 749 * RegSyncConfig
wardm 12:046346a16ff4 750 */
wardm 12:046346a16ff4 751 #define RF_SYNCCONFIG_AUTORESTARTRXMODE_MASK 0x3F
wardm 12:046346a16ff4 752 #define RF_SYNCCONFIG_AUTORESTARTRXMODE_WAITPLL_ON 0x80 // Default
wardm 12:046346a16ff4 753 #define RF_SYNCCONFIG_AUTORESTARTRXMODE_WAITPLL_OFF 0x40
wardm 12:046346a16ff4 754 #define RF_SYNCCONFIG_AUTORESTARTRXMODE_OFF 0x00
wardm 12:046346a16ff4 755
wardm 12:046346a16ff4 756
wardm 12:046346a16ff4 757 #define RF_SYNCCONFIG_PREAMBLEPOLARITY_MASK 0xDF
wardm 12:046346a16ff4 758 #define RF_SYNCCONFIG_PREAMBLEPOLARITY_55 0x20
wardm 12:046346a16ff4 759 #define RF_SYNCCONFIG_PREAMBLEPOLARITY_AA 0x00 // Default
wardm 12:046346a16ff4 760
wardm 12:046346a16ff4 761 #define RF_SYNCCONFIG_SYNC_MASK 0xEF
wardm 12:046346a16ff4 762 #define RF_SYNCCONFIG_SYNC_ON 0x10 // Default
wardm 12:046346a16ff4 763 #define RF_SYNCCONFIG_SYNC_OFF 0x00
wardm 12:046346a16ff4 764
wardm 12:046346a16ff4 765
wardm 12:046346a16ff4 766 #define RF_SYNCCONFIG_SYNCSIZE_MASK 0xF8
wardm 12:046346a16ff4 767 #define RF_SYNCCONFIG_SYNCSIZE_1 0x00
wardm 12:046346a16ff4 768 #define RF_SYNCCONFIG_SYNCSIZE_2 0x01
wardm 12:046346a16ff4 769 #define RF_SYNCCONFIG_SYNCSIZE_3 0x02
wardm 12:046346a16ff4 770 #define RF_SYNCCONFIG_SYNCSIZE_4 0x03 // Default
wardm 12:046346a16ff4 771 #define RF_SYNCCONFIG_SYNCSIZE_5 0x04
wardm 12:046346a16ff4 772 #define RF_SYNCCONFIG_SYNCSIZE_6 0x05
wardm 12:046346a16ff4 773 #define RF_SYNCCONFIG_SYNCSIZE_7 0x06
wardm 12:046346a16ff4 774 #define RF_SYNCCONFIG_SYNCSIZE_8 0x07
wardm 12:046346a16ff4 775
wardm 12:046346a16ff4 776 /*!
wardm 12:046346a16ff4 777 * RegSyncValue1-8
wardm 12:046346a16ff4 778 */
wardm 12:046346a16ff4 779 #define RF_SYNCVALUE1_SYNCVALUE 0x01 // Default
wardm 12:046346a16ff4 780 #define RF_SYNCVALUE2_SYNCVALUE 0x01 // Default
wardm 12:046346a16ff4 781 #define RF_SYNCVALUE3_SYNCVALUE 0x01 // Default
wardm 12:046346a16ff4 782 #define RF_SYNCVALUE4_SYNCVALUE 0x01 // Default
wardm 12:046346a16ff4 783 #define RF_SYNCVALUE5_SYNCVALUE 0x01 // Default
wardm 12:046346a16ff4 784 #define RF_SYNCVALUE6_SYNCVALUE 0x01 // Default
wardm 12:046346a16ff4 785 #define RF_SYNCVALUE7_SYNCVALUE 0x01 // Default
wardm 12:046346a16ff4 786 #define RF_SYNCVALUE8_SYNCVALUE 0x01 // Default
wardm 12:046346a16ff4 787
wardm 12:046346a16ff4 788 /*!
wardm 12:046346a16ff4 789 * RegPacketConfig1
wardm 12:046346a16ff4 790 */
wardm 12:046346a16ff4 791 #define RF_PACKETCONFIG1_PACKETFORMAT_MASK 0x7F
wardm 12:046346a16ff4 792 #define RF_PACKETCONFIG1_PACKETFORMAT_FIXED 0x00
wardm 12:046346a16ff4 793 #define RF_PACKETCONFIG1_PACKETFORMAT_VARIABLE 0x80 // Default
wardm 12:046346a16ff4 794
wardm 12:046346a16ff4 795 #define RF_PACKETCONFIG1_DCFREE_MASK 0x9F
wardm 12:046346a16ff4 796 #define RF_PACKETCONFIG1_DCFREE_OFF 0x00 // Default
wardm 12:046346a16ff4 797 #define RF_PACKETCONFIG1_DCFREE_MANCHESTER 0x20
wardm 12:046346a16ff4 798 #define RF_PACKETCONFIG1_DCFREE_WHITENING 0x40
wardm 12:046346a16ff4 799
wardm 12:046346a16ff4 800 #define RF_PACKETCONFIG1_CRC_MASK 0xEF
wardm 12:046346a16ff4 801 #define RF_PACKETCONFIG1_CRC_ON 0x10 // Default
wardm 12:046346a16ff4 802 #define RF_PACKETCONFIG1_CRC_OFF 0x00
wardm 12:046346a16ff4 803
wardm 12:046346a16ff4 804 #define RF_PACKETCONFIG1_CRCAUTOCLEAR_MASK 0xF7
wardm 12:046346a16ff4 805 #define RF_PACKETCONFIG1_CRCAUTOCLEAR_ON 0x00 // Default
wardm 12:046346a16ff4 806 #define RF_PACKETCONFIG1_CRCAUTOCLEAR_OFF 0x08
wardm 12:046346a16ff4 807
wardm 12:046346a16ff4 808 #define RF_PACKETCONFIG1_ADDRSFILTERING_MASK 0xF9
wardm 12:046346a16ff4 809 #define RF_PACKETCONFIG1_ADDRSFILTERING_OFF 0x00 // Default
wardm 12:046346a16ff4 810 #define RF_PACKETCONFIG1_ADDRSFILTERING_NODE 0x02
wardm 12:046346a16ff4 811 #define RF_PACKETCONFIG1_ADDRSFILTERING_NODEBROADCAST 0x04
wardm 12:046346a16ff4 812
wardm 12:046346a16ff4 813 #define RF_PACKETCONFIG1_CRCWHITENINGTYPE_MASK 0xFE
wardm 12:046346a16ff4 814 #define RF_PACKETCONFIG1_CRCWHITENINGTYPE_CCITT 0x00 // Default
wardm 12:046346a16ff4 815 #define RF_PACKETCONFIG1_CRCWHITENINGTYPE_IBM 0x01
wardm 12:046346a16ff4 816
wardm 12:046346a16ff4 817 /*!
wardm 12:046346a16ff4 818 * RegPacketConfig2
wardm 12:046346a16ff4 819 */
wardm 12:046346a16ff4 820
wardm 12:046346a16ff4 821 #define RF_PACKETCONFIG2_WMBUS_CRC_ENABLE_MASK 0x7F
wardm 12:046346a16ff4 822 #define RF_PACKETCONFIG2_WMBUS_CRC_ENABLE 0x80
wardm 12:046346a16ff4 823 #define RF_PACKETCONFIG2_WMBUS_CRC_DISABLE 0x00 // Default
wardm 12:046346a16ff4 824
wardm 12:046346a16ff4 825 #define RF_PACKETCONFIG2_DATAMODE_MASK 0xBF
wardm 12:046346a16ff4 826 #define RF_PACKETCONFIG2_DATAMODE_CONTINUOUS 0x00
wardm 12:046346a16ff4 827 #define RF_PACKETCONFIG2_DATAMODE_PACKET 0x40 // Default
wardm 12:046346a16ff4 828
wardm 12:046346a16ff4 829 #define RF_PACKETCONFIG2_IOHOME_MASK 0xDF
wardm 12:046346a16ff4 830 #define RF_PACKETCONFIG2_IOHOME_ON 0x20
wardm 12:046346a16ff4 831 #define RF_PACKETCONFIG2_IOHOME_OFF 0x00 // Default
wardm 12:046346a16ff4 832
wardm 12:046346a16ff4 833 #define RF_PACKETCONFIG2_BEACON_MASK 0xF7
wardm 12:046346a16ff4 834 #define RF_PACKETCONFIG2_BEACON_ON 0x08
wardm 12:046346a16ff4 835 #define RF_PACKETCONFIG2_BEACON_OFF 0x00 // Default
wardm 12:046346a16ff4 836
wardm 12:046346a16ff4 837 #define RF_PACKETCONFIG2_PAYLOADLENGTH_MSB_MASK 0xF8
wardm 12:046346a16ff4 838
wardm 12:046346a16ff4 839 /*!
wardm 12:046346a16ff4 840 * RegPayloadLength
wardm 12:046346a16ff4 841 */
wardm 12:046346a16ff4 842 #define RF_PAYLOADLENGTH_LENGTH 0x40 // Default
wardm 12:046346a16ff4 843
wardm 12:046346a16ff4 844 /*!
wardm 12:046346a16ff4 845 * RegNodeAdrs
wardm 12:046346a16ff4 846 */
wardm 12:046346a16ff4 847 #define RF_NODEADDRESS_ADDRESS 0x00
wardm 12:046346a16ff4 848
wardm 12:046346a16ff4 849 /*!
wardm 12:046346a16ff4 850 * RegBroadcastAdrs
wardm 12:046346a16ff4 851 */
wardm 12:046346a16ff4 852 #define RF_BROADCASTADDRESS_ADDRESS 0x00
wardm 12:046346a16ff4 853
wardm 12:046346a16ff4 854 /*!
wardm 12:046346a16ff4 855 * RegFifoThresh
wardm 12:046346a16ff4 856 */
wardm 12:046346a16ff4 857 #define RF_FIFOTHRESH_TXSTARTCONDITION_MASK 0x7F
wardm 12:046346a16ff4 858 #define RF_FIFOTHRESH_TXSTARTCONDITION_FIFOTHRESH 0x00 // Default
wardm 12:046346a16ff4 859 #define RF_FIFOTHRESH_TXSTARTCONDITION_FIFONOTEMPTY 0x80
wardm 12:046346a16ff4 860
wardm 12:046346a16ff4 861 #define RF_FIFOTHRESH_FIFOTHRESHOLD_MASK 0xC0
wardm 12:046346a16ff4 862 #define RF_FIFOTHRESH_FIFOTHRESHOLD_THRESHOLD 0x0F // Default
wardm 12:046346a16ff4 863
wardm 12:046346a16ff4 864 /*!
wardm 12:046346a16ff4 865 * RegSeqConfig1
wardm 12:046346a16ff4 866 */
wardm 12:046346a16ff4 867 #define RF_SEQCONFIG1_SEQUENCER_START 0x80
wardm 12:046346a16ff4 868
wardm 12:046346a16ff4 869 #define RF_SEQCONFIG1_SEQUENCER_STOP 0x40
wardm 12:046346a16ff4 870
wardm 12:046346a16ff4 871 #define RF_SEQCONFIG1_IDLEMODE_MASK 0xDF
wardm 12:046346a16ff4 872 #define RF_SEQCONFIG1_IDLEMODE_SLEEP 0x20
wardm 12:046346a16ff4 873 #define RF_SEQCONFIG1_IDLEMODE_STANDBY 0x00 // Default
wardm 12:046346a16ff4 874
wardm 12:046346a16ff4 875 #define RF_SEQCONFIG1_FROMSTART_MASK 0xE7
wardm 12:046346a16ff4 876 #define RF_SEQCONFIG1_FROMSTART_TOLPS 0x00 // Default
wardm 12:046346a16ff4 877 #define RF_SEQCONFIG1_FROMSTART_TORX 0x08
wardm 12:046346a16ff4 878 #define RF_SEQCONFIG1_FROMSTART_TOTX 0x10
wardm 12:046346a16ff4 879 #define RF_SEQCONFIG1_FROMSTART_TOTX_ONFIFOLEVEL 0x18
wardm 12:046346a16ff4 880
wardm 12:046346a16ff4 881 #define RF_SEQCONFIG1_LPS_MASK 0xFB
wardm 12:046346a16ff4 882 #define RF_SEQCONFIG1_LPS_SEQUENCER_OFF 0x00 // Default
wardm 12:046346a16ff4 883 #define RF_SEQCONFIG1_LPS_IDLE 0x04
wardm 12:046346a16ff4 884
wardm 12:046346a16ff4 885 #define RF_SEQCONFIG1_FROMIDLE_MASK 0xFD
wardm 12:046346a16ff4 886 #define RF_SEQCONFIG1_FROMIDLE_TOTX 0x00 // Default
wardm 12:046346a16ff4 887 #define RF_SEQCONFIG1_FROMIDLE_TORX 0x02
wardm 12:046346a16ff4 888
wardm 12:046346a16ff4 889 #define RF_SEQCONFIG1_FROMTX_MASK 0xFE
wardm 12:046346a16ff4 890 #define RF_SEQCONFIG1_FROMTX_TOLPS 0x00 // Default
wardm 12:046346a16ff4 891 #define RF_SEQCONFIG1_FROMTX_TORX 0x01
wardm 12:046346a16ff4 892
wardm 12:046346a16ff4 893 /*!
wardm 12:046346a16ff4 894 * RegSeqConfig2
wardm 12:046346a16ff4 895 */
wardm 12:046346a16ff4 896 #define RF_SEQCONFIG2_FROMRX_MASK 0x1F
wardm 12:046346a16ff4 897 #define RF_SEQCONFIG2_FROMRX_TOUNUSED_000 0x00 // Default
wardm 12:046346a16ff4 898 #define RF_SEQCONFIG2_FROMRX_TORXPKT_ONPLDRDY 0x20
wardm 12:046346a16ff4 899 #define RF_SEQCONFIG2_FROMRX_TOLPS_ONPLDRDY 0x40
wardm 12:046346a16ff4 900 #define RF_SEQCONFIG2_FROMRX_TORXPKT_ONCRCOK 0x60
wardm 12:046346a16ff4 901 #define RF_SEQCONFIG2_FROMRX_TOSEQUENCEROFF_ONRSSI 0x80
wardm 12:046346a16ff4 902 #define RF_SEQCONFIG2_FROMRX_TOSEQUENCEROFF_ONSYNC 0xA0
wardm 12:046346a16ff4 903 #define RF_SEQCONFIG2_FROMRX_TOSEQUENCEROFF_ONPREAMBLE 0xC0
wardm 12:046346a16ff4 904 #define RF_SEQCONFIG2_FROMRX_TOUNUSED_111 0xE0
wardm 12:046346a16ff4 905
wardm 12:046346a16ff4 906 #define RF_SEQCONFIG2_FROMRXTIMEOUT_MASK 0xE7
wardm 12:046346a16ff4 907 #define RF_SEQCONFIG2_FROMRXTIMEOUT_TORXRESTART 0x00 // Default
wardm 12:046346a16ff4 908 #define RF_SEQCONFIG2_FROMRXTIMEOUT_TOTX 0x08
wardm 12:046346a16ff4 909 #define RF_SEQCONFIG2_FROMRXTIMEOUT_TOLPS 0x10
wardm 12:046346a16ff4 910 #define RF_SEQCONFIG2_FROMRXTIMEOUT_TOSEQUENCEROFF 0x18
wardm 12:046346a16ff4 911
wardm 12:046346a16ff4 912 #define RF_SEQCONFIG2_FROMRXPKT_MASK 0xF8
wardm 12:046346a16ff4 913 #define RF_SEQCONFIG2_FROMRXPKT_TOSEQUENCEROFF 0x00 // Default
wardm 12:046346a16ff4 914 #define RF_SEQCONFIG2_FROMRXPKT_TOTX_ONFIFOEMPTY 0x01
wardm 12:046346a16ff4 915 #define RF_SEQCONFIG2_FROMRXPKT_TOLPS 0x02
wardm 12:046346a16ff4 916 #define RF_SEQCONFIG2_FROMRXPKT_TOSYNTHESIZERRX 0x03
wardm 12:046346a16ff4 917 #define RF_SEQCONFIG2_FROMRXPKT_TORX 0x04
wardm 12:046346a16ff4 918
wardm 12:046346a16ff4 919 /*!
wardm 12:046346a16ff4 920 * RegTimerResol
wardm 12:046346a16ff4 921 */
wardm 12:046346a16ff4 922 #define RF_TIMERRESOL_TIMER1RESOL_MASK 0xF3
wardm 12:046346a16ff4 923 #define RF_TIMERRESOL_TIMER1RESOL_OFF 0x00 // Default
wardm 12:046346a16ff4 924 #define RF_TIMERRESOL_TIMER1RESOL_000064_US 0x04
wardm 12:046346a16ff4 925 #define RF_TIMERRESOL_TIMER1RESOL_004100_US 0x08
wardm 12:046346a16ff4 926 #define RF_TIMERRESOL_TIMER1RESOL_262000_US 0x0C
wardm 12:046346a16ff4 927
wardm 12:046346a16ff4 928 #define RF_TIMERRESOL_TIMER2RESOL_MASK 0xFC
wardm 12:046346a16ff4 929 #define RF_TIMERRESOL_TIMER2RESOL_OFF 0x00 // Default
wardm 12:046346a16ff4 930 #define RF_TIMERRESOL_TIMER2RESOL_000064_US 0x01
wardm 12:046346a16ff4 931 #define RF_TIMERRESOL_TIMER2RESOL_004100_US 0x02
wardm 12:046346a16ff4 932 #define RF_TIMERRESOL_TIMER2RESOL_262000_US 0x03
wardm 12:046346a16ff4 933
wardm 12:046346a16ff4 934 /*!
wardm 12:046346a16ff4 935 * RegTimer1Coef
wardm 12:046346a16ff4 936 */
wardm 12:046346a16ff4 937 #define RF_TIMER1COEF_TIMER1COEFFICIENT 0xF5 // Default
wardm 12:046346a16ff4 938
wardm 12:046346a16ff4 939 /*!
wardm 12:046346a16ff4 940 * RegTimer2Coef
wardm 12:046346a16ff4 941 */
wardm 12:046346a16ff4 942 #define RF_TIMER2COEF_TIMER2COEFFICIENT 0x20 // Default
wardm 12:046346a16ff4 943
wardm 12:046346a16ff4 944 /*!
wardm 12:046346a16ff4 945 * RegImageCal
wardm 12:046346a16ff4 946 */
wardm 12:046346a16ff4 947 #define RF_IMAGECAL_AUTOIMAGECAL_MASK 0x7F
wardm 12:046346a16ff4 948 #define RF_IMAGECAL_AUTOIMAGECAL_ON 0x80
wardm 12:046346a16ff4 949 #define RF_IMAGECAL_AUTOIMAGECAL_OFF 0x00 // Default
wardm 12:046346a16ff4 950
wardm 12:046346a16ff4 951 #define RF_IMAGECAL_IMAGECAL_MASK 0xBF
wardm 12:046346a16ff4 952 #define RF_IMAGECAL_IMAGECAL_START 0x40
wardm 12:046346a16ff4 953
wardm 12:046346a16ff4 954 #define RF_IMAGECAL_IMAGECAL_RUNNING 0x20
wardm 12:046346a16ff4 955 #define RF_IMAGECAL_IMAGECAL_DONE 0x00 // Default
wardm 12:046346a16ff4 956
wardm 12:046346a16ff4 957 #define RF_IMAGECAL_TEMPCHANGE_HIGHER 0x08
wardm 12:046346a16ff4 958 #define RF_IMAGECAL_TEMPCHANGE_LOWER 0x00
wardm 12:046346a16ff4 959
wardm 12:046346a16ff4 960 #define RF_IMAGECAL_TEMPTHRESHOLD_MASK 0xF9
wardm 12:046346a16ff4 961 #define RF_IMAGECAL_TEMPTHRESHOLD_05 0x00
wardm 12:046346a16ff4 962 #define RF_IMAGECAL_TEMPTHRESHOLD_10 0x02 // Default
wardm 12:046346a16ff4 963 #define RF_IMAGECAL_TEMPTHRESHOLD_15 0x04
wardm 12:046346a16ff4 964 #define RF_IMAGECAL_TEMPTHRESHOLD_20 0x06
wardm 12:046346a16ff4 965
wardm 12:046346a16ff4 966 #define RF_IMAGECAL_TEMPMONITOR_MASK 0xFE
wardm 12:046346a16ff4 967 #define RF_IMAGECAL_TEMPMONITOR_ON 0x00 // Default
wardm 12:046346a16ff4 968 #define RF_IMAGECAL_TEMPMONITOR_OFF 0x01
wardm 12:046346a16ff4 969
wardm 12:046346a16ff4 970 /*!
wardm 12:046346a16ff4 971 * RegTemp (Read Only)
wardm 12:046346a16ff4 972 */
wardm 12:046346a16ff4 973
wardm 12:046346a16ff4 974 /*!
wardm 12:046346a16ff4 975 * RegLowBat
wardm 12:046346a16ff4 976 */
wardm 12:046346a16ff4 977 #define RF_LOWBAT_MASK 0xF7
wardm 12:046346a16ff4 978 #define RF_LOWBAT_ON 0x08
wardm 12:046346a16ff4 979 #define RF_LOWBAT_OFF 0x00 // Default
wardm 12:046346a16ff4 980
wardm 12:046346a16ff4 981 #define RF_LOWBAT_TRIM_MASK 0xF8
wardm 12:046346a16ff4 982 #define RF_LOWBAT_TRIM_1695 0x00
wardm 12:046346a16ff4 983 #define RF_LOWBAT_TRIM_1764 0x01
wardm 12:046346a16ff4 984 #define RF_LOWBAT_TRIM_1835 0x02 // Default
wardm 12:046346a16ff4 985 #define RF_LOWBAT_TRIM_1905 0x03
wardm 12:046346a16ff4 986 #define RF_LOWBAT_TRIM_1976 0x04
wardm 12:046346a16ff4 987 #define RF_LOWBAT_TRIM_2045 0x05
wardm 12:046346a16ff4 988 #define RF_LOWBAT_TRIM_2116 0x06
wardm 12:046346a16ff4 989 #define RF_LOWBAT_TRIM_2185 0x07
wardm 12:046346a16ff4 990
wardm 12:046346a16ff4 991 /*!
wardm 12:046346a16ff4 992 * RegIrqFlags1
wardm 12:046346a16ff4 993 */
wardm 12:046346a16ff4 994 #define RF_IRQFLAGS1_MODEREADY 0x80
wardm 12:046346a16ff4 995
wardm 12:046346a16ff4 996 #define RF_IRQFLAGS1_RXREADY 0x40
wardm 12:046346a16ff4 997
wardm 12:046346a16ff4 998 #define RF_IRQFLAGS1_TXREADY 0x20
wardm 12:046346a16ff4 999
wardm 12:046346a16ff4 1000 #define RF_IRQFLAGS1_PLLLOCK 0x10
wardm 12:046346a16ff4 1001
wardm 12:046346a16ff4 1002 #define RF_IRQFLAGS1_RSSI 0x08
wardm 12:046346a16ff4 1003
wardm 12:046346a16ff4 1004 #define RF_IRQFLAGS1_TIMEOUT 0x04
wardm 12:046346a16ff4 1005
wardm 12:046346a16ff4 1006 #define RF_IRQFLAGS1_PREAMBLEDETECT 0x02
wardm 12:046346a16ff4 1007
wardm 12:046346a16ff4 1008 #define RF_IRQFLAGS1_SYNCADDRESSMATCH 0x01
wardm 12:046346a16ff4 1009
wardm 12:046346a16ff4 1010 /*!
wardm 12:046346a16ff4 1011 * RegIrqFlags2
wardm 12:046346a16ff4 1012 */
wardm 12:046346a16ff4 1013 #define RF_IRQFLAGS2_FIFOFULL 0x80
wardm 12:046346a16ff4 1014
wardm 12:046346a16ff4 1015 #define RF_IRQFLAGS2_FIFOEMPTY 0x40
wardm 12:046346a16ff4 1016
wardm 12:046346a16ff4 1017 #define RF_IRQFLAGS2_FIFOLEVEL 0x20
wardm 12:046346a16ff4 1018
wardm 12:046346a16ff4 1019 #define RF_IRQFLAGS2_FIFOOVERRUN 0x10
wardm 12:046346a16ff4 1020
wardm 12:046346a16ff4 1021 #define RF_IRQFLAGS2_PACKETSENT 0x08
wardm 12:046346a16ff4 1022
wardm 12:046346a16ff4 1023 #define RF_IRQFLAGS2_PAYLOADREADY 0x04
wardm 12:046346a16ff4 1024
wardm 12:046346a16ff4 1025 #define RF_IRQFLAGS2_CRCOK 0x02
wardm 12:046346a16ff4 1026
wardm 12:046346a16ff4 1027 #define RF_IRQFLAGS2_LOWBAT 0x01
wardm 12:046346a16ff4 1028
wardm 12:046346a16ff4 1029 /*!
wardm 12:046346a16ff4 1030 * RegDioMapping1
wardm 12:046346a16ff4 1031 */
wardm 12:046346a16ff4 1032 #define RF_DIOMAPPING1_DIO0_MASK 0x3F
wardm 12:046346a16ff4 1033 #define RF_DIOMAPPING1_DIO0_00 0x00 // Default
wardm 12:046346a16ff4 1034 #define RF_DIOMAPPING1_DIO0_01 0x40
wardm 12:046346a16ff4 1035 #define RF_DIOMAPPING1_DIO0_10 0x80
wardm 12:046346a16ff4 1036 #define RF_DIOMAPPING1_DIO0_11 0xC0
wardm 12:046346a16ff4 1037
wardm 12:046346a16ff4 1038 #define RF_DIOMAPPING1_DIO1_MASK 0xCF
wardm 12:046346a16ff4 1039 #define RF_DIOMAPPING1_DIO1_00 0x00 // Default
wardm 12:046346a16ff4 1040 #define RF_DIOMAPPING1_DIO1_01 0x10
wardm 12:046346a16ff4 1041 #define RF_DIOMAPPING1_DIO1_10 0x20
wardm 12:046346a16ff4 1042 #define RF_DIOMAPPING1_DIO1_11 0x30
wardm 12:046346a16ff4 1043
wardm 12:046346a16ff4 1044 #define RF_DIOMAPPING1_DIO2_MASK 0xF3
wardm 12:046346a16ff4 1045 #define RF_DIOMAPPING1_DIO2_00 0x00 // Default
wardm 12:046346a16ff4 1046 #define RF_DIOMAPPING1_DIO2_01 0x04
wardm 12:046346a16ff4 1047 #define RF_DIOMAPPING1_DIO2_10 0x08
wardm 12:046346a16ff4 1048 #define RF_DIOMAPPING1_DIO2_11 0x0C
wardm 12:046346a16ff4 1049
wardm 12:046346a16ff4 1050 #define RF_DIOMAPPING1_DIO3_MASK 0xFC
wardm 12:046346a16ff4 1051 #define RF_DIOMAPPING1_DIO3_00 0x00 // Default
wardm 12:046346a16ff4 1052 #define RF_DIOMAPPING1_DIO3_01 0x01
wardm 12:046346a16ff4 1053 #define RF_DIOMAPPING1_DIO3_10 0x02
wardm 12:046346a16ff4 1054 #define RF_DIOMAPPING1_DIO3_11 0x03
wardm 12:046346a16ff4 1055
wardm 12:046346a16ff4 1056 /*!
wardm 12:046346a16ff4 1057 * RegDioMapping2
wardm 12:046346a16ff4 1058 */
wardm 12:046346a16ff4 1059 #define RF_DIOMAPPING2_DIO4_MASK 0x3F
wardm 12:046346a16ff4 1060 #define RF_DIOMAPPING2_DIO4_00 0x00 // Default
wardm 12:046346a16ff4 1061 #define RF_DIOMAPPING2_DIO4_01 0x40
wardm 12:046346a16ff4 1062 #define RF_DIOMAPPING2_DIO4_10 0x80
wardm 12:046346a16ff4 1063 #define RF_DIOMAPPING2_DIO4_11 0xC0
wardm 12:046346a16ff4 1064
wardm 12:046346a16ff4 1065 #define RF_DIOMAPPING2_DIO5_MASK 0xCF
wardm 12:046346a16ff4 1066 #define RF_DIOMAPPING2_DIO5_00 0x00 // Default
wardm 12:046346a16ff4 1067 #define RF_DIOMAPPING2_DIO5_01 0x10
wardm 12:046346a16ff4 1068 #define RF_DIOMAPPING2_DIO5_10 0x20
wardm 12:046346a16ff4 1069 #define RF_DIOMAPPING2_DIO5_11 0x30
wardm 12:046346a16ff4 1070
wardm 12:046346a16ff4 1071 #define RF_DIOMAPPING2_MAP_MASK 0xFE
wardm 12:046346a16ff4 1072 #define RF_DIOMAPPING2_MAP_PREAMBLEDETECT 0x01
wardm 12:046346a16ff4 1073 #define RF_DIOMAPPING2_MAP_RSSI 0x00 // Default
wardm 12:046346a16ff4 1074
wardm 12:046346a16ff4 1075 /*!
wardm 12:046346a16ff4 1076 * RegVersion (Read Only)
wardm 12:046346a16ff4 1077 */
wardm 12:046346a16ff4 1078
wardm 12:046346a16ff4 1079 /*!
wardm 12:046346a16ff4 1080 * RegPllHop
wardm 12:046346a16ff4 1081 */
wardm 12:046346a16ff4 1082 #define RF_PLLHOP_FASTHOP_MASK 0x7F
wardm 12:046346a16ff4 1083 #define RF_PLLHOP_FASTHOP_ON 0x80
wardm 12:046346a16ff4 1084 #define RF_PLLHOP_FASTHOP_OFF 0x00 // Default
wardm 12:046346a16ff4 1085
wardm 12:046346a16ff4 1086 /*!
wardm 12:046346a16ff4 1087 * RegTcxo
wardm 12:046346a16ff4 1088 */
wardm 12:046346a16ff4 1089 #define RF_TCXO_TCXOINPUT_MASK 0xEF
wardm 12:046346a16ff4 1090 #define RF_TCXO_TCXOINPUT_ON 0x10
wardm 12:046346a16ff4 1091 #define RF_TCXO_TCXOINPUT_OFF 0x00 // Default
wardm 12:046346a16ff4 1092
wardm 12:046346a16ff4 1093 /*!
wardm 12:046346a16ff4 1094 * RegPaDac
wardm 12:046346a16ff4 1095 */
wardm 12:046346a16ff4 1096 #define RF_PADAC_20DBM_MASK 0xF8
wardm 12:046346a16ff4 1097 #define RF_PADAC_20DBM_ON 0x07
wardm 12:046346a16ff4 1098 #define RF_PADAC_20DBM_OFF 0x04 // Default
wardm 12:046346a16ff4 1099
wardm 12:046346a16ff4 1100 /*!
wardm 12:046346a16ff4 1101 * RegFormerTemp
wardm 12:046346a16ff4 1102 */
wardm 12:046346a16ff4 1103
wardm 12:046346a16ff4 1104 /*!
wardm 12:046346a16ff4 1105 * RegBitrateFrac
wardm 12:046346a16ff4 1106 */
wardm 12:046346a16ff4 1107 #define RF_BITRATEFRAC_MASK 0xF0
wardm 12:046346a16ff4 1108
wardm 12:046346a16ff4 1109 /*!
wardm 12:046346a16ff4 1110 * RegAgcRef
wardm 12:046346a16ff4 1111 */
wardm 12:046346a16ff4 1112
wardm 12:046346a16ff4 1113 /*!
wardm 12:046346a16ff4 1114 * RegAgcThresh1
wardm 12:046346a16ff4 1115 */
wardm 12:046346a16ff4 1116
wardm 12:046346a16ff4 1117 /*!
wardm 12:046346a16ff4 1118 * RegAgcThresh2
wardm 12:046346a16ff4 1119 */
wardm 12:046346a16ff4 1120
wardm 12:046346a16ff4 1121 /*!
wardm 12:046346a16ff4 1122 * RegAgcThresh3
wardm 12:046346a16ff4 1123 */
wardm 12:046346a16ff4 1124
wardm 12:046346a16ff4 1125 /*!
wardm 12:046346a16ff4 1126 * RegPll
wardm 12:046346a16ff4 1127 */
wardm 12:046346a16ff4 1128 #define RF_PLL_BANDWIDTH_MASK 0x3F
wardm 12:046346a16ff4 1129 #define RF_PLL_BANDWIDTH_75 0x00
wardm 12:046346a16ff4 1130 #define RF_PLL_BANDWIDTH_150 0x40
wardm 12:046346a16ff4 1131 #define RF_PLL_BANDWIDTH_225 0x80
wardm 12:046346a16ff4 1132 #define RF_PLL_BANDWIDTH_300 0xC0 // Default
wardm 12:046346a16ff4 1133
wardm 12:046346a16ff4 1134 #endif // __SX1276_REGS_FSK_H__