Vergil Cola
/
MQTTGateway2
Fork of my original MQTTGateway
easy-connect/mcr20a-rf-driver/source/MCR20Drv.h@0:a1734fe1ec4b, 2017-04-08 (annotated)
- Committer:
- vpcola
- Date:
- Sat Apr 08 14:43:14 2017 +0000
- Revision:
- 0:a1734fe1ec4b
Initial commit
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
vpcola | 0:a1734fe1ec4b | 1 | /*! |
vpcola | 0:a1734fe1ec4b | 2 | * Copyright (c) 2015, Freescale Semiconductor, Inc. |
vpcola | 0:a1734fe1ec4b | 3 | * All rights reserved. |
vpcola | 0:a1734fe1ec4b | 4 | * |
vpcola | 0:a1734fe1ec4b | 5 | * \file MCR20Drv.h |
vpcola | 0:a1734fe1ec4b | 6 | * |
vpcola | 0:a1734fe1ec4b | 7 | * Redistribution and use in source and binary forms, with or without modification, |
vpcola | 0:a1734fe1ec4b | 8 | * are permitted provided that the following conditions are met: |
vpcola | 0:a1734fe1ec4b | 9 | * |
vpcola | 0:a1734fe1ec4b | 10 | * o Redistributions of source code must retain the above copyright notice, this list |
vpcola | 0:a1734fe1ec4b | 11 | * of conditions and the following disclaimer. |
vpcola | 0:a1734fe1ec4b | 12 | * |
vpcola | 0:a1734fe1ec4b | 13 | * o Redistributions in binary form must reproduce the above copyright notice, this |
vpcola | 0:a1734fe1ec4b | 14 | * list of conditions and the following disclaimer in the documentation and/or |
vpcola | 0:a1734fe1ec4b | 15 | * other materials provided with the distribution. |
vpcola | 0:a1734fe1ec4b | 16 | * |
vpcola | 0:a1734fe1ec4b | 17 | * o Neither the name of Freescale Semiconductor, Inc. nor the names of its |
vpcola | 0:a1734fe1ec4b | 18 | * contributors may be used to endorse or promote products derived from this |
vpcola | 0:a1734fe1ec4b | 19 | * software without specific prior written permission. |
vpcola | 0:a1734fe1ec4b | 20 | * |
vpcola | 0:a1734fe1ec4b | 21 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
vpcola | 0:a1734fe1ec4b | 22 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
vpcola | 0:a1734fe1ec4b | 23 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
vpcola | 0:a1734fe1ec4b | 24 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
vpcola | 0:a1734fe1ec4b | 25 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
vpcola | 0:a1734fe1ec4b | 26 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
vpcola | 0:a1734fe1ec4b | 27 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
vpcola | 0:a1734fe1ec4b | 28 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
vpcola | 0:a1734fe1ec4b | 29 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
vpcola | 0:a1734fe1ec4b | 30 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
vpcola | 0:a1734fe1ec4b | 31 | */ |
vpcola | 0:a1734fe1ec4b | 32 | |
vpcola | 0:a1734fe1ec4b | 33 | #ifndef __MCR20_DRV_H__ |
vpcola | 0:a1734fe1ec4b | 34 | #define __MCR20_DRV_H__ |
vpcola | 0:a1734fe1ec4b | 35 | |
vpcola | 0:a1734fe1ec4b | 36 | |
vpcola | 0:a1734fe1ec4b | 37 | /***************************************************************************** |
vpcola | 0:a1734fe1ec4b | 38 | * INCLUDED HEADERS * |
vpcola | 0:a1734fe1ec4b | 39 | *---------------------------------------------------------------------------* |
vpcola | 0:a1734fe1ec4b | 40 | * Add to this section all the headers that this module needs to include. * |
vpcola | 0:a1734fe1ec4b | 41 | * Note that it is not a good practice to include header files into header * |
vpcola | 0:a1734fe1ec4b | 42 | * files, so use this section only if there is no other better solution. * |
vpcola | 0:a1734fe1ec4b | 43 | *---------------------------------------------------------------------------* |
vpcola | 0:a1734fe1ec4b | 44 | *****************************************************************************/ |
vpcola | 0:a1734fe1ec4b | 45 | |
vpcola | 0:a1734fe1ec4b | 46 | /***************************************************************************** |
vpcola | 0:a1734fe1ec4b | 47 | * PRIVATE MACROS * |
vpcola | 0:a1734fe1ec4b | 48 | *---------------------------------------------------------------------------* |
vpcola | 0:a1734fe1ec4b | 49 | * Add to this section all the access macros, registers mappings, bit access * |
vpcola | 0:a1734fe1ec4b | 50 | * macros, masks, flags etc ... |
vpcola | 0:a1734fe1ec4b | 51 | *---------------------------------------------------------------------------* |
vpcola | 0:a1734fe1ec4b | 52 | *****************************************************************************/ |
vpcola | 0:a1734fe1ec4b | 53 | |
vpcola | 0:a1734fe1ec4b | 54 | /* Disable XCVR clock output by default, to reduce power consumption */ |
vpcola | 0:a1734fe1ec4b | 55 | #ifndef gMCR20_ClkOutFreq_d |
vpcola | 0:a1734fe1ec4b | 56 | #define gMCR20_ClkOutFreq_d gCLK_OUT_FREQ_DISABLE |
vpcola | 0:a1734fe1ec4b | 57 | #endif |
vpcola | 0:a1734fe1ec4b | 58 | |
vpcola | 0:a1734fe1ec4b | 59 | /***************************************************************************** |
vpcola | 0:a1734fe1ec4b | 60 | * PUBLIC FUNCTIONS * |
vpcola | 0:a1734fe1ec4b | 61 | *---------------------------------------------------------------------------* |
vpcola | 0:a1734fe1ec4b | 62 | * Add to this section all the global functions prototype preceded (as a * |
vpcola | 0:a1734fe1ec4b | 63 | * good practice) by the keyword 'extern' * |
vpcola | 0:a1734fe1ec4b | 64 | *---------------------------------------------------------------------------* |
vpcola | 0:a1734fe1ec4b | 65 | *****************************************************************************/ |
vpcola | 0:a1734fe1ec4b | 66 | |
vpcola | 0:a1734fe1ec4b | 67 | /*--------------------------------------------------------------------------- |
vpcola | 0:a1734fe1ec4b | 68 | * Name: MCR20Drv_Init |
vpcola | 0:a1734fe1ec4b | 69 | * Description: - |
vpcola | 0:a1734fe1ec4b | 70 | * Parameters: - |
vpcola | 0:a1734fe1ec4b | 71 | * Return: - |
vpcola | 0:a1734fe1ec4b | 72 | *---------------------------------------------------------------------------*/ |
vpcola | 0:a1734fe1ec4b | 73 | extern void MCR20Drv_Init |
vpcola | 0:a1734fe1ec4b | 74 | ( |
vpcola | 0:a1734fe1ec4b | 75 | void |
vpcola | 0:a1734fe1ec4b | 76 | ); |
vpcola | 0:a1734fe1ec4b | 77 | |
vpcola | 0:a1734fe1ec4b | 78 | /*--------------------------------------------------------------------------- |
vpcola | 0:a1734fe1ec4b | 79 | * Name: MCR20Drv_SPI_DMA_Init |
vpcola | 0:a1734fe1ec4b | 80 | * Description: - |
vpcola | 0:a1734fe1ec4b | 81 | * Parameters: - |
vpcola | 0:a1734fe1ec4b | 82 | * Return: - |
vpcola | 0:a1734fe1ec4b | 83 | *---------------------------------------------------------------------------*/ |
vpcola | 0:a1734fe1ec4b | 84 | void MCR20Drv_SPI_DMA_Init |
vpcola | 0:a1734fe1ec4b | 85 | ( |
vpcola | 0:a1734fe1ec4b | 86 | void |
vpcola | 0:a1734fe1ec4b | 87 | ); |
vpcola | 0:a1734fe1ec4b | 88 | |
vpcola | 0:a1734fe1ec4b | 89 | /*--------------------------------------------------------------------------- |
vpcola | 0:a1734fe1ec4b | 90 | * Name: MCR20Drv_Start_PB_DMA_SPI_Write |
vpcola | 0:a1734fe1ec4b | 91 | * Description: - |
vpcola | 0:a1734fe1ec4b | 92 | * Parameters: - |
vpcola | 0:a1734fe1ec4b | 93 | * Return: - |
vpcola | 0:a1734fe1ec4b | 94 | *---------------------------------------------------------------------------*/ |
vpcola | 0:a1734fe1ec4b | 95 | void MCR20Drv_Start_PB_DMA_SPI_Write |
vpcola | 0:a1734fe1ec4b | 96 | ( |
vpcola | 0:a1734fe1ec4b | 97 | uint8_t * srcAddress, |
vpcola | 0:a1734fe1ec4b | 98 | uint8_t numOfBytes |
vpcola | 0:a1734fe1ec4b | 99 | ); |
vpcola | 0:a1734fe1ec4b | 100 | |
vpcola | 0:a1734fe1ec4b | 101 | /*--------------------------------------------------------------------------- |
vpcola | 0:a1734fe1ec4b | 102 | * Name: MCR20Drv_Start_PB_DMA_SPI_Read |
vpcola | 0:a1734fe1ec4b | 103 | * Description: - |
vpcola | 0:a1734fe1ec4b | 104 | * Parameters: - |
vpcola | 0:a1734fe1ec4b | 105 | * Return: - |
vpcola | 0:a1734fe1ec4b | 106 | *---------------------------------------------------------------------------*/ |
vpcola | 0:a1734fe1ec4b | 107 | void MCR20Drv_Start_PB_DMA_SPI_Read |
vpcola | 0:a1734fe1ec4b | 108 | ( |
vpcola | 0:a1734fe1ec4b | 109 | uint8_t * dstAddress, |
vpcola | 0:a1734fe1ec4b | 110 | uint8_t numOfBytes |
vpcola | 0:a1734fe1ec4b | 111 | ); |
vpcola | 0:a1734fe1ec4b | 112 | |
vpcola | 0:a1734fe1ec4b | 113 | /*--------------------------------------------------------------------------- |
vpcola | 0:a1734fe1ec4b | 114 | * Name: MCR20Drv_DirectAccessSPIWrite |
vpcola | 0:a1734fe1ec4b | 115 | * Description: - |
vpcola | 0:a1734fe1ec4b | 116 | * Parameters: - |
vpcola | 0:a1734fe1ec4b | 117 | * Return: - |
vpcola | 0:a1734fe1ec4b | 118 | *---------------------------------------------------------------------------*/ |
vpcola | 0:a1734fe1ec4b | 119 | void MCR20Drv_DirectAccessSPIWrite |
vpcola | 0:a1734fe1ec4b | 120 | ( |
vpcola | 0:a1734fe1ec4b | 121 | uint8_t address, |
vpcola | 0:a1734fe1ec4b | 122 | uint8_t value |
vpcola | 0:a1734fe1ec4b | 123 | ); |
vpcola | 0:a1734fe1ec4b | 124 | |
vpcola | 0:a1734fe1ec4b | 125 | /*--------------------------------------------------------------------------- |
vpcola | 0:a1734fe1ec4b | 126 | * Name: MCR20Drv_DirectAccessSPIMultiByteWrite |
vpcola | 0:a1734fe1ec4b | 127 | * Description: - |
vpcola | 0:a1734fe1ec4b | 128 | * Parameters: - |
vpcola | 0:a1734fe1ec4b | 129 | * Return: - |
vpcola | 0:a1734fe1ec4b | 130 | *---------------------------------------------------------------------------*/ |
vpcola | 0:a1734fe1ec4b | 131 | void MCR20Drv_DirectAccessSPIMultiByteWrite |
vpcola | 0:a1734fe1ec4b | 132 | ( |
vpcola | 0:a1734fe1ec4b | 133 | uint8_t startAddress, |
vpcola | 0:a1734fe1ec4b | 134 | uint8_t * byteArray, |
vpcola | 0:a1734fe1ec4b | 135 | uint8_t numOfBytes |
vpcola | 0:a1734fe1ec4b | 136 | ); |
vpcola | 0:a1734fe1ec4b | 137 | |
vpcola | 0:a1734fe1ec4b | 138 | /*--------------------------------------------------------------------------- |
vpcola | 0:a1734fe1ec4b | 139 | * Name: MCR20Drv_PB_SPIBurstWrite |
vpcola | 0:a1734fe1ec4b | 140 | * Description: - |
vpcola | 0:a1734fe1ec4b | 141 | * Parameters: - |
vpcola | 0:a1734fe1ec4b | 142 | * Return: - |
vpcola | 0:a1734fe1ec4b | 143 | *---------------------------------------------------------------------------*/ |
vpcola | 0:a1734fe1ec4b | 144 | void MCR20Drv_PB_SPIBurstWrite |
vpcola | 0:a1734fe1ec4b | 145 | ( |
vpcola | 0:a1734fe1ec4b | 146 | uint8_t * byteArray, |
vpcola | 0:a1734fe1ec4b | 147 | uint8_t numOfBytes |
vpcola | 0:a1734fe1ec4b | 148 | ); |
vpcola | 0:a1734fe1ec4b | 149 | |
vpcola | 0:a1734fe1ec4b | 150 | /*--------------------------------------------------------------------------- |
vpcola | 0:a1734fe1ec4b | 151 | * Name: MCR20Drv_DirectAccessSPIRead |
vpcola | 0:a1734fe1ec4b | 152 | * Description: - |
vpcola | 0:a1734fe1ec4b | 153 | * Parameters: - |
vpcola | 0:a1734fe1ec4b | 154 | * Return: - |
vpcola | 0:a1734fe1ec4b | 155 | *---------------------------------------------------------------------------*/ |
vpcola | 0:a1734fe1ec4b | 156 | uint8_t MCR20Drv_DirectAccessSPIRead |
vpcola | 0:a1734fe1ec4b | 157 | ( |
vpcola | 0:a1734fe1ec4b | 158 | uint8_t address |
vpcola | 0:a1734fe1ec4b | 159 | ); |
vpcola | 0:a1734fe1ec4b | 160 | |
vpcola | 0:a1734fe1ec4b | 161 | /*--------------------------------------------------------------------------- |
vpcola | 0:a1734fe1ec4b | 162 | * Name: MCR20Drv_DirectAccessSPIMultyByteRead |
vpcola | 0:a1734fe1ec4b | 163 | * Description: - |
vpcola | 0:a1734fe1ec4b | 164 | * Parameters: - |
vpcola | 0:a1734fe1ec4b | 165 | * Return: - |
vpcola | 0:a1734fe1ec4b | 166 | *---------------------------------------------------------------------------*/ |
vpcola | 0:a1734fe1ec4b | 167 | |
vpcola | 0:a1734fe1ec4b | 168 | uint8_t MCR20Drv_DirectAccessSPIMultiByteRead |
vpcola | 0:a1734fe1ec4b | 169 | ( |
vpcola | 0:a1734fe1ec4b | 170 | uint8_t startAddress, |
vpcola | 0:a1734fe1ec4b | 171 | uint8_t * byteArray, |
vpcola | 0:a1734fe1ec4b | 172 | uint8_t numOfBytes |
vpcola | 0:a1734fe1ec4b | 173 | ); |
vpcola | 0:a1734fe1ec4b | 174 | |
vpcola | 0:a1734fe1ec4b | 175 | /*--------------------------------------------------------------------------- |
vpcola | 0:a1734fe1ec4b | 176 | * Name: MCR20Drv_PB_SPIByteWrite |
vpcola | 0:a1734fe1ec4b | 177 | * Description: - |
vpcola | 0:a1734fe1ec4b | 178 | * Parameters: - |
vpcola | 0:a1734fe1ec4b | 179 | * Return: - |
vpcola | 0:a1734fe1ec4b | 180 | *---------------------------------------------------------------------------*/ |
vpcola | 0:a1734fe1ec4b | 181 | void MCR20Drv_PB_SPIByteWrite |
vpcola | 0:a1734fe1ec4b | 182 | ( |
vpcola | 0:a1734fe1ec4b | 183 | uint8_t address, |
vpcola | 0:a1734fe1ec4b | 184 | uint8_t value |
vpcola | 0:a1734fe1ec4b | 185 | ); |
vpcola | 0:a1734fe1ec4b | 186 | |
vpcola | 0:a1734fe1ec4b | 187 | /*--------------------------------------------------------------------------- |
vpcola | 0:a1734fe1ec4b | 188 | * Name: MCR20Drv_PB_SPIBurstRead |
vpcola | 0:a1734fe1ec4b | 189 | * Description: - |
vpcola | 0:a1734fe1ec4b | 190 | * Parameters: - |
vpcola | 0:a1734fe1ec4b | 191 | * Return: - |
vpcola | 0:a1734fe1ec4b | 192 | *---------------------------------------------------------------------------*/ |
vpcola | 0:a1734fe1ec4b | 193 | uint8_t MCR20Drv_PB_SPIBurstRead |
vpcola | 0:a1734fe1ec4b | 194 | ( |
vpcola | 0:a1734fe1ec4b | 195 | uint8_t * byteArray, |
vpcola | 0:a1734fe1ec4b | 196 | uint8_t numOfBytes |
vpcola | 0:a1734fe1ec4b | 197 | ); |
vpcola | 0:a1734fe1ec4b | 198 | |
vpcola | 0:a1734fe1ec4b | 199 | /*--------------------------------------------------------------------------- |
vpcola | 0:a1734fe1ec4b | 200 | * Name: MCR20Drv_IndirectAccessSPIWrite |
vpcola | 0:a1734fe1ec4b | 201 | * Description: - |
vpcola | 0:a1734fe1ec4b | 202 | * Parameters: - |
vpcola | 0:a1734fe1ec4b | 203 | * Return: - |
vpcola | 0:a1734fe1ec4b | 204 | *---------------------------------------------------------------------------*/ |
vpcola | 0:a1734fe1ec4b | 205 | void MCR20Drv_IndirectAccessSPIWrite |
vpcola | 0:a1734fe1ec4b | 206 | ( |
vpcola | 0:a1734fe1ec4b | 207 | uint8_t address, |
vpcola | 0:a1734fe1ec4b | 208 | uint8_t value |
vpcola | 0:a1734fe1ec4b | 209 | ); |
vpcola | 0:a1734fe1ec4b | 210 | |
vpcola | 0:a1734fe1ec4b | 211 | /*--------------------------------------------------------------------------- |
vpcola | 0:a1734fe1ec4b | 212 | * Name: MCR20Drv_IndirectAccessSPIMultiByteWrite |
vpcola | 0:a1734fe1ec4b | 213 | * Description: - |
vpcola | 0:a1734fe1ec4b | 214 | * Parameters: - |
vpcola | 0:a1734fe1ec4b | 215 | * Return: - |
vpcola | 0:a1734fe1ec4b | 216 | *---------------------------------------------------------------------------*/ |
vpcola | 0:a1734fe1ec4b | 217 | void MCR20Drv_IndirectAccessSPIMultiByteWrite |
vpcola | 0:a1734fe1ec4b | 218 | ( |
vpcola | 0:a1734fe1ec4b | 219 | uint8_t startAddress, |
vpcola | 0:a1734fe1ec4b | 220 | uint8_t * byteArray, |
vpcola | 0:a1734fe1ec4b | 221 | uint8_t numOfBytes |
vpcola | 0:a1734fe1ec4b | 222 | ); |
vpcola | 0:a1734fe1ec4b | 223 | |
vpcola | 0:a1734fe1ec4b | 224 | /*--------------------------------------------------------------------------- |
vpcola | 0:a1734fe1ec4b | 225 | * Name: MCR20Drv_IndirectAccessSPIRead |
vpcola | 0:a1734fe1ec4b | 226 | * Description: - |
vpcola | 0:a1734fe1ec4b | 227 | * Parameters: - |
vpcola | 0:a1734fe1ec4b | 228 | * Return: - |
vpcola | 0:a1734fe1ec4b | 229 | *---------------------------------------------------------------------------*/ |
vpcola | 0:a1734fe1ec4b | 230 | uint8_t MCR20Drv_IndirectAccessSPIRead |
vpcola | 0:a1734fe1ec4b | 231 | ( |
vpcola | 0:a1734fe1ec4b | 232 | uint8_t address |
vpcola | 0:a1734fe1ec4b | 233 | ); |
vpcola | 0:a1734fe1ec4b | 234 | /*--------------------------------------------------------------------------- |
vpcola | 0:a1734fe1ec4b | 235 | * Name: MCR20Drv_IndirectAccessSPIMultiByteRead |
vpcola | 0:a1734fe1ec4b | 236 | * Description: - |
vpcola | 0:a1734fe1ec4b | 237 | * Parameters: - |
vpcola | 0:a1734fe1ec4b | 238 | * Return: - |
vpcola | 0:a1734fe1ec4b | 239 | *---------------------------------------------------------------------------*/ |
vpcola | 0:a1734fe1ec4b | 240 | void MCR20Drv_IndirectAccessSPIMultiByteRead |
vpcola | 0:a1734fe1ec4b | 241 | ( |
vpcola | 0:a1734fe1ec4b | 242 | uint8_t startAddress, |
vpcola | 0:a1734fe1ec4b | 243 | uint8_t * byteArray, |
vpcola | 0:a1734fe1ec4b | 244 | uint8_t numOfBytes |
vpcola | 0:a1734fe1ec4b | 245 | ); |
vpcola | 0:a1734fe1ec4b | 246 | |
vpcola | 0:a1734fe1ec4b | 247 | /*--------------------------------------------------------------------------- |
vpcola | 0:a1734fe1ec4b | 248 | * Name: MCR20Drv_IsIrqPending |
vpcola | 0:a1734fe1ec4b | 249 | * Description: - |
vpcola | 0:a1734fe1ec4b | 250 | * Parameters: - |
vpcola | 0:a1734fe1ec4b | 251 | * Return: - |
vpcola | 0:a1734fe1ec4b | 252 | *---------------------------------------------------------------------------*/ |
vpcola | 0:a1734fe1ec4b | 253 | uint32_t MCR20Drv_IsIrqPending |
vpcola | 0:a1734fe1ec4b | 254 | ( |
vpcola | 0:a1734fe1ec4b | 255 | void |
vpcola | 0:a1734fe1ec4b | 256 | ); |
vpcola | 0:a1734fe1ec4b | 257 | |
vpcola | 0:a1734fe1ec4b | 258 | /*--------------------------------------------------------------------------- |
vpcola | 0:a1734fe1ec4b | 259 | * Name: MCR20Drv_IRQ_Disable |
vpcola | 0:a1734fe1ec4b | 260 | * Description: - |
vpcola | 0:a1734fe1ec4b | 261 | * Parameters: - |
vpcola | 0:a1734fe1ec4b | 262 | * Return: - |
vpcola | 0:a1734fe1ec4b | 263 | *---------------------------------------------------------------------------*/ |
vpcola | 0:a1734fe1ec4b | 264 | void MCR20Drv_IRQ_Disable |
vpcola | 0:a1734fe1ec4b | 265 | ( |
vpcola | 0:a1734fe1ec4b | 266 | void |
vpcola | 0:a1734fe1ec4b | 267 | ); |
vpcola | 0:a1734fe1ec4b | 268 | |
vpcola | 0:a1734fe1ec4b | 269 | /*--------------------------------------------------------------------------- |
vpcola | 0:a1734fe1ec4b | 270 | * Name: MCR20Drv_IRQ_Enable |
vpcola | 0:a1734fe1ec4b | 271 | * Description: - |
vpcola | 0:a1734fe1ec4b | 272 | * Parameters: - |
vpcola | 0:a1734fe1ec4b | 273 | * Return: - |
vpcola | 0:a1734fe1ec4b | 274 | *---------------------------------------------------------------------------*/ |
vpcola | 0:a1734fe1ec4b | 275 | void MCR20Drv_IRQ_Enable |
vpcola | 0:a1734fe1ec4b | 276 | ( |
vpcola | 0:a1734fe1ec4b | 277 | void |
vpcola | 0:a1734fe1ec4b | 278 | ); |
vpcola | 0:a1734fe1ec4b | 279 | |
vpcola | 0:a1734fe1ec4b | 280 | /*--------------------------------------------------------------------------- |
vpcola | 0:a1734fe1ec4b | 281 | * Name: MCR20Drv_RST_PortConfig |
vpcola | 0:a1734fe1ec4b | 282 | * Description: - |
vpcola | 0:a1734fe1ec4b | 283 | * Parameters: - |
vpcola | 0:a1734fe1ec4b | 284 | * Return: - |
vpcola | 0:a1734fe1ec4b | 285 | *---------------------------------------------------------------------------*/ |
vpcola | 0:a1734fe1ec4b | 286 | void MCR20Drv_RST_B_PortConfig |
vpcola | 0:a1734fe1ec4b | 287 | ( |
vpcola | 0:a1734fe1ec4b | 288 | void |
vpcola | 0:a1734fe1ec4b | 289 | ); |
vpcola | 0:a1734fe1ec4b | 290 | |
vpcola | 0:a1734fe1ec4b | 291 | /*--------------------------------------------------------------------------- |
vpcola | 0:a1734fe1ec4b | 292 | * Name: MCR20Drv_RST_Assert |
vpcola | 0:a1734fe1ec4b | 293 | * Description: - |
vpcola | 0:a1734fe1ec4b | 294 | * Parameters: - |
vpcola | 0:a1734fe1ec4b | 295 | * Return: - |
vpcola | 0:a1734fe1ec4b | 296 | *---------------------------------------------------------------------------*/ |
vpcola | 0:a1734fe1ec4b | 297 | void MCR20Drv_RST_B_Assert |
vpcola | 0:a1734fe1ec4b | 298 | ( |
vpcola | 0:a1734fe1ec4b | 299 | void |
vpcola | 0:a1734fe1ec4b | 300 | ); |
vpcola | 0:a1734fe1ec4b | 301 | |
vpcola | 0:a1734fe1ec4b | 302 | /*--------------------------------------------------------------------------- |
vpcola | 0:a1734fe1ec4b | 303 | * Name: MCR20Drv_RST_Deassert |
vpcola | 0:a1734fe1ec4b | 304 | * Description: - |
vpcola | 0:a1734fe1ec4b | 305 | * Parameters: - |
vpcola | 0:a1734fe1ec4b | 306 | * Return: - |
vpcola | 0:a1734fe1ec4b | 307 | *---------------------------------------------------------------------------*/ |
vpcola | 0:a1734fe1ec4b | 308 | void MCR20Drv_RST_B_Deassert |
vpcola | 0:a1734fe1ec4b | 309 | ( |
vpcola | 0:a1734fe1ec4b | 310 | void |
vpcola | 0:a1734fe1ec4b | 311 | ); |
vpcola | 0:a1734fe1ec4b | 312 | |
vpcola | 0:a1734fe1ec4b | 313 | /*--------------------------------------------------------------------------- |
vpcola | 0:a1734fe1ec4b | 314 | * Name: MCR20Drv_SoftRST_Assert |
vpcola | 0:a1734fe1ec4b | 315 | * Description: - |
vpcola | 0:a1734fe1ec4b | 316 | * Parameters: - |
vpcola | 0:a1734fe1ec4b | 317 | * Return: - |
vpcola | 0:a1734fe1ec4b | 318 | *---------------------------------------------------------------------------*/ |
vpcola | 0:a1734fe1ec4b | 319 | void MCR20Drv_SoftRST_Assert |
vpcola | 0:a1734fe1ec4b | 320 | ( |
vpcola | 0:a1734fe1ec4b | 321 | void |
vpcola | 0:a1734fe1ec4b | 322 | ); |
vpcola | 0:a1734fe1ec4b | 323 | |
vpcola | 0:a1734fe1ec4b | 324 | /*--------------------------------------------------------------------------- |
vpcola | 0:a1734fe1ec4b | 325 | * Name: MCR20Drv_SoftRST_Deassert |
vpcola | 0:a1734fe1ec4b | 326 | * Description: - |
vpcola | 0:a1734fe1ec4b | 327 | * Parameters: - |
vpcola | 0:a1734fe1ec4b | 328 | * Return: - |
vpcola | 0:a1734fe1ec4b | 329 | *---------------------------------------------------------------------------*/ |
vpcola | 0:a1734fe1ec4b | 330 | void MCR20Drv_SoftRST_Deassert |
vpcola | 0:a1734fe1ec4b | 331 | ( |
vpcola | 0:a1734fe1ec4b | 332 | void |
vpcola | 0:a1734fe1ec4b | 333 | ); |
vpcola | 0:a1734fe1ec4b | 334 | |
vpcola | 0:a1734fe1ec4b | 335 | |
vpcola | 0:a1734fe1ec4b | 336 | /*--------------------------------------------------------------------------- |
vpcola | 0:a1734fe1ec4b | 337 | * Name: MCR20Drv_RESET |
vpcola | 0:a1734fe1ec4b | 338 | * Description: - |
vpcola | 0:a1734fe1ec4b | 339 | * Parameters: - |
vpcola | 0:a1734fe1ec4b | 340 | * Return: - |
vpcola | 0:a1734fe1ec4b | 341 | *---------------------------------------------------------------------------*/ |
vpcola | 0:a1734fe1ec4b | 342 | void MCR20Drv_RESET |
vpcola | 0:a1734fe1ec4b | 343 | ( |
vpcola | 0:a1734fe1ec4b | 344 | void |
vpcola | 0:a1734fe1ec4b | 345 | ); |
vpcola | 0:a1734fe1ec4b | 346 | |
vpcola | 0:a1734fe1ec4b | 347 | /*--------------------------------------------------------------------------- |
vpcola | 0:a1734fe1ec4b | 348 | * Name: MCR20Drv_Soft_RESET |
vpcola | 0:a1734fe1ec4b | 349 | * Description: - |
vpcola | 0:a1734fe1ec4b | 350 | * Parameters: - |
vpcola | 0:a1734fe1ec4b | 351 | * Return: - |
vpcola | 0:a1734fe1ec4b | 352 | *---------------------------------------------------------------------------*/ |
vpcola | 0:a1734fe1ec4b | 353 | void MCR20Drv_Soft_RESET |
vpcola | 0:a1734fe1ec4b | 354 | ( |
vpcola | 0:a1734fe1ec4b | 355 | void |
vpcola | 0:a1734fe1ec4b | 356 | ); |
vpcola | 0:a1734fe1ec4b | 357 | |
vpcola | 0:a1734fe1ec4b | 358 | /*--------------------------------------------------------------------------- |
vpcola | 0:a1734fe1ec4b | 359 | * Name: MCR20Drv_Set_CLK_OUT_Freq |
vpcola | 0:a1734fe1ec4b | 360 | * Description: - |
vpcola | 0:a1734fe1ec4b | 361 | * Parameters: - |
vpcola | 0:a1734fe1ec4b | 362 | * Return: - |
vpcola | 0:a1734fe1ec4b | 363 | *---------------------------------------------------------------------------*/ |
vpcola | 0:a1734fe1ec4b | 364 | void MCR20Drv_Set_CLK_OUT_Freq |
vpcola | 0:a1734fe1ec4b | 365 | ( |
vpcola | 0:a1734fe1ec4b | 366 | uint8_t freqDiv |
vpcola | 0:a1734fe1ec4b | 367 | ); |
vpcola | 0:a1734fe1ec4b | 368 | |
vpcola | 0:a1734fe1ec4b | 369 | #define ProtectFromMCR20Interrupt() MCR20Drv_IRQ_Disable() |
vpcola | 0:a1734fe1ec4b | 370 | #define UnprotectFromMCR20Interrupt() MCR20Drv_IRQ_Enable() |
vpcola | 0:a1734fe1ec4b | 371 | |
vpcola | 0:a1734fe1ec4b | 372 | #endif /* __MCR20_DRV_H__ */ |