Vipin Ranka / MGAS_GR_Peach

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Dependencies:   GR-PEACH_video GraphicsFramework HTTPServer R_BSP mbed-rpc mbed-rtos Socket lwip-eth lwip-sys lwip FATFileSystem

Fork of mbed-os-example-mbed5-blinky by mbed-os-examples

UniGraphic/Protocols/PAR8.h@12:9a20164dcc47, 2017-01-11 (annotated)

Committer:
vipinranka
Date:
Wed Jan 11 11:41:30 2017 +0000
Revision:
12:9a20164dcc47
This is the final version MGAS Project for Renesas GR Peach Design Contest

Who changed what in which revision?

UserRevisionLine numberNew contents of line
vipinranka 12:9a20164dcc47 1 #ifndef PAR8_H
vipinranka 12:9a20164dcc47 2 #define PAR8_H
vipinranka 12:9a20164dcc47 3
vipinranka 12:9a20164dcc47 4 #include "mbed.h"
vipinranka 12:9a20164dcc47 5 #include "Protocols.h"
vipinranka 12:9a20164dcc47 6
vipinranka 12:9a20164dcc47 7 #if DEVICE_PORTINOUT
vipinranka 12:9a20164dcc47 8 //#include "GraphicsDisplay.h"
vipinranka 12:9a20164dcc47 9
vipinranka 12:9a20164dcc47 10 /** Parallel 8bit interface
vipinranka 12:9a20164dcc47 11 */
vipinranka 12:9a20164dcc47 12 class PAR8 : public Protocols
vipinranka 12:9a20164dcc47 13 {
vipinranka 12:9a20164dcc47 14 public:
vipinranka 12:9a20164dcc47 15
vipinranka 12:9a20164dcc47 16 /** Create a PAR8 display interface with a GPIO port and 5 control pins
vipinranka 12:9a20164dcc47 17 *
vipinranka 12:9a20164dcc47 18 * @param port GPIO port to use
vipinranka 12:9a20164dcc47 19 * @param CS pin connected to CS of display
vipinranka 12:9a20164dcc47 20 * @param reset pin connected to RESET of display
vipinranka 12:9a20164dcc47 21 * @param DC pin connected to data/command of display
vipinranka 12:9a20164dcc47 22 * @param WR pin connected to SDI of display
vipinranka 12:9a20164dcc47 23 * @param RD pin connected to RS of display
vipinranka 12:9a20164dcc47 24 */
vipinranka 12:9a20164dcc47 25 PAR8(PortName port, PinName CS, PinName reset, PinName DC, PinName WR, PinName RD);
vipinranka 12:9a20164dcc47 26
vipinranka 12:9a20164dcc47 27 protected:
vipinranka 12:9a20164dcc47 28
vipinranka 12:9a20164dcc47 29 /** Send 8bit command to display controller
vipinranka 12:9a20164dcc47 30 *
vipinranka 12:9a20164dcc47 31 * @param cmd: byte to send
vipinranka 12:9a20164dcc47 32 *
vipinranka 12:9a20164dcc47 33 */
vipinranka 12:9a20164dcc47 34 virtual void wr_cmd8(unsigned char cmd);
vipinranka 12:9a20164dcc47 35
vipinranka 12:9a20164dcc47 36 /** Send 8bit data to display controller
vipinranka 12:9a20164dcc47 37 *
vipinranka 12:9a20164dcc47 38 * @param data: byte to send
vipinranka 12:9a20164dcc47 39 *
vipinranka 12:9a20164dcc47 40 */
vipinranka 12:9a20164dcc47 41 virtual void wr_data8(unsigned char data);
vipinranka 12:9a20164dcc47 42
vipinranka 12:9a20164dcc47 43 /** Send 2x8bit command to display controller
vipinranka 12:9a20164dcc47 44 *
vipinranka 12:9a20164dcc47 45 * @param cmd: halfword to send
vipinranka 12:9a20164dcc47 46 *
vipinranka 12:9a20164dcc47 47 */
vipinranka 12:9a20164dcc47 48 virtual void wr_cmd16(unsigned short cmd);
vipinranka 12:9a20164dcc47 49
vipinranka 12:9a20164dcc47 50 /** Send 2x8bit data to display controller
vipinranka 12:9a20164dcc47 51 *
vipinranka 12:9a20164dcc47 52 * @param data: halfword to send
vipinranka 12:9a20164dcc47 53 *
vipinranka 12:9a20164dcc47 54 */
vipinranka 12:9a20164dcc47 55 virtual void wr_data16(unsigned short data);
vipinranka 12:9a20164dcc47 56
vipinranka 12:9a20164dcc47 57 /** Send 16bit pixeldata to display controller
vipinranka 12:9a20164dcc47 58 *
vipinranka 12:9a20164dcc47 59 * @param data: halfword to send
vipinranka 12:9a20164dcc47 60 *
vipinranka 12:9a20164dcc47 61 */
vipinranka 12:9a20164dcc47 62 virtual void wr_gram(unsigned short data);
vipinranka 12:9a20164dcc47 63
vipinranka 12:9a20164dcc47 64 /** Send same 16bit pixeldata to display controller multiple times
vipinranka 12:9a20164dcc47 65 *
vipinranka 12:9a20164dcc47 66 * @param data: halfword to send
vipinranka 12:9a20164dcc47 67 * @param count: how many
vipinranka 12:9a20164dcc47 68 *
vipinranka 12:9a20164dcc47 69 */
vipinranka 12:9a20164dcc47 70 virtual void wr_gram(unsigned short data, unsigned int count);
vipinranka 12:9a20164dcc47 71
vipinranka 12:9a20164dcc47 72 /** Send array of pixeldata shorts to display controller
vipinranka 12:9a20164dcc47 73 *
vipinranka 12:9a20164dcc47 74 * @param data: unsigned short pixeldata array
vipinranka 12:9a20164dcc47 75 * @param lenght: lenght (in shorts)
vipinranka 12:9a20164dcc47 76 *
vipinranka 12:9a20164dcc47 77 */
vipinranka 12:9a20164dcc47 78 virtual void wr_grambuf(unsigned short* data, unsigned int lenght);
vipinranka 12:9a20164dcc47 79
vipinranka 12:9a20164dcc47 80 /** Read 16bit pixeldata from display controller (with dummy cycle)
vipinranka 12:9a20164dcc47 81 *
vipinranka 12:9a20164dcc47 82 * @param convert true/false. Convert 18bit to 16bit, some controllers returns 18bit
vipinranka 12:9a20164dcc47 83 * @returns 16bit color
vipinranka 12:9a20164dcc47 84 */
vipinranka 12:9a20164dcc47 85 virtual unsigned short rd_gram(bool convert);
vipinranka 12:9a20164dcc47 86
vipinranka 12:9a20164dcc47 87 /** Read 4x8bit register data (with dummy cycle)
vipinranka 12:9a20164dcc47 88 * @param reg the register to read
vipinranka 12:9a20164dcc47 89 * @returns data as uint
vipinranka 12:9a20164dcc47 90 *
vipinranka 12:9a20164dcc47 91 */
vipinranka 12:9a20164dcc47 92 virtual unsigned int rd_reg_data32(unsigned char reg);
vipinranka 12:9a20164dcc47 93
vipinranka 12:9a20164dcc47 94 /** Read 3x8bit ExtendedCommands register data
vipinranka 12:9a20164dcc47 95 * @param reg the register to read
vipinranka 12:9a20164dcc47 96 * @returns data as uint
vipinranka 12:9a20164dcc47 97 * @note EXTC regs (0xB0 to 0xFF) are read/write registers, for Parallel mode directly accessible in both directions
vipinranka 12:9a20164dcc47 98 */
vipinranka 12:9a20164dcc47 99 virtual unsigned int rd_extcreg_data32(unsigned char reg, unsigned char SPIreadenablecmd);
vipinranka 12:9a20164dcc47 100
vipinranka 12:9a20164dcc47 101 /** ILI932x specific, does a dummy read cycle, number of bits is protocol dependent
vipinranka 12:9a20164dcc47 102 * for PAR protocols: a signle RD bit toggle
vipinranka 12:9a20164dcc47 103 * for SPI8: 8clocks
vipinranka 12:9a20164dcc47 104 * for SPI16: 16 clocks
vipinranka 12:9a20164dcc47 105 */
vipinranka 12:9a20164dcc47 106 virtual void dummyread ();
vipinranka 12:9a20164dcc47 107
vipinranka 12:9a20164dcc47 108 /** ILI932x specific, select register for a successive write or read
vipinranka 12:9a20164dcc47 109 *
vipinranka 12:9a20164dcc47 110 * @param reg register to be selected
vipinranka 12:9a20164dcc47 111 * @param forread false = a write next (default), true = a read next
vipinranka 12:9a20164dcc47 112 * @note forread only used by SPI protocols
vipinranka 12:9a20164dcc47 113 */
vipinranka 12:9a20164dcc47 114 virtual void reg_select(unsigned char reg, bool forread =false);
vipinranka 12:9a20164dcc47 115
vipinranka 12:9a20164dcc47 116 /** ILI932x specific, write register with data
vipinranka 12:9a20164dcc47 117 *
vipinranka 12:9a20164dcc47 118 * @param reg register to write
vipinranka 12:9a20164dcc47 119 * @param data 16bit data
vipinranka 12:9a20164dcc47 120 */
vipinranka 12:9a20164dcc47 121 virtual void reg_write(unsigned char reg, unsigned short data);
vipinranka 12:9a20164dcc47 122
vipinranka 12:9a20164dcc47 123 /** ILI932x specific, read register
vipinranka 12:9a20164dcc47 124 *
vipinranka 12:9a20164dcc47 125 * @param reg register to be read
vipinranka 12:9a20164dcc47 126 * @returns 16bit register value
vipinranka 12:9a20164dcc47 127 */
vipinranka 12:9a20164dcc47 128 virtual unsigned short reg_read(unsigned char reg);
vipinranka 12:9a20164dcc47 129
vipinranka 12:9a20164dcc47 130 /** HW reset sequence (without display init commands)
vipinranka 12:9a20164dcc47 131 */
vipinranka 12:9a20164dcc47 132 virtual void hw_reset();
vipinranka 12:9a20164dcc47 133
vipinranka 12:9a20164dcc47 134 /** Set ChipSelect high or low
vipinranka 12:9a20164dcc47 135 * @param enable 0/1
vipinranka 12:9a20164dcc47 136 */
vipinranka 12:9a20164dcc47 137 virtual void BusEnable(bool enable);
vipinranka 12:9a20164dcc47 138
vipinranka 12:9a20164dcc47 139
vipinranka 12:9a20164dcc47 140
vipinranka 12:9a20164dcc47 141 private:
vipinranka 12:9a20164dcc47 142
vipinranka 12:9a20164dcc47 143 PortInOut _port;
vipinranka 12:9a20164dcc47 144 DigitalOut _CS;
vipinranka 12:9a20164dcc47 145 DigitalOut _reset;
vipinranka 12:9a20164dcc47 146 DigitalOut _DC;
vipinranka 12:9a20164dcc47 147 DigitalOut _WR;
vipinranka 12:9a20164dcc47 148 DigitalOut _RD;
vipinranka 12:9a20164dcc47 149
vipinranka 12:9a20164dcc47 150 };
vipinranka 12:9a20164dcc47 151 #endif
vipinranka 12:9a20164dcc47 152
vipinranka 12:9a20164dcc47 153 #endif