Norimasa Okamoto / Mbed 2 deprecated lpcterm2

semihost server example program

Dependencies:   SWD mbed USBLocalFileSystem BaseDAP USBDAP

/media/uploads/va009039/kl46z-lpc800-360x480.jpg

LPCXpresso
LPC11U68		LPCXpresso
LPC1549		FRDM-KL46ZEA LPC4088 QSB
app-board		LPC1768
app-board		LPC810LPC1114FN28
serverserverserverserverserverclientclient
SWDIOD12D12D12p25p21p4(P0_2)p12
SWCLKD10D10D10p26p22p3(P0_3)p3
nRESET
*option		D6D6D6p34p30p1(P0_5)p23
GNDGNDGNDGNDp1p1p7p22
3.3VP3V3P3V3P3V3p44p40p6p21
flash writeSW2(P0_1)SW3(P1_9)SW1p14
joystick
center		p14
joystick
center

client example:

Import programlpc810-semihost_helloworld

semihost client example program

Last commit 20 Feb 2014 by Norimasa Okamoto

Target2.cpp@5:2774358f5e4f, 2013-09-14 (annotated)

Committer:
va009039
Date:
Sat Sep 14 12:55:29 2013 +0000
Revision:
5:2774358f5e4f
Parent:
4:5e4107edcbdb
Child:
6:5da6ad51a18f
deleted the code to access the data of unalignment.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
va009039 5:2774358f5e4f 1 // Target2.cpp 2013/9/14
va009039 0:27d35fa263b5 2 #include "Target2.h"
va009039 0:27d35fa263b5 3 #include "mydebug.h"
va009039 0:27d35fa263b5 4
va009039 3:d7a7cde0bfb8 5 #define SYSMEMREMAP 0x40048000
va009039 3:d7a7cde0bfb8 6
va009039 2:32e9437348ad 7 #define CoreDebug_BASE (0xE000EDF0UL)
va009039 2:32e9437348ad 8 #define DHCSR (CoreDebug_BASE+0)
va009039 2:32e9437348ad 9 #define DCRSR (CoreDebug_BASE+4)
va009039 2:32e9437348ad 10 #define DCRDR (CoreDebug_BASE+8)
va009039 2:32e9437348ad 11 #define DEMCR (CoreDebug_BASE+12)
va009039 2:32e9437348ad 12
va009039 2:32e9437348ad 13 #define NVIC_AIRCR 0xE000ED0C
va009039 0:27d35fa263b5 14
va009039 4:5e4107edcbdb 15 // FPB (breakpoint)
va009039 4:5e4107edcbdb 16 #define FP_CTRL (0xE0002000)
va009039 4:5e4107edcbdb 17 #define FP_CTRL_KEY (1 << 1)
va009039 4:5e4107edcbdb 18 #define FP_COMP0 (0xE0002008)
va009039 4:5e4107edcbdb 19
va009039 5:2774358f5e4f 20 Target2::Target2(PinName swdio, PinName swclk, PinName reset)
va009039 5:2774358f5e4f 21 : _swd(swdio, swclk, reset)
va009039 0:27d35fa263b5 22 {
va009039 0:27d35fa263b5 23 r0.setup(this, 0);
va009039 0:27d35fa263b5 24 r1.setup(this, 1);
va009039 0:27d35fa263b5 25 r2.setup(this, 2);
va009039 0:27d35fa263b5 26 r3.setup(this, 3);
va009039 0:27d35fa263b5 27 r4.setup(this, 4);
va009039 0:27d35fa263b5 28 r5.setup(this, 5);
va009039 0:27d35fa263b5 29 r6.setup(this, 6);
va009039 0:27d35fa263b5 30 r7.setup(this, 7);
va009039 0:27d35fa263b5 31 r8.setup(this, 8);
va009039 0:27d35fa263b5 32 r9.setup(this, 9);
va009039 0:27d35fa263b5 33 r10.setup(this, 10);
va009039 0:27d35fa263b5 34 r11.setup(this, 11);
va009039 0:27d35fa263b5 35 r12.setup(this, 12);
va009039 0:27d35fa263b5 36 sp.setup(this, 13);
va009039 0:27d35fa263b5 37 lr.setup(this, 14);
va009039 0:27d35fa263b5 38 pc.setup(this, 15);
va009039 0:27d35fa263b5 39 xpsr.setup(this, 16);
va009039 0:27d35fa263b5 40 }
va009039 0:27d35fa263b5 41
va009039 0:27d35fa263b5 42 bool Target2::setup()
va009039 0:27d35fa263b5 43 {
va009039 0:27d35fa263b5 44 _swd.Setup();
va009039 5:2774358f5e4f 45 JTAG2SWD();
va009039 0:27d35fa263b5 46
va009039 0:27d35fa263b5 47 uint32_t data;
va009039 0:27d35fa263b5 48 uint8_t ack = _swd.Transfer(DP_IDCODE, &data);
va009039 0:27d35fa263b5 49 TEST_ASSERT(ack == SWD_OK);
va009039 0:27d35fa263b5 50 if (ack != SWD_OK) {
va009039 0:27d35fa263b5 51 return false;
va009039 0:27d35fa263b5 52 }
va009039 3:d7a7cde0bfb8 53 idcode = data;
va009039 3:d7a7cde0bfb8 54 //TEST_ASSERT(data == 0x0bb11477);
va009039 0:27d35fa263b5 55
va009039 0:27d35fa263b5 56 Abort();
va009039 0:27d35fa263b5 57
va009039 0:27d35fa263b5 58 data = 0x0;
va009039 0:27d35fa263b5 59 ack = _swd.Transfer(DP_SELECT, &data);
va009039 0:27d35fa263b5 60 TEST_ASSERT(ack == SWD_OK);
va009039 0:27d35fa263b5 61 if (ack != SWD_OK) {
va009039 0:27d35fa263b5 62 return false;
va009039 0:27d35fa263b5 63 }
va009039 0:27d35fa263b5 64
va009039 0:27d35fa263b5 65 ack = _swd.Transfer(DP_RDBUFF, &data);
va009039 0:27d35fa263b5 66 TEST_ASSERT(ack == SWD_OK);
va009039 0:27d35fa263b5 67 if (ack != SWD_OK) {
va009039 0:27d35fa263b5 68 return false;
va009039 0:27d35fa263b5 69 }
va009039 0:27d35fa263b5 70
va009039 0:27d35fa263b5 71 data = CSYSPWRUPREQ | CDBGPWRUPREQ;
va009039 0:27d35fa263b5 72 TEST_ASSERT(data == 0x50000000);
va009039 0:27d35fa263b5 73 ack = _swd.Transfer(DP_CTRL_STAT, &data);
va009039 0:27d35fa263b5 74 TEST_ASSERT(ack == SWD_OK);
va009039 0:27d35fa263b5 75 if (ack != SWD_OK) {
va009039 0:27d35fa263b5 76 return false;
va009039 0:27d35fa263b5 77 }
va009039 0:27d35fa263b5 78
va009039 0:27d35fa263b5 79 ack = _swd.Transfer(DP_RDBUFF, &data);
va009039 0:27d35fa263b5 80 TEST_ASSERT(ack == SWD_OK);
va009039 0:27d35fa263b5 81 if (ack != SWD_OK) {
va009039 0:27d35fa263b5 82 return false;
va009039 0:27d35fa263b5 83 }
va009039 0:27d35fa263b5 84
va009039 0:27d35fa263b5 85 ack = _swd.Transfer(DP_CTRL_STAT_R, &data);
va009039 0:27d35fa263b5 86 TEST_ASSERT(ack == SWD_OK);
va009039 0:27d35fa263b5 87 if (ack != SWD_OK) {
va009039 0:27d35fa263b5 88 return false;
va009039 0:27d35fa263b5 89 }
va009039 0:27d35fa263b5 90 TEST_ASSERT(data == 0xf0000040);
va009039 0:27d35fa263b5 91
va009039 0:27d35fa263b5 92 data = CSYSPWRUPREQ | CDBGPWRUPREQ | 0x04000000;
va009039 0:27d35fa263b5 93 TEST_ASSERT(data == 0x54000000);
va009039 0:27d35fa263b5 94 ack = _swd.Transfer(DP_CTRL_STAT, &data);
va009039 0:27d35fa263b5 95 TEST_ASSERT(ack == SWD_OK);
va009039 0:27d35fa263b5 96 if (ack != SWD_OK) {
va009039 0:27d35fa263b5 97 return false;
va009039 0:27d35fa263b5 98 }
va009039 0:27d35fa263b5 99
va009039 0:27d35fa263b5 100 ack = _swd.Transfer(DP_RDBUFF, &data);
va009039 0:27d35fa263b5 101 TEST_ASSERT(ack == SWD_OK);
va009039 0:27d35fa263b5 102 if (ack != SWD_OK) {
va009039 0:27d35fa263b5 103 return false;
va009039 0:27d35fa263b5 104 }
va009039 0:27d35fa263b5 105
va009039 0:27d35fa263b5 106 data = CSYSPWRUPREQ | CDBGPWRUPREQ | MASKLANE;
va009039 0:27d35fa263b5 107 TEST_ASSERT(data == 0x50000f00);
va009039 0:27d35fa263b5 108 ack = _swd.Transfer(DP_CTRL_STAT, &data);
va009039 0:27d35fa263b5 109 TEST_ASSERT(ack == SWD_OK);
va009039 0:27d35fa263b5 110 if (ack != SWD_OK) {
va009039 0:27d35fa263b5 111 return false;
va009039 0:27d35fa263b5 112 }
va009039 0:27d35fa263b5 113
va009039 0:27d35fa263b5 114 ack = _swd.Transfer(DP_RDBUFF, &data);
va009039 0:27d35fa263b5 115 TEST_ASSERT(ack == SWD_OK);
va009039 0:27d35fa263b5 116 if (ack != SWD_OK) {
va009039 0:27d35fa263b5 117 return false;
va009039 0:27d35fa263b5 118 }
va009039 0:27d35fa263b5 119 return true;
va009039 0:27d35fa263b5 120 }
va009039 0:27d35fa263b5 121
va009039 5:2774358f5e4f 122 void Target2::JTAG2SWD()
va009039 5:2774358f5e4f 123 {
va009039 5:2774358f5e4f 124 const uint8_t data1[] = {0xff,0xff,0xff,0xff,0xff,0xff,0xff};
va009039 5:2774358f5e4f 125 const uint8_t data2[] = {0x9e,0xe7};
va009039 5:2774358f5e4f 126 const uint8_t data3[] = {0x00};
va009039 5:2774358f5e4f 127 _swd.SWJSequence(sizeof(data1)*8, data1);
va009039 5:2774358f5e4f 128 _swd.SWJSequence(sizeof(data2)*8, data2);
va009039 5:2774358f5e4f 129 _swd.SWJSequence(sizeof(data1)*8, data1);
va009039 5:2774358f5e4f 130 _swd.SWJSequence(sizeof(data3)*8, data3);
va009039 5:2774358f5e4f 131 }
va009039 5:2774358f5e4f 132
va009039 3:d7a7cde0bfb8 133 void Target2::HardwareReset()
va009039 0:27d35fa263b5 134 {
va009039 3:d7a7cde0bfb8 135 _swd.SWJPins(0x00, 0x80); // nReset off
va009039 3:d7a7cde0bfb8 136 _swd.SWJPins(0x80, 0x80); // nReset on
va009039 3:d7a7cde0bfb8 137 }
va009039 3:d7a7cde0bfb8 138
va009039 3:d7a7cde0bfb8 139 void Target2::SoftwareReset()
va009039 3:d7a7cde0bfb8 140 {
va009039 3:d7a7cde0bfb8 141 writeMemory(NVIC_AIRCR, 0x05fa0004);
va009039 0:27d35fa263b5 142 }
va009039 0:27d35fa263b5 143
va009039 0:27d35fa263b5 144 uint32_t Target2::readMemory(uint32_t addr)
va009039 0:27d35fa263b5 145 {
va009039 0:27d35fa263b5 146 _setaddr(addr);
va009039 0:27d35fa263b5 147
va009039 0:27d35fa263b5 148 uint32_t data;
va009039 0:27d35fa263b5 149 uint8_t ack = _swd.Transfer(AP_DRW_R, &data); // dummy read
va009039 0:27d35fa263b5 150 TEST_ASSERT(ack == SWD_OK);
va009039 0:27d35fa263b5 151
va009039 0:27d35fa263b5 152 ack = _swd.Transfer(DP_RDBUFF, &data);
va009039 0:27d35fa263b5 153 TEST_ASSERT(ack == SWD_OK);
va009039 0:27d35fa263b5 154 return data;
va009039 0:27d35fa263b5 155 }
va009039 0:27d35fa263b5 156
va009039 0:27d35fa263b5 157 void Target2::readMemory(uint32_t addr, uint32_t* data, int count)
va009039 0:27d35fa263b5 158 {
va009039 0:27d35fa263b5 159 if (count == 0) {
va009039 0:27d35fa263b5 160 return;
va009039 0:27d35fa263b5 161 }
va009039 0:27d35fa263b5 162
va009039 0:27d35fa263b5 163 _setaddr(addr);
va009039 0:27d35fa263b5 164
va009039 0:27d35fa263b5 165 uint8_t ack = _swd.Transfer(AP_DRW_R, NULL); // dummy read
va009039 0:27d35fa263b5 166 TEST_ASSERT(ack == SWD_OK);
va009039 0:27d35fa263b5 167
va009039 0:27d35fa263b5 168 for(int i = 0; i < count-1; i++) {
va009039 0:27d35fa263b5 169 ack = _swd.Transfer(AP_DRW_R, data++);
va009039 0:27d35fa263b5 170 TEST_ASSERT(ack == SWD_OK);
va009039 0:27d35fa263b5 171 }
va009039 0:27d35fa263b5 172 ack = _swd.Transfer(DP_RDBUFF, data);
va009039 0:27d35fa263b5 173 TEST_ASSERT(ack == SWD_OK);
va009039 0:27d35fa263b5 174 }
va009039 0:27d35fa263b5 175
va009039 0:27d35fa263b5 176 void Target2::writeMemory(uint32_t addr, uint32_t data)
va009039 0:27d35fa263b5 177 {
va009039 0:27d35fa263b5 178 writeMemory(addr, &data, 1);
va009039 0:27d35fa263b5 179 }
va009039 0:27d35fa263b5 180
va009039 0:27d35fa263b5 181 void Target2::writeMemory(uint32_t addr, uint32_t* data, int count)
va009039 0:27d35fa263b5 182 {
va009039 0:27d35fa263b5 183 _setaddr(addr);
va009039 0:27d35fa263b5 184
va009039 0:27d35fa263b5 185 while(count-- > 0) {
va009039 0:27d35fa263b5 186 uint8_t ack = _swd.Transfer(AP_DRW_W, data);
va009039 0:27d35fa263b5 187 TEST_ASSERT(ack == SWD_OK);
va009039 0:27d35fa263b5 188 data++;
va009039 0:27d35fa263b5 189 }
va009039 0:27d35fa263b5 190 }
va009039 0:27d35fa263b5 191
va009039 1:eb30547ba84d 192 uint8_t Target2::readMemory8(uint32_t addr)
va009039 1:eb30547ba84d 193 {
va009039 1:eb30547ba84d 194 _setaddr8(addr);
va009039 1:eb30547ba84d 195
va009039 1:eb30547ba84d 196 uint32_t data32;
va009039 1:eb30547ba84d 197 uint8_t ack = _swd.Transfer(AP_DRW_R, &data32); // dummy read
va009039 1:eb30547ba84d 198 TEST_ASSERT(ack == SWD_OK);
va009039 1:eb30547ba84d 199
va009039 1:eb30547ba84d 200 ack = _swd.Transfer(DP_RDBUFF, &data32);
va009039 1:eb30547ba84d 201 TEST_ASSERT(ack == SWD_OK);
va009039 1:eb30547ba84d 202 return (data32 >> ((addr & 0x03) << 3)) & 0xff;
va009039 1:eb30547ba84d 203 }
va009039 1:eb30547ba84d 204
va009039 1:eb30547ba84d 205 void Target2::writeMemory8(uint32_t addr, uint8_t data)
va009039 1:eb30547ba84d 206 {
va009039 1:eb30547ba84d 207 _setaddr8(addr);
va009039 1:eb30547ba84d 208
va009039 1:eb30547ba84d 209 uint32_t data32 = data;
va009039 1:eb30547ba84d 210 data32 <<= ((addr & 0x03) << 3);
va009039 1:eb30547ba84d 211 uint8_t ack = _swd.Transfer(AP_DRW_W, &data32);
va009039 1:eb30547ba84d 212 TEST_ASSERT(ack == SWD_OK);
va009039 1:eb30547ba84d 213 }
va009039 1:eb30547ba84d 214
va009039 0:27d35fa263b5 215 void Target2::_setaddr(uint32_t addr)
va009039 0:27d35fa263b5 216 {
va009039 0:27d35fa263b5 217 uint32_t ctl = CSW_VALUE|CSW_SIZE32;
va009039 0:27d35fa263b5 218 uint8_t ack = _swd.Transfer(AP_CSW, &ctl);
va009039 0:27d35fa263b5 219 TEST_ASSERT(ack == SWD_OK);
va009039 0:27d35fa263b5 220
va009039 0:27d35fa263b5 221 ack = _swd.Transfer(DP_RDBUFF, NULL);
va009039 0:27d35fa263b5 222 TEST_ASSERT(ack == SWD_OK);
va009039 0:27d35fa263b5 223
va009039 0:27d35fa263b5 224 ack = _swd.Transfer(AP_TAR, &addr);
va009039 0:27d35fa263b5 225 TEST_ASSERT(ack == SWD_OK);
va009039 0:27d35fa263b5 226
va009039 0:27d35fa263b5 227 ack = _swd.Transfer(DP_RDBUFF, NULL);
va009039 0:27d35fa263b5 228 TEST_ASSERT(ack == SWD_OK);
va009039 0:27d35fa263b5 229 }
va009039 0:27d35fa263b5 230
va009039 1:eb30547ba84d 231 void Target2::_setaddr8(uint32_t addr)
va009039 1:eb30547ba84d 232 {
va009039 1:eb30547ba84d 233 uint32_t ctl = CSW_VALUE|CSW_SIZE8;
va009039 1:eb30547ba84d 234 uint8_t ack = _swd.Transfer(AP_CSW, &ctl);
va009039 1:eb30547ba84d 235 TEST_ASSERT(ack == SWD_OK);
va009039 1:eb30547ba84d 236
va009039 1:eb30547ba84d 237 ack = _swd.Transfer(DP_RDBUFF, NULL);
va009039 1:eb30547ba84d 238 TEST_ASSERT(ack == SWD_OK);
va009039 1:eb30547ba84d 239
va009039 1:eb30547ba84d 240 ack = _swd.Transfer(AP_TAR, &addr);
va009039 1:eb30547ba84d 241 TEST_ASSERT(ack == SWD_OK);
va009039 1:eb30547ba84d 242
va009039 1:eb30547ba84d 243 ack = _swd.Transfer(DP_RDBUFF, NULL);
va009039 1:eb30547ba84d 244 TEST_ASSERT(ack == SWD_OK);
va009039 1:eb30547ba84d 245 }
va009039 1:eb30547ba84d 246
va009039 0:27d35fa263b5 247 void Target2::Abort()
va009039 0:27d35fa263b5 248 {
va009039 0:27d35fa263b5 249 uint32_t data = 0x1e;
va009039 0:27d35fa263b5 250 uint8_t ack = _swd.Transfer(DP_ABORT, &data);
va009039 0:27d35fa263b5 251 TEST_ASSERT(ack == SWD_OK);
va009039 0:27d35fa263b5 252 }
va009039 0:27d35fa263b5 253
va009039 0:27d35fa263b5 254 int Target2::getStatus()
va009039 0:27d35fa263b5 255 {
va009039 0:27d35fa263b5 256 return readMemory(DHCSR) & 6 ? TARGET_HALTED : TARGET_RUNNING;
va009039 0:27d35fa263b5 257 }
va009039 0:27d35fa263b5 258
va009039 0:27d35fa263b5 259 bool Target2::wait_status(int status, int timeout_ms)
va009039 0:27d35fa263b5 260 {
va009039 0:27d35fa263b5 261 Timer t;
va009039 0:27d35fa263b5 262 t.reset();
va009039 0:27d35fa263b5 263 t.start();
va009039 0:27d35fa263b5 264 while(t.read_ms() < timeout_ms) {
va009039 0:27d35fa263b5 265 if (getStatus() == status) {
va009039 0:27d35fa263b5 266 return true;
va009039 0:27d35fa263b5 267 }
va009039 0:27d35fa263b5 268 }
va009039 0:27d35fa263b5 269 return false;
va009039 0:27d35fa263b5 270 }
va009039 0:27d35fa263b5 271
va009039 4:5e4107edcbdb 272 bool Target2::prog_status()
va009039 4:5e4107edcbdb 273 {
va009039 4:5e4107edcbdb 274 writeMemory(DEMCR, 1);
va009039 4:5e4107edcbdb 275 int status = getStatus();
va009039 4:5e4107edcbdb 276 TEST_ASSERT(status == TARGET_HALTED);
va009039 4:5e4107edcbdb 277 if (status == TARGET_RUNNING) {
va009039 4:5e4107edcbdb 278 halt();
va009039 4:5e4107edcbdb 279 }
va009039 4:5e4107edcbdb 280 bool st = wait_status(TARGET_HALTED);
va009039 4:5e4107edcbdb 281 TEST_ASSERT(st == true);
va009039 4:5e4107edcbdb 282 writeMemory(DEMCR, 0);
va009039 4:5e4107edcbdb 283 writeMemory(SYSMEMREMAP, 2); // user flash page
va009039 4:5e4107edcbdb 284 uint32_t reset_handler = readMemory(4);
va009039 4:5e4107edcbdb 285 breakpoint0(reset_handler);
va009039 4:5e4107edcbdb 286 writeMemory(NVIC_AIRCR, 0x05fa0004); // SYSRESETREQ software reset
va009039 4:5e4107edcbdb 287 st = wait_status(TARGET_HALTED);
va009039 4:5e4107edcbdb 288 TEST_ASSERT(st == true);
va009039 4:5e4107edcbdb 289 TEST_ASSERT((reset_handler&0xfffffffe) == pc);
va009039 4:5e4107edcbdb 290 breakpoint0(0); // breakpoint clear
va009039 4:5e4107edcbdb 291 return true;
va009039 4:5e4107edcbdb 292 }
va009039 4:5e4107edcbdb 293
va009039 4:5e4107edcbdb 294 void Target2::breakpoint0(uint32_t addr)
va009039 4:5e4107edcbdb 295 {
va009039 4:5e4107edcbdb 296 if (addr) {
va009039 4:5e4107edcbdb 297 uint32_t data = (addr&0x1ffffffc) | 0xc0000001;
va009039 4:5e4107edcbdb 298 if (addr&0x00000002) {
va009039 4:5e4107edcbdb 299 data |= 0x80000000;
va009039 4:5e4107edcbdb 300 } else {
va009039 4:5e4107edcbdb 301 data |= 0x40000000;
va009039 4:5e4107edcbdb 302 }
va009039 4:5e4107edcbdb 303 writeMemory(FP_COMP0, data); // set breakpoint
va009039 4:5e4107edcbdb 304 writeMemory(FP_CTRL, 3); // enable FPB
va009039 4:5e4107edcbdb 305 } else {
va009039 4:5e4107edcbdb 306 writeMemory(FP_COMP0, 0); // breakpoint clear
va009039 4:5e4107edcbdb 307 writeMemory(FP_CTRL, 2); // desable FPB
va009039 4:5e4107edcbdb 308 }
va009039 4:5e4107edcbdb 309 }
va009039 4:5e4107edcbdb 310
va009039 0:27d35fa263b5 311 void Target2::halt()
va009039 0:27d35fa263b5 312 {
va009039 0:27d35fa263b5 313 writeMemory(DHCSR, 0xa05f0003);
va009039 0:27d35fa263b5 314 }
va009039 0:27d35fa263b5 315
va009039 0:27d35fa263b5 316 void Target2::resume()
va009039 0:27d35fa263b5 317 {
va009039 0:27d35fa263b5 318 writeMemory(DHCSR, 0xa05f0001);
va009039 0:27d35fa263b5 319 }
va009039 0:27d35fa263b5 320
va009039 1:eb30547ba84d 321 void Target2::step()
va009039 1:eb30547ba84d 322 {
va009039 1:eb30547ba84d 323 writeMemory(DHCSR, 0xa05f0005);
va009039 1:eb30547ba84d 324 }
va009039 1:eb30547ba84d 325
va009039 0:27d35fa263b5 326 uint32_t CoreReg::read()
va009039 0:27d35fa263b5 327 {
va009039 0:27d35fa263b5 328 _target->writeMemory(DCRSR, _reg);
va009039 0:27d35fa263b5 329 return _target->readMemory(DCRDR);
va009039 0:27d35fa263b5 330 }
va009039 0:27d35fa263b5 331
va009039 0:27d35fa263b5 332 void CoreReg::write(uint32_t value)
va009039 0:27d35fa263b5 333 {
va009039 0:27d35fa263b5 334 _target->writeMemory(DCRDR, value);
va009039 0:27d35fa263b5 335 _target->writeMemory(DCRSR, _reg|0x10000);
va009039 0:27d35fa263b5 336 }
va009039 0:27d35fa263b5 337
va009039 0:27d35fa263b5 338 void CoreReg::setup(Target2* target, uint8_t reg)
va009039 0:27d35fa263b5 339 {
va009039 0:27d35fa263b5 340 _target = target;
va009039 0:27d35fa263b5 341 _reg = reg;
va009039 0:27d35fa263b5 342 }