Ken Todotani / Mbed 2 deprecated DMA_M2M

Memory to Memory DMA demo from CMSIS example. This demo execute 1000 times of 32 word memory to memory DMA (copy), and also measures number of dummy loop execution during DMA cylcles. Line 56 of "DMA_M2M.c" can change DMA source. where; 1)static : source is SRAM 2)const : source is Flash ROM

Dependencies:   mbed

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CLKPWR Public Functions
Functions

CLKPWR Public Functions
[CLKPWR]

Functions

void CLKPWR_SetPCLKDiv (uint32_t ClkType, uint32_t DivVal)
 Set value of each Peripheral Clock Selection.
uint32_t CLKPWR_GetPCLKSEL (uint32_t ClkType)
 Get current value of each Peripheral Clock Selection.
uint32_t CLKPWR_GetPCLK (uint32_t ClkType)
 Get current value of each Peripheral Clock.
void CLKPWR_ConfigPPWR (uint32_t PPType, FunctionalState NewState)
 Configure power supply for each peripheral according to NewState.
void CLKPWR_Sleep (void)
 Enter Sleep mode with co-operated instruction by the Cortex-M3.
void CLKPWR_DeepSleep (void)
 Enter Deep Sleep mode with co-operated instruction by the Cortex-M3.
void CLKPWR_PowerDown (void)
 Enter Power Down mode with co-operated instruction by the Cortex-M3.
void CLKPWR_DeepPowerDown (void)
 Enter Deep Power Down mode with co-operated instruction by the Cortex-M3.

Function Documentation

void CLKPWR_ConfigPPWR ( uint32_t  PPType,
FunctionalState  NewState 
)

Configure power supply for each peripheral according to NewState.

Parameters:
[in]PPTypeType of peripheral used to enable power, should be one of the following:

  • CLKPWR_PCONP_PCTIM0 : Timer 0
  • CLKPWR_PCONP_PCTIM1 : Timer 1
  • CLKPWR_PCONP_PCUART0 : UART 0
  • CLKPWR_PCONP_PCUART1 : UART 1
  • CLKPWR_PCONP_PCPWM1 : PWM 1
  • CLKPWR_PCONP_PCI2C0 : I2C 0
  • CLKPWR_PCONP_PCSPI : SPI
  • CLKPWR_PCONP_PCRTC : RTC
  • CLKPWR_PCONP_PCSSP1 : SSP 1
  • CLKPWR_PCONP_PCAD : ADC
  • CLKPWR_PCONP_PCAN1 : CAN 1
  • CLKPWR_PCONP_PCAN2 : CAN 2
  • CLKPWR_PCONP_PCGPIO : GPIO
  • CLKPWR_PCONP_PCRIT : RIT
  • CLKPWR_PCONP_PCMC : MC
  • CLKPWR_PCONP_PCQEI : QEI
  • CLKPWR_PCONP_PCI2C1 : I2C 1
  • CLKPWR_PCONP_PCSSP0 : SSP 0
  • CLKPWR_PCONP_PCTIM2 : Timer 2
  • CLKPWR_PCONP_PCTIM3 : Timer 3
  • CLKPWR_PCONP_PCUART2 : UART 2
  • CLKPWR_PCONP_PCUART3 : UART 3
  • CLKPWR_PCONP_PCI2C2 : I2C 2
  • CLKPWR_PCONP_PCI2S : I2S
  • CLKPWR_PCONP_PCGPDMA : GPDMA
  • CLKPWR_PCONP_PCENET : Ethernet
  • CLKPWR_PCONP_PCUSB : USB
Parameters:
[in]NewStateNew state of Peripheral Power, should be:

  • ENABLE : Enable power for this peripheral
  • DISABLE : Disable power for this peripheral
Returns:
none

Definition at line 260 of file lpc17xx_clkpwr.c.

void CLKPWR_DeepPowerDown ( void   )

Enter Deep Power Down mode with co-operated instruction by the Cortex-M3.

Parameters:
[in]None
Returns:
None

Definition at line 321 of file lpc17xx_clkpwr.c.

void CLKPWR_DeepSleep ( void   )

Enter Deep Sleep mode with co-operated instruction by the Cortex-M3.

Parameters:
[in]None
Returns:
None

Definition at line 291 of file lpc17xx_clkpwr.c.

uint32_t CLKPWR_GetPCLK ( uint32_t  ClkType )

Get current value of each Peripheral Clock.

Parameters:
[in]ClkTypePeripheral Clock Selection of each type, should be one of the following:

  • CLKPWR_PCLKSEL_WDT : WDT
  • CLKPWR_PCLKSEL_TIMER0 : Timer 0
  • CLKPWR_PCLKSEL_TIMER1 : Timer 1
  • CLKPWR_PCLKSEL_UART0 : UART 0
  • CLKPWR_PCLKSEL_UART1 : UART 1
  • CLKPWR_PCLKSEL_PWM1 : PWM 1
  • CLKPWR_PCLKSEL_I2C0 : I2C 0
  • CLKPWR_PCLKSEL_SPI : SPI
  • CLKPWR_PCLKSEL_SSP1 : SSP 1
  • CLKPWR_PCLKSEL_DAC : DAC
  • CLKPWR_PCLKSEL_ADC : ADC
  • CLKPWR_PCLKSEL_CAN1 : CAN 1
  • CLKPWR_PCLKSEL_CAN2 : CAN 2
  • CLKPWR_PCLKSEL_ACF : ACF
  • CLKPWR_PCLKSEL_QEI : QEI
  • CLKPWR_PCLKSEL_PCB : PCB
  • CLKPWR_PCLKSEL_I2C1 : I2C 1
  • CLKPWR_PCLKSEL_SSP0 : SSP 0
  • CLKPWR_PCLKSEL_TIMER2 : Timer 2
  • CLKPWR_PCLKSEL_TIMER3 : Timer 3
  • CLKPWR_PCLKSEL_UART2 : UART 2
  • CLKPWR_PCLKSEL_UART3 : UART 3
  • CLKPWR_PCLKSEL_I2C2 : I2C 2
  • CLKPWR_PCLKSEL_I2S : I2S
  • CLKPWR_PCLKSEL_RIT : RIT
  • CLKPWR_PCLKSEL_SYSCON : SYSCON
  • CLKPWR_PCLKSEL_MC : MC
Returns:
Value of Selected Peripheral Clock

Definition at line 190 of file lpc17xx_clkpwr.c.

uint32_t CLKPWR_GetPCLKSEL ( uint32_t  ClkType )

Get current value of each Peripheral Clock Selection.

Parameters:
[in]ClkTypePeripheral Clock Selection of each type, should be one of the following:

  • CLKPWR_PCLKSEL_WDT : WDT
  • CLKPWR_PCLKSEL_TIMER0 : Timer 0
  • CLKPWR_PCLKSEL_TIMER1 : Timer 1
  • CLKPWR_PCLKSEL_UART0 : UART 0
  • CLKPWR_PCLKSEL_UART1 : UART 1
  • CLKPWR_PCLKSEL_PWM1 : PWM 1
  • CLKPWR_PCLKSEL_I2C0 : I2C 0
  • CLKPWR_PCLKSEL_SPI : SPI
  • CLKPWR_PCLKSEL_SSP1 : SSP 1
  • CLKPWR_PCLKSEL_DAC : DAC
  • CLKPWR_PCLKSEL_ADC : ADC
  • CLKPWR_PCLKSEL_CAN1 : CAN 1
  • CLKPWR_PCLKSEL_CAN2 : CAN 2
  • CLKPWR_PCLKSEL_ACF : ACF
  • CLKPWR_PCLKSEL_QEI : QEI
  • CLKPWR_PCLKSEL_PCB : PCB
  • CLKPWR_PCLKSEL_I2C1 : I2C 1
  • CLKPWR_PCLKSEL_SSP0 : SSP 0
  • CLKPWR_PCLKSEL_TIMER2 : Timer 2
  • CLKPWR_PCLKSEL_TIMER3 : Timer 3
  • CLKPWR_PCLKSEL_UART2 : UART 2
  • CLKPWR_PCLKSEL_UART3 : UART 3
  • CLKPWR_PCLKSEL_I2C2 : I2C 2
  • CLKPWR_PCLKSEL_I2S : I2S
  • CLKPWR_PCLKSEL_RIT : RIT
  • CLKPWR_PCLKSEL_SYSCON : SYSCON
  • CLKPWR_PCLKSEL_MC : MC
Returns:
Value of Selected Peripheral Clock Selection

Definition at line 135 of file lpc17xx_clkpwr.c.

void CLKPWR_PowerDown ( void   )

Enter Power Down mode with co-operated instruction by the Cortex-M3.

Parameters:
[in]None
Returns:
None

Definition at line 306 of file lpc17xx_clkpwr.c.

void CLKPWR_SetPCLKDiv ( uint32_t  ClkType,
uint32_t  DivVal 
)

Set value of each Peripheral Clock Selection.

Parameters:
[in]ClkTypePeripheral Clock Selection of each type, should be one of the following:

  • CLKPWR_PCLKSEL_WDT : WDT
  • CLKPWR_PCLKSEL_TIMER0 : Timer 0
  • CLKPWR_PCLKSEL_TIMER1 : Timer 1
  • CLKPWR_PCLKSEL_UART0 : UART 0
  • CLKPWR_PCLKSEL_UART1 : UART 1
  • CLKPWR_PCLKSEL_PWM1 : PWM 1
  • CLKPWR_PCLKSEL_I2C0 : I2C 0
  • CLKPWR_PCLKSEL_SPI : SPI
  • CLKPWR_PCLKSEL_SSP1 : SSP 1
  • CLKPWR_PCLKSEL_DAC : DAC
  • CLKPWR_PCLKSEL_ADC : ADC
  • CLKPWR_PCLKSEL_CAN1 : CAN 1
  • CLKPWR_PCLKSEL_CAN2 : CAN 2
  • CLKPWR_PCLKSEL_ACF : ACF
  • CLKPWR_PCLKSEL_QEI : QEI
  • CLKPWR_PCLKSEL_PCB : PCB
  • CLKPWR_PCLKSEL_I2C1 : I2C 1
  • CLKPWR_PCLKSEL_SSP0 : SSP 0
  • CLKPWR_PCLKSEL_TIMER2 : Timer 2
  • CLKPWR_PCLKSEL_TIMER3 : Timer 3
  • CLKPWR_PCLKSEL_UART2 : UART 2
  • CLKPWR_PCLKSEL_UART3 : UART 3
  • CLKPWR_PCLKSEL_I2C2 : I2C 2
  • CLKPWR_PCLKSEL_I2S : I2S
  • CLKPWR_PCLKSEL_RIT : RIT
  • CLKPWR_PCLKSEL_SYSCON : SYSCON
  • CLKPWR_PCLKSEL_MC : MC
[in]DivValValue of divider, should be:

  • CLKPWR_PCLKSEL_CCLK_DIV_4 : PCLK_peripheral = CCLK/4
  • CLKPWR_PCLKSEL_CCLK_DIV_1 : PCLK_peripheral = CCLK/1
  • CLKPWR_PCLKSEL_CCLK_DIV_2 : PCLK_peripheral = CCLK/2
Returns:
none

Definition at line 74 of file lpc17xx_clkpwr.c.

void CLKPWR_Sleep ( void   )

Enter Sleep mode with co-operated instruction by the Cortex-M3.

Parameters:
[in]None
Returns:
None

Definition at line 278 of file lpc17xx_clkpwr.c.

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