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Opencv 3.1 project on GR-PEACH board

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USBHost_custom/USBHost/USBHALHost_LPC17.cpp@170:54ff26da7eb6, 2017-07-04 (annotated)

Committer:
thedo
Date:
Tue Jul 04 06:23:13 2017 +0000
Revision:
170:54ff26da7eb6
Parent:
166:3a9487d57a5c 
project opencv 3.1 on GR PEACH board, no use SD card.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
thedo 166:3a9487d57a5c 1 /* mbed USBHost Library
thedo 166:3a9487d57a5c 2 * Copyright (c) 2006-2013 ARM Limited
thedo 166:3a9487d57a5c 3 *
thedo 166:3a9487d57a5c 4 * Licensed under the Apache License, Version 2.0 (the "License");
thedo 166:3a9487d57a5c 5 * you may not use this file except in compliance with the License.
thedo 166:3a9487d57a5c 6 * You may obtain a copy of the License at
thedo 166:3a9487d57a5c 7 *
thedo 166:3a9487d57a5c 8 * http://www.apache.org/licenses/LICENSE-2.0
thedo 166:3a9487d57a5c 9 *
thedo 166:3a9487d57a5c 10 * Unless required by applicable law or agreed to in writing, software
thedo 166:3a9487d57a5c 11 * distributed under the License is distributed on an "AS IS" BASIS,
thedo 166:3a9487d57a5c 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
thedo 166:3a9487d57a5c 13 * See the License for the specific language governing permissions and
thedo 166:3a9487d57a5c 14 * limitations under the License.
thedo 166:3a9487d57a5c 15 */
thedo 166:3a9487d57a5c 16
thedo 166:3a9487d57a5c 17 #if defined(TARGET_LPC1768) || defined(TARGET_LPC2460)
thedo 166:3a9487d57a5c 18
thedo 166:3a9487d57a5c 19 #include "mbed.h"
thedo 166:3a9487d57a5c 20 #include "USBHALHost.h"
thedo 166:3a9487d57a5c 21 #include "dbg.h"
thedo 166:3a9487d57a5c 22
thedo 166:3a9487d57a5c 23 // bits of the USB/OTG clock control register
thedo 166:3a9487d57a5c 24 #define HOST_CLK_EN (1<<0)
thedo 166:3a9487d57a5c 25 #define DEV_CLK_EN (1<<1)
thedo 166:3a9487d57a5c 26 #define PORTSEL_CLK_EN (1<<3)
thedo 166:3a9487d57a5c 27 #define AHB_CLK_EN (1<<4)
thedo 166:3a9487d57a5c 28
thedo 166:3a9487d57a5c 29 // bits of the USB/OTG clock status register
thedo 166:3a9487d57a5c 30 #define HOST_CLK_ON (1<<0)
thedo 166:3a9487d57a5c 31 #define DEV_CLK_ON (1<<1)
thedo 166:3a9487d57a5c 32 #define PORTSEL_CLK_ON (1<<3)
thedo 166:3a9487d57a5c 33 #define AHB_CLK_ON (1<<4)
thedo 166:3a9487d57a5c 34
thedo 166:3a9487d57a5c 35 // we need host clock, OTG/portsel clock and AHB clock
thedo 166:3a9487d57a5c 36 #define CLOCK_MASK (HOST_CLK_EN | PORTSEL_CLK_EN | AHB_CLK_EN)
thedo 166:3a9487d57a5c 37
thedo 166:3a9487d57a5c 38 #define HCCA_SIZE sizeof(HCCA)
thedo 166:3a9487d57a5c 39 #define ED_SIZE sizeof(HCED)
thedo 166:3a9487d57a5c 40 #define TD_SIZE sizeof(HCTD)
thedo 166:3a9487d57a5c 41
thedo 166:3a9487d57a5c 42 #define TOTAL_SIZE (HCCA_SIZE + (MAX_ENDPOINT*ED_SIZE) + (MAX_TD*TD_SIZE))
thedo 166:3a9487d57a5c 43
thedo 166:3a9487d57a5c 44 static volatile uint8_t usb_buf[TOTAL_SIZE] __attribute((section("AHBSRAM1"),aligned(256))); //256 bytes aligned!
thedo 166:3a9487d57a5c 45
thedo 166:3a9487d57a5c 46 USBHALHost * USBHALHost::instHost;
thedo 166:3a9487d57a5c 47
thedo 166:3a9487d57a5c 48 USBHALHost::USBHALHost() {
thedo 166:3a9487d57a5c 49 instHost = this;
thedo 166:3a9487d57a5c 50 memInit();
thedo 166:3a9487d57a5c 51 memset((void*)usb_hcca, 0, HCCA_SIZE);
thedo 166:3a9487d57a5c 52 for (int i = 0; i < MAX_ENDPOINT; i++) {
thedo 166:3a9487d57a5c 53 edBufAlloc[i] = false;
thedo 166:3a9487d57a5c 54 }
thedo 166:3a9487d57a5c 55 for (int i = 0; i < MAX_TD; i++) {
thedo 166:3a9487d57a5c 56 tdBufAlloc[i] = false;
thedo 166:3a9487d57a5c 57 }
thedo 166:3a9487d57a5c 58 }
thedo 166:3a9487d57a5c 59
thedo 166:3a9487d57a5c 60 void USBHALHost::init() {
thedo 166:3a9487d57a5c 61 NVIC_DisableIRQ(USB_IRQn);
thedo 166:3a9487d57a5c 62
thedo 166:3a9487d57a5c 63 //Cut power
thedo 166:3a9487d57a5c 64 LPC_SC->PCONP &= ~(1UL<<31);
thedo 166:3a9487d57a5c 65 wait_ms(100);
thedo 166:3a9487d57a5c 66
thedo 166:3a9487d57a5c 67 // turn on power for USB
thedo 166:3a9487d57a5c 68 LPC_SC->PCONP |= (1UL<<31);
thedo 166:3a9487d57a5c 69
thedo 166:3a9487d57a5c 70 // Enable USB host clock, port selection and AHB clock
thedo 166:3a9487d57a5c 71 LPC_USB->USBClkCtrl |= CLOCK_MASK;
thedo 166:3a9487d57a5c 72
thedo 166:3a9487d57a5c 73 // Wait for clocks to become available
thedo 166:3a9487d57a5c 74 while ((LPC_USB->USBClkSt & CLOCK_MASK) != CLOCK_MASK);
thedo 166:3a9487d57a5c 75
thedo 166:3a9487d57a5c 76 // it seems the bits[0:1] mean the following
thedo 166:3a9487d57a5c 77 // 0: U1=device, U2=host
thedo 166:3a9487d57a5c 78 // 1: U1=host, U2=host
thedo 166:3a9487d57a5c 79 // 2: reserved
thedo 166:3a9487d57a5c 80 // 3: U1=host, U2=device
thedo 166:3a9487d57a5c 81 // NB: this register is only available if OTG clock (aka "port select") is enabled!!
thedo 166:3a9487d57a5c 82 // since we don't care about port 2, set just bit 0 to 1 (U1=host)
thedo 166:3a9487d57a5c 83 LPC_USB->OTGStCtrl |= 1;
thedo 166:3a9487d57a5c 84
thedo 166:3a9487d57a5c 85 // now that we've configured the ports, we can turn off the portsel clock
thedo 166:3a9487d57a5c 86 LPC_USB->USBClkCtrl &= ~PORTSEL_CLK_EN;
thedo 166:3a9487d57a5c 87
thedo 166:3a9487d57a5c 88 // configure USB D+/D- pins
thedo 166:3a9487d57a5c 89 // P0[29] = USB_D+, 01
thedo 166:3a9487d57a5c 90 // P0[30] = USB_D-, 01
thedo 166:3a9487d57a5c 91 LPC_PINCON->PINSEL1 &= ~((3<<26) | (3<<28));
thedo 166:3a9487d57a5c 92 LPC_PINCON->PINSEL1 |= ((1<<26) | (1<<28));
thedo 166:3a9487d57a5c 93
thedo 166:3a9487d57a5c 94 LPC_USB->HcControl = 0; // HARDWARE RESET
thedo 166:3a9487d57a5c 95 LPC_USB->HcControlHeadED = 0; // Initialize Control list head to Zero
thedo 166:3a9487d57a5c 96 LPC_USB->HcBulkHeadED = 0; // Initialize Bulk list head to Zero
thedo 166:3a9487d57a5c 97
thedo 166:3a9487d57a5c 98 // Wait 100 ms before apply reset
thedo 166:3a9487d57a5c 99 wait_ms(100);
thedo 166:3a9487d57a5c 100
thedo 166:3a9487d57a5c 101 // software reset
thedo 166:3a9487d57a5c 102 LPC_USB->HcCommandStatus = OR_CMD_STATUS_HCR;
thedo 166:3a9487d57a5c 103
thedo 166:3a9487d57a5c 104 // Write Fm Interval and Largest Data Packet Counter
thedo 166:3a9487d57a5c 105 LPC_USB->HcFmInterval = DEFAULT_FMINTERVAL;
thedo 166:3a9487d57a5c 106 LPC_USB->HcPeriodicStart = FI * 90 / 100;
thedo 166:3a9487d57a5c 107
thedo 166:3a9487d57a5c 108 // Put HC in operational state
thedo 166:3a9487d57a5c 109 LPC_USB->HcControl = (LPC_USB->HcControl & (~OR_CONTROL_HCFS)) | OR_CONTROL_HC_OPER;
thedo 166:3a9487d57a5c 110 // Set Global Power
thedo 166:3a9487d57a5c 111 LPC_USB->HcRhStatus = OR_RH_STATUS_LPSC;
thedo 166:3a9487d57a5c 112
thedo 166:3a9487d57a5c 113 LPC_USB->HcHCCA = (uint32_t)(usb_hcca);
thedo 166:3a9487d57a5c 114
thedo 166:3a9487d57a5c 115 // Clear Interrrupt Status
thedo 166:3a9487d57a5c 116 LPC_USB->HcInterruptStatus |= LPC_USB->HcInterruptStatus;
thedo 166:3a9487d57a5c 117
thedo 166:3a9487d57a5c 118 LPC_USB->HcInterruptEnable = OR_INTR_ENABLE_MIE | OR_INTR_ENABLE_WDH | OR_INTR_ENABLE_RHSC;
thedo 166:3a9487d57a5c 119
thedo 166:3a9487d57a5c 120 // Enable the USB Interrupt
thedo 166:3a9487d57a5c 121 NVIC_SetVector(USB_IRQn, (uint32_t)(_usbisr));
thedo 166:3a9487d57a5c 122 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_CSC;
thedo 166:3a9487d57a5c 123 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC;
thedo 166:3a9487d57a5c 124
thedo 166:3a9487d57a5c 125 NVIC_EnableIRQ(USB_IRQn);
thedo 166:3a9487d57a5c 126
thedo 166:3a9487d57a5c 127 // Check for any connected devices
thedo 166:3a9487d57a5c 128 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CCS) {
thedo 166:3a9487d57a5c 129 //Device connected
thedo 166:3a9487d57a5c 130 wait_ms(150);
thedo 166:3a9487d57a5c 131 USB_DBG("Device connected (%08x)\n\r", LPC_USB->HcRhPortStatus1);
thedo 166:3a9487d57a5c 132 deviceConnected(0, 1, LPC_USB->HcRhPortStatus1 & OR_RH_PORT_LSDA);
thedo 166:3a9487d57a5c 133 }
thedo 166:3a9487d57a5c 134 }
thedo 166:3a9487d57a5c 135
thedo 166:3a9487d57a5c 136 uint32_t USBHALHost::controlHeadED() {
thedo 166:3a9487d57a5c 137 return LPC_USB->HcControlHeadED;
thedo 166:3a9487d57a5c 138 }
thedo 166:3a9487d57a5c 139
thedo 166:3a9487d57a5c 140 uint32_t USBHALHost::bulkHeadED() {
thedo 166:3a9487d57a5c 141 return LPC_USB->HcBulkHeadED;
thedo 166:3a9487d57a5c 142 }
thedo 166:3a9487d57a5c 143
thedo 166:3a9487d57a5c 144 uint32_t USBHALHost::interruptHeadED() {
thedo 166:3a9487d57a5c 145 return usb_hcca->IntTable[0];
thedo 166:3a9487d57a5c 146 }
thedo 166:3a9487d57a5c 147
thedo 166:3a9487d57a5c 148 void USBHALHost::updateBulkHeadED(uint32_t addr) {
thedo 166:3a9487d57a5c 149 LPC_USB->HcBulkHeadED = addr;
thedo 166:3a9487d57a5c 150 }
thedo 166:3a9487d57a5c 151
thedo 166:3a9487d57a5c 152
thedo 166:3a9487d57a5c 153 void USBHALHost::updateControlHeadED(uint32_t addr) {
thedo 166:3a9487d57a5c 154 LPC_USB->HcControlHeadED = addr;
thedo 166:3a9487d57a5c 155 }
thedo 166:3a9487d57a5c 156
thedo 166:3a9487d57a5c 157 void USBHALHost::updateInterruptHeadED(uint32_t addr) {
thedo 166:3a9487d57a5c 158 usb_hcca->IntTable[0] = addr;
thedo 166:3a9487d57a5c 159 }
thedo 166:3a9487d57a5c 160
thedo 166:3a9487d57a5c 161
thedo 166:3a9487d57a5c 162 void USBHALHost::enableList(ENDPOINT_TYPE type) {
thedo 166:3a9487d57a5c 163 switch(type) {
thedo 166:3a9487d57a5c 164 case CONTROL_ENDPOINT:
thedo 166:3a9487d57a5c 165 LPC_USB->HcCommandStatus = OR_CMD_STATUS_CLF;
thedo 166:3a9487d57a5c 166 LPC_USB->HcControl |= OR_CONTROL_CLE;
thedo 166:3a9487d57a5c 167 break;
thedo 166:3a9487d57a5c 168 case ISOCHRONOUS_ENDPOINT:
thedo 166:3a9487d57a5c 169 break;
thedo 166:3a9487d57a5c 170 case BULK_ENDPOINT:
thedo 166:3a9487d57a5c 171 LPC_USB->HcCommandStatus = OR_CMD_STATUS_BLF;
thedo 166:3a9487d57a5c 172 LPC_USB->HcControl |= OR_CONTROL_BLE;
thedo 166:3a9487d57a5c 173 break;
thedo 166:3a9487d57a5c 174 case INTERRUPT_ENDPOINT:
thedo 166:3a9487d57a5c 175 LPC_USB->HcControl |= OR_CONTROL_PLE;
thedo 166:3a9487d57a5c 176 break;
thedo 166:3a9487d57a5c 177 }
thedo 166:3a9487d57a5c 178 }
thedo 166:3a9487d57a5c 179
thedo 166:3a9487d57a5c 180
thedo 166:3a9487d57a5c 181 bool USBHALHost::disableList(ENDPOINT_TYPE type) {
thedo 166:3a9487d57a5c 182 switch(type) {
thedo 166:3a9487d57a5c 183 case CONTROL_ENDPOINT:
thedo 166:3a9487d57a5c 184 if(LPC_USB->HcControl & OR_CONTROL_CLE) {
thedo 166:3a9487d57a5c 185 LPC_USB->HcControl &= ~OR_CONTROL_CLE;
thedo 166:3a9487d57a5c 186 return true;
thedo 166:3a9487d57a5c 187 }
thedo 166:3a9487d57a5c 188 return false;
thedo 166:3a9487d57a5c 189 case ISOCHRONOUS_ENDPOINT:
thedo 166:3a9487d57a5c 190 return false;
thedo 166:3a9487d57a5c 191 case BULK_ENDPOINT:
thedo 166:3a9487d57a5c 192 if(LPC_USB->HcControl & OR_CONTROL_BLE){
thedo 166:3a9487d57a5c 193 LPC_USB->HcControl &= ~OR_CONTROL_BLE;
thedo 166:3a9487d57a5c 194 return true;
thedo 166:3a9487d57a5c 195 }
thedo 166:3a9487d57a5c 196 return false;
thedo 166:3a9487d57a5c 197 case INTERRUPT_ENDPOINT:
thedo 166:3a9487d57a5c 198 if(LPC_USB->HcControl & OR_CONTROL_PLE) {
thedo 166:3a9487d57a5c 199 LPC_USB->HcControl &= ~OR_CONTROL_PLE;
thedo 166:3a9487d57a5c 200 return true;
thedo 166:3a9487d57a5c 201 }
thedo 166:3a9487d57a5c 202 return false;
thedo 166:3a9487d57a5c 203 }
thedo 166:3a9487d57a5c 204 return false;
thedo 166:3a9487d57a5c 205 }
thedo 166:3a9487d57a5c 206
thedo 166:3a9487d57a5c 207
thedo 166:3a9487d57a5c 208 void USBHALHost::memInit() {
thedo 166:3a9487d57a5c 209 usb_hcca = (volatile HCCA *)usb_buf;
thedo 166:3a9487d57a5c 210 usb_edBuf = usb_buf + HCCA_SIZE;
thedo 166:3a9487d57a5c 211 usb_tdBuf = usb_buf + HCCA_SIZE + (MAX_ENDPOINT*ED_SIZE);
thedo 166:3a9487d57a5c 212 }
thedo 166:3a9487d57a5c 213
thedo 166:3a9487d57a5c 214 volatile uint8_t * USBHALHost::getED() {
thedo 166:3a9487d57a5c 215 for (int i = 0; i < MAX_ENDPOINT; i++) {
thedo 166:3a9487d57a5c 216 if ( !edBufAlloc[i] ) {
thedo 166:3a9487d57a5c 217 edBufAlloc[i] = true;
thedo 166:3a9487d57a5c 218 return (volatile uint8_t *)(usb_edBuf + i*ED_SIZE);
thedo 166:3a9487d57a5c 219 }
thedo 166:3a9487d57a5c 220 }
thedo 166:3a9487d57a5c 221 perror("Could not allocate ED\r\n");
thedo 166:3a9487d57a5c 222 return NULL; //Could not alloc ED
thedo 166:3a9487d57a5c 223 }
thedo 166:3a9487d57a5c 224
thedo 166:3a9487d57a5c 225 volatile uint8_t * USBHALHost::getTD() {
thedo 166:3a9487d57a5c 226 int i;
thedo 166:3a9487d57a5c 227 for (i = 0; i < MAX_TD; i++) {
thedo 166:3a9487d57a5c 228 if ( !tdBufAlloc[i] ) {
thedo 166:3a9487d57a5c 229 tdBufAlloc[i] = true;
thedo 166:3a9487d57a5c 230 return (volatile uint8_t *)(usb_tdBuf + i*TD_SIZE);
thedo 166:3a9487d57a5c 231 }
thedo 166:3a9487d57a5c 232 }
thedo 166:3a9487d57a5c 233 perror("Could not allocate TD\r\n");
thedo 166:3a9487d57a5c 234 return NULL; //Could not alloc TD
thedo 166:3a9487d57a5c 235 }
thedo 166:3a9487d57a5c 236
thedo 166:3a9487d57a5c 237
thedo 166:3a9487d57a5c 238 void USBHALHost::freeED(volatile uint8_t * ed) {
thedo 166:3a9487d57a5c 239 int i;
thedo 166:3a9487d57a5c 240 i = (ed - usb_edBuf) / ED_SIZE;
thedo 166:3a9487d57a5c 241 edBufAlloc[i] = false;
thedo 166:3a9487d57a5c 242 }
thedo 166:3a9487d57a5c 243
thedo 166:3a9487d57a5c 244 void USBHALHost::freeTD(volatile uint8_t * td) {
thedo 166:3a9487d57a5c 245 int i;
thedo 166:3a9487d57a5c 246 i = (td - usb_tdBuf) / TD_SIZE;
thedo 166:3a9487d57a5c 247 tdBufAlloc[i] = false;
thedo 166:3a9487d57a5c 248 }
thedo 166:3a9487d57a5c 249
thedo 166:3a9487d57a5c 250
thedo 166:3a9487d57a5c 251 void USBHALHost::resetRootHub() {
thedo 166:3a9487d57a5c 252 // Initiate port reset
thedo 166:3a9487d57a5c 253 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRS;
thedo 166:3a9487d57a5c 254
thedo 166:3a9487d57a5c 255 while (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRS);
thedo 166:3a9487d57a5c 256
thedo 166:3a9487d57a5c 257 // ...and clear port reset signal
thedo 166:3a9487d57a5c 258 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC;
thedo 166:3a9487d57a5c 259 }
thedo 166:3a9487d57a5c 260
thedo 166:3a9487d57a5c 261
thedo 166:3a9487d57a5c 262 void USBHALHost::_usbisr(void) {
thedo 166:3a9487d57a5c 263 if (instHost) {
thedo 166:3a9487d57a5c 264 instHost->UsbIrqhandler();
thedo 166:3a9487d57a5c 265 }
thedo 166:3a9487d57a5c 266 }
thedo 166:3a9487d57a5c 267
thedo 166:3a9487d57a5c 268 void USBHALHost::UsbIrqhandler() {
thedo 166:3a9487d57a5c 269 if( LPC_USB->HcInterruptStatus & LPC_USB->HcInterruptEnable ) //Is there something to actually process?
thedo 166:3a9487d57a5c 270 {
thedo 166:3a9487d57a5c 271
thedo 166:3a9487d57a5c 272 uint32_t int_status = LPC_USB->HcInterruptStatus & LPC_USB->HcInterruptEnable;
thedo 166:3a9487d57a5c 273
thedo 166:3a9487d57a5c 274 // Root hub status change interrupt
thedo 166:3a9487d57a5c 275 if (int_status & OR_INTR_STATUS_RHSC) {
thedo 166:3a9487d57a5c 276 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CSC) {
thedo 166:3a9487d57a5c 277 if (LPC_USB->HcRhStatus & OR_RH_STATUS_DRWE) {
thedo 166:3a9487d57a5c 278 // When DRWE is on, Connect Status Change
thedo 166:3a9487d57a5c 279 // means a remote wakeup event.
thedo 166:3a9487d57a5c 280 } else {
thedo 166:3a9487d57a5c 281
thedo 166:3a9487d57a5c 282 //Root device connected
thedo 166:3a9487d57a5c 283 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CCS) {
thedo 166:3a9487d57a5c 284
thedo 166:3a9487d57a5c 285 // wait 150ms to avoid bounce
thedo 166:3a9487d57a5c 286 wait_ms(150);
thedo 166:3a9487d57a5c 287
thedo 166:3a9487d57a5c 288 //Hub 0 (root hub), Port 1 (count starts at 1), Low or High speed
thedo 166:3a9487d57a5c 289 deviceConnected(0, 1, LPC_USB->HcRhPortStatus1 & OR_RH_PORT_LSDA);
thedo 166:3a9487d57a5c 290 }
thedo 166:3a9487d57a5c 291
thedo 166:3a9487d57a5c 292 //Root device disconnected
thedo 166:3a9487d57a5c 293 else {
thedo 166:3a9487d57a5c 294
thedo 166:3a9487d57a5c 295 if (!(int_status & OR_INTR_STATUS_WDH)) {
thedo 166:3a9487d57a5c 296 usb_hcca->DoneHead = 0;
thedo 166:3a9487d57a5c 297 }
thedo 166:3a9487d57a5c 298
thedo 166:3a9487d57a5c 299 // wait 200ms to avoid bounce
thedo 166:3a9487d57a5c 300 wait_ms(200);
thedo 166:3a9487d57a5c 301
thedo 166:3a9487d57a5c 302 deviceDisconnected(0, 1, NULL, usb_hcca->DoneHead & 0xFFFFFFFE);
thedo 166:3a9487d57a5c 303
thedo 166:3a9487d57a5c 304 if (int_status & OR_INTR_STATUS_WDH) {
thedo 166:3a9487d57a5c 305 usb_hcca->DoneHead = 0;
thedo 166:3a9487d57a5c 306 LPC_USB->HcInterruptStatus = OR_INTR_STATUS_WDH;
thedo 166:3a9487d57a5c 307 }
thedo 166:3a9487d57a5c 308 }
thedo 166:3a9487d57a5c 309 }
thedo 166:3a9487d57a5c 310 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_CSC;
thedo 166:3a9487d57a5c 311 }
thedo 166:3a9487d57a5c 312 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRSC) {
thedo 166:3a9487d57a5c 313 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC;
thedo 166:3a9487d57a5c 314 }
thedo 166:3a9487d57a5c 315 LPC_USB->HcInterruptStatus = OR_INTR_STATUS_RHSC;
thedo 166:3a9487d57a5c 316 }
thedo 166:3a9487d57a5c 317
thedo 166:3a9487d57a5c 318 // Writeback Done Head interrupt
thedo 166:3a9487d57a5c 319 if (int_status & OR_INTR_STATUS_WDH) {
thedo 166:3a9487d57a5c 320 transferCompleted(usb_hcca->DoneHead & 0xFFFFFFFE);
thedo 166:3a9487d57a5c 321 LPC_USB->HcInterruptStatus = OR_INTR_STATUS_WDH;
thedo 166:3a9487d57a5c 322 }
thedo 166:3a9487d57a5c 323 }
thedo 166:3a9487d57a5c 324 }
thedo 166:3a9487d57a5c 325 #endif