taku hachisu / DRV2667

Library for TI's DRV2667

DRV2667.h@0:faa5d89e9dac, 2018-02-07 (annotated)

Committer:
takuhachisu
Date:
Wed Feb 07 09:20:34 2018 +0000
Revision:
0:faa5d89e9dac
Child:
1:a57042b30965
Library for DRV2667

Who changed what in which revision?

UserRevisionLine numberNew contents of line
takuhachisu 0:faa5d89e9dac 1 /*
takuhachisu 0:faa5d89e9dac 2 Taku Hachisu 06/02/2018
takuhachisu 0:faa5d89e9dac 3
takuhachisu 0:faa5d89e9dac 4 Library for the TI DRV2667
takuhachisu 0:faa5d89e9dac 5
takuhachisu 0:faa5d89e9dac 6 References:
takuhachisu 0:faa5d89e9dac 7 http://www.ti.com/product/DRV2667/description
takuhachisu 0:faa5d89e9dac 8 http://www.tij.co.jp/jp/lit/ds/symlink/drv2667.pdf (Datasheet)
takuhachisu 0:faa5d89e9dac 9 */
takuhachisu 0:faa5d89e9dac 10
takuhachisu 0:faa5d89e9dac 11 #ifndef DRV2667_H
takuhachisu 0:faa5d89e9dac 12 #define DRV2667_H
takuhachisu 0:faa5d89e9dac 13
takuhachisu 0:faa5d89e9dac 14 #include "mbed.h"
takuhachisu 0:faa5d89e9dac 15
takuhachisu 0:faa5d89e9dac 16 /******************************************************************************
takuhachisu 0:faa5d89e9dac 17 ***** DRV2667 Addresses
takuhachisu 0:faa5d89e9dac 18 ******************************************************************************/
takuhachisu 0:faa5d89e9dac 19 #define SLAVE_ADDR_7_BIT 0x59 // 7-bit slave address
takuhachisu 0:faa5d89e9dac 20
takuhachisu 0:faa5d89e9dac 21 class DRV2667
takuhachisu 0:faa5d89e9dac 22 {
takuhachisu 0:faa5d89e9dac 23
takuhachisu 0:faa5d89e9dac 24 public:
takuhachisu 0:faa5d89e9dac 25 //// Selects the source to be played in register 0x01, bit 2
takuhachisu 0:faa5d89e9dac 26 enum InputMux {
takuhachisu 0:faa5d89e9dac 27 Digital = 0, // Digital input source
takuhachisu 0:faa5d89e9dac 28 Analog = 0x04, // Analog input source
takuhachisu 0:faa5d89e9dac 29 };
takuhachisu 0:faa5d89e9dac 30
takuhachisu 0:faa5d89e9dac 31 //// Selects the gain for the amplifier in register 0x01, bits [1:0]
takuhachisu 0:faa5d89e9dac 32 enum Gain {
takuhachisu 0:faa5d89e9dac 33 GNx1, // 0x00: 50 Vpp - 28.8 dB
takuhachisu 0:faa5d89e9dac 34 GNx2, // 0x01: 100 Vpp - 34.8 dB
takuhachisu 0:faa5d89e9dac 35 GNx3, // 0x02: 150 Vpp - 38.4 dB
takuhachisu 0:faa5d89e9dac 36 GNx4, // 0x03: 200 Vpp - 40.7 dB
takuhachisu 0:faa5d89e9dac 37 };
takuhachisu 0:faa5d89e9dac 38
takuhachisu 0:faa5d89e9dac 39 //// Time period when the FIFO runs empty and the device goes into idle
takuhachisu 0:faa5d89e9dac 40 //// mode, powering down the boost converter and amplifier in register
takuhachisu 0:faa5d89e9dac 41 //// 0x02, bits [3:2]
takuhachisu 0:faa5d89e9dac 42 enum Timeout {
takuhachisu 0:faa5d89e9dac 43 TOx1 = 0, // 5 msec
takuhachisu 0:faa5d89e9dac 44 TOx2 = 0x04, // 10 msec
takuhachisu 0:faa5d89e9dac 45 TOx3 = 0x08, // 15 msec
takuhachisu 0:faa5d89e9dac 46 TOx4 = 0x0C, // 20 msec
takuhachisu 0:faa5d89e9dac 47 };
takuhachisu 0:faa5d89e9dac 48
takuhachisu 0:faa5d89e9dac 49 /**
takuhachisu 0:faa5d89e9dac 50 * Create a DRV2605 object
takuhachisu 0:faa5d89e9dac 51 *
takuhachisu 0:faa5d89e9dac 52 * @param &i2c pointer of I2C object
takuhachisu 0:faa5d89e9dac 53 * @param isDigital true: digital input source, false: analog input source
takuhachisu 0:faa5d89e9dac 54 * @param gn gain for the amplifier
takuhachisu 0:faa5d89e9dac 55 * @param to timeout for FIFO interface (digital input only)
takuhachisu 0:faa5d89e9dac 56 */
takuhachisu 0:faa5d89e9dac 57 DRV2667(I2C &i2c, InputMux im = Digital, Gain gn = GNx1, Timeout to = TOx1);
takuhachisu 0:faa5d89e9dac 58
takuhachisu 0:faa5d89e9dac 59 /**
takuhachisu 0:faa5d89e9dac 60 Write value to specified register of device
takuhachisu 0:faa5d89e9dac 61 @param reg The device register to write
takuhachisu 0:faa5d89e9dac 62 @param value The value to write to the register
takuhachisu 0:faa5d89e9dac 63 */
takuhachisu 0:faa5d89e9dac 64 void i2cWriteByte(char reg, char value);
takuhachisu 0:faa5d89e9dac 65
takuhachisu 0:faa5d89e9dac 66 /**
takuhachisu 0:faa5d89e9dac 67 Read value from register of device
takuhachisu 0:faa5d89e9dac 68 @param reg The device register to read
takuhachisu 0:faa5d89e9dac 69 @return The result
takuhachisu 0:faa5d89e9dac 70 */
takuhachisu 0:faa5d89e9dac 71 uint8_t i2cReadByte(char reg);
takuhachisu 0:faa5d89e9dac 72
takuhachisu 0:faa5d89e9dac 73 /**
takuhachisu 0:faa5d89e9dac 74 Starts waveform playback
takuhachisu 0:faa5d89e9dac 75 */
takuhachisu 0:faa5d89e9dac 76 void play();
takuhachisu 0:faa5d89e9dac 77
takuhachisu 0:faa5d89e9dac 78 /**
takuhachisu 0:faa5d89e9dac 79 Cancel waveform playback
takuhachisu 0:faa5d89e9dac 80 */
takuhachisu 0:faa5d89e9dac 81 void stop();
takuhachisu 0:faa5d89e9dac 82
takuhachisu 0:faa5d89e9dac 83 /**
takuhachisu 0:faa5d89e9dac 84 Set sequencer to play waveform
takuhachisu 0:faa5d89e9dac 85
takuhachisu 0:faa5d89e9dac 86 @param id array of waveform ID in RAM
takuhachisu 0:faa5d89e9dac 87 @param setNum the number of waveform to set
takuhachisu 0:faa5d89e9dac 88 */
takuhachisu 0:faa5d89e9dac 89 void setWaveform(char* id, char setNum);
takuhachisu 0:faa5d89e9dac 90
takuhachisu 0:faa5d89e9dac 91 /**
takuhachisu 0:faa5d89e9dac 92 Entry point for FIFO data read out automatically at an 8-kHz sampling rate
takuhachisu 0:faa5d89e9dac 93 @param data signed 8-bit data
takuhachisu 0:faa5d89e9dac 94 */
takuhachisu 0:faa5d89e9dac 95 void loadFIFO(signed char data, char size);
takuhachisu 0:faa5d89e9dac 96
takuhachisu 0:faa5d89e9dac 97 /**
takuhachisu 0:faa5d89e9dac 98 Set internal wavefrom storage for the Waveform Synthesis Playback mode
takuhachisu 0:faa5d89e9dac 99 @param data array of parameters of sinusoid, which are:
takuhachisu 0:faa5d89e9dac 100 0: Peak voltage = amp / 255 x Gain / 2
takuhachisu 0:faa5d89e9dac 101 1: Sinusoidal frequency in Herz
takuhachisu 0:faa5d89e9dac 102 2: Number of cycles to be played
takuhachisu 0:faa5d89e9dac 103 3: The envelope setting:
takuhachisu 0:faa5d89e9dac 104 bits [7:4] sets ramp-up rate
takuhachisu 0:faa5d89e9dac 105 bits [3:0] sets ramp-down rate
takuhachisu 0:faa5d89e9dac 106 0x00 NoEnvelope; 0x01 32ms; 0x02 64ms; 0x03 96ms; 0x04 128ms;
takuhachisu 0:faa5d89e9dac 107 0x05 160ms; 0x06 192ms; 0x07 224ms; 0x08 256ms; 0x09 512ms;
takuhachisu 0:faa5d89e9dac 108 0x0A 768ms; 0x0B 1024ms; 0xC 1280ms; 0x0D 1536ms; 0x0E 1792ms;
takuhachisu 0:faa5d89e9dac 109 0x0F 2048ms;
takuhachisu 0:faa5d89e9dac 110 @param waveNum the number of waveform
takuhachisu 0:faa5d89e9dac 111 */
takuhachisu 0:faa5d89e9dac 112 void setWSP(char data[][4], char waveNum);
takuhachisu 0:faa5d89e9dac 113
takuhachisu 0:faa5d89e9dac 114 ///**
takuhachisu 0:faa5d89e9dac 115 // Set internal wavefrom storage for the Direct Playback from RAM mode
takuhachisu 0:faa5d89e9dac 116 // To be implemented
takuhachisu 0:faa5d89e9dac 117 //*/
takuhachisu 0:faa5d89e9dac 118 //void setDPR(void);
takuhachisu 0:faa5d89e9dac 119
takuhachisu 0:faa5d89e9dac 120 private:
takuhachisu 0:faa5d89e9dac 121 I2C *_i2c;
takuhachisu 0:faa5d89e9dac 122 };
takuhachisu 0:faa5d89e9dac 123
takuhachisu 0:faa5d89e9dac 124 #endif