taku hachisu / DRV2667

Library for TI's DRV2667

DRV2667.h@1:a57042b30965, 2018-02-08 (annotated)

Committer:
takuhachisu
Date:
Thu Feb 08 02:12:16 2018 +0000
Revision:
1:a57042b30965
Parent:
0:faa5d89e9dac
Child:
2:101901b3f05e
Library for TI's DRV2667

Who changed what in which revision?

UserRevisionLine numberNew contents of line
takuhachisu 0:faa5d89e9dac 1 #ifndef DRV2667_H
takuhachisu 0:faa5d89e9dac 2 #define DRV2667_H
takuhachisu 0:faa5d89e9dac 3
takuhachisu 0:faa5d89e9dac 4 #include "mbed.h"
takuhachisu 0:faa5d89e9dac 5
takuhachisu 1:a57042b30965 6 // DRV2667 Slave Address
takuhachisu 1:a57042b30965 7 #define SLAVE_ADDR_7_BIT 0x59
takuhachisu 1:a57042b30965 8
takuhachisu 1:a57042b30965 9 /** Library for the TI DRV2667
takuhachisu 1:a57042b30965 10 *
takuhachisu 1:a57042b30965 11 */
takuhachisu 0:faa5d89e9dac 12
takuhachisu 0:faa5d89e9dac 13 class DRV2667
takuhachisu 0:faa5d89e9dac 14 {
takuhachisu 0:faa5d89e9dac 15
takuhachisu 0:faa5d89e9dac 16 public:
takuhachisu 1:a57042b30965 17 // Selects the source to be played in register 0x01, bit 2
takuhachisu 0:faa5d89e9dac 18 enum InputMux {
takuhachisu 0:faa5d89e9dac 19 Digital = 0, // Digital input source
takuhachisu 0:faa5d89e9dac 20 Analog = 0x04, // Analog input source
takuhachisu 0:faa5d89e9dac 21 };
takuhachisu 0:faa5d89e9dac 22
takuhachisu 1:a57042b30965 23 // Selects the gain for the amplifier in register 0x01, bits [1:0]
takuhachisu 0:faa5d89e9dac 24 enum Gain {
takuhachisu 0:faa5d89e9dac 25 GNx1, // 0x00: 50 Vpp - 28.8 dB
takuhachisu 0:faa5d89e9dac 26 GNx2, // 0x01: 100 Vpp - 34.8 dB
takuhachisu 0:faa5d89e9dac 27 GNx3, // 0x02: 150 Vpp - 38.4 dB
takuhachisu 0:faa5d89e9dac 28 GNx4, // 0x03: 200 Vpp - 40.7 dB
takuhachisu 0:faa5d89e9dac 29 };
takuhachisu 0:faa5d89e9dac 30
takuhachisu 1:a57042b30965 31 // Time period when the FIFO runs empty and the device goes into idle
takuhachisu 1:a57042b30965 32 // mode, powering down the boost converter and amplifier in register
takuhachisu 1:a57042b30965 33 // 0x02, bits [3:2]
takuhachisu 0:faa5d89e9dac 34 enum Timeout {
takuhachisu 0:faa5d89e9dac 35 TOx1 = 0, // 5 msec
takuhachisu 0:faa5d89e9dac 36 TOx2 = 0x04, // 10 msec
takuhachisu 0:faa5d89e9dac 37 TOx3 = 0x08, // 15 msec
takuhachisu 0:faa5d89e9dac 38 TOx4 = 0x0C, // 20 msec
takuhachisu 0:faa5d89e9dac 39 };
takuhachisu 0:faa5d89e9dac 40
takuhachisu 0:faa5d89e9dac 41 /**
takuhachisu 1:a57042b30965 42 * Create a DRV2667 object
takuhachisu 0:faa5d89e9dac 43 *
takuhachisu 0:faa5d89e9dac 44 * @param &i2c pointer of I2C object
takuhachisu 1:a57042b30965 45 * @param im DRV2667::Digital or DRV2667::Analog
takuhachisu 0:faa5d89e9dac 46 * @param gn gain for the amplifier
takuhachisu 0:faa5d89e9dac 47 * @param to timeout for FIFO interface (digital input only)
takuhachisu 0:faa5d89e9dac 48 */
takuhachisu 0:faa5d89e9dac 49 DRV2667(I2C &i2c, InputMux im = Digital, Gain gn = GNx1, Timeout to = TOx1);
takuhachisu 0:faa5d89e9dac 50
takuhachisu 0:faa5d89e9dac 51 /**
takuhachisu 0:faa5d89e9dac 52 Write value to specified register of device
takuhachisu 0:faa5d89e9dac 53 @param reg The device register to write
takuhachisu 0:faa5d89e9dac 54 @param value The value to write to the register
takuhachisu 0:faa5d89e9dac 55 */
takuhachisu 0:faa5d89e9dac 56 void i2cWriteByte(char reg, char value);
takuhachisu 0:faa5d89e9dac 57
takuhachisu 0:faa5d89e9dac 58 /**
takuhachisu 0:faa5d89e9dac 59 Read value from register of device
takuhachisu 0:faa5d89e9dac 60 @param reg The device register to read
takuhachisu 0:faa5d89e9dac 61 @return The result
takuhachisu 0:faa5d89e9dac 62 */
takuhachisu 1:a57042b30965 63 char i2cReadByte(char reg);
takuhachisu 0:faa5d89e9dac 64
takuhachisu 0:faa5d89e9dac 65 /**
takuhachisu 0:faa5d89e9dac 66 Starts waveform playback
takuhachisu 0:faa5d89e9dac 67 */
takuhachisu 0:faa5d89e9dac 68 void play();
takuhachisu 0:faa5d89e9dac 69
takuhachisu 0:faa5d89e9dac 70 /**
takuhachisu 0:faa5d89e9dac 71 Cancel waveform playback
takuhachisu 0:faa5d89e9dac 72 */
takuhachisu 0:faa5d89e9dac 73 void stop();
takuhachisu 0:faa5d89e9dac 74
takuhachisu 0:faa5d89e9dac 75 /**
takuhachisu 0:faa5d89e9dac 76 Set sequencer to play waveform
takuhachisu 0:faa5d89e9dac 77
takuhachisu 0:faa5d89e9dac 78 @param id array of waveform ID in RAM
takuhachisu 0:faa5d89e9dac 79 @param setNum the number of waveform to set
takuhachisu 0:faa5d89e9dac 80 */
takuhachisu 0:faa5d89e9dac 81 void setWaveform(char* id, char setNum);
takuhachisu 0:faa5d89e9dac 82
takuhachisu 1:a57042b30965 83 ///**
takuhachisu 1:a57042b30965 84 // Entry point for FIFO data read out automatically at an 8-kHz sampling rate
takuhachisu 1:a57042b30965 85 //
takuhachisu 1:a57042b30965 86 // @param data signed 8-bit data
takuhachisu 1:a57042b30965 87 // @param size size of waveform
takuhachisu 1:a57042b30965 88 // To be implemented
takuhachisu 1:a57042b30965 89 //*/
takuhachisu 1:a57042b30965 90 //void loadFIFO(signed char* data, char size);
takuhachisu 0:faa5d89e9dac 91
takuhachisu 0:faa5d89e9dac 92 /**
takuhachisu 0:faa5d89e9dac 93 Set internal wavefrom storage for the Waveform Synthesis Playback mode
takuhachisu 1:a57042b30965 94 @param data[][0] Peak voltage = amp / 255 x Gain / 2
takuhachisu 1:a57042b30965 95 @param data[][1] Sinusoidal frequency
takuhachisu 1:a57042b30965 96 @param data[][2] Number of cycles to be played
takuhachisu 1:a57042b30965 97 @param data[][3] The envelope setting: bits [7:4] sets ramp-up rate;
takuhachisu 1:a57042b30965 98 bits [3:0] sets ramp-down rate. 0x00 NoEnvelope; 0x01
takuhachisu 1:a57042b30965 99 32ms; 0x02 64ms; 0x03 96ms; 0x04 128ms; 0x05 160ms;
takuhachisu 1:a57042b30965 100 0x06 192ms; 0x07 224ms; 0x08 256ms; 0x09 512ms; 0x0A
takuhachisu 1:a57042b30965 101 768ms; 0x0B 1024ms; 0xC 1280ms; 0x0D 1536ms; 0x0E
takuhachisu 1:a57042b30965 102 1792ms; 0x0F 2048ms.
takuhachisu 1:a57042b30965 103 @param waveNum the number of waveform
takuhachisu 0:faa5d89e9dac 104 */
takuhachisu 0:faa5d89e9dac 105 void setWSP(char data[][4], char waveNum);
takuhachisu 0:faa5d89e9dac 106
takuhachisu 0:faa5d89e9dac 107 ///**
takuhachisu 0:faa5d89e9dac 108 // Set internal wavefrom storage for the Direct Playback from RAM mode
takuhachisu 0:faa5d89e9dac 109 // To be implemented
takuhachisu 0:faa5d89e9dac 110 //*/
takuhachisu 0:faa5d89e9dac 111 //void setDPR(void);
takuhachisu 0:faa5d89e9dac 112
takuhachisu 0:faa5d89e9dac 113 private:
takuhachisu 0:faa5d89e9dac 114 I2C *_i2c;
takuhachisu 0:faa5d89e9dac 115 };
takuhachisu 0:faa5d89e9dac 116
takuhachisu 0:faa5d89e9dac 117 #endif