MPU9150 - 9Axis IMU MPU9150 's library. This project is por…

Users » syundo0730 » Code » MPU9150

9Axis IMU MPU9150 's library. This project is ported from this Arduino's project https://github.com/jrowberg/i2cdevlib/tree/master/Arduino/MPU9150. Connect pinName 27 to SCL, PinName 28 to SDA, GND to GND, and VOUT to VCC to try this library. The example is here

Dependencies: ArduinoSerial I2Cdev

Dependents: MPU9150_Example

MPU9150.cpp@1:1a6f1948f43d, 2016-02-01 (annotated)

Committer:: syundo0730
Date:: Mon Feb 01 16:13:13 2016 +0000
Revision:: 1:1a6f1948f43d
Parent:: 0:78ba160ba5f3

added LICENSE file

Who changed what in which revision?

User	Revision	Line number	New contents of line
syundo0730	0:78ba160ba5f3	1	#include "MPU9150.h"
syundo0730	0:78ba160ba5f3	2
syundo0730	0:78ba160ba5f3	3	/** Default constructor, uses default I2C address.
syundo0730	0:78ba160ba5f3	4	* @see MPU9150_DEFAULT_ADDRESS
syundo0730	0:78ba160ba5f3	5	*/
syundo0730	0:78ba160ba5f3	6	MPU9150::MPU9150() {
syundo0730	0:78ba160ba5f3	7	devAddr = MPU9150_DEFAULT_ADDRESS;
syundo0730	0:78ba160ba5f3	8	}
syundo0730	0:78ba160ba5f3	9
syundo0730	0:78ba160ba5f3	10	/** Specific address constructor.
syundo0730	0:78ba160ba5f3	11	* @param address I2C address
syundo0730	0:78ba160ba5f3	12	* @see MPU9150_DEFAULT_ADDRESS
syundo0730	0:78ba160ba5f3	13	* @see MPU9150_ADDRESS_AD0_LOW
syundo0730	0:78ba160ba5f3	14	* @see MPU9150_ADDRESS_AD0_HIGH
syundo0730	0:78ba160ba5f3	15	*/
syundo0730	0:78ba160ba5f3	16	MPU9150::MPU9150(uint8_t address) {
syundo0730	0:78ba160ba5f3	17	devAddr = address;
syundo0730	0:78ba160ba5f3	18	}
syundo0730	0:78ba160ba5f3	19
syundo0730	0:78ba160ba5f3	20	/** Power on and prepare for general usage.
syundo0730	0:78ba160ba5f3	21	* This will activate the device and take it out of sleep mode (which must be done
syundo0730	0:78ba160ba5f3	22	* after start-up). This function also sets both the accelerometer and the gyroscope
syundo0730	0:78ba160ba5f3	23	* to their most sensitive settings, namely +/- 2g and +/- 250 degrees/sec, and sets
syundo0730	0:78ba160ba5f3	24	* the clock source to use the X Gyro for reference, which is slightly better than
syundo0730	0:78ba160ba5f3	25	* the default internal clock source.
syundo0730	0:78ba160ba5f3	26	*/
syundo0730	0:78ba160ba5f3	27	void MPU9150::initialize() {
syundo0730	0:78ba160ba5f3	28	setClockSource(MPU9150_CLOCK_PLL_XGYRO);
syundo0730	0:78ba160ba5f3	29	setFullScaleGyroRange(MPU9150_GYRO_FS_250);
syundo0730	0:78ba160ba5f3	30	setFullScaleAccelRange(MPU9150_ACCEL_FS_2);
syundo0730	0:78ba160ba5f3	31	setSleepEnabled(false); // thanks to Jack Elston for pointing this one out!
syundo0730	0:78ba160ba5f3	32	}
syundo0730	0:78ba160ba5f3	33
syundo0730	0:78ba160ba5f3	34	/** Verify the I2C connection.
syundo0730	0:78ba160ba5f3	35	* Make sure the device is connected and responds as expected.
syundo0730	0:78ba160ba5f3	36	* @return True if connection is valid, false otherwise
syundo0730	0:78ba160ba5f3	37	*/
syundo0730	0:78ba160ba5f3	38	bool MPU9150::testConnection() {
syundo0730	0:78ba160ba5f3	39	return getDeviceID() == 0x34;
syundo0730	0:78ba160ba5f3	40	}
syundo0730	0:78ba160ba5f3	41
syundo0730	0:78ba160ba5f3	42	// AUX_VDDIO register (InvenSense demo code calls this RA_*G_OFFS_TC)
syundo0730	0:78ba160ba5f3	43
syundo0730	0:78ba160ba5f3	44	/** Get the auxiliary I2C supply voltage level.
syundo0730	0:78ba160ba5f3	45	* When set to 1, the auxiliary I2C bus high logic level is VDD. When cleared to
syundo0730	0:78ba160ba5f3	46	* 0, the auxiliary I2C bus high logic level is VLOGIC. This does not apply to
syundo0730	0:78ba160ba5f3	47	* the MPU-6000, which does not have a VLOGIC pin.
syundo0730	0:78ba160ba5f3	48	* @return I2C supply voltage level (0=VLOGIC, 1=VDD)
syundo0730	0:78ba160ba5f3	49	*/
syundo0730	0:78ba160ba5f3	50	uint8_t MPU9150::getAuxVDDIOLevel() {
syundo0730	0:78ba160ba5f3	51	I2Cdev::readBit(devAddr, MPU9150_RA_YG_OFFS_TC, MPU9150_TC_PWR_MODE_BIT, buffer);
syundo0730	0:78ba160ba5f3	52	return buffer[0];
syundo0730	0:78ba160ba5f3	53	}
syundo0730	0:78ba160ba5f3	54	/** Set the auxiliary I2C supply voltage level.
syundo0730	0:78ba160ba5f3	55	* When set to 1, the auxiliary I2C bus high logic level is VDD. When cleared to
syundo0730	0:78ba160ba5f3	56	* 0, the auxiliary I2C bus high logic level is VLOGIC. This does not apply to
syundo0730	0:78ba160ba5f3	57	* the MPU-6000, which does not have a VLOGIC pin.
syundo0730	0:78ba160ba5f3	58	* @param level I2C supply voltage level (0=VLOGIC, 1=VDD)
syundo0730	0:78ba160ba5f3	59	*/
syundo0730	0:78ba160ba5f3	60	void MPU9150::setAuxVDDIOLevel(uint8_t level) {
syundo0730	0:78ba160ba5f3	61	I2Cdev::writeBit(devAddr, MPU9150_RA_YG_OFFS_TC, MPU9150_TC_PWR_MODE_BIT, level);
syundo0730	0:78ba160ba5f3	62	}
syundo0730	0:78ba160ba5f3	63
syundo0730	0:78ba160ba5f3	64	// SMPLRT_DIV register
syundo0730	0:78ba160ba5f3	65
syundo0730	0:78ba160ba5f3	66	/** Get gyroscope output rate divider.
syundo0730	0:78ba160ba5f3	67	* The sensor register output, FIFO output, DMP sampling, Motion detection, Zero
syundo0730	0:78ba160ba5f3	68	* Motion detection, and Free Fall detection are all based on the Sample Rate.
syundo0730	0:78ba160ba5f3	69	* The Sample Rate is generated by dividing the gyroscope output rate by
syundo0730	0:78ba160ba5f3	70	* SMPLRT_DIV:
syundo0730	0:78ba160ba5f3	71	*
syundo0730	0:78ba160ba5f3	72	* Sample Rate = Gyroscope Output Rate / (1 + SMPLRT_DIV)
syundo0730	0:78ba160ba5f3	73	*
syundo0730	0:78ba160ba5f3	74	* where Gyroscope Output Rate = 8kHz when the DLPF is disabled (DLPF_CFG = 0 or
syundo0730	0:78ba160ba5f3	75	* 7), and 1kHz when the DLPF is enabled (see Register 26).
syundo0730	0:78ba160ba5f3	76	*
syundo0730	0:78ba160ba5f3	77	* Note: The accelerometer output rate is 1kHz. This means that for a Sample
syundo0730	0:78ba160ba5f3	78	* Rate greater than 1kHz, the same accelerometer sample may be output to the
syundo0730	0:78ba160ba5f3	79	* FIFO, DMP, and sensor registers more than once.
syundo0730	0:78ba160ba5f3	80	*
syundo0730	0:78ba160ba5f3	81	* For a diagram of the gyroscope and accelerometer signal paths, see Section 8
syundo0730	0:78ba160ba5f3	82	* of the MPU-6000/MPU-9150 Product Specification document.
syundo0730	0:78ba160ba5f3	83	*
syundo0730	0:78ba160ba5f3	84	* @return Current sample rate
syundo0730	0:78ba160ba5f3	85	* @see MPU9150_RA_SMPLRT_DIV
syundo0730	0:78ba160ba5f3	86	*/
syundo0730	0:78ba160ba5f3	87	uint8_t MPU9150::getRate() {
syundo0730	0:78ba160ba5f3	88	I2Cdev::readByte(devAddr, MPU9150_RA_SMPLRT_DIV, buffer);
syundo0730	0:78ba160ba5f3	89	return buffer[0];
syundo0730	0:78ba160ba5f3	90	}
syundo0730	0:78ba160ba5f3	91	/** Set gyroscope sample rate divider.
syundo0730	0:78ba160ba5f3	92	* @param rate New sample rate divider
syundo0730	0:78ba160ba5f3	93	* @see getRate()
syundo0730	0:78ba160ba5f3	94	* @see MPU9150_RA_SMPLRT_DIV
syundo0730	0:78ba160ba5f3	95	*/
syundo0730	0:78ba160ba5f3	96	void MPU9150::setRate(uint8_t rate) {
syundo0730	0:78ba160ba5f3	97	I2Cdev::writeByte(devAddr, MPU9150_RA_SMPLRT_DIV, rate);
syundo0730	0:78ba160ba5f3	98	}
syundo0730	0:78ba160ba5f3	99
syundo0730	0:78ba160ba5f3	100	// CONFIG register
syundo0730	0:78ba160ba5f3	101
syundo0730	0:78ba160ba5f3	102	/** Get external FSYNC configuration.
syundo0730	0:78ba160ba5f3	103	* Configures the external Frame Synchronization (FSYNC) pin sampling. An
syundo0730	0:78ba160ba5f3	104	* external signal connected to the FSYNC pin can be sampled by configuring
syundo0730	0:78ba160ba5f3	105	* EXT_SYNC_SET. Signal changes to the FSYNC pin are latched so that short
syundo0730	0:78ba160ba5f3	106	* strobes may be captured. The latched FSYNC signal will be sampled at the
syundo0730	0:78ba160ba5f3	107	* Sampling Rate, as defined in register 25. After sampling, the latch will
syundo0730	0:78ba160ba5f3	108	* reset to the current FSYNC signal state.
syundo0730	0:78ba160ba5f3	109	*
syundo0730	0:78ba160ba5f3	110	* The sampled value will be reported in place of the least significant bit in
syundo0730	0:78ba160ba5f3	111	* a sensor data register determined by the value of EXT_SYNC_SET according to
syundo0730	0:78ba160ba5f3	112	* the following table.
syundo0730	0:78ba160ba5f3	113	*
syundo0730	0:78ba160ba5f3	114	* <pre>
syundo0730	0:78ba160ba5f3	115	* EXT_SYNC_SET \| FSYNC Bit Location
syundo0730	0:78ba160ba5f3	116	* -------------+-------------------
syundo0730	0:78ba160ba5f3	117	* 0 \| Input disabled
syundo0730	0:78ba160ba5f3	118	* 1 \| TEMP_OUT_L[0]
syundo0730	0:78ba160ba5f3	119	* 2 \| GYRO_XOUT_L[0]
syundo0730	0:78ba160ba5f3	120	* 3 \| GYRO_YOUT_L[0]
syundo0730	0:78ba160ba5f3	121	* 4 \| GYRO_ZOUT_L[0]
syundo0730	0:78ba160ba5f3	122	* 5 \| ACCEL_XOUT_L[0]
syundo0730	0:78ba160ba5f3	123	* 6 \| ACCEL_YOUT_L[0]
syundo0730	0:78ba160ba5f3	124	* 7 \| ACCEL_ZOUT_L[0]
syundo0730	0:78ba160ba5f3	125	* </pre>
syundo0730	0:78ba160ba5f3	126	*
syundo0730	0:78ba160ba5f3	127	* @return FSYNC configuration value
syundo0730	0:78ba160ba5f3	128	*/
syundo0730	0:78ba160ba5f3	129	uint8_t MPU9150::getExternalFrameSync() {
syundo0730	0:78ba160ba5f3	130	I2Cdev::readBits(devAddr, MPU9150_RA_CONFIG, MPU9150_CFG_EXT_SYNC_SET_BIT, MPU9150_CFG_EXT_SYNC_SET_LENGTH, buffer);
syundo0730	0:78ba160ba5f3	131	return buffer[0];
syundo0730	0:78ba160ba5f3	132	}
syundo0730	0:78ba160ba5f3	133	/** Set external FSYNC configuration.
syundo0730	0:78ba160ba5f3	134	* @see getExternalFrameSync()
syundo0730	0:78ba160ba5f3	135	* @see MPU9150_RA_CONFIG
syundo0730	0:78ba160ba5f3	136	* @param sync New FSYNC configuration value
syundo0730	0:78ba160ba5f3	137	*/
syundo0730	0:78ba160ba5f3	138	void MPU9150::setExternalFrameSync(uint8_t sync) {
syundo0730	0:78ba160ba5f3	139	I2Cdev::writeBits(devAddr, MPU9150_RA_CONFIG, MPU9150_CFG_EXT_SYNC_SET_BIT, MPU9150_CFG_EXT_SYNC_SET_LENGTH, sync);
syundo0730	0:78ba160ba5f3	140	}
syundo0730	0:78ba160ba5f3	141	/** Get digital low-pass filter configuration.
syundo0730	0:78ba160ba5f3	142	* The DLPF_CFG parameter sets the digital low pass filter configuration. It
syundo0730	0:78ba160ba5f3	143	* also determines the internal sampling rate used by the device as shown in
syundo0730	0:78ba160ba5f3	144	* the table below.
syundo0730	0:78ba160ba5f3	145	*
syundo0730	0:78ba160ba5f3	146	* Note: The accelerometer output rate is 1kHz. This means that for a Sample
syundo0730	0:78ba160ba5f3	147	* Rate greater than 1kHz, the same accelerometer sample may be output to the
syundo0730	0:78ba160ba5f3	148	* FIFO, DMP, and sensor registers more than once.
syundo0730	0:78ba160ba5f3	149	*
syundo0730	0:78ba160ba5f3	150	* <pre>
syundo0730	0:78ba160ba5f3	151	* \| ACCELEROMETER \| GYROSCOPE
syundo0730	0:78ba160ba5f3	152	* DLPF_CFG \| Bandwidth \| Delay \| Bandwidth \| Delay \| Sample Rate
syundo0730	0:78ba160ba5f3	153	* ---------+-----------+--------+-----------+--------+-------------
syundo0730	0:78ba160ba5f3	154	* 0 \| 260Hz \| 0ms \| 256Hz \| 0.98ms \| 8kHz
syundo0730	0:78ba160ba5f3	155	* 1 \| 184Hz \| 2.0ms \| 188Hz \| 1.9ms \| 1kHz
syundo0730	0:78ba160ba5f3	156	* 2 \| 94Hz \| 3.0ms \| 98Hz \| 2.8ms \| 1kHz
syundo0730	0:78ba160ba5f3	157	* 3 \| 44Hz \| 4.9ms \| 42Hz \| 4.8ms \| 1kHz
syundo0730	0:78ba160ba5f3	158	* 4 \| 21Hz \| 8.5ms \| 20Hz \| 8.3ms \| 1kHz
syundo0730	0:78ba160ba5f3	159	* 5 \| 10Hz \| 13.8ms \| 10Hz \| 13.4ms \| 1kHz
syundo0730	0:78ba160ba5f3	160	* 6 \| 5Hz \| 19.0ms \| 5Hz \| 18.6ms \| 1kHz
syundo0730	0:78ba160ba5f3	161	* 7 \| -- Reserved -- \| -- Reserved -- \| Reserved
syundo0730	0:78ba160ba5f3	162	* </pre>
syundo0730	0:78ba160ba5f3	163	*
syundo0730	0:78ba160ba5f3	164	* @return DLFP configuration
syundo0730	0:78ba160ba5f3	165	* @see MPU9150_RA_CONFIG
syundo0730	0:78ba160ba5f3	166	* @see MPU9150_CFG_DLPF_CFG_BIT
syundo0730	0:78ba160ba5f3	167	* @see MPU9150_CFG_DLPF_CFG_LENGTH
syundo0730	0:78ba160ba5f3	168	*/
syundo0730	0:78ba160ba5f3	169	uint8_t MPU9150::getDLPFMode() {
syundo0730	0:78ba160ba5f3	170	I2Cdev::readBits(devAddr, MPU9150_RA_CONFIG, MPU9150_CFG_DLPF_CFG_BIT, MPU9150_CFG_DLPF_CFG_LENGTH, buffer);
syundo0730	0:78ba160ba5f3	171	return buffer[0];
syundo0730	0:78ba160ba5f3	172	}
syundo0730	0:78ba160ba5f3	173	/** Set digital low-pass filter configuration.
syundo0730	0:78ba160ba5f3	174	* @param mode New DLFP configuration setting
syundo0730	0:78ba160ba5f3	175	* @see getDLPFBandwidth()
syundo0730	0:78ba160ba5f3	176	* @see MPU9150_DLPF_BW_256
syundo0730	0:78ba160ba5f3	177	* @see MPU9150_RA_CONFIG
syundo0730	0:78ba160ba5f3	178	* @see MPU9150_CFG_DLPF_CFG_BIT
syundo0730	0:78ba160ba5f3	179	* @see MPU9150_CFG_DLPF_CFG_LENGTH
syundo0730	0:78ba160ba5f3	180	*/
syundo0730	0:78ba160ba5f3	181	void MPU9150::setDLPFMode(uint8_t mode) {
syundo0730	0:78ba160ba5f3	182	I2Cdev::writeBits(devAddr, MPU9150_RA_CONFIG, MPU9150_CFG_DLPF_CFG_BIT, MPU9150_CFG_DLPF_CFG_LENGTH, mode);
syundo0730	0:78ba160ba5f3	183	}
syundo0730	0:78ba160ba5f3	184
syundo0730	0:78ba160ba5f3	185	// GYRO_CONFIG register
syundo0730	0:78ba160ba5f3	186
syundo0730	0:78ba160ba5f3	187	/** Get full-scale gyroscope range.
syundo0730	0:78ba160ba5f3	188	* The FS_SEL parameter allows setting the full-scale range of the gyro sensors,
syundo0730	0:78ba160ba5f3	189	* as described in the table below.
syundo0730	0:78ba160ba5f3	190	*
syundo0730	0:78ba160ba5f3	191	* <pre>
syundo0730	0:78ba160ba5f3	192	* 0 = +/- 250 degrees/sec
syundo0730	0:78ba160ba5f3	193	* 1 = +/- 500 degrees/sec
syundo0730	0:78ba160ba5f3	194	* 2 = +/- 1000 degrees/sec
syundo0730	0:78ba160ba5f3	195	* 3 = +/- 2000 degrees/sec
syundo0730	0:78ba160ba5f3	196	* </pre>
syundo0730	0:78ba160ba5f3	197	*
syundo0730	0:78ba160ba5f3	198	* @return Current full-scale gyroscope range setting
syundo0730	0:78ba160ba5f3	199	* @see MPU9150_GYRO_FS_250
syundo0730	0:78ba160ba5f3	200	* @see MPU9150_RA_GYRO_CONFIG
syundo0730	0:78ba160ba5f3	201	* @see MPU9150_GCONFIG_FS_SEL_BIT
syundo0730	0:78ba160ba5f3	202	* @see MPU9150_GCONFIG_FS_SEL_LENGTH
syundo0730	0:78ba160ba5f3	203	*/
syundo0730	0:78ba160ba5f3	204	uint8_t MPU9150::getFullScaleGyroRange() {
syundo0730	0:78ba160ba5f3	205	I2Cdev::readBits(devAddr, MPU9150_RA_GYRO_CONFIG, MPU9150_GCONFIG_FS_SEL_BIT, MPU9150_GCONFIG_FS_SEL_LENGTH, buffer);
syundo0730	0:78ba160ba5f3	206	return buffer[0];
syundo0730	0:78ba160ba5f3	207	}
syundo0730	0:78ba160ba5f3	208	/** Set full-scale gyroscope range.
syundo0730	0:78ba160ba5f3	209	* @param range New full-scale gyroscope range value
syundo0730	0:78ba160ba5f3	210	* @see getFullScaleRange()
syundo0730	0:78ba160ba5f3	211	* @see MPU9150_GYRO_FS_250
syundo0730	0:78ba160ba5f3	212	* @see MPU9150_RA_GYRO_CONFIG
syundo0730	0:78ba160ba5f3	213	* @see MPU9150_GCONFIG_FS_SEL_BIT
syundo0730	0:78ba160ba5f3	214	* @see MPU9150_GCONFIG_FS_SEL_LENGTH
syundo0730	0:78ba160ba5f3	215	*/
syundo0730	0:78ba160ba5f3	216	void MPU9150::setFullScaleGyroRange(uint8_t range) {
syundo0730	0:78ba160ba5f3	217	I2Cdev::writeBits(devAddr, MPU9150_RA_GYRO_CONFIG, MPU9150_GCONFIG_FS_SEL_BIT, MPU9150_GCONFIG_FS_SEL_LENGTH, range);
syundo0730	0:78ba160ba5f3	218	}
syundo0730	0:78ba160ba5f3	219
syundo0730	0:78ba160ba5f3	220	// ACCEL_CONFIG register
syundo0730	0:78ba160ba5f3	221
syundo0730	0:78ba160ba5f3	222	/** Get self-test enabled setting for accelerometer X axis.
syundo0730	0:78ba160ba5f3	223	* @return Self-test enabled value
syundo0730	0:78ba160ba5f3	224	* @see MPU9150_RA_ACCEL_CONFIG
syundo0730	0:78ba160ba5f3	225	*/
syundo0730	0:78ba160ba5f3	226	bool MPU9150::getAccelXSelfTest() {
syundo0730	0:78ba160ba5f3	227	I2Cdev::readBit(devAddr, MPU9150_RA_ACCEL_CONFIG, MPU9150_ACONFIG_XA_ST_BIT, buffer);
syundo0730	0:78ba160ba5f3	228	return buffer[0];
syundo0730	0:78ba160ba5f3	229	}
syundo0730	0:78ba160ba5f3	230	/** Get self-test enabled setting for accelerometer X axis.
syundo0730	0:78ba160ba5f3	231	* @param enabled Self-test enabled value
syundo0730	0:78ba160ba5f3	232	* @see MPU9150_RA_ACCEL_CONFIG
syundo0730	0:78ba160ba5f3	233	*/
syundo0730	0:78ba160ba5f3	234	void MPU9150::setAccelXSelfTest(bool enabled) {
syundo0730	0:78ba160ba5f3	235	I2Cdev::writeBit(devAddr, MPU9150_RA_ACCEL_CONFIG, MPU9150_ACONFIG_XA_ST_BIT, enabled);
syundo0730	0:78ba160ba5f3	236	}
syundo0730	0:78ba160ba5f3	237	/** Get self-test enabled value for accelerometer Y axis.
syundo0730	0:78ba160ba5f3	238	* @return Self-test enabled value
syundo0730	0:78ba160ba5f3	239	* @see MPU9150_RA_ACCEL_CONFIG
syundo0730	0:78ba160ba5f3	240	*/
syundo0730	0:78ba160ba5f3	241	bool MPU9150::getAccelYSelfTest() {
syundo0730	0:78ba160ba5f3	242	I2Cdev::readBit(devAddr, MPU9150_RA_ACCEL_CONFIG, MPU9150_ACONFIG_YA_ST_BIT, buffer);
syundo0730	0:78ba160ba5f3	243	return buffer[0];
syundo0730	0:78ba160ba5f3	244	}
syundo0730	0:78ba160ba5f3	245	/** Get self-test enabled value for accelerometer Y axis.
syundo0730	0:78ba160ba5f3	246	* @param enabled Self-test enabled value
syundo0730	0:78ba160ba5f3	247	* @see MPU9150_RA_ACCEL_CONFIG
syundo0730	0:78ba160ba5f3	248	*/
syundo0730	0:78ba160ba5f3	249	void MPU9150::setAccelYSelfTest(bool enabled) {
syundo0730	0:78ba160ba5f3	250	I2Cdev::writeBit(devAddr, MPU9150_RA_ACCEL_CONFIG, MPU9150_ACONFIG_YA_ST_BIT, enabled);
syundo0730	0:78ba160ba5f3	251	}
syundo0730	0:78ba160ba5f3	252	/** Get self-test enabled value for accelerometer Z axis.
syundo0730	0:78ba160ba5f3	253	* @return Self-test enabled value
syundo0730	0:78ba160ba5f3	254	* @see MPU9150_RA_ACCEL_CONFIG
syundo0730	0:78ba160ba5f3	255	*/
syundo0730	0:78ba160ba5f3	256	bool MPU9150::getAccelZSelfTest() {
syundo0730	0:78ba160ba5f3	257	I2Cdev::readBit(devAddr, MPU9150_RA_ACCEL_CONFIG, MPU9150_ACONFIG_ZA_ST_BIT, buffer);
syundo0730	0:78ba160ba5f3	258	return buffer[0];
syundo0730	0:78ba160ba5f3	259	}
syundo0730	0:78ba160ba5f3	260	/** Set self-test enabled value for accelerometer Z axis.
syundo0730	0:78ba160ba5f3	261	* @param enabled Self-test enabled value
syundo0730	0:78ba160ba5f3	262	* @see MPU9150_RA_ACCEL_CONFIG
syundo0730	0:78ba160ba5f3	263	*/
syundo0730	0:78ba160ba5f3	264	void MPU9150::setAccelZSelfTest(bool enabled) {
syundo0730	0:78ba160ba5f3	265	I2Cdev::writeBit(devAddr, MPU9150_RA_ACCEL_CONFIG, MPU9150_ACONFIG_ZA_ST_BIT, enabled);
syundo0730	0:78ba160ba5f3	266	}
syundo0730	0:78ba160ba5f3	267	/** Get full-scale accelerometer range.
syundo0730	0:78ba160ba5f3	268	* The FS_SEL parameter allows setting the full-scale range of the accelerometer
syundo0730	0:78ba160ba5f3	269	* sensors, as described in the table below.
syundo0730	0:78ba160ba5f3	270	*
syundo0730	0:78ba160ba5f3	271	* <pre>
syundo0730	0:78ba160ba5f3	272	* 0 = +/- 2g
syundo0730	0:78ba160ba5f3	273	* 1 = +/- 4g
syundo0730	0:78ba160ba5f3	274	* 2 = +/- 8g
syundo0730	0:78ba160ba5f3	275	* 3 = +/- 16g
syundo0730	0:78ba160ba5f3	276	* </pre>
syundo0730	0:78ba160ba5f3	277	*
syundo0730	0:78ba160ba5f3	278	* @return Current full-scale accelerometer range setting
syundo0730	0:78ba160ba5f3	279	* @see MPU9150_ACCEL_FS_2
syundo0730	0:78ba160ba5f3	280	* @see MPU9150_RA_ACCEL_CONFIG
syundo0730	0:78ba160ba5f3	281	* @see MPU9150_ACONFIG_AFS_SEL_BIT
syundo0730	0:78ba160ba5f3	282	* @see MPU9150_ACONFIG_AFS_SEL_LENGTH
syundo0730	0:78ba160ba5f3	283	*/
syundo0730	0:78ba160ba5f3	284	uint8_t MPU9150::getFullScaleAccelRange() {
syundo0730	0:78ba160ba5f3	285	I2Cdev::readBits(devAddr, MPU9150_RA_ACCEL_CONFIG, MPU9150_ACONFIG_AFS_SEL_BIT, MPU9150_ACONFIG_AFS_SEL_LENGTH, buffer);
syundo0730	0:78ba160ba5f3	286	return buffer[0];
syundo0730	0:78ba160ba5f3	287	}
syundo0730	0:78ba160ba5f3	288	/** Set full-scale accelerometer range.
syundo0730	0:78ba160ba5f3	289	* @param range New full-scale accelerometer range setting
syundo0730	0:78ba160ba5f3	290	* @see getFullScaleAccelRange()
syundo0730	0:78ba160ba5f3	291	*/
syundo0730	0:78ba160ba5f3	292	void MPU9150::setFullScaleAccelRange(uint8_t range) {
syundo0730	0:78ba160ba5f3	293	I2Cdev::writeBits(devAddr, MPU9150_RA_ACCEL_CONFIG, MPU9150_ACONFIG_AFS_SEL_BIT, MPU9150_ACONFIG_AFS_SEL_LENGTH, range);
syundo0730	0:78ba160ba5f3	294	}
syundo0730	0:78ba160ba5f3	295	/** Get the high-pass filter configuration.
syundo0730	0:78ba160ba5f3	296	* The DHPF is a filter module in the path leading to motion detectors (Free
syundo0730	0:78ba160ba5f3	297	* Fall, Motion threshold, and Zero Motion). The high pass filter output is not
syundo0730	0:78ba160ba5f3	298	* available to the data registers (see Figure in Section 8 of the MPU-6000/
syundo0730	0:78ba160ba5f3	299	* MPU-9150 Product Specification document).
syundo0730	0:78ba160ba5f3	300	*
syundo0730	0:78ba160ba5f3	301	* The high pass filter has three modes:
syundo0730	0:78ba160ba5f3	302	*
syundo0730	0:78ba160ba5f3	303	* <pre>
syundo0730	0:78ba160ba5f3	304	* Reset: The filter output settles to zero within one sample. This
syundo0730	0:78ba160ba5f3	305	* effectively disables the high pass filter. This mode may be toggled
syundo0730	0:78ba160ba5f3	306	* to quickly settle the filter.
syundo0730	0:78ba160ba5f3	307	*
syundo0730	0:78ba160ba5f3	308	* On: The high pass filter will pass signals above the cut off frequency.
syundo0730	0:78ba160ba5f3	309	*
syundo0730	0:78ba160ba5f3	310	* Hold: When triggered, the filter holds the present sample. The filter
syundo0730	0:78ba160ba5f3	311	* output will be the difference between the input sample and the held
syundo0730	0:78ba160ba5f3	312	* sample.
syundo0730	0:78ba160ba5f3	313	* </pre>
syundo0730	0:78ba160ba5f3	314	*
syundo0730	0:78ba160ba5f3	315	* <pre>
syundo0730	0:78ba160ba5f3	316	* ACCEL_HPF \| Filter Mode \| Cut-off Frequency
syundo0730	0:78ba160ba5f3	317	* ----------+-------------+------------------
syundo0730	0:78ba160ba5f3	318	* 0 \| Reset \| None
syundo0730	0:78ba160ba5f3	319	* 1 \| On \| 5Hz
syundo0730	0:78ba160ba5f3	320	* 2 \| On \| 2.5Hz
syundo0730	0:78ba160ba5f3	321	* 3 \| On \| 1.25Hz
syundo0730	0:78ba160ba5f3	322	* 4 \| On \| 0.63Hz
syundo0730	0:78ba160ba5f3	323	* 7 \| Hold \| None
syundo0730	0:78ba160ba5f3	324	* </pre>
syundo0730	0:78ba160ba5f3	325	*
syundo0730	0:78ba160ba5f3	326	* @return Current high-pass filter configuration
syundo0730	0:78ba160ba5f3	327	* @see MPU9150_DHPF_RESET
syundo0730	0:78ba160ba5f3	328	* @see MPU9150_RA_ACCEL_CONFIG
syundo0730	0:78ba160ba5f3	329	*/
syundo0730	0:78ba160ba5f3	330	uint8_t MPU9150::getDHPFMode() {
syundo0730	0:78ba160ba5f3	331	I2Cdev::readBits(devAddr, MPU9150_RA_ACCEL_CONFIG, MPU9150_ACONFIG_ACCEL_HPF_BIT, MPU9150_ACONFIG_ACCEL_HPF_LENGTH, buffer);
syundo0730	0:78ba160ba5f3	332	return buffer[0];
syundo0730	0:78ba160ba5f3	333	}
syundo0730	0:78ba160ba5f3	334	/** Set the high-pass filter configuration.
syundo0730	0:78ba160ba5f3	335	* @param bandwidth New high-pass filter configuration
syundo0730	0:78ba160ba5f3	336	* @see setDHPFMode()
syundo0730	0:78ba160ba5f3	337	* @see MPU9150_DHPF_RESET
syundo0730	0:78ba160ba5f3	338	* @see MPU9150_RA_ACCEL_CONFIG
syundo0730	0:78ba160ba5f3	339	*/
syundo0730	0:78ba160ba5f3	340	void MPU9150::setDHPFMode(uint8_t bandwidth) {
syundo0730	0:78ba160ba5f3	341	I2Cdev::writeBits(devAddr, MPU9150_RA_ACCEL_CONFIG, MPU9150_ACONFIG_ACCEL_HPF_BIT, MPU9150_ACONFIG_ACCEL_HPF_LENGTH, bandwidth);
syundo0730	0:78ba160ba5f3	342	}
syundo0730	0:78ba160ba5f3	343
syundo0730	0:78ba160ba5f3	344	// FF_THR register
syundo0730	0:78ba160ba5f3	345
syundo0730	0:78ba160ba5f3	346	/** Get free-fall event acceleration threshold.
syundo0730	0:78ba160ba5f3	347	* This register configures the detection threshold for Free Fall event
syundo0730	0:78ba160ba5f3	348	* detection. The unit of FF_THR is 1LSB = 2mg. Free Fall is detected when the
syundo0730	0:78ba160ba5f3	349	* absolute value of the accelerometer measurements for the three axes are each
syundo0730	0:78ba160ba5f3	350	* less than the detection threshold. This condition increments the Free Fall
syundo0730	0:78ba160ba5f3	351	* duration counter (Register 30). The Free Fall interrupt is triggered when the
syundo0730	0:78ba160ba5f3	352	* Free Fall duration counter reaches the time specified in FF_DUR.
syundo0730	0:78ba160ba5f3	353	*
syundo0730	0:78ba160ba5f3	354	* For more details on the Free Fall detection interrupt, see Section 8.2 of the
syundo0730	0:78ba160ba5f3	355	* MPU-6000/MPU-9150 Product Specification document as well as Registers 56 and
syundo0730	0:78ba160ba5f3	356	* 58 of this document.
syundo0730	0:78ba160ba5f3	357	*
syundo0730	0:78ba160ba5f3	358	* @return Current free-fall acceleration threshold value (LSB = 2mg)
syundo0730	0:78ba160ba5f3	359	* @see MPU9150_RA_FF_THR
syundo0730	0:78ba160ba5f3	360	*/
syundo0730	0:78ba160ba5f3	361	uint8_t MPU9150::getFreefallDetectionThreshold() {
syundo0730	0:78ba160ba5f3	362	I2Cdev::readByte(devAddr, MPU9150_RA_FF_THR, buffer);
syundo0730	0:78ba160ba5f3	363	return buffer[0];
syundo0730	0:78ba160ba5f3	364	}
syundo0730	0:78ba160ba5f3	365	/** Get free-fall event acceleration threshold.
syundo0730	0:78ba160ba5f3	366	* @param threshold New free-fall acceleration threshold value (LSB = 2mg)
syundo0730	0:78ba160ba5f3	367	* @see getFreefallDetectionThreshold()
syundo0730	0:78ba160ba5f3	368	* @see MPU9150_RA_FF_THR
syundo0730	0:78ba160ba5f3	369	*/
syundo0730	0:78ba160ba5f3	370	void MPU9150::setFreefallDetectionThreshold(uint8_t threshold) {
syundo0730	0:78ba160ba5f3	371	I2Cdev::writeByte(devAddr, MPU9150_RA_FF_THR, threshold);
syundo0730	0:78ba160ba5f3	372	}
syundo0730	0:78ba160ba5f3	373
syundo0730	0:78ba160ba5f3	374	// FF_DUR register
syundo0730	0:78ba160ba5f3	375
syundo0730	0:78ba160ba5f3	376	/** Get free-fall event duration threshold.
syundo0730	0:78ba160ba5f3	377	* This register configures the duration counter threshold for Free Fall event
syundo0730	0:78ba160ba5f3	378	* detection. The duration counter ticks at 1kHz, therefore FF_DUR has a unit
syundo0730	0:78ba160ba5f3	379	* of 1 LSB = 1 ms.
syundo0730	0:78ba160ba5f3	380	*
syundo0730	0:78ba160ba5f3	381	* The Free Fall duration counter increments while the absolute value of the
syundo0730	0:78ba160ba5f3	382	* accelerometer measurements are each less than the detection threshold
syundo0730	0:78ba160ba5f3	383	* (Register 29). The Free Fall interrupt is triggered when the Free Fall
syundo0730	0:78ba160ba5f3	384	* duration counter reaches the time specified in this register.
syundo0730	0:78ba160ba5f3	385	*
syundo0730	0:78ba160ba5f3	386	* For more details on the Free Fall detection interrupt, see Section 8.2 of
syundo0730	0:78ba160ba5f3	387	* the MPU-6000/MPU-9150 Product Specification document as well as Registers 56
syundo0730	0:78ba160ba5f3	388	* and 58 of this document.
syundo0730	0:78ba160ba5f3	389	*
syundo0730	0:78ba160ba5f3	390	* @return Current free-fall duration threshold value (LSB = 1ms)
syundo0730	0:78ba160ba5f3	391	* @see MPU9150_RA_FF_DUR
syundo0730	0:78ba160ba5f3	392	*/
syundo0730	0:78ba160ba5f3	393	uint8_t MPU9150::getFreefallDetectionDuration() {
syundo0730	0:78ba160ba5f3	394	I2Cdev::readByte(devAddr, MPU9150_RA_FF_DUR, buffer);
syundo0730	0:78ba160ba5f3	395	return buffer[0];
syundo0730	0:78ba160ba5f3	396	}
syundo0730	0:78ba160ba5f3	397	/** Get free-fall event duration threshold.
syundo0730	0:78ba160ba5f3	398	* @param duration New free-fall duration threshold value (LSB = 1ms)
syundo0730	0:78ba160ba5f3	399	* @see getFreefallDetectionDuration()
syundo0730	0:78ba160ba5f3	400	* @see MPU9150_RA_FF_DUR
syundo0730	0:78ba160ba5f3	401	*/
syundo0730	0:78ba160ba5f3	402	void MPU9150::setFreefallDetectionDuration(uint8_t duration) {
syundo0730	0:78ba160ba5f3	403	I2Cdev::writeByte(devAddr, MPU9150_RA_FF_DUR, duration);
syundo0730	0:78ba160ba5f3	404	}
syundo0730	0:78ba160ba5f3	405
syundo0730	0:78ba160ba5f3	406	// MOT_THR register
syundo0730	0:78ba160ba5f3	407
syundo0730	0:78ba160ba5f3	408	/** Get motion detection event acceleration threshold.
syundo0730	0:78ba160ba5f3	409	* This register configures the detection threshold for Motion interrupt
syundo0730	0:78ba160ba5f3	410	* generation. The unit of MOT_THR is 1LSB = 2mg. Motion is detected when the
syundo0730	0:78ba160ba5f3	411	* absolute value of any of the accelerometer measurements exceeds this Motion
syundo0730	0:78ba160ba5f3	412	* detection threshold. This condition increments the Motion detection duration
syundo0730	0:78ba160ba5f3	413	* counter (Register 32). The Motion detection interrupt is triggered when the
syundo0730	0:78ba160ba5f3	414	* Motion Detection counter reaches the time count specified in MOT_DUR
syundo0730	0:78ba160ba5f3	415	* (Register 32).
syundo0730	0:78ba160ba5f3	416	*
syundo0730	0:78ba160ba5f3	417	* The Motion interrupt will indicate the axis and polarity of detected motion
syundo0730	0:78ba160ba5f3	418	* in MOT_DETECT_STATUS (Register 97).
syundo0730	0:78ba160ba5f3	419	*
syundo0730	0:78ba160ba5f3	420	* For more details on the Motion detection interrupt, see Section 8.3 of the
syundo0730	0:78ba160ba5f3	421	* MPU-6000/MPU-9150 Product Specification document as well as Registers 56 and
syundo0730	0:78ba160ba5f3	422	* 58 of this document.
syundo0730	0:78ba160ba5f3	423	*
syundo0730	0:78ba160ba5f3	424	* @return Current motion detection acceleration threshold value (LSB = 2mg)
syundo0730	0:78ba160ba5f3	425	* @see MPU9150_RA_MOT_THR
syundo0730	0:78ba160ba5f3	426	*/
syundo0730	0:78ba160ba5f3	427	uint8_t MPU9150::getMotionDetectionThreshold() {
syundo0730	0:78ba160ba5f3	428	I2Cdev::readByte(devAddr, MPU9150_RA_MOT_THR, buffer);
syundo0730	0:78ba160ba5f3	429	return buffer[0];
syundo0730	0:78ba160ba5f3	430	}
syundo0730	0:78ba160ba5f3	431	/** Set free-fall event acceleration threshold.
syundo0730	0:78ba160ba5f3	432	* @param threshold New motion detection acceleration threshold value (LSB = 2mg)
syundo0730	0:78ba160ba5f3	433	* @see getMotionDetectionThreshold()
syundo0730	0:78ba160ba5f3	434	* @see MPU9150_RA_MOT_THR
syundo0730	0:78ba160ba5f3	435	*/
syundo0730	0:78ba160ba5f3	436	void MPU9150::setMotionDetectionThreshold(uint8_t threshold) {
syundo0730	0:78ba160ba5f3	437	I2Cdev::writeByte(devAddr, MPU9150_RA_MOT_THR, threshold);
syundo0730	0:78ba160ba5f3	438	}
syundo0730	0:78ba160ba5f3	439
syundo0730	0:78ba160ba5f3	440	// MOT_DUR register
syundo0730	0:78ba160ba5f3	441
syundo0730	0:78ba160ba5f3	442	/** Get motion detection event duration threshold.
syundo0730	0:78ba160ba5f3	443	* This register configures the duration counter threshold for Motion interrupt
syundo0730	0:78ba160ba5f3	444	* generation. The duration counter ticks at 1 kHz, therefore MOT_DUR has a unit
syundo0730	0:78ba160ba5f3	445	* of 1LSB = 1ms. The Motion detection duration counter increments when the
syundo0730	0:78ba160ba5f3	446	* absolute value of any of the accelerometer measurements exceeds the Motion
syundo0730	0:78ba160ba5f3	447	* detection threshold (Register 31). The Motion detection interrupt is
syundo0730	0:78ba160ba5f3	448	* triggered when the Motion detection counter reaches the time count specified
syundo0730	0:78ba160ba5f3	449	* in this register.
syundo0730	0:78ba160ba5f3	450	*
syundo0730	0:78ba160ba5f3	451	* For more details on the Motion detection interrupt, see Section 8.3 of the
syundo0730	0:78ba160ba5f3	452	* MPU-6000/MPU-9150 Product Specification document.
syundo0730	0:78ba160ba5f3	453	*
syundo0730	0:78ba160ba5f3	454	* @return Current motion detection duration threshold value (LSB = 1ms)
syundo0730	0:78ba160ba5f3	455	* @see MPU9150_RA_MOT_DUR
syundo0730	0:78ba160ba5f3	456	*/
syundo0730	0:78ba160ba5f3	457	uint8_t MPU9150::getMotionDetectionDuration() {
syundo0730	0:78ba160ba5f3	458	I2Cdev::readByte(devAddr, MPU9150_RA_MOT_DUR, buffer);
syundo0730	0:78ba160ba5f3	459	return buffer[0];
syundo0730	0:78ba160ba5f3	460	}
syundo0730	0:78ba160ba5f3	461	/** Set motion detection event duration threshold.
syundo0730	0:78ba160ba5f3	462	* @param duration New motion detection duration threshold value (LSB = 1ms)
syundo0730	0:78ba160ba5f3	463	* @see getMotionDetectionDuration()
syundo0730	0:78ba160ba5f3	464	* @see MPU9150_RA_MOT_DUR
syundo0730	0:78ba160ba5f3	465	*/
syundo0730	0:78ba160ba5f3	466	void MPU9150::setMotionDetectionDuration(uint8_t duration) {
syundo0730	0:78ba160ba5f3	467	I2Cdev::writeByte(devAddr, MPU9150_RA_MOT_DUR, duration);
syundo0730	0:78ba160ba5f3	468	}
syundo0730	0:78ba160ba5f3	469
syundo0730	0:78ba160ba5f3	470	// ZRMOT_THR register
syundo0730	0:78ba160ba5f3	471
syundo0730	0:78ba160ba5f3	472	/** Get zero motion detection event acceleration threshold.
syundo0730	0:78ba160ba5f3	473	* This register configures the detection threshold for Zero Motion interrupt
syundo0730	0:78ba160ba5f3	474	* generation. The unit of ZRMOT_THR is 1LSB = 2mg. Zero Motion is detected when
syundo0730	0:78ba160ba5f3	475	* the absolute value of the accelerometer measurements for the 3 axes are each
syundo0730	0:78ba160ba5f3	476	* less than the detection threshold. This condition increments the Zero Motion
syundo0730	0:78ba160ba5f3	477	* duration counter (Register 34). The Zero Motion interrupt is triggered when
syundo0730	0:78ba160ba5f3	478	* the Zero Motion duration counter reaches the time count specified in
syundo0730	0:78ba160ba5f3	479	* ZRMOT_DUR (Register 34).
syundo0730	0:78ba160ba5f3	480	*
syundo0730	0:78ba160ba5f3	481	* Unlike Free Fall or Motion detection, Zero Motion detection triggers an
syundo0730	0:78ba160ba5f3	482	* interrupt both when Zero Motion is first detected and when Zero Motion is no
syundo0730	0:78ba160ba5f3	483	* longer detected.
syundo0730	0:78ba160ba5f3	484	*
syundo0730	0:78ba160ba5f3	485	* When a zero motion event is detected, a Zero Motion Status will be indicated
syundo0730	0:78ba160ba5f3	486	* in the MOT_DETECT_STATUS register (Register 97). When a motion-to-zero-motion
syundo0730	0:78ba160ba5f3	487	* condition is detected, the status bit is set to 1. When a zero-motion-to-
syundo0730	0:78ba160ba5f3	488	* motion condition is detected, the status bit is set to 0.
syundo0730	0:78ba160ba5f3	489	*
syundo0730	0:78ba160ba5f3	490	* For more details on the Zero Motion detection interrupt, see Section 8.4 of
syundo0730	0:78ba160ba5f3	491	* the MPU-6000/MPU-9150 Product Specification document as well as Registers 56
syundo0730	0:78ba160ba5f3	492	* and 58 of this document.
syundo0730	0:78ba160ba5f3	493	*
syundo0730	0:78ba160ba5f3	494	* @return Current zero motion detection acceleration threshold value (LSB = 2mg)
syundo0730	0:78ba160ba5f3	495	* @see MPU9150_RA_ZRMOT_THR
syundo0730	0:78ba160ba5f3	496	*/
syundo0730	0:78ba160ba5f3	497	uint8_t MPU9150::getZeroMotionDetectionThreshold() {
syundo0730	0:78ba160ba5f3	498	I2Cdev::readByte(devAddr, MPU9150_RA_ZRMOT_THR, buffer);
syundo0730	0:78ba160ba5f3	499	return buffer[0];
syundo0730	0:78ba160ba5f3	500	}
syundo0730	0:78ba160ba5f3	501	/** Set zero motion detection event acceleration threshold.
syundo0730	0:78ba160ba5f3	502	* @param threshold New zero motion detection acceleration threshold value (LSB = 2mg)
syundo0730	0:78ba160ba5f3	503	* @see getZeroMotionDetectionThreshold()
syundo0730	0:78ba160ba5f3	504	* @see MPU9150_RA_ZRMOT_THR
syundo0730	0:78ba160ba5f3	505	*/
syundo0730	0:78ba160ba5f3	506	void MPU9150::setZeroMotionDetectionThreshold(uint8_t threshold) {
syundo0730	0:78ba160ba5f3	507	I2Cdev::writeByte(devAddr, MPU9150_RA_ZRMOT_THR, threshold);
syundo0730	0:78ba160ba5f3	508	}
syundo0730	0:78ba160ba5f3	509
syundo0730	0:78ba160ba5f3	510	// ZRMOT_DUR register
syundo0730	0:78ba160ba5f3	511
syundo0730	0:78ba160ba5f3	512	/** Get zero motion detection event duration threshold.
syundo0730	0:78ba160ba5f3	513	* This register configures the duration counter threshold for Zero Motion
syundo0730	0:78ba160ba5f3	514	* interrupt generation. The duration counter ticks at 16 Hz, therefore
syundo0730	0:78ba160ba5f3	515	* ZRMOT_DUR has a unit of 1 LSB = 64 ms. The Zero Motion duration counter
syundo0730	0:78ba160ba5f3	516	* increments while the absolute value of the accelerometer measurements are
syundo0730	0:78ba160ba5f3	517	* each less than the detection threshold (Register 33). The Zero Motion
syundo0730	0:78ba160ba5f3	518	* interrupt is triggered when the Zero Motion duration counter reaches the time
syundo0730	0:78ba160ba5f3	519	* count specified in this register.
syundo0730	0:78ba160ba5f3	520	*
syundo0730	0:78ba160ba5f3	521	* For more details on the Zero Motion detection interrupt, see Section 8.4 of
syundo0730	0:78ba160ba5f3	522	* the MPU-6000/MPU-9150 Product Specification document, as well as Registers 56
syundo0730	0:78ba160ba5f3	523	* and 58 of this document.
syundo0730	0:78ba160ba5f3	524	*
syundo0730	0:78ba160ba5f3	525	* @return Current zero motion detection duration threshold value (LSB = 64ms)
syundo0730	0:78ba160ba5f3	526	* @see MPU9150_RA_ZRMOT_DUR
syundo0730	0:78ba160ba5f3	527	*/
syundo0730	0:78ba160ba5f3	528	uint8_t MPU9150::getZeroMotionDetectionDuration() {
syundo0730	0:78ba160ba5f3	529	I2Cdev::readByte(devAddr, MPU9150_RA_ZRMOT_DUR, buffer);
syundo0730	0:78ba160ba5f3	530	return buffer[0];
syundo0730	0:78ba160ba5f3	531	}
syundo0730	0:78ba160ba5f3	532	/** Set zero motion detection event duration threshold.
syundo0730	0:78ba160ba5f3	533	* @param duration New zero motion detection duration threshold value (LSB = 1ms)
syundo0730	0:78ba160ba5f3	534	* @see getZeroMotionDetectionDuration()
syundo0730	0:78ba160ba5f3	535	* @see MPU9150_RA_ZRMOT_DUR
syundo0730	0:78ba160ba5f3	536	*/
syundo0730	0:78ba160ba5f3	537	void MPU9150::setZeroMotionDetectionDuration(uint8_t duration) {
syundo0730	0:78ba160ba5f3	538	I2Cdev::writeByte(devAddr, MPU9150_RA_ZRMOT_DUR, duration);
syundo0730	0:78ba160ba5f3	539	}
syundo0730	0:78ba160ba5f3	540
syundo0730	0:78ba160ba5f3	541	// FIFO_EN register
syundo0730	0:78ba160ba5f3	542
syundo0730	0:78ba160ba5f3	543	/** Get temperature FIFO enabled value.
syundo0730	0:78ba160ba5f3	544	* When set to 1, this bit enables TEMP_OUT_H and TEMP_OUT_L (Registers 65 and
syundo0730	0:78ba160ba5f3	545	* 66) to be written into the FIFO buffer.
syundo0730	0:78ba160ba5f3	546	* @return Current temperature FIFO enabled value
syundo0730	0:78ba160ba5f3	547	* @see MPU9150_RA_FIFO_EN
syundo0730	0:78ba160ba5f3	548	*/
syundo0730	0:78ba160ba5f3	549	bool MPU9150::getTempFIFOEnabled() {
syundo0730	0:78ba160ba5f3	550	I2Cdev::readBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_TEMP_FIFO_EN_BIT, buffer);
syundo0730	0:78ba160ba5f3	551	return buffer[0];
syundo0730	0:78ba160ba5f3	552	}
syundo0730	0:78ba160ba5f3	553	/** Set temperature FIFO enabled value.
syundo0730	0:78ba160ba5f3	554	* @param enabled New temperature FIFO enabled value
syundo0730	0:78ba160ba5f3	555	* @see getTempFIFOEnabled()
syundo0730	0:78ba160ba5f3	556	* @see MPU9150_RA_FIFO_EN
syundo0730	0:78ba160ba5f3	557	*/
syundo0730	0:78ba160ba5f3	558	void MPU9150::setTempFIFOEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	559	I2Cdev::writeBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_TEMP_FIFO_EN_BIT, enabled);
syundo0730	0:78ba160ba5f3	560	}
syundo0730	0:78ba160ba5f3	561	/** Get gyroscope X-axis FIFO enabled value.
syundo0730	0:78ba160ba5f3	562	* When set to 1, this bit enables GYRO_XOUT_H and GYRO_XOUT_L (Registers 67 and
syundo0730	0:78ba160ba5f3	563	* 68) to be written into the FIFO buffer.
syundo0730	0:78ba160ba5f3	564	* @return Current gyroscope X-axis FIFO enabled value
syundo0730	0:78ba160ba5f3	565	* @see MPU9150_RA_FIFO_EN
syundo0730	0:78ba160ba5f3	566	*/
syundo0730	0:78ba160ba5f3	567	bool MPU9150::getXGyroFIFOEnabled() {
syundo0730	0:78ba160ba5f3	568	I2Cdev::readBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_XG_FIFO_EN_BIT, buffer);
syundo0730	0:78ba160ba5f3	569	return buffer[0];
syundo0730	0:78ba160ba5f3	570	}
syundo0730	0:78ba160ba5f3	571	/** Set gyroscope X-axis FIFO enabled value.
syundo0730	0:78ba160ba5f3	572	* @param enabled New gyroscope X-axis FIFO enabled value
syundo0730	0:78ba160ba5f3	573	* @see getXGyroFIFOEnabled()
syundo0730	0:78ba160ba5f3	574	* @see MPU9150_RA_FIFO_EN
syundo0730	0:78ba160ba5f3	575	*/
syundo0730	0:78ba160ba5f3	576	void MPU9150::setXGyroFIFOEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	577	I2Cdev::writeBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_XG_FIFO_EN_BIT, enabled);
syundo0730	0:78ba160ba5f3	578	}
syundo0730	0:78ba160ba5f3	579	/** Get gyroscope Y-axis FIFO enabled value.
syundo0730	0:78ba160ba5f3	580	* When set to 1, this bit enables GYRO_YOUT_H and GYRO_YOUT_L (Registers 69 and
syundo0730	0:78ba160ba5f3	581	* 70) to be written into the FIFO buffer.
syundo0730	0:78ba160ba5f3	582	* @return Current gyroscope Y-axis FIFO enabled value
syundo0730	0:78ba160ba5f3	583	* @see MPU9150_RA_FIFO_EN
syundo0730	0:78ba160ba5f3	584	*/
syundo0730	0:78ba160ba5f3	585	bool MPU9150::getYGyroFIFOEnabled() {
syundo0730	0:78ba160ba5f3	586	I2Cdev::readBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_YG_FIFO_EN_BIT, buffer);
syundo0730	0:78ba160ba5f3	587	return buffer[0];
syundo0730	0:78ba160ba5f3	588	}
syundo0730	0:78ba160ba5f3	589	/** Set gyroscope Y-axis FIFO enabled value.
syundo0730	0:78ba160ba5f3	590	* @param enabled New gyroscope Y-axis FIFO enabled value
syundo0730	0:78ba160ba5f3	591	* @see getYGyroFIFOEnabled()
syundo0730	0:78ba160ba5f3	592	* @see MPU9150_RA_FIFO_EN
syundo0730	0:78ba160ba5f3	593	*/
syundo0730	0:78ba160ba5f3	594	void MPU9150::setYGyroFIFOEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	595	I2Cdev::writeBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_YG_FIFO_EN_BIT, enabled);
syundo0730	0:78ba160ba5f3	596	}
syundo0730	0:78ba160ba5f3	597	/** Get gyroscope Z-axis FIFO enabled value.
syundo0730	0:78ba160ba5f3	598	* When set to 1, this bit enables GYRO_ZOUT_H and GYRO_ZOUT_L (Registers 71 and
syundo0730	0:78ba160ba5f3	599	* 72) to be written into the FIFO buffer.
syundo0730	0:78ba160ba5f3	600	* @return Current gyroscope Z-axis FIFO enabled value
syundo0730	0:78ba160ba5f3	601	* @see MPU9150_RA_FIFO_EN
syundo0730	0:78ba160ba5f3	602	*/
syundo0730	0:78ba160ba5f3	603	bool MPU9150::getZGyroFIFOEnabled() {
syundo0730	0:78ba160ba5f3	604	I2Cdev::readBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_ZG_FIFO_EN_BIT, buffer);
syundo0730	0:78ba160ba5f3	605	return buffer[0];
syundo0730	0:78ba160ba5f3	606	}
syundo0730	0:78ba160ba5f3	607	/** Set gyroscope Z-axis FIFO enabled value.
syundo0730	0:78ba160ba5f3	608	* @param enabled New gyroscope Z-axis FIFO enabled value
syundo0730	0:78ba160ba5f3	609	* @see getZGyroFIFOEnabled()
syundo0730	0:78ba160ba5f3	610	* @see MPU9150_RA_FIFO_EN
syundo0730	0:78ba160ba5f3	611	*/
syundo0730	0:78ba160ba5f3	612	void MPU9150::setZGyroFIFOEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	613	I2Cdev::writeBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_ZG_FIFO_EN_BIT, enabled);
syundo0730	0:78ba160ba5f3	614	}
syundo0730	0:78ba160ba5f3	615	/** Get accelerometer FIFO enabled value.
syundo0730	0:78ba160ba5f3	616	* When set to 1, this bit enables ACCEL_XOUT_H, ACCEL_XOUT_L, ACCEL_YOUT_H,
syundo0730	0:78ba160ba5f3	617	* ACCEL_YOUT_L, ACCEL_ZOUT_H, and ACCEL_ZOUT_L (Registers 59 to 64) to be
syundo0730	0:78ba160ba5f3	618	* written into the FIFO buffer.
syundo0730	0:78ba160ba5f3	619	* @return Current accelerometer FIFO enabled value
syundo0730	0:78ba160ba5f3	620	* @see MPU9150_RA_FIFO_EN
syundo0730	0:78ba160ba5f3	621	*/
syundo0730	0:78ba160ba5f3	622	bool MPU9150::getAccelFIFOEnabled() {
syundo0730	0:78ba160ba5f3	623	I2Cdev::readBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_ACCEL_FIFO_EN_BIT, buffer);
syundo0730	0:78ba160ba5f3	624	return buffer[0];
syundo0730	0:78ba160ba5f3	625	}
syundo0730	0:78ba160ba5f3	626	/** Set accelerometer FIFO enabled value.
syundo0730	0:78ba160ba5f3	627	* @param enabled New accelerometer FIFO enabled value
syundo0730	0:78ba160ba5f3	628	* @see getAccelFIFOEnabled()
syundo0730	0:78ba160ba5f3	629	* @see MPU9150_RA_FIFO_EN
syundo0730	0:78ba160ba5f3	630	*/
syundo0730	0:78ba160ba5f3	631	void MPU9150::setAccelFIFOEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	632	I2Cdev::writeBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_ACCEL_FIFO_EN_BIT, enabled);
syundo0730	0:78ba160ba5f3	633	}
syundo0730	0:78ba160ba5f3	634	/** Get Slave 2 FIFO enabled value.
syundo0730	0:78ba160ba5f3	635	* When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96)
syundo0730	0:78ba160ba5f3	636	* associated with Slave 2 to be written into the FIFO buffer.
syundo0730	0:78ba160ba5f3	637	* @return Current Slave 2 FIFO enabled value
syundo0730	0:78ba160ba5f3	638	* @see MPU9150_RA_FIFO_EN
syundo0730	0:78ba160ba5f3	639	*/
syundo0730	0:78ba160ba5f3	640	bool MPU9150::getSlave2FIFOEnabled() {
syundo0730	0:78ba160ba5f3	641	I2Cdev::readBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_SLV2_FIFO_EN_BIT, buffer);
syundo0730	0:78ba160ba5f3	642	return buffer[0];
syundo0730	0:78ba160ba5f3	643	}
syundo0730	0:78ba160ba5f3	644	/** Set Slave 2 FIFO enabled value.
syundo0730	0:78ba160ba5f3	645	* @param enabled New Slave 2 FIFO enabled value
syundo0730	0:78ba160ba5f3	646	* @see getSlave2FIFOEnabled()
syundo0730	0:78ba160ba5f3	647	* @see MPU9150_RA_FIFO_EN
syundo0730	0:78ba160ba5f3	648	*/
syundo0730	0:78ba160ba5f3	649	void MPU9150::setSlave2FIFOEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	650	I2Cdev::writeBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_SLV2_FIFO_EN_BIT, enabled);
syundo0730	0:78ba160ba5f3	651	}
syundo0730	0:78ba160ba5f3	652	/** Get Slave 1 FIFO enabled value.
syundo0730	0:78ba160ba5f3	653	* When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96)
syundo0730	0:78ba160ba5f3	654	* associated with Slave 1 to be written into the FIFO buffer.
syundo0730	0:78ba160ba5f3	655	* @return Current Slave 1 FIFO enabled value
syundo0730	0:78ba160ba5f3	656	* @see MPU9150_RA_FIFO_EN
syundo0730	0:78ba160ba5f3	657	*/
syundo0730	0:78ba160ba5f3	658	bool MPU9150::getSlave1FIFOEnabled() {
syundo0730	0:78ba160ba5f3	659	I2Cdev::readBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_SLV1_FIFO_EN_BIT, buffer);
syundo0730	0:78ba160ba5f3	660	return buffer[0];
syundo0730	0:78ba160ba5f3	661	}
syundo0730	0:78ba160ba5f3	662	/** Set Slave 1 FIFO enabled value.
syundo0730	0:78ba160ba5f3	663	* @param enabled New Slave 1 FIFO enabled value
syundo0730	0:78ba160ba5f3	664	* @see getSlave1FIFOEnabled()
syundo0730	0:78ba160ba5f3	665	* @see MPU9150_RA_FIFO_EN
syundo0730	0:78ba160ba5f3	666	*/
syundo0730	0:78ba160ba5f3	667	void MPU9150::setSlave1FIFOEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	668	I2Cdev::writeBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_SLV1_FIFO_EN_BIT, enabled);
syundo0730	0:78ba160ba5f3	669	}
syundo0730	0:78ba160ba5f3	670	/** Get Slave 0 FIFO enabled value.
syundo0730	0:78ba160ba5f3	671	* When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96)
syundo0730	0:78ba160ba5f3	672	* associated with Slave 0 to be written into the FIFO buffer.
syundo0730	0:78ba160ba5f3	673	* @return Current Slave 0 FIFO enabled value
syundo0730	0:78ba160ba5f3	674	* @see MPU9150_RA_FIFO_EN
syundo0730	0:78ba160ba5f3	675	*/
syundo0730	0:78ba160ba5f3	676	bool MPU9150::getSlave0FIFOEnabled() {
syundo0730	0:78ba160ba5f3	677	I2Cdev::readBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_SLV0_FIFO_EN_BIT, buffer);
syundo0730	0:78ba160ba5f3	678	return buffer[0];
syundo0730	0:78ba160ba5f3	679	}
syundo0730	0:78ba160ba5f3	680	/** Set Slave 0 FIFO enabled value.
syundo0730	0:78ba160ba5f3	681	* @param enabled New Slave 0 FIFO enabled value
syundo0730	0:78ba160ba5f3	682	* @see getSlave0FIFOEnabled()
syundo0730	0:78ba160ba5f3	683	* @see MPU9150_RA_FIFO_EN
syundo0730	0:78ba160ba5f3	684	*/
syundo0730	0:78ba160ba5f3	685	void MPU9150::setSlave0FIFOEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	686	I2Cdev::writeBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_SLV0_FIFO_EN_BIT, enabled);
syundo0730	0:78ba160ba5f3	687	}
syundo0730	0:78ba160ba5f3	688
syundo0730	0:78ba160ba5f3	689	// I2C_MST_CTRL register
syundo0730	0:78ba160ba5f3	690
syundo0730	0:78ba160ba5f3	691	/** Get multi-master enabled value.
syundo0730	0:78ba160ba5f3	692	* Multi-master capability allows multiple I2C masters to operate on the same
syundo0730	0:78ba160ba5f3	693	* bus. In circuits where multi-master capability is required, set MULT_MST_EN
syundo0730	0:78ba160ba5f3	694	* to 1. This will increase current drawn by approximately 30uA.
syundo0730	0:78ba160ba5f3	695	*
syundo0730	0:78ba160ba5f3	696	* In circuits where multi-master capability is required, the state of the I2C
syundo0730	0:78ba160ba5f3	697	* bus must always be monitored by each separate I2C Master. Before an I2C
syundo0730	0:78ba160ba5f3	698	* Master can assume arbitration of the bus, it must first confirm that no other
syundo0730	0:78ba160ba5f3	699	* I2C Master has arbitration of the bus. When MULT_MST_EN is set to 1, the
syundo0730	0:78ba160ba5f3	700	* MPU-60X0's bus arbitration detection logic is turned on, enabling it to
syundo0730	0:78ba160ba5f3	701	* detect when the bus is available.
syundo0730	0:78ba160ba5f3	702	*
syundo0730	0:78ba160ba5f3	703	* @return Current multi-master enabled value
syundo0730	0:78ba160ba5f3	704	* @see MPU9150_RA_I2C_MST_CTRL
syundo0730	0:78ba160ba5f3	705	*/
syundo0730	0:78ba160ba5f3	706	bool MPU9150::getMultiMasterEnabled() {
syundo0730	0:78ba160ba5f3	707	I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_CTRL, MPU9150_MULT_MST_EN_BIT, buffer);
syundo0730	0:78ba160ba5f3	708	return buffer[0];
syundo0730	0:78ba160ba5f3	709	}
syundo0730	0:78ba160ba5f3	710	/** Set multi-master enabled value.
syundo0730	0:78ba160ba5f3	711	* @param enabled New multi-master enabled value
syundo0730	0:78ba160ba5f3	712	* @see getMultiMasterEnabled()
syundo0730	0:78ba160ba5f3	713	* @see MPU9150_RA_I2C_MST_CTRL
syundo0730	0:78ba160ba5f3	714	*/
syundo0730	0:78ba160ba5f3	715	void MPU9150::setMultiMasterEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	716	I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_MST_CTRL, MPU9150_MULT_MST_EN_BIT, enabled);
syundo0730	0:78ba160ba5f3	717	}
syundo0730	0:78ba160ba5f3	718	/** Get wait-for-external-sensor-data enabled value.
syundo0730	0:78ba160ba5f3	719	* When the WAIT_FOR_ES bit is set to 1, the Data Ready interrupt will be
syundo0730	0:78ba160ba5f3	720	* delayed until External Sensor data from the Slave Devices are loaded into the
syundo0730	0:78ba160ba5f3	721	* EXT_SENS_DATA registers. This is used to ensure that both the internal sensor
syundo0730	0:78ba160ba5f3	722	* data (i.e. from gyro and accel) and external sensor data have been loaded to
syundo0730	0:78ba160ba5f3	723	* their respective data registers (i.e. the data is synced) when the Data Ready
syundo0730	0:78ba160ba5f3	724	* interrupt is triggered.
syundo0730	0:78ba160ba5f3	725	*
syundo0730	0:78ba160ba5f3	726	* @return Current wait-for-external-sensor-data enabled value
syundo0730	0:78ba160ba5f3	727	* @see MPU9150_RA_I2C_MST_CTRL
syundo0730	0:78ba160ba5f3	728	*/
syundo0730	0:78ba160ba5f3	729	bool MPU9150::getWaitForExternalSensorEnabled() {
syundo0730	0:78ba160ba5f3	730	I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_CTRL, MPU9150_WAIT_FOR_ES_BIT, buffer);
syundo0730	0:78ba160ba5f3	731	return buffer[0];
syundo0730	0:78ba160ba5f3	732	}
syundo0730	0:78ba160ba5f3	733	/** Set wait-for-external-sensor-data enabled value.
syundo0730	0:78ba160ba5f3	734	* @param enabled New wait-for-external-sensor-data enabled value
syundo0730	0:78ba160ba5f3	735	* @see getWaitForExternalSensorEnabled()
syundo0730	0:78ba160ba5f3	736	* @see MPU9150_RA_I2C_MST_CTRL
syundo0730	0:78ba160ba5f3	737	*/
syundo0730	0:78ba160ba5f3	738	void MPU9150::setWaitForExternalSensorEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	739	I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_MST_CTRL, MPU9150_WAIT_FOR_ES_BIT, enabled);
syundo0730	0:78ba160ba5f3	740	}
syundo0730	0:78ba160ba5f3	741	/** Get Slave 3 FIFO enabled value.
syundo0730	0:78ba160ba5f3	742	* When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96)
syundo0730	0:78ba160ba5f3	743	* associated with Slave 3 to be written into the FIFO buffer.
syundo0730	0:78ba160ba5f3	744	* @return Current Slave 3 FIFO enabled value
syundo0730	0:78ba160ba5f3	745	* @see MPU9150_RA_MST_CTRL
syundo0730	0:78ba160ba5f3	746	*/
syundo0730	0:78ba160ba5f3	747	bool MPU9150::getSlave3FIFOEnabled() {
syundo0730	0:78ba160ba5f3	748	I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_CTRL, MPU9150_SLV_3_FIFO_EN_BIT, buffer);
syundo0730	0:78ba160ba5f3	749	return buffer[0];
syundo0730	0:78ba160ba5f3	750	}
syundo0730	0:78ba160ba5f3	751	/** Set Slave 3 FIFO enabled value.
syundo0730	0:78ba160ba5f3	752	* @param enabled New Slave 3 FIFO enabled value
syundo0730	0:78ba160ba5f3	753	* @see getSlave3FIFOEnabled()
syundo0730	0:78ba160ba5f3	754	* @see MPU9150_RA_MST_CTRL
syundo0730	0:78ba160ba5f3	755	*/
syundo0730	0:78ba160ba5f3	756	void MPU9150::setSlave3FIFOEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	757	I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_MST_CTRL, MPU9150_SLV_3_FIFO_EN_BIT, enabled);
syundo0730	0:78ba160ba5f3	758	}
syundo0730	0:78ba160ba5f3	759	/** Get slave read/write transition enabled value.
syundo0730	0:78ba160ba5f3	760	* The I2C_MST_P_NSR bit configures the I2C Master's transition from one slave
syundo0730	0:78ba160ba5f3	761	* read to the next slave read. If the bit equals 0, there will be a restart
syundo0730	0:78ba160ba5f3	762	* between reads. If the bit equals 1, there will be a stop followed by a start
syundo0730	0:78ba160ba5f3	763	* of the following read. When a write transaction follows a read transaction,
syundo0730	0:78ba160ba5f3	764	* the stop followed by a start of the successive write will be always used.
syundo0730	0:78ba160ba5f3	765	*
syundo0730	0:78ba160ba5f3	766	* @return Current slave read/write transition enabled value
syundo0730	0:78ba160ba5f3	767	* @see MPU9150_RA_I2C_MST_CTRL
syundo0730	0:78ba160ba5f3	768	*/
syundo0730	0:78ba160ba5f3	769	bool MPU9150::getSlaveReadWriteTransitionEnabled() {
syundo0730	0:78ba160ba5f3	770	I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_CTRL, MPU9150_I2C_MST_P_NSR_BIT, buffer);
syundo0730	0:78ba160ba5f3	771	return buffer[0];
syundo0730	0:78ba160ba5f3	772	}
syundo0730	0:78ba160ba5f3	773	/** Set slave read/write transition enabled value.
syundo0730	0:78ba160ba5f3	774	* @param enabled New slave read/write transition enabled value
syundo0730	0:78ba160ba5f3	775	* @see getSlaveReadWriteTransitionEnabled()
syundo0730	0:78ba160ba5f3	776	* @see MPU9150_RA_I2C_MST_CTRL
syundo0730	0:78ba160ba5f3	777	*/
syundo0730	0:78ba160ba5f3	778	void MPU9150::setSlaveReadWriteTransitionEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	779	I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_MST_CTRL, MPU9150_I2C_MST_P_NSR_BIT, enabled);
syundo0730	0:78ba160ba5f3	780	}
syundo0730	0:78ba160ba5f3	781	/** Get I2C master clock speed.
syundo0730	0:78ba160ba5f3	782	* I2C_MST_CLK is a 4 bit unsigned value which configures a divider on the
syundo0730	0:78ba160ba5f3	783	* MPU-60X0 internal 8MHz clock. It sets the I2C master clock speed according to
syundo0730	0:78ba160ba5f3	784	* the following table:
syundo0730	0:78ba160ba5f3	785	*
syundo0730	0:78ba160ba5f3	786	* <pre>
syundo0730	0:78ba160ba5f3	787	* I2C_MST_CLK \| I2C Master Clock Speed \| 8MHz Clock Divider
syundo0730	0:78ba160ba5f3	788	* ------------+------------------------+-------------------
syundo0730	0:78ba160ba5f3	789	* 0 \| 348kHz \| 23
syundo0730	0:78ba160ba5f3	790	* 1 \| 333kHz \| 24
syundo0730	0:78ba160ba5f3	791	* 2 \| 320kHz \| 25
syundo0730	0:78ba160ba5f3	792	* 3 \| 308kHz \| 26
syundo0730	0:78ba160ba5f3	793	* 4 \| 296kHz \| 27
syundo0730	0:78ba160ba5f3	794	* 5 \| 286kHz \| 28
syundo0730	0:78ba160ba5f3	795	* 6 \| 276kHz \| 29
syundo0730	0:78ba160ba5f3	796	* 7 \| 267kHz \| 30
syundo0730	0:78ba160ba5f3	797	* 8 \| 258kHz \| 31
syundo0730	0:78ba160ba5f3	798	* 9 \| 500kHz \| 16
syundo0730	0:78ba160ba5f3	799	* 10 \| 471kHz \| 17
syundo0730	0:78ba160ba5f3	800	* 11 \| 444kHz \| 18
syundo0730	0:78ba160ba5f3	801	* 12 \| 421kHz \| 19
syundo0730	0:78ba160ba5f3	802	* 13 \| 400kHz \| 20
syundo0730	0:78ba160ba5f3	803	* 14 \| 381kHz \| 21
syundo0730	0:78ba160ba5f3	804	* 15 \| 364kHz \| 22
syundo0730	0:78ba160ba5f3	805	* </pre>
syundo0730	0:78ba160ba5f3	806	*
syundo0730	0:78ba160ba5f3	807	* @return Current I2C master clock speed
syundo0730	0:78ba160ba5f3	808	* @see MPU9150_RA_I2C_MST_CTRL
syundo0730	0:78ba160ba5f3	809	*/
syundo0730	0:78ba160ba5f3	810	uint8_t MPU9150::getMasterClockSpeed() {
syundo0730	0:78ba160ba5f3	811	I2Cdev::readBits(devAddr, MPU9150_RA_I2C_MST_CTRL, MPU9150_I2C_MST_CLK_BIT, MPU9150_I2C_MST_CLK_LENGTH, buffer);
syundo0730	0:78ba160ba5f3	812	return buffer[0];
syundo0730	0:78ba160ba5f3	813	}
syundo0730	0:78ba160ba5f3	814	/** Set I2C master clock speed.
syundo0730	0:78ba160ba5f3	815	* @reparam speed Current I2C master clock speed
syundo0730	0:78ba160ba5f3	816	* @see MPU9150_RA_I2C_MST_CTRL
syundo0730	0:78ba160ba5f3	817	*/
syundo0730	0:78ba160ba5f3	818	void MPU9150::setMasterClockSpeed(uint8_t speed) {
syundo0730	0:78ba160ba5f3	819	I2Cdev::writeBits(devAddr, MPU9150_RA_I2C_MST_CTRL, MPU9150_I2C_MST_CLK_BIT, MPU9150_I2C_MST_CLK_LENGTH, speed);
syundo0730	0:78ba160ba5f3	820	}
syundo0730	0:78ba160ba5f3	821
syundo0730	0:78ba160ba5f3	822	// I2C_SLV* registers (Slave 0-3)
syundo0730	0:78ba160ba5f3	823
syundo0730	0:78ba160ba5f3	824	/** Get the I2C address of the specified slave (0-3).
syundo0730	0:78ba160ba5f3	825	* Note that Bit 7 (MSB) controls read/write mode. If Bit 7 is set, it's a read
syundo0730	0:78ba160ba5f3	826	* operation, and if it is cleared, then it's a write operation. The remaining
syundo0730	0:78ba160ba5f3	827	* bits (6-0) are the 7-bit device address of the slave device.
syundo0730	0:78ba160ba5f3	828	*
syundo0730	0:78ba160ba5f3	829	* In read mode, the result of the read is placed in the lowest available
syundo0730	0:78ba160ba5f3	830	* EXT_SENS_DATA register. For further information regarding the allocation of
syundo0730	0:78ba160ba5f3	831	* read results, please refer to the EXT_SENS_DATA register description
syundo0730	0:78ba160ba5f3	832	* (Registers 73 - 96).
syundo0730	0:78ba160ba5f3	833	*
syundo0730	0:78ba160ba5f3	834	* The MPU-9150 supports a total of five slaves, but Slave 4 has unique
syundo0730	0:78ba160ba5f3	835	* characteristics, and so it has its own functions (getSlave4* and setSlave4*).
syundo0730	0:78ba160ba5f3	836	*
syundo0730	0:78ba160ba5f3	837	* I2C data transactions are performed at the Sample Rate, as defined in
syundo0730	0:78ba160ba5f3	838	* Register 25. The user is responsible for ensuring that I2C data transactions
syundo0730	0:78ba160ba5f3	839	* to and from each enabled Slave can be completed within a single period of the
syundo0730	0:78ba160ba5f3	840	* Sample Rate.
syundo0730	0:78ba160ba5f3	841	*
syundo0730	0:78ba160ba5f3	842	* The I2C slave access rate can be reduced relative to the Sample Rate. This
syundo0730	0:78ba160ba5f3	843	* reduced access rate is determined by I2C_MST_DLY (Register 52). Whether a
syundo0730	0:78ba160ba5f3	844	* slave's access rate is reduced relative to the Sample Rate is determined by
syundo0730	0:78ba160ba5f3	845	* I2C_MST_DELAY_CTRL (Register 103).
syundo0730	0:78ba160ba5f3	846	*
syundo0730	0:78ba160ba5f3	847	* The processing order for the slaves is fixed. The sequence followed for
syundo0730	0:78ba160ba5f3	848	* processing the slaves is Slave 0, Slave 1, Slave 2, Slave 3 and Slave 4. If a
syundo0730	0:78ba160ba5f3	849	* particular Slave is disabled it will be skipped.
syundo0730	0:78ba160ba5f3	850	*
syundo0730	0:78ba160ba5f3	851	* Each slave can either be accessed at the sample rate or at a reduced sample
syundo0730	0:78ba160ba5f3	852	* rate. In a case where some slaves are accessed at the Sample Rate and some
syundo0730	0:78ba160ba5f3	853	* slaves are accessed at the reduced rate, the sequence of accessing the slaves
syundo0730	0:78ba160ba5f3	854	* (Slave 0 to Slave 4) is still followed. However, the reduced rate slaves will
syundo0730	0:78ba160ba5f3	855	* be skipped if their access rate dictates that they should not be accessed
syundo0730	0:78ba160ba5f3	856	* during that particular cycle. For further information regarding the reduced
syundo0730	0:78ba160ba5f3	857	* access rate, please refer to Register 52. Whether a slave is accessed at the
syundo0730	0:78ba160ba5f3	858	* Sample Rate or at the reduced rate is determined by the Delay Enable bits in
syundo0730	0:78ba160ba5f3	859	* Register 103.
syundo0730	0:78ba160ba5f3	860	*
syundo0730	0:78ba160ba5f3	861	* @param num Slave number (0-3)
syundo0730	0:78ba160ba5f3	862	* @return Current address for specified slave
syundo0730	0:78ba160ba5f3	863	* @see MPU9150_RA_I2C_SLV0_ADDR
syundo0730	0:78ba160ba5f3	864	*/
syundo0730	0:78ba160ba5f3	865	uint8_t MPU9150::getSlaveAddress(uint8_t num) {
syundo0730	0:78ba160ba5f3	866	if (num > 3) return 0;
syundo0730	0:78ba160ba5f3	867	I2Cdev::readByte(devAddr, MPU9150_RA_I2C_SLV0_ADDR + num*3, buffer);
syundo0730	0:78ba160ba5f3	868	return buffer[0];
syundo0730	0:78ba160ba5f3	869	}
syundo0730	0:78ba160ba5f3	870	/** Set the I2C address of the specified slave (0-3).
syundo0730	0:78ba160ba5f3	871	* @param num Slave number (0-3)
syundo0730	0:78ba160ba5f3	872	* @param address New address for specified slave
syundo0730	0:78ba160ba5f3	873	* @see getSlaveAddress()
syundo0730	0:78ba160ba5f3	874	* @see MPU9150_RA_I2C_SLV0_ADDR
syundo0730	0:78ba160ba5f3	875	*/
syundo0730	0:78ba160ba5f3	876	void MPU9150::setSlaveAddress(uint8_t num, uint8_t address) {
syundo0730	0:78ba160ba5f3	877	if (num > 3) return;
syundo0730	0:78ba160ba5f3	878	I2Cdev::writeByte(devAddr, MPU9150_RA_I2C_SLV0_ADDR + num*3, address);
syundo0730	0:78ba160ba5f3	879	}
syundo0730	0:78ba160ba5f3	880	/** Get the active internal register for the specified slave (0-3).
syundo0730	0:78ba160ba5f3	881	* Read/write operations for this slave will be done to whatever internal
syundo0730	0:78ba160ba5f3	882	* register address is stored in this MPU register.
syundo0730	0:78ba160ba5f3	883	*
syundo0730	0:78ba160ba5f3	884	* The MPU-9150 supports a total of five slaves, but Slave 4 has unique
syundo0730	0:78ba160ba5f3	885	* characteristics, and so it has its own functions.
syundo0730	0:78ba160ba5f3	886	*
syundo0730	0:78ba160ba5f3	887	* @param num Slave number (0-3)
syundo0730	0:78ba160ba5f3	888	* @return Current active register for specified slave
syundo0730	0:78ba160ba5f3	889	* @see MPU9150_RA_I2C_SLV0_REG
syundo0730	0:78ba160ba5f3	890	*/
syundo0730	0:78ba160ba5f3	891	uint8_t MPU9150::getSlaveRegister(uint8_t num) {
syundo0730	0:78ba160ba5f3	892	if (num > 3) return 0;
syundo0730	0:78ba160ba5f3	893	I2Cdev::readByte(devAddr, MPU9150_RA_I2C_SLV0_REG + num*3, buffer);
syundo0730	0:78ba160ba5f3	894	return buffer[0];
syundo0730	0:78ba160ba5f3	895	}
syundo0730	0:78ba160ba5f3	896	/** Set the active internal register for the specified slave (0-3).
syundo0730	0:78ba160ba5f3	897	* @param num Slave number (0-3)
syundo0730	0:78ba160ba5f3	898	* @param reg New active register for specified slave
syundo0730	0:78ba160ba5f3	899	* @see getSlaveRegister()
syundo0730	0:78ba160ba5f3	900	* @see MPU9150_RA_I2C_SLV0_REG
syundo0730	0:78ba160ba5f3	901	*/
syundo0730	0:78ba160ba5f3	902	void MPU9150::setSlaveRegister(uint8_t num, uint8_t reg) {
syundo0730	0:78ba160ba5f3	903	if (num > 3) return;
syundo0730	0:78ba160ba5f3	904	I2Cdev::writeByte(devAddr, MPU9150_RA_I2C_SLV0_REG + num*3, reg);
syundo0730	0:78ba160ba5f3	905	}
syundo0730	0:78ba160ba5f3	906	/** Get the enabled value for the specified slave (0-3).
syundo0730	0:78ba160ba5f3	907	* When set to 1, this bit enables Slave 0 for data transfer operations. When
syundo0730	0:78ba160ba5f3	908	* cleared to 0, this bit disables Slave 0 from data transfer operations.
syundo0730	0:78ba160ba5f3	909	* @param num Slave number (0-3)
syundo0730	0:78ba160ba5f3	910	* @return Current enabled value for specified slave
syundo0730	0:78ba160ba5f3	911	* @see MPU9150_RA_I2C_SLV0_CTRL
syundo0730	0:78ba160ba5f3	912	*/
syundo0730	0:78ba160ba5f3	913	bool MPU9150::getSlaveEnabled(uint8_t num) {
syundo0730	0:78ba160ba5f3	914	if (num > 3) return 0;
syundo0730	0:78ba160ba5f3	915	I2Cdev::readBit(devAddr, MPU9150_RA_I2C_SLV0_CTRL + num*3, MPU9150_I2C_SLV_EN_BIT, buffer);
syundo0730	0:78ba160ba5f3	916	return buffer[0];
syundo0730	0:78ba160ba5f3	917	}
syundo0730	0:78ba160ba5f3	918	/** Set the enabled value for the specified slave (0-3).
syundo0730	0:78ba160ba5f3	919	* @param num Slave number (0-3)
syundo0730	0:78ba160ba5f3	920	* @param enabled New enabled value for specified slave
syundo0730	0:78ba160ba5f3	921	* @see getSlaveEnabled()
syundo0730	0:78ba160ba5f3	922	* @see MPU9150_RA_I2C_SLV0_CTRL
syundo0730	0:78ba160ba5f3	923	*/
syundo0730	0:78ba160ba5f3	924	void MPU9150::setSlaveEnabled(uint8_t num, bool enabled) {
syundo0730	0:78ba160ba5f3	925	if (num > 3) return;
syundo0730	0:78ba160ba5f3	926	I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_SLV0_CTRL + num*3, MPU9150_I2C_SLV_EN_BIT, enabled);
syundo0730	0:78ba160ba5f3	927	}
syundo0730	0:78ba160ba5f3	928	/** Get word pair byte-swapping enabled for the specified slave (0-3).
syundo0730	0:78ba160ba5f3	929	* When set to 1, this bit enables byte swapping. When byte swapping is enabled,
syundo0730	0:78ba160ba5f3	930	* the high and low bytes of a word pair are swapped. Please refer to
syundo0730	0:78ba160ba5f3	931	* I2C_SLV0_GRP for the pairing convention of the word pairs. When cleared to 0,
syundo0730	0:78ba160ba5f3	932	* bytes transferred to and from Slave 0 will be written to EXT_SENS_DATA
syundo0730	0:78ba160ba5f3	933	* registers in the order they were transferred.
syundo0730	0:78ba160ba5f3	934	*
syundo0730	0:78ba160ba5f3	935	* @param num Slave number (0-3)
syundo0730	0:78ba160ba5f3	936	* @return Current word pair byte-swapping enabled value for specified slave
syundo0730	0:78ba160ba5f3	937	* @see MPU9150_RA_I2C_SLV0_CTRL
syundo0730	0:78ba160ba5f3	938	*/
syundo0730	0:78ba160ba5f3	939	bool MPU9150::getSlaveWordByteSwap(uint8_t num) {
syundo0730	0:78ba160ba5f3	940	if (num > 3) return 0;
syundo0730	0:78ba160ba5f3	941	I2Cdev::readBit(devAddr, MPU9150_RA_I2C_SLV0_CTRL + num*3, MPU9150_I2C_SLV_BYTE_SW_BIT, buffer);
syundo0730	0:78ba160ba5f3	942	return buffer[0];
syundo0730	0:78ba160ba5f3	943	}
syundo0730	0:78ba160ba5f3	944	/** Set word pair byte-swapping enabled for the specified slave (0-3).
syundo0730	0:78ba160ba5f3	945	* @param num Slave number (0-3)
syundo0730	0:78ba160ba5f3	946	* @param enabled New word pair byte-swapping enabled value for specified slave
syundo0730	0:78ba160ba5f3	947	* @see getSlaveWordByteSwap()
syundo0730	0:78ba160ba5f3	948	* @see MPU9150_RA_I2C_SLV0_CTRL
syundo0730	0:78ba160ba5f3	949	*/
syundo0730	0:78ba160ba5f3	950	void MPU9150::setSlaveWordByteSwap(uint8_t num, bool enabled) {
syundo0730	0:78ba160ba5f3	951	if (num > 3) return;
syundo0730	0:78ba160ba5f3	952	I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_SLV0_CTRL + num*3, MPU9150_I2C_SLV_BYTE_SW_BIT, enabled);
syundo0730	0:78ba160ba5f3	953	}
syundo0730	0:78ba160ba5f3	954	/** Get write mode for the specified slave (0-3).
syundo0730	0:78ba160ba5f3	955	* When set to 1, the transaction will read or write data only. When cleared to
syundo0730	0:78ba160ba5f3	956	* 0, the transaction will write a register address prior to reading or writing
syundo0730	0:78ba160ba5f3	957	* data. This should equal 0 when specifying the register address within the
syundo0730	0:78ba160ba5f3	958	* Slave device to/from which the ensuing data transaction will take place.
syundo0730	0:78ba160ba5f3	959	*
syundo0730	0:78ba160ba5f3	960	* @param num Slave number (0-3)
syundo0730	0:78ba160ba5f3	961	* @return Current write mode for specified slave (0 = register address + data, 1 = data only)
syundo0730	0:78ba160ba5f3	962	* @see MPU9150_RA_I2C_SLV0_CTRL
syundo0730	0:78ba160ba5f3	963	*/
syundo0730	0:78ba160ba5f3	964	bool MPU9150::getSlaveWriteMode(uint8_t num) {
syundo0730	0:78ba160ba5f3	965	if (num > 3) return 0;
syundo0730	0:78ba160ba5f3	966	I2Cdev::readBit(devAddr, MPU9150_RA_I2C_SLV0_CTRL + num*3, MPU9150_I2C_SLV_REG_DIS_BIT, buffer);
syundo0730	0:78ba160ba5f3	967	return buffer[0];
syundo0730	0:78ba160ba5f3	968	}
syundo0730	0:78ba160ba5f3	969	/** Set write mode for the specified slave (0-3).
syundo0730	0:78ba160ba5f3	970	* @param num Slave number (0-3)
syundo0730	0:78ba160ba5f3	971	* @param mode New write mode for specified slave (0 = register address + data, 1 = data only)
syundo0730	0:78ba160ba5f3	972	* @see getSlaveWriteMode()
syundo0730	0:78ba160ba5f3	973	* @see MPU9150_RA_I2C_SLV0_CTRL
syundo0730	0:78ba160ba5f3	974	*/
syundo0730	0:78ba160ba5f3	975	void MPU9150::setSlaveWriteMode(uint8_t num, bool mode) {
syundo0730	0:78ba160ba5f3	976	if (num > 3) return;
syundo0730	0:78ba160ba5f3	977	I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_SLV0_CTRL + num*3, MPU9150_I2C_SLV_REG_DIS_BIT, mode);
syundo0730	0:78ba160ba5f3	978	}
syundo0730	0:78ba160ba5f3	979	/** Get word pair grouping order offset for the specified slave (0-3).
syundo0730	0:78ba160ba5f3	980	* This sets specifies the grouping order of word pairs received from registers.
syundo0730	0:78ba160ba5f3	981	* When cleared to 0, bytes from register addresses 0 and 1, 2 and 3, etc (even,
syundo0730	0:78ba160ba5f3	982	* then odd register addresses) are paired to form a word. When set to 1, bytes
syundo0730	0:78ba160ba5f3	983	* from register addresses are paired 1 and 2, 3 and 4, etc. (odd, then even
syundo0730	0:78ba160ba5f3	984	* register addresses) are paired to form a word.
syundo0730	0:78ba160ba5f3	985	*
syundo0730	0:78ba160ba5f3	986	* @param num Slave number (0-3)
syundo0730	0:78ba160ba5f3	987	* @return Current word pair grouping order offset for specified slave
syundo0730	0:78ba160ba5f3	988	* @see MPU9150_RA_I2C_SLV0_CTRL
syundo0730	0:78ba160ba5f3	989	*/
syundo0730	0:78ba160ba5f3	990	bool MPU9150::getSlaveWordGroupOffset(uint8_t num) {
syundo0730	0:78ba160ba5f3	991	if (num > 3) return 0;
syundo0730	0:78ba160ba5f3	992	I2Cdev::readBit(devAddr, MPU9150_RA_I2C_SLV0_CTRL + num*3, MPU9150_I2C_SLV_GRP_BIT, buffer);
syundo0730	0:78ba160ba5f3	993	return buffer[0];
syundo0730	0:78ba160ba5f3	994	}
syundo0730	0:78ba160ba5f3	995	/** Set word pair grouping order offset for the specified slave (0-3).
syundo0730	0:78ba160ba5f3	996	* @param num Slave number (0-3)
syundo0730	0:78ba160ba5f3	997	* @param enabled New word pair grouping order offset for specified slave
syundo0730	0:78ba160ba5f3	998	* @see getSlaveWordGroupOffset()
syundo0730	0:78ba160ba5f3	999	* @see MPU9150_RA_I2C_SLV0_CTRL
syundo0730	0:78ba160ba5f3	1000	*/
syundo0730	0:78ba160ba5f3	1001	void MPU9150::setSlaveWordGroupOffset(uint8_t num, bool enabled) {
syundo0730	0:78ba160ba5f3	1002	if (num > 3) return;
syundo0730	0:78ba160ba5f3	1003	I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_SLV0_CTRL + num*3, MPU9150_I2C_SLV_GRP_BIT, enabled);
syundo0730	0:78ba160ba5f3	1004	}
syundo0730	0:78ba160ba5f3	1005	/** Get number of bytes to read for the specified slave (0-3).
syundo0730	0:78ba160ba5f3	1006	* Specifies the number of bytes transferred to and from Slave 0. Clearing this
syundo0730	0:78ba160ba5f3	1007	* bit to 0 is equivalent to disabling the register by writing 0 to I2C_SLV0_EN.
syundo0730	0:78ba160ba5f3	1008	* @param num Slave number (0-3)
syundo0730	0:78ba160ba5f3	1009	* @return Number of bytes to read for specified slave
syundo0730	0:78ba160ba5f3	1010	* @see MPU9150_RA_I2C_SLV0_CTRL
syundo0730	0:78ba160ba5f3	1011	*/
syundo0730	0:78ba160ba5f3	1012	uint8_t MPU9150::getSlaveDataLength(uint8_t num) {
syundo0730	0:78ba160ba5f3	1013	if (num > 3) return 0;
syundo0730	0:78ba160ba5f3	1014	I2Cdev::readBits(devAddr, MPU9150_RA_I2C_SLV0_CTRL + num*3, MPU9150_I2C_SLV_LEN_BIT, MPU9150_I2C_SLV_LEN_LENGTH, buffer);
syundo0730	0:78ba160ba5f3	1015	return buffer[0];
syundo0730	0:78ba160ba5f3	1016	}
syundo0730	0:78ba160ba5f3	1017	/** Set number of bytes to read for the specified slave (0-3).
syundo0730	0:78ba160ba5f3	1018	* @param num Slave number (0-3)
syundo0730	0:78ba160ba5f3	1019	* @param length Number of bytes to read for specified slave
syundo0730	0:78ba160ba5f3	1020	* @see getSlaveDataLength()
syundo0730	0:78ba160ba5f3	1021	* @see MPU9150_RA_I2C_SLV0_CTRL
syundo0730	0:78ba160ba5f3	1022	*/
syundo0730	0:78ba160ba5f3	1023	void MPU9150::setSlaveDataLength(uint8_t num, uint8_t length) {
syundo0730	0:78ba160ba5f3	1024	if (num > 3) return;
syundo0730	0:78ba160ba5f3	1025	I2Cdev::writeBits(devAddr, MPU9150_RA_I2C_SLV0_CTRL + num*3, MPU9150_I2C_SLV_LEN_BIT, MPU9150_I2C_SLV_LEN_LENGTH, length);
syundo0730	0:78ba160ba5f3	1026	}
syundo0730	0:78ba160ba5f3	1027
syundo0730	0:78ba160ba5f3	1028	// I2C_SLV* registers (Slave 4)
syundo0730	0:78ba160ba5f3	1029
syundo0730	0:78ba160ba5f3	1030	/** Get the I2C address of Slave 4.
syundo0730	0:78ba160ba5f3	1031	* Note that Bit 7 (MSB) controls read/write mode. If Bit 7 is set, it's a read
syundo0730	0:78ba160ba5f3	1032	* operation, and if it is cleared, then it's a write operation. The remaining
syundo0730	0:78ba160ba5f3	1033	* bits (6-0) are the 7-bit device address of the slave device.
syundo0730	0:78ba160ba5f3	1034	*
syundo0730	0:78ba160ba5f3	1035	* @return Current address for Slave 4
syundo0730	0:78ba160ba5f3	1036	* @see getSlaveAddress()
syundo0730	0:78ba160ba5f3	1037	* @see MPU9150_RA_I2C_SLV4_ADDR
syundo0730	0:78ba160ba5f3	1038	*/
syundo0730	0:78ba160ba5f3	1039	uint8_t MPU9150::getSlave4Address() {
syundo0730	0:78ba160ba5f3	1040	I2Cdev::readByte(devAddr, MPU9150_RA_I2C_SLV4_ADDR, buffer);
syundo0730	0:78ba160ba5f3	1041	return buffer[0];
syundo0730	0:78ba160ba5f3	1042	}
syundo0730	0:78ba160ba5f3	1043	/** Set the I2C address of Slave 4.
syundo0730	0:78ba160ba5f3	1044	* @param address New address for Slave 4
syundo0730	0:78ba160ba5f3	1045	* @see getSlave4Address()
syundo0730	0:78ba160ba5f3	1046	* @see MPU9150_RA_I2C_SLV4_ADDR
syundo0730	0:78ba160ba5f3	1047	*/
syundo0730	0:78ba160ba5f3	1048	void MPU9150::setSlave4Address(uint8_t address) {
syundo0730	0:78ba160ba5f3	1049	I2Cdev::writeByte(devAddr, MPU9150_RA_I2C_SLV4_ADDR, address);
syundo0730	0:78ba160ba5f3	1050	}
syundo0730	0:78ba160ba5f3	1051	/** Get the active internal register for the Slave 4.
syundo0730	0:78ba160ba5f3	1052	* Read/write operations for this slave will be done to whatever internal
syundo0730	0:78ba160ba5f3	1053	* register address is stored in this MPU register.
syundo0730	0:78ba160ba5f3	1054	*
syundo0730	0:78ba160ba5f3	1055	* @return Current active register for Slave 4
syundo0730	0:78ba160ba5f3	1056	* @see MPU9150_RA_I2C_SLV4_REG
syundo0730	0:78ba160ba5f3	1057	*/
syundo0730	0:78ba160ba5f3	1058	uint8_t MPU9150::getSlave4Register() {
syundo0730	0:78ba160ba5f3	1059	I2Cdev::readByte(devAddr, MPU9150_RA_I2C_SLV4_REG, buffer);
syundo0730	0:78ba160ba5f3	1060	return buffer[0];
syundo0730	0:78ba160ba5f3	1061	}
syundo0730	0:78ba160ba5f3	1062	/** Set the active internal register for Slave 4.
syundo0730	0:78ba160ba5f3	1063	* @param reg New active register for Slave 4
syundo0730	0:78ba160ba5f3	1064	* @see getSlave4Register()
syundo0730	0:78ba160ba5f3	1065	* @see MPU9150_RA_I2C_SLV4_REG
syundo0730	0:78ba160ba5f3	1066	*/
syundo0730	0:78ba160ba5f3	1067	void MPU9150::setSlave4Register(uint8_t reg) {
syundo0730	0:78ba160ba5f3	1068	I2Cdev::writeByte(devAddr, MPU9150_RA_I2C_SLV4_REG, reg);
syundo0730	0:78ba160ba5f3	1069	}
syundo0730	0:78ba160ba5f3	1070	/** Set new byte to write to Slave 4.
syundo0730	0:78ba160ba5f3	1071	* This register stores the data to be written into the Slave 4. If I2C_SLV4_RW
syundo0730	0:78ba160ba5f3	1072	* is set 1 (set to read), this register has no effect.
syundo0730	0:78ba160ba5f3	1073	* @param data New byte to write to Slave 4
syundo0730	0:78ba160ba5f3	1074	* @see MPU9150_RA_I2C_SLV4_DO
syundo0730	0:78ba160ba5f3	1075	*/
syundo0730	0:78ba160ba5f3	1076	void MPU9150::setSlave4OutputByte(uint8_t data) {
syundo0730	0:78ba160ba5f3	1077	I2Cdev::writeByte(devAddr, MPU9150_RA_I2C_SLV4_DO, data);
syundo0730	0:78ba160ba5f3	1078	}
syundo0730	0:78ba160ba5f3	1079	/** Get the enabled value for the Slave 4.
syundo0730	0:78ba160ba5f3	1080	* When set to 1, this bit enables Slave 4 for data transfer operations. When
syundo0730	0:78ba160ba5f3	1081	* cleared to 0, this bit disables Slave 4 from data transfer operations.
syundo0730	0:78ba160ba5f3	1082	* @return Current enabled value for Slave 4
syundo0730	0:78ba160ba5f3	1083	* @see MPU9150_RA_I2C_SLV4_CTRL
syundo0730	0:78ba160ba5f3	1084	*/
syundo0730	0:78ba160ba5f3	1085	bool MPU9150::getSlave4Enabled() {
syundo0730	0:78ba160ba5f3	1086	I2Cdev::readBit(devAddr, MPU9150_RA_I2C_SLV4_CTRL, MPU9150_I2C_SLV4_EN_BIT, buffer);
syundo0730	0:78ba160ba5f3	1087	return buffer[0];
syundo0730	0:78ba160ba5f3	1088	}
syundo0730	0:78ba160ba5f3	1089	/** Set the enabled value for Slave 4.
syundo0730	0:78ba160ba5f3	1090	* @param enabled New enabled value for Slave 4
syundo0730	0:78ba160ba5f3	1091	* @see getSlave4Enabled()
syundo0730	0:78ba160ba5f3	1092	* @see MPU9150_RA_I2C_SLV4_CTRL
syundo0730	0:78ba160ba5f3	1093	*/
syundo0730	0:78ba160ba5f3	1094	void MPU9150::setSlave4Enabled(bool enabled) {
syundo0730	0:78ba160ba5f3	1095	I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_SLV4_CTRL, MPU9150_I2C_SLV4_EN_BIT, enabled);
syundo0730	0:78ba160ba5f3	1096	}
syundo0730	0:78ba160ba5f3	1097	/** Get the enabled value for Slave 4 transaction interrupts.
syundo0730	0:78ba160ba5f3	1098	* When set to 1, this bit enables the generation of an interrupt signal upon
syundo0730	0:78ba160ba5f3	1099	* completion of a Slave 4 transaction. When cleared to 0, this bit disables the
syundo0730	0:78ba160ba5f3	1100	* generation of an interrupt signal upon completion of a Slave 4 transaction.
syundo0730	0:78ba160ba5f3	1101	* The interrupt status can be observed in Register 54.
syundo0730	0:78ba160ba5f3	1102	*
syundo0730	0:78ba160ba5f3	1103	* @return Current enabled value for Slave 4 transaction interrupts.
syundo0730	0:78ba160ba5f3	1104	* @see MPU9150_RA_I2C_SLV4_CTRL
syundo0730	0:78ba160ba5f3	1105	*/
syundo0730	0:78ba160ba5f3	1106	bool MPU9150::getSlave4InterruptEnabled() {
syundo0730	0:78ba160ba5f3	1107	I2Cdev::readBit(devAddr, MPU9150_RA_I2C_SLV4_CTRL, MPU9150_I2C_SLV4_INT_EN_BIT, buffer);
syundo0730	0:78ba160ba5f3	1108	return buffer[0];
syundo0730	0:78ba160ba5f3	1109	}
syundo0730	0:78ba160ba5f3	1110	/** Set the enabled value for Slave 4 transaction interrupts.
syundo0730	0:78ba160ba5f3	1111	* @param enabled New enabled value for Slave 4 transaction interrupts.
syundo0730	0:78ba160ba5f3	1112	* @see getSlave4InterruptEnabled()
syundo0730	0:78ba160ba5f3	1113	* @see MPU9150_RA_I2C_SLV4_CTRL
syundo0730	0:78ba160ba5f3	1114	*/
syundo0730	0:78ba160ba5f3	1115	void MPU9150::setSlave4InterruptEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	1116	I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_SLV4_CTRL, MPU9150_I2C_SLV4_INT_EN_BIT, enabled);
syundo0730	0:78ba160ba5f3	1117	}
syundo0730	0:78ba160ba5f3	1118	/** Get write mode for Slave 4.
syundo0730	0:78ba160ba5f3	1119	* When set to 1, the transaction will read or write data only. When cleared to
syundo0730	0:78ba160ba5f3	1120	* 0, the transaction will write a register address prior to reading or writing
syundo0730	0:78ba160ba5f3	1121	* data. This should equal 0 when specifying the register address within the
syundo0730	0:78ba160ba5f3	1122	* Slave device to/from which the ensuing data transaction will take place.
syundo0730	0:78ba160ba5f3	1123	*
syundo0730	0:78ba160ba5f3	1124	* @return Current write mode for Slave 4 (0 = register address + data, 1 = data only)
syundo0730	0:78ba160ba5f3	1125	* @see MPU9150_RA_I2C_SLV4_CTRL
syundo0730	0:78ba160ba5f3	1126	*/
syundo0730	0:78ba160ba5f3	1127	bool MPU9150::getSlave4WriteMode() {
syundo0730	0:78ba160ba5f3	1128	I2Cdev::readBit(devAddr, MPU9150_RA_I2C_SLV4_CTRL, MPU9150_I2C_SLV4_REG_DIS_BIT, buffer);
syundo0730	0:78ba160ba5f3	1129	return buffer[0];
syundo0730	0:78ba160ba5f3	1130	}
syundo0730	0:78ba160ba5f3	1131	/** Set write mode for the Slave 4.
syundo0730	0:78ba160ba5f3	1132	* @param mode New write mode for Slave 4 (0 = register address + data, 1 = data only)
syundo0730	0:78ba160ba5f3	1133	* @see getSlave4WriteMode()
syundo0730	0:78ba160ba5f3	1134	* @see MPU9150_RA_I2C_SLV4_CTRL
syundo0730	0:78ba160ba5f3	1135	*/
syundo0730	0:78ba160ba5f3	1136	void MPU9150::setSlave4WriteMode(bool mode) {
syundo0730	0:78ba160ba5f3	1137	I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_SLV4_CTRL, MPU9150_I2C_SLV4_REG_DIS_BIT, mode);
syundo0730	0:78ba160ba5f3	1138	}
syundo0730	0:78ba160ba5f3	1139	/** Get Slave 4 master delay value.
syundo0730	0:78ba160ba5f3	1140	* This configures the reduced access rate of I2C slaves relative to the Sample
syundo0730	0:78ba160ba5f3	1141	* Rate. When a slave's access rate is decreased relative to the Sample Rate,
syundo0730	0:78ba160ba5f3	1142	* the slave is accessed every:
syundo0730	0:78ba160ba5f3	1143	*
syundo0730	0:78ba160ba5f3	1144	* 1 / (1 + I2C_MST_DLY) samples
syundo0730	0:78ba160ba5f3	1145	*
syundo0730	0:78ba160ba5f3	1146	* This base Sample Rate in turn is determined by SMPLRT_DIV (register 25) and
syundo0730	0:78ba160ba5f3	1147	* DLPF_CFG (register 26). Whether a slave's access rate is reduced relative to
syundo0730	0:78ba160ba5f3	1148	* the Sample Rate is determined by I2C_MST_DELAY_CTRL (register 103). For
syundo0730	0:78ba160ba5f3	1149	* further information regarding the Sample Rate, please refer to register 25.
syundo0730	0:78ba160ba5f3	1150	*
syundo0730	0:78ba160ba5f3	1151	* @return Current Slave 4 master delay value
syundo0730	0:78ba160ba5f3	1152	* @see MPU9150_RA_I2C_SLV4_CTRL
syundo0730	0:78ba160ba5f3	1153	*/
syundo0730	0:78ba160ba5f3	1154	uint8_t MPU9150::getSlave4MasterDelay() {
syundo0730	0:78ba160ba5f3	1155	I2Cdev::readBits(devAddr, MPU9150_RA_I2C_SLV4_CTRL, MPU9150_I2C_SLV4_MST_DLY_BIT, MPU9150_I2C_SLV4_MST_DLY_LENGTH, buffer);
syundo0730	0:78ba160ba5f3	1156	return buffer[0];
syundo0730	0:78ba160ba5f3	1157	}
syundo0730	0:78ba160ba5f3	1158	/** Set Slave 4 master delay value.
syundo0730	0:78ba160ba5f3	1159	* @param delay New Slave 4 master delay value
syundo0730	0:78ba160ba5f3	1160	* @see getSlave4MasterDelay()
syundo0730	0:78ba160ba5f3	1161	* @see MPU9150_RA_I2C_SLV4_CTRL
syundo0730	0:78ba160ba5f3	1162	*/
syundo0730	0:78ba160ba5f3	1163	void MPU9150::setSlave4MasterDelay(uint8_t delay) {
syundo0730	0:78ba160ba5f3	1164	I2Cdev::writeBits(devAddr, MPU9150_RA_I2C_SLV4_CTRL, MPU9150_I2C_SLV4_MST_DLY_BIT, MPU9150_I2C_SLV4_MST_DLY_LENGTH, delay);
syundo0730	0:78ba160ba5f3	1165	}
syundo0730	0:78ba160ba5f3	1166	/** Get last available byte read from Slave 4.
syundo0730	0:78ba160ba5f3	1167	* This register stores the data read from Slave 4. This field is populated
syundo0730	0:78ba160ba5f3	1168	* after a read transaction.
syundo0730	0:78ba160ba5f3	1169	* @return Last available byte read from to Slave 4
syundo0730	0:78ba160ba5f3	1170	* @see MPU9150_RA_I2C_SLV4_DI
syundo0730	0:78ba160ba5f3	1171	*/
syundo0730	0:78ba160ba5f3	1172	uint8_t MPU9150::getSlate4InputByte() {
syundo0730	0:78ba160ba5f3	1173	I2Cdev::readByte(devAddr, MPU9150_RA_I2C_SLV4_DI, buffer);
syundo0730	0:78ba160ba5f3	1174	return buffer[0];
syundo0730	0:78ba160ba5f3	1175	}
syundo0730	0:78ba160ba5f3	1176
syundo0730	0:78ba160ba5f3	1177	// I2C_MST_STATUS register
syundo0730	0:78ba160ba5f3	1178
syundo0730	0:78ba160ba5f3	1179	/** Get FSYNC interrupt status.
syundo0730	0:78ba160ba5f3	1180	* This bit reflects the status of the FSYNC interrupt from an external device
syundo0730	0:78ba160ba5f3	1181	* into the MPU-60X0. This is used as a way to pass an external interrupt
syundo0730	0:78ba160ba5f3	1182	* through the MPU-60X0 to the host application processor. When set to 1, this
syundo0730	0:78ba160ba5f3	1183	* bit will cause an interrupt if FSYNC_INT_EN is asserted in INT_PIN_CFG
syundo0730	0:78ba160ba5f3	1184	* (Register 55).
syundo0730	0:78ba160ba5f3	1185	* @return FSYNC interrupt status
syundo0730	0:78ba160ba5f3	1186	* @see MPU9150_RA_I2C_MST_STATUS
syundo0730	0:78ba160ba5f3	1187	*/
syundo0730	0:78ba160ba5f3	1188	bool MPU9150::getPassthroughStatus() {
syundo0730	0:78ba160ba5f3	1189	I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_STATUS, MPU9150_MST_PASS_THROUGH_BIT, buffer);
syundo0730	0:78ba160ba5f3	1190	return buffer[0];
syundo0730	0:78ba160ba5f3	1191	}
syundo0730	0:78ba160ba5f3	1192	/** Get Slave 4 transaction done status.
syundo0730	0:78ba160ba5f3	1193	* Automatically sets to 1 when a Slave 4 transaction has completed. This
syundo0730	0:78ba160ba5f3	1194	* triggers an interrupt if the I2C_MST_INT_EN bit in the INT_ENABLE register
syundo0730	0:78ba160ba5f3	1195	* (Register 56) is asserted and if the SLV_4_DONE_INT bit is asserted in the
syundo0730	0:78ba160ba5f3	1196	* I2C_SLV4_CTRL register (Register 52).
syundo0730	0:78ba160ba5f3	1197	* @return Slave 4 transaction done status
syundo0730	0:78ba160ba5f3	1198	* @see MPU9150_RA_I2C_MST_STATUS
syundo0730	0:78ba160ba5f3	1199	*/
syundo0730	0:78ba160ba5f3	1200	bool MPU9150::getSlave4IsDone() {
syundo0730	0:78ba160ba5f3	1201	I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_STATUS, MPU9150_MST_I2C_SLV4_DONE_BIT, buffer);
syundo0730	0:78ba160ba5f3	1202	return buffer[0];
syundo0730	0:78ba160ba5f3	1203	}
syundo0730	0:78ba160ba5f3	1204	/** Get master arbitration lost status.
syundo0730	0:78ba160ba5f3	1205	* This bit automatically sets to 1 when the I2C Master has lost arbitration of
syundo0730	0:78ba160ba5f3	1206	* the auxiliary I2C bus (an error condition). This triggers an interrupt if the
syundo0730	0:78ba160ba5f3	1207	* I2C_MST_INT_EN bit in the INT_ENABLE register (Register 56) is asserted.
syundo0730	0:78ba160ba5f3	1208	* @return Master arbitration lost status
syundo0730	0:78ba160ba5f3	1209	* @see MPU9150_RA_I2C_MST_STATUS
syundo0730	0:78ba160ba5f3	1210	*/
syundo0730	0:78ba160ba5f3	1211	bool MPU9150::getLostArbitration() {
syundo0730	0:78ba160ba5f3	1212	I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_STATUS, MPU9150_MST_I2C_LOST_ARB_BIT, buffer);
syundo0730	0:78ba160ba5f3	1213	return buffer[0];
syundo0730	0:78ba160ba5f3	1214	}
syundo0730	0:78ba160ba5f3	1215	/** Get Slave 4 NACK status.
syundo0730	0:78ba160ba5f3	1216	* This bit automatically sets to 1 when the I2C Master receives a NACK in a
syundo0730	0:78ba160ba5f3	1217	* transaction with Slave 4. This triggers an interrupt if the I2C_MST_INT_EN
syundo0730	0:78ba160ba5f3	1218	* bit in the INT_ENABLE register (Register 56) is asserted.
syundo0730	0:78ba160ba5f3	1219	* @return Slave 4 NACK interrupt status
syundo0730	0:78ba160ba5f3	1220	* @see MPU9150_RA_I2C_MST_STATUS
syundo0730	0:78ba160ba5f3	1221	*/
syundo0730	0:78ba160ba5f3	1222	bool MPU9150::getSlave4Nack() {
syundo0730	0:78ba160ba5f3	1223	I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_STATUS, MPU9150_MST_I2C_SLV4_NACK_BIT, buffer);
syundo0730	0:78ba160ba5f3	1224	return buffer[0];
syundo0730	0:78ba160ba5f3	1225	}
syundo0730	0:78ba160ba5f3	1226	/** Get Slave 3 NACK status.
syundo0730	0:78ba160ba5f3	1227	* This bit automatically sets to 1 when the I2C Master receives a NACK in a
syundo0730	0:78ba160ba5f3	1228	* transaction with Slave 3. This triggers an interrupt if the I2C_MST_INT_EN
syundo0730	0:78ba160ba5f3	1229	* bit in the INT_ENABLE register (Register 56) is asserted.
syundo0730	0:78ba160ba5f3	1230	* @return Slave 3 NACK interrupt status
syundo0730	0:78ba160ba5f3	1231	* @see MPU9150_RA_I2C_MST_STATUS
syundo0730	0:78ba160ba5f3	1232	*/
syundo0730	0:78ba160ba5f3	1233	bool MPU9150::getSlave3Nack() {
syundo0730	0:78ba160ba5f3	1234	I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_STATUS, MPU9150_MST_I2C_SLV3_NACK_BIT, buffer);
syundo0730	0:78ba160ba5f3	1235	return buffer[0];
syundo0730	0:78ba160ba5f3	1236	}
syundo0730	0:78ba160ba5f3	1237	/** Get Slave 2 NACK status.
syundo0730	0:78ba160ba5f3	1238	* This bit automatically sets to 1 when the I2C Master receives a NACK in a
syundo0730	0:78ba160ba5f3	1239	* transaction with Slave 2. This triggers an interrupt if the I2C_MST_INT_EN
syundo0730	0:78ba160ba5f3	1240	* bit in the INT_ENABLE register (Register 56) is asserted.
syundo0730	0:78ba160ba5f3	1241	* @return Slave 2 NACK interrupt status
syundo0730	0:78ba160ba5f3	1242	* @see MPU9150_RA_I2C_MST_STATUS
syundo0730	0:78ba160ba5f3	1243	*/
syundo0730	0:78ba160ba5f3	1244	bool MPU9150::getSlave2Nack() {
syundo0730	0:78ba160ba5f3	1245	I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_STATUS, MPU9150_MST_I2C_SLV2_NACK_BIT, buffer);
syundo0730	0:78ba160ba5f3	1246	return buffer[0];
syundo0730	0:78ba160ba5f3	1247	}
syundo0730	0:78ba160ba5f3	1248	/** Get Slave 1 NACK status.
syundo0730	0:78ba160ba5f3	1249	* This bit automatically sets to 1 when the I2C Master receives a NACK in a
syundo0730	0:78ba160ba5f3	1250	* transaction with Slave 1. This triggers an interrupt if the I2C_MST_INT_EN
syundo0730	0:78ba160ba5f3	1251	* bit in the INT_ENABLE register (Register 56) is asserted.
syundo0730	0:78ba160ba5f3	1252	* @return Slave 1 NACK interrupt status
syundo0730	0:78ba160ba5f3	1253	* @see MPU9150_RA_I2C_MST_STATUS
syundo0730	0:78ba160ba5f3	1254	*/
syundo0730	0:78ba160ba5f3	1255	bool MPU9150::getSlave1Nack() {
syundo0730	0:78ba160ba5f3	1256	I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_STATUS, MPU9150_MST_I2C_SLV1_NACK_BIT, buffer);
syundo0730	0:78ba160ba5f3	1257	return buffer[0];
syundo0730	0:78ba160ba5f3	1258	}
syundo0730	0:78ba160ba5f3	1259	/** Get Slave 0 NACK status.
syundo0730	0:78ba160ba5f3	1260	* This bit automatically sets to 1 when the I2C Master receives a NACK in a
syundo0730	0:78ba160ba5f3	1261	* transaction with Slave 0. This triggers an interrupt if the I2C_MST_INT_EN
syundo0730	0:78ba160ba5f3	1262	* bit in the INT_ENABLE register (Register 56) is asserted.
syundo0730	0:78ba160ba5f3	1263	* @return Slave 0 NACK interrupt status
syundo0730	0:78ba160ba5f3	1264	* @see MPU9150_RA_I2C_MST_STATUS
syundo0730	0:78ba160ba5f3	1265	*/
syundo0730	0:78ba160ba5f3	1266	bool MPU9150::getSlave0Nack() {
syundo0730	0:78ba160ba5f3	1267	I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_STATUS, MPU9150_MST_I2C_SLV0_NACK_BIT, buffer);
syundo0730	0:78ba160ba5f3	1268	return buffer[0];
syundo0730	0:78ba160ba5f3	1269	}
syundo0730	0:78ba160ba5f3	1270
syundo0730	0:78ba160ba5f3	1271	// INT_PIN_CFG register
syundo0730	0:78ba160ba5f3	1272
syundo0730	0:78ba160ba5f3	1273	/** Get interrupt logic level mode.
syundo0730	0:78ba160ba5f3	1274	* Will be set 0 for active-high, 1 for active-low.
syundo0730	0:78ba160ba5f3	1275	* @return Current interrupt mode (0=active-high, 1=active-low)
syundo0730	0:78ba160ba5f3	1276	* @see MPU9150_RA_INT_PIN_CFG
syundo0730	0:78ba160ba5f3	1277	* @see MPU9150_INTCFG_INT_LEVEL_BIT
syundo0730	0:78ba160ba5f3	1278	*/
syundo0730	0:78ba160ba5f3	1279	bool MPU9150::getInterruptMode() {
syundo0730	0:78ba160ba5f3	1280	I2Cdev::readBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_INT_LEVEL_BIT, buffer);
syundo0730	0:78ba160ba5f3	1281	return buffer[0];
syundo0730	0:78ba160ba5f3	1282	}
syundo0730	0:78ba160ba5f3	1283	/** Set interrupt logic level mode.
syundo0730	0:78ba160ba5f3	1284	* @param mode New interrupt mode (0=active-high, 1=active-low)
syundo0730	0:78ba160ba5f3	1285	* @see getInterruptMode()
syundo0730	0:78ba160ba5f3	1286	* @see MPU9150_RA_INT_PIN_CFG
syundo0730	0:78ba160ba5f3	1287	* @see MPU9150_INTCFG_INT_LEVEL_BIT
syundo0730	0:78ba160ba5f3	1288	*/
syundo0730	0:78ba160ba5f3	1289	void MPU9150::setInterruptMode(bool mode) {
syundo0730	0:78ba160ba5f3	1290	I2Cdev::writeBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_INT_LEVEL_BIT, mode);
syundo0730	0:78ba160ba5f3	1291	}
syundo0730	0:78ba160ba5f3	1292	/** Get interrupt drive mode.
syundo0730	0:78ba160ba5f3	1293	* Will be set 0 for push-pull, 1 for open-drain.
syundo0730	0:78ba160ba5f3	1294	* @return Current interrupt drive mode (0=push-pull, 1=open-drain)
syundo0730	0:78ba160ba5f3	1295	* @see MPU9150_RA_INT_PIN_CFG
syundo0730	0:78ba160ba5f3	1296	* @see MPU9150_INTCFG_INT_OPEN_BIT
syundo0730	0:78ba160ba5f3	1297	*/
syundo0730	0:78ba160ba5f3	1298	bool MPU9150::getInterruptDrive() {
syundo0730	0:78ba160ba5f3	1299	I2Cdev::readBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_INT_OPEN_BIT, buffer);
syundo0730	0:78ba160ba5f3	1300	return buffer[0];
syundo0730	0:78ba160ba5f3	1301	}
syundo0730	0:78ba160ba5f3	1302	/** Set interrupt drive mode.
syundo0730	0:78ba160ba5f3	1303	* @param drive New interrupt drive mode (0=push-pull, 1=open-drain)
syundo0730	0:78ba160ba5f3	1304	* @see getInterruptDrive()
syundo0730	0:78ba160ba5f3	1305	* @see MPU9150_RA_INT_PIN_CFG
syundo0730	0:78ba160ba5f3	1306	* @see MPU9150_INTCFG_INT_OPEN_BIT
syundo0730	0:78ba160ba5f3	1307	*/
syundo0730	0:78ba160ba5f3	1308	void MPU9150::setInterruptDrive(bool drive) {
syundo0730	0:78ba160ba5f3	1309	I2Cdev::writeBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_INT_OPEN_BIT, drive);
syundo0730	0:78ba160ba5f3	1310	}
syundo0730	0:78ba160ba5f3	1311	/** Get interrupt latch mode.
syundo0730	0:78ba160ba5f3	1312	* Will be set 0 for 50us-pulse, 1 for latch-until-int-cleared.
syundo0730	0:78ba160ba5f3	1313	* @return Current latch mode (0=50us-pulse, 1=latch-until-int-cleared)
syundo0730	0:78ba160ba5f3	1314	* @see MPU9150_RA_INT_PIN_CFG
syundo0730	0:78ba160ba5f3	1315	* @see MPU9150_INTCFG_LATCH_INT_EN_BIT
syundo0730	0:78ba160ba5f3	1316	*/
syundo0730	0:78ba160ba5f3	1317	bool MPU9150::getInterruptLatch() {
syundo0730	0:78ba160ba5f3	1318	I2Cdev::readBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_LATCH_INT_EN_BIT, buffer);
syundo0730	0:78ba160ba5f3	1319	return buffer[0];
syundo0730	0:78ba160ba5f3	1320	}
syundo0730	0:78ba160ba5f3	1321	/** Set interrupt latch mode.
syundo0730	0:78ba160ba5f3	1322	* @param latch New latch mode (0=50us-pulse, 1=latch-until-int-cleared)
syundo0730	0:78ba160ba5f3	1323	* @see getInterruptLatch()
syundo0730	0:78ba160ba5f3	1324	* @see MPU9150_RA_INT_PIN_CFG
syundo0730	0:78ba160ba5f3	1325	* @see MPU9150_INTCFG_LATCH_INT_EN_BIT
syundo0730	0:78ba160ba5f3	1326	*/
syundo0730	0:78ba160ba5f3	1327	void MPU9150::setInterruptLatch(bool latch) {
syundo0730	0:78ba160ba5f3	1328	I2Cdev::writeBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_LATCH_INT_EN_BIT, latch);
syundo0730	0:78ba160ba5f3	1329	}
syundo0730	0:78ba160ba5f3	1330	/** Get interrupt latch clear mode.
syundo0730	0:78ba160ba5f3	1331	* Will be set 0 for status-read-only, 1 for any-register-read.
syundo0730	0:78ba160ba5f3	1332	* @return Current latch clear mode (0=status-read-only, 1=any-register-read)
syundo0730	0:78ba160ba5f3	1333	* @see MPU9150_RA_INT_PIN_CFG
syundo0730	0:78ba160ba5f3	1334	* @see MPU9150_INTCFG_INT_RD_CLEAR_BIT
syundo0730	0:78ba160ba5f3	1335	*/
syundo0730	0:78ba160ba5f3	1336	bool MPU9150::getInterruptLatchClear() {
syundo0730	0:78ba160ba5f3	1337	I2Cdev::readBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_INT_RD_CLEAR_BIT, buffer);
syundo0730	0:78ba160ba5f3	1338	return buffer[0];
syundo0730	0:78ba160ba5f3	1339	}
syundo0730	0:78ba160ba5f3	1340	/** Set interrupt latch clear mode.
syundo0730	0:78ba160ba5f3	1341	* @param clear New latch clear mode (0=status-read-only, 1=any-register-read)
syundo0730	0:78ba160ba5f3	1342	* @see getInterruptLatchClear()
syundo0730	0:78ba160ba5f3	1343	* @see MPU9150_RA_INT_PIN_CFG
syundo0730	0:78ba160ba5f3	1344	* @see MPU9150_INTCFG_INT_RD_CLEAR_BIT
syundo0730	0:78ba160ba5f3	1345	*/
syundo0730	0:78ba160ba5f3	1346	void MPU9150::setInterruptLatchClear(bool clear) {
syundo0730	0:78ba160ba5f3	1347	I2Cdev::writeBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_INT_RD_CLEAR_BIT, clear);
syundo0730	0:78ba160ba5f3	1348	}
syundo0730	0:78ba160ba5f3	1349	/** Get FSYNC interrupt logic level mode.
syundo0730	0:78ba160ba5f3	1350	* @return Current FSYNC interrupt mode (0=active-high, 1=active-low)
syundo0730	0:78ba160ba5f3	1351	* @see getFSyncInterruptMode()
syundo0730	0:78ba160ba5f3	1352	* @see MPU9150_RA_INT_PIN_CFG
syundo0730	0:78ba160ba5f3	1353	* @see MPU9150_INTCFG_FSYNC_INT_LEVEL_BIT
syundo0730	0:78ba160ba5f3	1354	*/
syundo0730	0:78ba160ba5f3	1355	bool MPU9150::getFSyncInterruptLevel() {
syundo0730	0:78ba160ba5f3	1356	I2Cdev::readBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_FSYNC_INT_LEVEL_BIT, buffer);
syundo0730	0:78ba160ba5f3	1357	return buffer[0];
syundo0730	0:78ba160ba5f3	1358	}
syundo0730	0:78ba160ba5f3	1359	/** Set FSYNC interrupt logic level mode.
syundo0730	0:78ba160ba5f3	1360	* @param mode New FSYNC interrupt mode (0=active-high, 1=active-low)
syundo0730	0:78ba160ba5f3	1361	* @see getFSyncInterruptMode()
syundo0730	0:78ba160ba5f3	1362	* @see MPU9150_RA_INT_PIN_CFG
syundo0730	0:78ba160ba5f3	1363	* @see MPU9150_INTCFG_FSYNC_INT_LEVEL_BIT
syundo0730	0:78ba160ba5f3	1364	*/
syundo0730	0:78ba160ba5f3	1365	void MPU9150::setFSyncInterruptLevel(bool level) {
syundo0730	0:78ba160ba5f3	1366	I2Cdev::writeBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_FSYNC_INT_LEVEL_BIT, level);
syundo0730	0:78ba160ba5f3	1367	}
syundo0730	0:78ba160ba5f3	1368	/** Get FSYNC pin interrupt enabled setting.
syundo0730	0:78ba160ba5f3	1369	* Will be set 0 for disabled, 1 for enabled.
syundo0730	0:78ba160ba5f3	1370	* @return Current interrupt enabled setting
syundo0730	0:78ba160ba5f3	1371	* @see MPU9150_RA_INT_PIN_CFG
syundo0730	0:78ba160ba5f3	1372	* @see MPU9150_INTCFG_FSYNC_INT_EN_BIT
syundo0730	0:78ba160ba5f3	1373	*/
syundo0730	0:78ba160ba5f3	1374	bool MPU9150::getFSyncInterruptEnabled() {
syundo0730	0:78ba160ba5f3	1375	I2Cdev::readBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_FSYNC_INT_EN_BIT, buffer);
syundo0730	0:78ba160ba5f3	1376	return buffer[0];
syundo0730	0:78ba160ba5f3	1377	}
syundo0730	0:78ba160ba5f3	1378	/** Set FSYNC pin interrupt enabled setting.
syundo0730	0:78ba160ba5f3	1379	* @param enabled New FSYNC pin interrupt enabled setting
syundo0730	0:78ba160ba5f3	1380	* @see getFSyncInterruptEnabled()
syundo0730	0:78ba160ba5f3	1381	* @see MPU9150_RA_INT_PIN_CFG
syundo0730	0:78ba160ba5f3	1382	* @see MPU9150_INTCFG_FSYNC_INT_EN_BIT
syundo0730	0:78ba160ba5f3	1383	*/
syundo0730	0:78ba160ba5f3	1384	void MPU9150::setFSyncInterruptEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	1385	I2Cdev::writeBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_FSYNC_INT_EN_BIT, enabled);
syundo0730	0:78ba160ba5f3	1386	}
syundo0730	0:78ba160ba5f3	1387	/** Get I2C bypass enabled status.
syundo0730	0:78ba160ba5f3	1388	* When this bit is equal to 1 and I2C_MST_EN (Register 106 bit[5]) is equal to
syundo0730	0:78ba160ba5f3	1389	* 0, the host application processor will be able to directly access the
syundo0730	0:78ba160ba5f3	1390	* auxiliary I2C bus of the MPU-60X0. When this bit is equal to 0, the host
syundo0730	0:78ba160ba5f3	1391	* application processor will not be able to directly access the auxiliary I2C
syundo0730	0:78ba160ba5f3	1392	* bus of the MPU-60X0 regardless of the state of I2C_MST_EN (Register 106
syundo0730	0:78ba160ba5f3	1393	* bit[5]).
syundo0730	0:78ba160ba5f3	1394	* @return Current I2C bypass enabled status
syundo0730	0:78ba160ba5f3	1395	* @see MPU9150_RA_INT_PIN_CFG
syundo0730	0:78ba160ba5f3	1396	* @see MPU9150_INTCFG_I2C_BYPASS_EN_BIT
syundo0730	0:78ba160ba5f3	1397	*/
syundo0730	0:78ba160ba5f3	1398	bool MPU9150::getI2CBypassEnabled() {
syundo0730	0:78ba160ba5f3	1399	I2Cdev::readBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_I2C_BYPASS_EN_BIT, buffer);
syundo0730	0:78ba160ba5f3	1400	return buffer[0];
syundo0730	0:78ba160ba5f3	1401	}
syundo0730	0:78ba160ba5f3	1402	/** Set I2C bypass enabled status.
syundo0730	0:78ba160ba5f3	1403	* When this bit is equal to 1 and I2C_MST_EN (Register 106 bit[5]) is equal to
syundo0730	0:78ba160ba5f3	1404	* 0, the host application processor will be able to directly access the
syundo0730	0:78ba160ba5f3	1405	* auxiliary I2C bus of the MPU-60X0. When this bit is equal to 0, the host
syundo0730	0:78ba160ba5f3	1406	* application processor will not be able to directly access the auxiliary I2C
syundo0730	0:78ba160ba5f3	1407	* bus of the MPU-60X0 regardless of the state of I2C_MST_EN (Register 106
syundo0730	0:78ba160ba5f3	1408	* bit[5]).
syundo0730	0:78ba160ba5f3	1409	* @param enabled New I2C bypass enabled status
syundo0730	0:78ba160ba5f3	1410	* @see MPU9150_RA_INT_PIN_CFG
syundo0730	0:78ba160ba5f3	1411	* @see MPU9150_INTCFG_I2C_BYPASS_EN_BIT
syundo0730	0:78ba160ba5f3	1412	*/
syundo0730	0:78ba160ba5f3	1413	void MPU9150::setI2CBypassEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	1414	I2Cdev::writeBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_I2C_BYPASS_EN_BIT, enabled);
syundo0730	0:78ba160ba5f3	1415	}
syundo0730	0:78ba160ba5f3	1416	/** Get reference clock output enabled status.
syundo0730	0:78ba160ba5f3	1417	* When this bit is equal to 1, a reference clock output is provided at the
syundo0730	0:78ba160ba5f3	1418	* CLKOUT pin. When this bit is equal to 0, the clock output is disabled. For
syundo0730	0:78ba160ba5f3	1419	* further information regarding CLKOUT, please refer to the MPU-60X0 Product
syundo0730	0:78ba160ba5f3	1420	* Specification document.
syundo0730	0:78ba160ba5f3	1421	* @return Current reference clock output enabled status
syundo0730	0:78ba160ba5f3	1422	* @see MPU9150_RA_INT_PIN_CFG
syundo0730	0:78ba160ba5f3	1423	* @see MPU9150_INTCFG_CLKOUT_EN_BIT
syundo0730	0:78ba160ba5f3	1424	*/
syundo0730	0:78ba160ba5f3	1425	bool MPU9150::getClockOutputEnabled() {
syundo0730	0:78ba160ba5f3	1426	I2Cdev::readBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_CLKOUT_EN_BIT, buffer);
syundo0730	0:78ba160ba5f3	1427	return buffer[0];
syundo0730	0:78ba160ba5f3	1428	}
syundo0730	0:78ba160ba5f3	1429	/** Set reference clock output enabled status.
syundo0730	0:78ba160ba5f3	1430	* When this bit is equal to 1, a reference clock output is provided at the
syundo0730	0:78ba160ba5f3	1431	* CLKOUT pin. When this bit is equal to 0, the clock output is disabled. For
syundo0730	0:78ba160ba5f3	1432	* further information regarding CLKOUT, please refer to the MPU-60X0 Product
syundo0730	0:78ba160ba5f3	1433	* Specification document.
syundo0730	0:78ba160ba5f3	1434	* @param enabled New reference clock output enabled status
syundo0730	0:78ba160ba5f3	1435	* @see MPU9150_RA_INT_PIN_CFG
syundo0730	0:78ba160ba5f3	1436	* @see MPU9150_INTCFG_CLKOUT_EN_BIT
syundo0730	0:78ba160ba5f3	1437	*/
syundo0730	0:78ba160ba5f3	1438	void MPU9150::setClockOutputEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	1439	I2Cdev::writeBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_CLKOUT_EN_BIT, enabled);
syundo0730	0:78ba160ba5f3	1440	}
syundo0730	0:78ba160ba5f3	1441
syundo0730	0:78ba160ba5f3	1442	// INT_ENABLE register
syundo0730	0:78ba160ba5f3	1443
syundo0730	0:78ba160ba5f3	1444	/** Get full interrupt enabled status.
syundo0730	0:78ba160ba5f3	1445	* Full register byte for all interrupts, for quick reading. Each bit will be
syundo0730	0:78ba160ba5f3	1446	* set 0 for disabled, 1 for enabled.
syundo0730	0:78ba160ba5f3	1447	* @return Current interrupt enabled status
syundo0730	0:78ba160ba5f3	1448	* @see MPU9150_RA_INT_ENABLE
syundo0730	0:78ba160ba5f3	1449	* @see MPU9150_INTERRUPT_FF_BIT
syundo0730	0:78ba160ba5f3	1450	**/
syundo0730	0:78ba160ba5f3	1451	uint8_t MPU9150::getIntEnabled() {
syundo0730	0:78ba160ba5f3	1452	I2Cdev::readByte(devAddr, MPU9150_RA_INT_ENABLE, buffer);
syundo0730	0:78ba160ba5f3	1453	return buffer[0];
syundo0730	0:78ba160ba5f3	1454	}
syundo0730	0:78ba160ba5f3	1455	/** Set full interrupt enabled status.
syundo0730	0:78ba160ba5f3	1456	* Full register byte for all interrupts, for quick reading. Each bit should be
syundo0730	0:78ba160ba5f3	1457	* set 0 for disabled, 1 for enabled.
syundo0730	0:78ba160ba5f3	1458	* @param enabled New interrupt enabled status
syundo0730	0:78ba160ba5f3	1459	* @see getIntFreefallEnabled()
syundo0730	0:78ba160ba5f3	1460	* @see MPU9150_RA_INT_ENABLE
syundo0730	0:78ba160ba5f3	1461	* @see MPU9150_INTERRUPT_FF_BIT
syundo0730	0:78ba160ba5f3	1462	**/
syundo0730	0:78ba160ba5f3	1463	void MPU9150::setIntEnabled(uint8_t enabled) {
syundo0730	0:78ba160ba5f3	1464	I2Cdev::writeByte(devAddr, MPU9150_RA_INT_ENABLE, enabled);
syundo0730	0:78ba160ba5f3	1465	}
syundo0730	0:78ba160ba5f3	1466	/** Get Free Fall interrupt enabled status.
syundo0730	0:78ba160ba5f3	1467	* Will be set 0 for disabled, 1 for enabled.
syundo0730	0:78ba160ba5f3	1468	* @return Current interrupt enabled status
syundo0730	0:78ba160ba5f3	1469	* @see MPU9150_RA_INT_ENABLE
syundo0730	0:78ba160ba5f3	1470	* @see MPU9150_INTERRUPT_FF_BIT
syundo0730	0:78ba160ba5f3	1471	**/
syundo0730	0:78ba160ba5f3	1472	bool MPU9150::getIntFreefallEnabled() {
syundo0730	0:78ba160ba5f3	1473	I2Cdev::readBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_FF_BIT, buffer);
syundo0730	0:78ba160ba5f3	1474	return buffer[0];
syundo0730	0:78ba160ba5f3	1475	}
syundo0730	0:78ba160ba5f3	1476	/** Set Free Fall interrupt enabled status.
syundo0730	0:78ba160ba5f3	1477	* @param enabled New interrupt enabled status
syundo0730	0:78ba160ba5f3	1478	* @see getIntFreefallEnabled()
syundo0730	0:78ba160ba5f3	1479	* @see MPU9150_RA_INT_ENABLE
syundo0730	0:78ba160ba5f3	1480	* @see MPU9150_INTERRUPT_FF_BIT
syundo0730	0:78ba160ba5f3	1481	**/
syundo0730	0:78ba160ba5f3	1482	void MPU9150::setIntFreefallEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	1483	I2Cdev::writeBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_FF_BIT, enabled);
syundo0730	0:78ba160ba5f3	1484	}
syundo0730	0:78ba160ba5f3	1485	/** Get Motion Detection interrupt enabled status.
syundo0730	0:78ba160ba5f3	1486	* Will be set 0 for disabled, 1 for enabled.
syundo0730	0:78ba160ba5f3	1487	* @return Current interrupt enabled status
syundo0730	0:78ba160ba5f3	1488	* @see MPU9150_RA_INT_ENABLE
syundo0730	0:78ba160ba5f3	1489	* @see MPU9150_INTERRUPT_MOT_BIT
syundo0730	0:78ba160ba5f3	1490	**/
syundo0730	0:78ba160ba5f3	1491	bool MPU9150::getIntMotionEnabled() {
syundo0730	0:78ba160ba5f3	1492	I2Cdev::readBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_MOT_BIT, buffer);
syundo0730	0:78ba160ba5f3	1493	return buffer[0];
syundo0730	0:78ba160ba5f3	1494	}
syundo0730	0:78ba160ba5f3	1495	/** Set Motion Detection interrupt enabled status.
syundo0730	0:78ba160ba5f3	1496	* @param enabled New interrupt enabled status
syundo0730	0:78ba160ba5f3	1497	* @see getIntMotionEnabled()
syundo0730	0:78ba160ba5f3	1498	* @see MPU9150_RA_INT_ENABLE
syundo0730	0:78ba160ba5f3	1499	* @see MPU9150_INTERRUPT_MOT_BIT
syundo0730	0:78ba160ba5f3	1500	**/
syundo0730	0:78ba160ba5f3	1501	void MPU9150::setIntMotionEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	1502	I2Cdev::writeBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_MOT_BIT, enabled);
syundo0730	0:78ba160ba5f3	1503	}
syundo0730	0:78ba160ba5f3	1504	/** Get Zero Motion Detection interrupt enabled status.
syundo0730	0:78ba160ba5f3	1505	* Will be set 0 for disabled, 1 for enabled.
syundo0730	0:78ba160ba5f3	1506	* @return Current interrupt enabled status
syundo0730	0:78ba160ba5f3	1507	* @see MPU9150_RA_INT_ENABLE
syundo0730	0:78ba160ba5f3	1508	* @see MPU9150_INTERRUPT_ZMOT_BIT
syundo0730	0:78ba160ba5f3	1509	**/
syundo0730	0:78ba160ba5f3	1510	bool MPU9150::getIntZeroMotionEnabled() {
syundo0730	0:78ba160ba5f3	1511	I2Cdev::readBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_ZMOT_BIT, buffer);
syundo0730	0:78ba160ba5f3	1512	return buffer[0];
syundo0730	0:78ba160ba5f3	1513	}
syundo0730	0:78ba160ba5f3	1514	/** Set Zero Motion Detection interrupt enabled status.
syundo0730	0:78ba160ba5f3	1515	* @param enabled New interrupt enabled status
syundo0730	0:78ba160ba5f3	1516	* @see getIntZeroMotionEnabled()
syundo0730	0:78ba160ba5f3	1517	* @see MPU9150_RA_INT_ENABLE
syundo0730	0:78ba160ba5f3	1518	* @see MPU9150_INTERRUPT_ZMOT_BIT
syundo0730	0:78ba160ba5f3	1519	**/
syundo0730	0:78ba160ba5f3	1520	void MPU9150::setIntZeroMotionEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	1521	I2Cdev::writeBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_ZMOT_BIT, enabled);
syundo0730	0:78ba160ba5f3	1522	}
syundo0730	0:78ba160ba5f3	1523	/** Get FIFO Buffer Overflow interrupt enabled status.
syundo0730	0:78ba160ba5f3	1524	* Will be set 0 for disabled, 1 for enabled.
syundo0730	0:78ba160ba5f3	1525	* @return Current interrupt enabled status
syundo0730	0:78ba160ba5f3	1526	* @see MPU9150_RA_INT_ENABLE
syundo0730	0:78ba160ba5f3	1527	* @see MPU9150_INTERRUPT_FIFO_OFLOW_BIT
syundo0730	0:78ba160ba5f3	1528	**/
syundo0730	0:78ba160ba5f3	1529	bool MPU9150::getIntFIFOBufferOverflowEnabled() {
syundo0730	0:78ba160ba5f3	1530	I2Cdev::readBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_FIFO_OFLOW_BIT, buffer);
syundo0730	0:78ba160ba5f3	1531	return buffer[0];
syundo0730	0:78ba160ba5f3	1532	}
syundo0730	0:78ba160ba5f3	1533	/** Set FIFO Buffer Overflow interrupt enabled status.
syundo0730	0:78ba160ba5f3	1534	* @param enabled New interrupt enabled status
syundo0730	0:78ba160ba5f3	1535	* @see getIntFIFOBufferOverflowEnabled()
syundo0730	0:78ba160ba5f3	1536	* @see MPU9150_RA_INT_ENABLE
syundo0730	0:78ba160ba5f3	1537	* @see MPU9150_INTERRUPT_FIFO_OFLOW_BIT
syundo0730	0:78ba160ba5f3	1538	**/
syundo0730	0:78ba160ba5f3	1539	void MPU9150::setIntFIFOBufferOverflowEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	1540	I2Cdev::writeBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_FIFO_OFLOW_BIT, enabled);
syundo0730	0:78ba160ba5f3	1541	}
syundo0730	0:78ba160ba5f3	1542	/** Get I2C Master interrupt enabled status.
syundo0730	0:78ba160ba5f3	1543	* This enables any of the I2C Master interrupt sources to generate an
syundo0730	0:78ba160ba5f3	1544	* interrupt. Will be set 0 for disabled, 1 for enabled.
syundo0730	0:78ba160ba5f3	1545	* @return Current interrupt enabled status
syundo0730	0:78ba160ba5f3	1546	* @see MPU9150_RA_INT_ENABLE
syundo0730	0:78ba160ba5f3	1547	* @see MPU9150_INTERRUPT_I2C_MST_INT_BIT
syundo0730	0:78ba160ba5f3	1548	**/
syundo0730	0:78ba160ba5f3	1549	bool MPU9150::getIntI2CMasterEnabled() {
syundo0730	0:78ba160ba5f3	1550	I2Cdev::readBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_I2C_MST_INT_BIT, buffer);
syundo0730	0:78ba160ba5f3	1551	return buffer[0];
syundo0730	0:78ba160ba5f3	1552	}
syundo0730	0:78ba160ba5f3	1553	/** Set I2C Master interrupt enabled status.
syundo0730	0:78ba160ba5f3	1554	* @param enabled New interrupt enabled status
syundo0730	0:78ba160ba5f3	1555	* @see getIntI2CMasterEnabled()
syundo0730	0:78ba160ba5f3	1556	* @see MPU9150_RA_INT_ENABLE
syundo0730	0:78ba160ba5f3	1557	* @see MPU9150_INTERRUPT_I2C_MST_INT_BIT
syundo0730	0:78ba160ba5f3	1558	**/
syundo0730	0:78ba160ba5f3	1559	void MPU9150::setIntI2CMasterEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	1560	I2Cdev::writeBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_I2C_MST_INT_BIT, enabled);
syundo0730	0:78ba160ba5f3	1561	}
syundo0730	0:78ba160ba5f3	1562	/** Get Data Ready interrupt enabled setting.
syundo0730	0:78ba160ba5f3	1563	* This event occurs each time a write operation to all of the sensor registers
syundo0730	0:78ba160ba5f3	1564	* has been completed. Will be set 0 for disabled, 1 for enabled.
syundo0730	0:78ba160ba5f3	1565	* @return Current interrupt enabled status
syundo0730	0:78ba160ba5f3	1566	* @see MPU9150_RA_INT_ENABLE
syundo0730	0:78ba160ba5f3	1567	* @see MPU9150_INTERRUPT_DATA_RDY_BIT
syundo0730	0:78ba160ba5f3	1568	*/
syundo0730	0:78ba160ba5f3	1569	bool MPU9150::getIntDataReadyEnabled() {
syundo0730	0:78ba160ba5f3	1570	I2Cdev::readBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_DATA_RDY_BIT, buffer);
syundo0730	0:78ba160ba5f3	1571	return buffer[0];
syundo0730	0:78ba160ba5f3	1572	}
syundo0730	0:78ba160ba5f3	1573	/** Set Data Ready interrupt enabled status.
syundo0730	0:78ba160ba5f3	1574	* @param enabled New interrupt enabled status
syundo0730	0:78ba160ba5f3	1575	* @see getIntDataReadyEnabled()
syundo0730	0:78ba160ba5f3	1576	* @see MPU9150_RA_INT_CFG
syundo0730	0:78ba160ba5f3	1577	* @see MPU9150_INTERRUPT_DATA_RDY_BIT
syundo0730	0:78ba160ba5f3	1578	*/
syundo0730	0:78ba160ba5f3	1579	void MPU9150::setIntDataReadyEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	1580	I2Cdev::writeBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_DATA_RDY_BIT, enabled);
syundo0730	0:78ba160ba5f3	1581	}
syundo0730	0:78ba160ba5f3	1582
syundo0730	0:78ba160ba5f3	1583	// INT_STATUS register
syundo0730	0:78ba160ba5f3	1584
syundo0730	0:78ba160ba5f3	1585	/** Get full set of interrupt status bits.
syundo0730	0:78ba160ba5f3	1586	* These bits clear to 0 after the register has been read. Very useful
syundo0730	0:78ba160ba5f3	1587	* for getting multiple INT statuses, since each single bit read clears
syundo0730	0:78ba160ba5f3	1588	* all of them because it has to read the whole byte.
syundo0730	0:78ba160ba5f3	1589	* @return Current interrupt status
syundo0730	0:78ba160ba5f3	1590	* @see MPU9150_RA_INT_STATUS
syundo0730	0:78ba160ba5f3	1591	*/
syundo0730	0:78ba160ba5f3	1592	uint8_t MPU9150::getIntStatus() {
syundo0730	0:78ba160ba5f3	1593	I2Cdev::readByte(devAddr, MPU9150_RA_INT_STATUS, buffer);
syundo0730	0:78ba160ba5f3	1594	return buffer[0];
syundo0730	0:78ba160ba5f3	1595	}
syundo0730	0:78ba160ba5f3	1596	/** Get Free Fall interrupt status.
syundo0730	0:78ba160ba5f3	1597	* This bit automatically sets to 1 when a Free Fall interrupt has been
syundo0730	0:78ba160ba5f3	1598	* generated. The bit clears to 0 after the register has been read.
syundo0730	0:78ba160ba5f3	1599	* @return Current interrupt status
syundo0730	0:78ba160ba5f3	1600	* @see MPU9150_RA_INT_STATUS
syundo0730	0:78ba160ba5f3	1601	* @see MPU9150_INTERRUPT_FF_BIT
syundo0730	0:78ba160ba5f3	1602	*/
syundo0730	0:78ba160ba5f3	1603	bool MPU9150::getIntFreefallStatus() {
syundo0730	0:78ba160ba5f3	1604	I2Cdev::readBit(devAddr, MPU9150_RA_INT_STATUS, MPU9150_INTERRUPT_FF_BIT, buffer);
syundo0730	0:78ba160ba5f3	1605	return buffer[0];
syundo0730	0:78ba160ba5f3	1606	}
syundo0730	0:78ba160ba5f3	1607	/** Get Motion Detection interrupt status.
syundo0730	0:78ba160ba5f3	1608	* This bit automatically sets to 1 when a Motion Detection interrupt has been
syundo0730	0:78ba160ba5f3	1609	* generated. The bit clears to 0 after the register has been read.
syundo0730	0:78ba160ba5f3	1610	* @return Current interrupt status
syundo0730	0:78ba160ba5f3	1611	* @see MPU9150_RA_INT_STATUS
syundo0730	0:78ba160ba5f3	1612	* @see MPU9150_INTERRUPT_MOT_BIT
syundo0730	0:78ba160ba5f3	1613	*/
syundo0730	0:78ba160ba5f3	1614	bool MPU9150::getIntMotionStatus() {
syundo0730	0:78ba160ba5f3	1615	I2Cdev::readBit(devAddr, MPU9150_RA_INT_STATUS, MPU9150_INTERRUPT_MOT_BIT, buffer);
syundo0730	0:78ba160ba5f3	1616	return buffer[0];
syundo0730	0:78ba160ba5f3	1617	}
syundo0730	0:78ba160ba5f3	1618	/** Get Zero Motion Detection interrupt status.
syundo0730	0:78ba160ba5f3	1619	* This bit automatically sets to 1 when a Zero Motion Detection interrupt has
syundo0730	0:78ba160ba5f3	1620	* been generated. The bit clears to 0 after the register has been read.
syundo0730	0:78ba160ba5f3	1621	* @return Current interrupt status
syundo0730	0:78ba160ba5f3	1622	* @see MPU9150_RA_INT_STATUS
syundo0730	0:78ba160ba5f3	1623	* @see MPU9150_INTERRUPT_ZMOT_BIT
syundo0730	0:78ba160ba5f3	1624	*/
syundo0730	0:78ba160ba5f3	1625	bool MPU9150::getIntZeroMotionStatus() {
syundo0730	0:78ba160ba5f3	1626	I2Cdev::readBit(devAddr, MPU9150_RA_INT_STATUS, MPU9150_INTERRUPT_ZMOT_BIT, buffer);
syundo0730	0:78ba160ba5f3	1627	return buffer[0];
syundo0730	0:78ba160ba5f3	1628	}
syundo0730	0:78ba160ba5f3	1629	/** Get FIFO Buffer Overflow interrupt status.
syundo0730	0:78ba160ba5f3	1630	* This bit automatically sets to 1 when a Free Fall interrupt has been
syundo0730	0:78ba160ba5f3	1631	* generated. The bit clears to 0 after the register has been read.
syundo0730	0:78ba160ba5f3	1632	* @return Current interrupt status
syundo0730	0:78ba160ba5f3	1633	* @see MPU9150_RA_INT_STATUS
syundo0730	0:78ba160ba5f3	1634	* @see MPU9150_INTERRUPT_FIFO_OFLOW_BIT
syundo0730	0:78ba160ba5f3	1635	*/
syundo0730	0:78ba160ba5f3	1636	bool MPU9150::getIntFIFOBufferOverflowStatus() {
syundo0730	0:78ba160ba5f3	1637	I2Cdev::readBit(devAddr, MPU9150_RA_INT_STATUS, MPU9150_INTERRUPT_FIFO_OFLOW_BIT, buffer);
syundo0730	0:78ba160ba5f3	1638	return buffer[0];
syundo0730	0:78ba160ba5f3	1639	}
syundo0730	0:78ba160ba5f3	1640	/** Get I2C Master interrupt status.
syundo0730	0:78ba160ba5f3	1641	* This bit automatically sets to 1 when an I2C Master interrupt has been
syundo0730	0:78ba160ba5f3	1642	* generated. For a list of I2C Master interrupts, please refer to Register 54.
syundo0730	0:78ba160ba5f3	1643	* The bit clears to 0 after the register has been read.
syundo0730	0:78ba160ba5f3	1644	* @return Current interrupt status
syundo0730	0:78ba160ba5f3	1645	* @see MPU9150_RA_INT_STATUS
syundo0730	0:78ba160ba5f3	1646	* @see MPU9150_INTERRUPT_I2C_MST_INT_BIT
syundo0730	0:78ba160ba5f3	1647	*/
syundo0730	0:78ba160ba5f3	1648	bool MPU9150::getIntI2CMasterStatus() {
syundo0730	0:78ba160ba5f3	1649	I2Cdev::readBit(devAddr, MPU9150_RA_INT_STATUS, MPU9150_INTERRUPT_I2C_MST_INT_BIT, buffer);
syundo0730	0:78ba160ba5f3	1650	return buffer[0];
syundo0730	0:78ba160ba5f3	1651	}
syundo0730	0:78ba160ba5f3	1652	/** Get Data Ready interrupt status.
syundo0730	0:78ba160ba5f3	1653	* This bit automatically sets to 1 when a Data Ready interrupt has been
syundo0730	0:78ba160ba5f3	1654	* generated. The bit clears to 0 after the register has been read.
syundo0730	0:78ba160ba5f3	1655	* @return Current interrupt status
syundo0730	0:78ba160ba5f3	1656	* @see MPU9150_RA_INT_STATUS
syundo0730	0:78ba160ba5f3	1657	* @see MPU9150_INTERRUPT_DATA_RDY_BIT
syundo0730	0:78ba160ba5f3	1658	*/
syundo0730	0:78ba160ba5f3	1659	bool MPU9150::getIntDataReadyStatus() {
syundo0730	0:78ba160ba5f3	1660	I2Cdev::readBit(devAddr, MPU9150_RA_INT_STATUS, MPU9150_INTERRUPT_DATA_RDY_BIT, buffer);
syundo0730	0:78ba160ba5f3	1661	return buffer[0];
syundo0730	0:78ba160ba5f3	1662	}
syundo0730	0:78ba160ba5f3	1663
syundo0730	0:78ba160ba5f3	1664	// ACCEL_OUT_ registers
syundo0730	0:78ba160ba5f3	1665
syundo0730	0:78ba160ba5f3	1666	/** Get raw 9-axis motion sensor readings (accel/gyro/compass).
syundo0730	0:78ba160ba5f3	1667	* FUNCTION NOT FULLY IMPLEMENTED YET.
syundo0730	0:78ba160ba5f3	1668	* @param ax 16-bit signed integer container for accelerometer X-axis value
syundo0730	0:78ba160ba5f3	1669	* @param ay 16-bit signed integer container for accelerometer Y-axis value
syundo0730	0:78ba160ba5f3	1670	* @param az 16-bit signed integer container for accelerometer Z-axis value
syundo0730	0:78ba160ba5f3	1671	* @param gx 16-bit signed integer container for gyroscope X-axis value
syundo0730	0:78ba160ba5f3	1672	* @param gy 16-bit signed integer container for gyroscope Y-axis value
syundo0730	0:78ba160ba5f3	1673	* @param gz 16-bit signed integer container for gyroscope Z-axis value
syundo0730	0:78ba160ba5f3	1674	* @param mx 16-bit signed integer container for magnetometer X-axis value
syundo0730	0:78ba160ba5f3	1675	* @param my 16-bit signed integer container for magnetometer Y-axis value
syundo0730	0:78ba160ba5f3	1676	* @param mz 16-bit signed integer container for magnetometer Z-axis value
syundo0730	0:78ba160ba5f3	1677	* @see getMotion6()
syundo0730	0:78ba160ba5f3	1678	* @see getAcceleration()
syundo0730	0:78ba160ba5f3	1679	* @see getRotation()
syundo0730	0:78ba160ba5f3	1680	* @see MPU9150_RA_ACCEL_XOUT_H
syundo0730	0:78ba160ba5f3	1681	*/
syundo0730	0:78ba160ba5f3	1682	void MPU9150::getMotion9(int16_t* ax, int16_t* ay, int16_t* az, int16_t* gx, int16_t* gy, int16_t* gz, int16_t* mx, int16_t* my, int16_t* mz) {
syundo0730	0:78ba160ba5f3	1683
syundo0730	0:78ba160ba5f3	1684	//get accel and gyro
syundo0730	0:78ba160ba5f3	1685	getMotion6(ax, ay, az, gx, gy, gz);
syundo0730	0:78ba160ba5f3	1686
syundo0730	0:78ba160ba5f3	1687	//read mag
syundo0730	0:78ba160ba5f3	1688	I2Cdev::writeByte(devAddr, MPU9150_RA_INT_PIN_CFG, 0x02); //set i2c bypass enable pin to true to access magnetometer
syundo0730	0:78ba160ba5f3	1689	wait_ms(10);
syundo0730	0:78ba160ba5f3	1690	I2Cdev::writeByte(MPU9150_RA_MAG_ADDRESS, 0x0A, 0x01); //enable the magnetometer
syundo0730	0:78ba160ba5f3	1691	wait_ms(10);
syundo0730	0:78ba160ba5f3	1692	I2Cdev::readBytes(MPU9150_RA_MAG_ADDRESS, MPU9150_RA_MAG_XOUT_L, 6, buffer);
syundo0730	0:78ba160ba5f3	1693	*mx = (((int16_t)buffer[0]) << 8) \| buffer[1];
syundo0730	0:78ba160ba5f3	1694	*my = (((int16_t)buffer[2]) << 8) \| buffer[3];
syundo0730	0:78ba160ba5f3	1695	*mz = (((int16_t)buffer[4]) << 8) \| buffer[5];
syundo0730	0:78ba160ba5f3	1696	}
syundo0730	0:78ba160ba5f3	1697	/** Get raw 6-axis motion sensor readings (accel/gyro).
syundo0730	0:78ba160ba5f3	1698	* Retrieves all currently available motion sensor values.
syundo0730	0:78ba160ba5f3	1699	* @param ax 16-bit signed integer container for accelerometer X-axis value
syundo0730	0:78ba160ba5f3	1700	* @param ay 16-bit signed integer container for accelerometer Y-axis value
syundo0730	0:78ba160ba5f3	1701	* @param az 16-bit signed integer container for accelerometer Z-axis value
syundo0730	0:78ba160ba5f3	1702	* @param gx 16-bit signed integer container for gyroscope X-axis value
syundo0730	0:78ba160ba5f3	1703	* @param gy 16-bit signed integer container for gyroscope Y-axis value
syundo0730	0:78ba160ba5f3	1704	* @param gz 16-bit signed integer container for gyroscope Z-axis value
syundo0730	0:78ba160ba5f3	1705	* @see getAcceleration()
syundo0730	0:78ba160ba5f3	1706	* @see getRotation()
syundo0730	0:78ba160ba5f3	1707	* @see MPU9150_RA_ACCEL_XOUT_H
syundo0730	0:78ba160ba5f3	1708	*/
syundo0730	0:78ba160ba5f3	1709	void MPU9150::getMotion6(int16_t* ax, int16_t* ay, int16_t* az, int16_t* gx, int16_t* gy, int16_t* gz) {
syundo0730	0:78ba160ba5f3	1710	I2Cdev::readBytes(devAddr, MPU9150_RA_ACCEL_XOUT_H, 14, buffer);
syundo0730	0:78ba160ba5f3	1711	*ax = (((int16_t)buffer[0]) << 8) \| buffer[1];
syundo0730	0:78ba160ba5f3	1712	*ay = (((int16_t)buffer[2]) << 8) \| buffer[3];
syundo0730	0:78ba160ba5f3	1713	*az = (((int16_t)buffer[4]) << 8) \| buffer[5];
syundo0730	0:78ba160ba5f3	1714	*gx = (((int16_t)buffer[8]) << 8) \| buffer[9];
syundo0730	0:78ba160ba5f3	1715	*gy = (((int16_t)buffer[10]) << 8) \| buffer[11];
syundo0730	0:78ba160ba5f3	1716	*gz = (((int16_t)buffer[12]) << 8) \| buffer[13];
syundo0730	0:78ba160ba5f3	1717	}
syundo0730	0:78ba160ba5f3	1718	/** Get 3-axis accelerometer readings.
syundo0730	0:78ba160ba5f3	1719	* These registers store the most recent accelerometer measurements.
syundo0730	0:78ba160ba5f3	1720	* Accelerometer measurements are written to these registers at the Sample Rate
syundo0730	0:78ba160ba5f3	1721	* as defined in Register 25.
syundo0730	0:78ba160ba5f3	1722	*
syundo0730	0:78ba160ba5f3	1723	* The accelerometer measurement registers, along with the temperature
syundo0730	0:78ba160ba5f3	1724	* measurement registers, gyroscope measurement registers, and external sensor
syundo0730	0:78ba160ba5f3	1725	* data registers, are composed of two sets of registers: an internal register
syundo0730	0:78ba160ba5f3	1726	* set and a user-facing read register set.
syundo0730	0:78ba160ba5f3	1727	*
syundo0730	0:78ba160ba5f3	1728	* The data within the accelerometer sensors' internal register set is always
syundo0730	0:78ba160ba5f3	1729	* updated at the Sample Rate. Meanwhile, the user-facing read register set
syundo0730	0:78ba160ba5f3	1730	* duplicates the internal register set's data values whenever the serial
syundo0730	0:78ba160ba5f3	1731	* interface is idle. This guarantees that a burst read of sensor registers will
syundo0730	0:78ba160ba5f3	1732	* read measurements from the same sampling instant. Note that if burst reads
syundo0730	0:78ba160ba5f3	1733	* are not used, the user is responsible for ensuring a set of single byte reads
syundo0730	0:78ba160ba5f3	1734	* correspond to a single sampling instant by checking the Data Ready interrupt.
syundo0730	0:78ba160ba5f3	1735	*
syundo0730	0:78ba160ba5f3	1736	* Each 16-bit accelerometer measurement has a full scale defined in ACCEL_FS
syundo0730	0:78ba160ba5f3	1737	* (Register 28). For each full scale setting, the accelerometers' sensitivity
syundo0730	0:78ba160ba5f3	1738	* per LSB in ACCEL_xOUT is shown in the table below:
syundo0730	0:78ba160ba5f3	1739	*
syundo0730	0:78ba160ba5f3	1740	* <pre>
syundo0730	0:78ba160ba5f3	1741	* AFS_SEL \| Full Scale Range \| LSB Sensitivity
syundo0730	0:78ba160ba5f3	1742	* --------+------------------+----------------
syundo0730	0:78ba160ba5f3	1743	* 0 \| +/- 2g \| 8192 LSB/mg
syundo0730	0:78ba160ba5f3	1744	* 1 \| +/- 4g \| 4096 LSB/mg
syundo0730	0:78ba160ba5f3	1745	* 2 \| +/- 8g \| 2048 LSB/mg
syundo0730	0:78ba160ba5f3	1746	* 3 \| +/- 16g \| 1024 LSB/mg
syundo0730	0:78ba160ba5f3	1747	* </pre>
syundo0730	0:78ba160ba5f3	1748	*
syundo0730	0:78ba160ba5f3	1749	* @param x 16-bit signed integer container for X-axis acceleration
syundo0730	0:78ba160ba5f3	1750	* @param y 16-bit signed integer container for Y-axis acceleration
syundo0730	0:78ba160ba5f3	1751	* @param z 16-bit signed integer container for Z-axis acceleration
syundo0730	0:78ba160ba5f3	1752	* @see MPU9150_RA_GYRO_XOUT_H
syundo0730	0:78ba160ba5f3	1753	*/
syundo0730	0:78ba160ba5f3	1754	void MPU9150::getAcceleration(int16_t* x, int16_t* y, int16_t* z) {
syundo0730	0:78ba160ba5f3	1755	I2Cdev::readBytes(devAddr, MPU9150_RA_ACCEL_XOUT_H, 6, buffer);
syundo0730	0:78ba160ba5f3	1756	*x = (((int16_t)buffer[0]) << 8) \| buffer[1];
syundo0730	0:78ba160ba5f3	1757	*y = (((int16_t)buffer[2]) << 8) \| buffer[3];
syundo0730	0:78ba160ba5f3	1758	*z = (((int16_t)buffer[4]) << 8) \| buffer[5];
syundo0730	0:78ba160ba5f3	1759	}
syundo0730	0:78ba160ba5f3	1760	/** Get X-axis accelerometer reading.
syundo0730	0:78ba160ba5f3	1761	* @return X-axis acceleration measurement in 16-bit 2's complement format
syundo0730	0:78ba160ba5f3	1762	* @see getMotion6()
syundo0730	0:78ba160ba5f3	1763	* @see MPU9150_RA_ACCEL_XOUT_H
syundo0730	0:78ba160ba5f3	1764	*/
syundo0730	0:78ba160ba5f3	1765	int16_t MPU9150::getAccelerationX() {
syundo0730	0:78ba160ba5f3	1766	I2Cdev::readBytes(devAddr, MPU9150_RA_ACCEL_XOUT_H, 2, buffer);
syundo0730	0:78ba160ba5f3	1767	return (((int16_t)buffer[0]) << 8) \| buffer[1];
syundo0730	0:78ba160ba5f3	1768	}
syundo0730	0:78ba160ba5f3	1769	/** Get Y-axis accelerometer reading.
syundo0730	0:78ba160ba5f3	1770	* @return Y-axis acceleration measurement in 16-bit 2's complement format
syundo0730	0:78ba160ba5f3	1771	* @see getMotion6()
syundo0730	0:78ba160ba5f3	1772	* @see MPU9150_RA_ACCEL_YOUT_H
syundo0730	0:78ba160ba5f3	1773	*/
syundo0730	0:78ba160ba5f3	1774	int16_t MPU9150::getAccelerationY() {
syundo0730	0:78ba160ba5f3	1775	I2Cdev::readBytes(devAddr, MPU9150_RA_ACCEL_YOUT_H, 2, buffer);
syundo0730	0:78ba160ba5f3	1776	return (((int16_t)buffer[0]) << 8) \| buffer[1];
syundo0730	0:78ba160ba5f3	1777	}
syundo0730	0:78ba160ba5f3	1778	/** Get Z-axis accelerometer reading.
syundo0730	0:78ba160ba5f3	1779	* @return Z-axis acceleration measurement in 16-bit 2's complement format
syundo0730	0:78ba160ba5f3	1780	* @see getMotion6()
syundo0730	0:78ba160ba5f3	1781	* @see MPU9150_RA_ACCEL_ZOUT_H
syundo0730	0:78ba160ba5f3	1782	*/
syundo0730	0:78ba160ba5f3	1783	int16_t MPU9150::getAccelerationZ() {
syundo0730	0:78ba160ba5f3	1784	I2Cdev::readBytes(devAddr, MPU9150_RA_ACCEL_ZOUT_H, 2, buffer);
syundo0730	0:78ba160ba5f3	1785	return (((int16_t)buffer[0]) << 8) \| buffer[1];
syundo0730	0:78ba160ba5f3	1786	}
syundo0730	0:78ba160ba5f3	1787
syundo0730	0:78ba160ba5f3	1788	// TEMP_OUT_* registers
syundo0730	0:78ba160ba5f3	1789
syundo0730	0:78ba160ba5f3	1790	/** Get current internal temperature.
syundo0730	0:78ba160ba5f3	1791	* @return Temperature reading in 16-bit 2's complement format
syundo0730	0:78ba160ba5f3	1792	* @see MPU9150_RA_TEMP_OUT_H
syundo0730	0:78ba160ba5f3	1793	*/
syundo0730	0:78ba160ba5f3	1794	int16_t MPU9150::getTemperature() {
syundo0730	0:78ba160ba5f3	1795	I2Cdev::readBytes(devAddr, MPU9150_RA_TEMP_OUT_H, 2, buffer);
syundo0730	0:78ba160ba5f3	1796	return (((int16_t)buffer[0]) << 8) \| buffer[1];
syundo0730	0:78ba160ba5f3	1797	}
syundo0730	0:78ba160ba5f3	1798
syundo0730	0:78ba160ba5f3	1799	// GYRO_OUT_ registers
syundo0730	0:78ba160ba5f3	1800
syundo0730	0:78ba160ba5f3	1801	/** Get 3-axis gyroscope readings.
syundo0730	0:78ba160ba5f3	1802	* These gyroscope measurement registers, along with the accelerometer
syundo0730	0:78ba160ba5f3	1803	* measurement registers, temperature measurement registers, and external sensor
syundo0730	0:78ba160ba5f3	1804	* data registers, are composed of two sets of registers: an internal register
syundo0730	0:78ba160ba5f3	1805	* set and a user-facing read register set.
syundo0730	0:78ba160ba5f3	1806	* The data within the gyroscope sensors' internal register set is always
syundo0730	0:78ba160ba5f3	1807	* updated at the Sample Rate. Meanwhile, the user-facing read register set
syundo0730	0:78ba160ba5f3	1808	* duplicates the internal register set's data values whenever the serial
syundo0730	0:78ba160ba5f3	1809	* interface is idle. This guarantees that a burst read of sensor registers will
syundo0730	0:78ba160ba5f3	1810	* read measurements from the same sampling instant. Note that if burst reads
syundo0730	0:78ba160ba5f3	1811	* are not used, the user is responsible for ensuring a set of single byte reads
syundo0730	0:78ba160ba5f3	1812	* correspond to a single sampling instant by checking the Data Ready interrupt.
syundo0730	0:78ba160ba5f3	1813	*
syundo0730	0:78ba160ba5f3	1814	* Each 16-bit gyroscope measurement has a full scale defined in FS_SEL
syundo0730	0:78ba160ba5f3	1815	* (Register 27). For each full scale setting, the gyroscopes' sensitivity per
syundo0730	0:78ba160ba5f3	1816	* LSB in GYRO_xOUT is shown in the table below:
syundo0730	0:78ba160ba5f3	1817	*
syundo0730	0:78ba160ba5f3	1818	* <pre>
syundo0730	0:78ba160ba5f3	1819	* FS_SEL \| Full Scale Range \| LSB Sensitivity
syundo0730	0:78ba160ba5f3	1820	* -------+--------------------+----------------
syundo0730	0:78ba160ba5f3	1821	* 0 \| +/- 250 degrees/s \| 131 LSB/deg/s
syundo0730	0:78ba160ba5f3	1822	* 1 \| +/- 500 degrees/s \| 65.5 LSB/deg/s
syundo0730	0:78ba160ba5f3	1823	* 2 \| +/- 1000 degrees/s \| 32.8 LSB/deg/s
syundo0730	0:78ba160ba5f3	1824	* 3 \| +/- 2000 degrees/s \| 16.4 LSB/deg/s
syundo0730	0:78ba160ba5f3	1825	* </pre>
syundo0730	0:78ba160ba5f3	1826	*
syundo0730	0:78ba160ba5f3	1827	* @param x 16-bit signed integer container for X-axis rotation
syundo0730	0:78ba160ba5f3	1828	* @param y 16-bit signed integer container for Y-axis rotation
syundo0730	0:78ba160ba5f3	1829	* @param z 16-bit signed integer container for Z-axis rotation
syundo0730	0:78ba160ba5f3	1830	* @see getMotion6()
syundo0730	0:78ba160ba5f3	1831	* @see MPU9150_RA_GYRO_XOUT_H
syundo0730	0:78ba160ba5f3	1832	*/
syundo0730	0:78ba160ba5f3	1833	void MPU9150::getRotation(int16_t* x, int16_t* y, int16_t* z) {
syundo0730	0:78ba160ba5f3	1834	I2Cdev::readBytes(devAddr, MPU9150_RA_GYRO_XOUT_H, 6, buffer);
syundo0730	0:78ba160ba5f3	1835	*x = (((int16_t)buffer[0]) << 8) \| buffer[1];
syundo0730	0:78ba160ba5f3	1836	*y = (((int16_t)buffer[2]) << 8) \| buffer[3];
syundo0730	0:78ba160ba5f3	1837	*z = (((int16_t)buffer[4]) << 8) \| buffer[5];
syundo0730	0:78ba160ba5f3	1838	}
syundo0730	0:78ba160ba5f3	1839	/** Get X-axis gyroscope reading.
syundo0730	0:78ba160ba5f3	1840	* @return X-axis rotation measurement in 16-bit 2's complement format
syundo0730	0:78ba160ba5f3	1841	* @see getMotion6()
syundo0730	0:78ba160ba5f3	1842	* @see MPU9150_RA_GYRO_XOUT_H
syundo0730	0:78ba160ba5f3	1843	*/
syundo0730	0:78ba160ba5f3	1844	int16_t MPU9150::getRotationX() {
syundo0730	0:78ba160ba5f3	1845	I2Cdev::readBytes(devAddr, MPU9150_RA_GYRO_XOUT_H, 2, buffer);
syundo0730	0:78ba160ba5f3	1846	return (((int16_t)buffer[0]) << 8) \| buffer[1];
syundo0730	0:78ba160ba5f3	1847	}
syundo0730	0:78ba160ba5f3	1848	/** Get Y-axis gyroscope reading.
syundo0730	0:78ba160ba5f3	1849	* @return Y-axis rotation measurement in 16-bit 2's complement format
syundo0730	0:78ba160ba5f3	1850	* @see getMotion6()
syundo0730	0:78ba160ba5f3	1851	* @see MPU9150_RA_GYRO_YOUT_H
syundo0730	0:78ba160ba5f3	1852	*/
syundo0730	0:78ba160ba5f3	1853	int16_t MPU9150::getRotationY() {
syundo0730	0:78ba160ba5f3	1854	I2Cdev::readBytes(devAddr, MPU9150_RA_GYRO_YOUT_H, 2, buffer);
syundo0730	0:78ba160ba5f3	1855	return (((int16_t)buffer[0]) << 8) \| buffer[1];
syundo0730	0:78ba160ba5f3	1856	}
syundo0730	0:78ba160ba5f3	1857	/** Get Z-axis gyroscope reading.
syundo0730	0:78ba160ba5f3	1858	* @return Z-axis rotation measurement in 16-bit 2's complement format
syundo0730	0:78ba160ba5f3	1859	* @see getMotion6()
syundo0730	0:78ba160ba5f3	1860	* @see MPU9150_RA_GYRO_ZOUT_H
syundo0730	0:78ba160ba5f3	1861	*/
syundo0730	0:78ba160ba5f3	1862	int16_t MPU9150::getRotationZ() {
syundo0730	0:78ba160ba5f3	1863	I2Cdev::readBytes(devAddr, MPU9150_RA_GYRO_ZOUT_H, 2, buffer);
syundo0730	0:78ba160ba5f3	1864	return (((int16_t)buffer[0]) << 8) \| buffer[1];
syundo0730	0:78ba160ba5f3	1865	}
syundo0730	0:78ba160ba5f3	1866
syundo0730	0:78ba160ba5f3	1867	// EXT_SENS_DATA_* registers
syundo0730	0:78ba160ba5f3	1868
syundo0730	0:78ba160ba5f3	1869	/** Read single byte from external sensor data register.
syundo0730	0:78ba160ba5f3	1870	* These registers store data read from external sensors by the Slave 0, 1, 2,
syundo0730	0:78ba160ba5f3	1871	* and 3 on the auxiliary I2C interface. Data read by Slave 4 is stored in
syundo0730	0:78ba160ba5f3	1872	* I2C_SLV4_DI (Register 53).
syundo0730	0:78ba160ba5f3	1873	*
syundo0730	0:78ba160ba5f3	1874	* External sensor data is written to these registers at the Sample Rate as
syundo0730	0:78ba160ba5f3	1875	* defined in Register 25. This access rate can be reduced by using the Slave
syundo0730	0:78ba160ba5f3	1876	* Delay Enable registers (Register 103).
syundo0730	0:78ba160ba5f3	1877	*
syundo0730	0:78ba160ba5f3	1878	* External sensor data registers, along with the gyroscope measurement
syundo0730	0:78ba160ba5f3	1879	* registers, accelerometer measurement registers, and temperature measurement
syundo0730	0:78ba160ba5f3	1880	* registers, are composed of two sets of registers: an internal register set
syundo0730	0:78ba160ba5f3	1881	* and a user-facing read register set.
syundo0730	0:78ba160ba5f3	1882	*
syundo0730	0:78ba160ba5f3	1883	* The data within the external sensors' internal register set is always updated
syundo0730	0:78ba160ba5f3	1884	* at the Sample Rate (or the reduced access rate) whenever the serial interface
syundo0730	0:78ba160ba5f3	1885	* is idle. This guarantees that a burst read of sensor registers will read
syundo0730	0:78ba160ba5f3	1886	* measurements from the same sampling instant. Note that if burst reads are not
syundo0730	0:78ba160ba5f3	1887	* used, the user is responsible for ensuring a set of single byte reads
syundo0730	0:78ba160ba5f3	1888	* correspond to a single sampling instant by checking the Data Ready interrupt.
syundo0730	0:78ba160ba5f3	1889	*
syundo0730	0:78ba160ba5f3	1890	* Data is placed in these external sensor data registers according to
syundo0730	0:78ba160ba5f3	1891	* I2C_SLV0_CTRL, I2C_SLV1_CTRL, I2C_SLV2_CTRL, and I2C_SLV3_CTRL (Registers 39,
syundo0730	0:78ba160ba5f3	1892	* 42, 45, and 48). When more than zero bytes are read (I2C_SLVx_LEN > 0) from
syundo0730	0:78ba160ba5f3	1893	* an enabled slave (I2C_SLVx_EN = 1), the slave is read at the Sample Rate (as
syundo0730	0:78ba160ba5f3	1894	* defined in Register 25) or delayed rate (if specified in Register 52 and
syundo0730	0:78ba160ba5f3	1895	* 103). During each Sample cycle, slave reads are performed in order of Slave
syundo0730	0:78ba160ba5f3	1896	* number. If all slaves are enabled with more than zero bytes to be read, the
syundo0730	0:78ba160ba5f3	1897	* order will be Slave 0, followed by Slave 1, Slave 2, and Slave 3.
syundo0730	0:78ba160ba5f3	1898	*
syundo0730	0:78ba160ba5f3	1899	* Each enabled slave will have EXT_SENS_DATA registers associated with it by
syundo0730	0:78ba160ba5f3	1900	* number of bytes read (I2C_SLVx_LEN) in order of slave number, starting from
syundo0730	0:78ba160ba5f3	1901	* EXT_SENS_DATA_00. Note that this means enabling or disabling a slave may
syundo0730	0:78ba160ba5f3	1902	* change the higher numbered slaves' associated registers. Furthermore, if
syundo0730	0:78ba160ba5f3	1903	* fewer total bytes are being read from the external sensors as a result of
syundo0730	0:78ba160ba5f3	1904	* such a change, then the data remaining in the registers which no longer have
syundo0730	0:78ba160ba5f3	1905	* an associated slave device (i.e. high numbered registers) will remain in
syundo0730	0:78ba160ba5f3	1906	* these previously allocated registers unless reset.
syundo0730	0:78ba160ba5f3	1907	*
syundo0730	0:78ba160ba5f3	1908	* If the sum of the read lengths of all SLVx transactions exceed the number of
syundo0730	0:78ba160ba5f3	1909	* available EXT_SENS_DATA registers, the excess bytes will be dropped. There
syundo0730	0:78ba160ba5f3	1910	* are 24 EXT_SENS_DATA registers and hence the total read lengths between all
syundo0730	0:78ba160ba5f3	1911	* the slaves cannot be greater than 24 or some bytes will be lost.
syundo0730	0:78ba160ba5f3	1912	*
syundo0730	0:78ba160ba5f3	1913	* Note: Slave 4's behavior is distinct from that of Slaves 0-3. For further
syundo0730	0:78ba160ba5f3	1914	* information regarding the characteristics of Slave 4, please refer to
syundo0730	0:78ba160ba5f3	1915	* Registers 49 to 53.
syundo0730	0:78ba160ba5f3	1916	*
syundo0730	0:78ba160ba5f3	1917	* EXAMPLE:
syundo0730	0:78ba160ba5f3	1918	* Suppose that Slave 0 is enabled with 4 bytes to be read (I2C_SLV0_EN = 1 and
syundo0730	0:78ba160ba5f3	1919	* I2C_SLV0_LEN = 4) while Slave 1 is enabled with 2 bytes to be read so that
syundo0730	0:78ba160ba5f3	1920	* I2C_SLV1_EN = 1 and I2C_SLV1_LEN = 2. In such a situation, EXT_SENS_DATA _00
syundo0730	0:78ba160ba5f3	1921	* through _03 will be associated with Slave 0, while EXT_SENS_DATA _04 and 05
syundo0730	0:78ba160ba5f3	1922	* will be associated with Slave 1. If Slave 2 is enabled as well, registers
syundo0730	0:78ba160ba5f3	1923	* starting from EXT_SENS_DATA_06 will be allocated to Slave 2.
syundo0730	0:78ba160ba5f3	1924	*
syundo0730	0:78ba160ba5f3	1925	* If Slave 2 is disabled while Slave 3 is enabled in this same situation, then
syundo0730	0:78ba160ba5f3	1926	* registers starting from EXT_SENS_DATA_06 will be allocated to Slave 3
syundo0730	0:78ba160ba5f3	1927	* instead.
syundo0730	0:78ba160ba5f3	1928	*
syundo0730	0:78ba160ba5f3	1929	* REGISTER ALLOCATION FOR DYNAMIC DISABLE VS. NORMAL DISABLE:
syundo0730	0:78ba160ba5f3	1930	* If a slave is disabled at any time, the space initially allocated to the
syundo0730	0:78ba160ba5f3	1931	* slave in the EXT_SENS_DATA register, will remain associated with that slave.
syundo0730	0:78ba160ba5f3	1932	* This is to avoid dynamic adjustment of the register allocation.
syundo0730	0:78ba160ba5f3	1933	*
syundo0730	0:78ba160ba5f3	1934	* The allocation of the EXT_SENS_DATA registers is recomputed only when (1) all
syundo0730	0:78ba160ba5f3	1935	* slaves are disabled, or (2) the I2C_MST_RST bit is set (Register 106).
syundo0730	0:78ba160ba5f3	1936	*
syundo0730	0:78ba160ba5f3	1937	* This above is also true if one of the slaves gets NACKed and stops
syundo0730	0:78ba160ba5f3	1938	* functioning.
syundo0730	0:78ba160ba5f3	1939	*
syundo0730	0:78ba160ba5f3	1940	* @param position Starting position (0-23)
syundo0730	0:78ba160ba5f3	1941	* @return Byte read from register
syundo0730	0:78ba160ba5f3	1942	*/
syundo0730	0:78ba160ba5f3	1943	uint8_t MPU9150::getExternalSensorByte(int position) {
syundo0730	0:78ba160ba5f3	1944	I2Cdev::readByte(devAddr, MPU9150_RA_EXT_SENS_DATA_00 + position, buffer);
syundo0730	0:78ba160ba5f3	1945	return buffer[0];
syundo0730	0:78ba160ba5f3	1946	}
syundo0730	0:78ba160ba5f3	1947	/** Read word (2 bytes) from external sensor data registers.
syundo0730	0:78ba160ba5f3	1948	* @param position Starting position (0-21)
syundo0730	0:78ba160ba5f3	1949	* @return Word read from register
syundo0730	0:78ba160ba5f3	1950	* @see getExternalSensorByte()
syundo0730	0:78ba160ba5f3	1951	*/
syundo0730	0:78ba160ba5f3	1952	uint16_t MPU9150::getExternalSensorWord(int position) {
syundo0730	0:78ba160ba5f3	1953	I2Cdev::readBytes(devAddr, MPU9150_RA_EXT_SENS_DATA_00 + position, 2, buffer);
syundo0730	0:78ba160ba5f3	1954	return (((uint16_t)buffer[0]) << 8) \| buffer[1];
syundo0730	0:78ba160ba5f3	1955	}
syundo0730	0:78ba160ba5f3	1956	/** Read double word (4 bytes) from external sensor data registers.
syundo0730	0:78ba160ba5f3	1957	* @param position Starting position (0-20)
syundo0730	0:78ba160ba5f3	1958	* @return Double word read from registers
syundo0730	0:78ba160ba5f3	1959	* @see getExternalSensorByte()
syundo0730	0:78ba160ba5f3	1960	*/
syundo0730	0:78ba160ba5f3	1961	uint32_t MPU9150::getExternalSensorDWord(int position) {
syundo0730	0:78ba160ba5f3	1962	I2Cdev::readBytes(devAddr, MPU9150_RA_EXT_SENS_DATA_00 + position, 4, buffer);
syundo0730	0:78ba160ba5f3	1963	return (((uint32_t)buffer[0]) << 24) \| (((uint32_t)buffer[1]) << 16) \| (((uint16_t)buffer[2]) << 8) \| buffer[3];
syundo0730	0:78ba160ba5f3	1964	}
syundo0730	0:78ba160ba5f3	1965
syundo0730	0:78ba160ba5f3	1966	// MOT_DETECT_STATUS register
syundo0730	0:78ba160ba5f3	1967
syundo0730	0:78ba160ba5f3	1968	/** Get X-axis negative motion detection interrupt status.
syundo0730	0:78ba160ba5f3	1969	* @return Motion detection status
syundo0730	0:78ba160ba5f3	1970	* @see MPU9150_RA_MOT_DETECT_STATUS
syundo0730	0:78ba160ba5f3	1971	* @see MPU9150_MOTION_MOT_XNEG_BIT
syundo0730	0:78ba160ba5f3	1972	*/
syundo0730	0:78ba160ba5f3	1973	bool MPU9150::getXNegMotionDetected() {
syundo0730	0:78ba160ba5f3	1974	I2Cdev::readBit(devAddr, MPU9150_RA_MOT_DETECT_STATUS, MPU9150_MOTION_MOT_XNEG_BIT, buffer);
syundo0730	0:78ba160ba5f3	1975	return buffer[0];
syundo0730	0:78ba160ba5f3	1976	}
syundo0730	0:78ba160ba5f3	1977	/** Get X-axis positive motion detection interrupt status.
syundo0730	0:78ba160ba5f3	1978	* @return Motion detection status
syundo0730	0:78ba160ba5f3	1979	* @see MPU9150_RA_MOT_DETECT_STATUS
syundo0730	0:78ba160ba5f3	1980	* @see MPU9150_MOTION_MOT_XPOS_BIT
syundo0730	0:78ba160ba5f3	1981	*/
syundo0730	0:78ba160ba5f3	1982	bool MPU9150::getXPosMotionDetected() {
syundo0730	0:78ba160ba5f3	1983	I2Cdev::readBit(devAddr, MPU9150_RA_MOT_DETECT_STATUS, MPU9150_MOTION_MOT_XPOS_BIT, buffer);
syundo0730	0:78ba160ba5f3	1984	return buffer[0];
syundo0730	0:78ba160ba5f3	1985	}
syundo0730	0:78ba160ba5f3	1986	/** Get Y-axis negative motion detection interrupt status.
syundo0730	0:78ba160ba5f3	1987	* @return Motion detection status
syundo0730	0:78ba160ba5f3	1988	* @see MPU9150_RA_MOT_DETECT_STATUS
syundo0730	0:78ba160ba5f3	1989	* @see MPU9150_MOTION_MOT_YNEG_BIT
syundo0730	0:78ba160ba5f3	1990	*/
syundo0730	0:78ba160ba5f3	1991	bool MPU9150::getYNegMotionDetected() {
syundo0730	0:78ba160ba5f3	1992	I2Cdev::readBit(devAddr, MPU9150_RA_MOT_DETECT_STATUS, MPU9150_MOTION_MOT_YNEG_BIT, buffer);
syundo0730	0:78ba160ba5f3	1993	return buffer[0];
syundo0730	0:78ba160ba5f3	1994	}
syundo0730	0:78ba160ba5f3	1995	/** Get Y-axis positive motion detection interrupt status.
syundo0730	0:78ba160ba5f3	1996	* @return Motion detection status
syundo0730	0:78ba160ba5f3	1997	* @see MPU9150_RA_MOT_DETECT_STATUS
syundo0730	0:78ba160ba5f3	1998	* @see MPU9150_MOTION_MOT_YPOS_BIT
syundo0730	0:78ba160ba5f3	1999	*/
syundo0730	0:78ba160ba5f3	2000	bool MPU9150::getYPosMotionDetected() {
syundo0730	0:78ba160ba5f3	2001	I2Cdev::readBit(devAddr, MPU9150_RA_MOT_DETECT_STATUS, MPU9150_MOTION_MOT_YPOS_BIT, buffer);
syundo0730	0:78ba160ba5f3	2002	return buffer[0];
syundo0730	0:78ba160ba5f3	2003	}
syundo0730	0:78ba160ba5f3	2004	/** Get Z-axis negative motion detection interrupt status.
syundo0730	0:78ba160ba5f3	2005	* @return Motion detection status
syundo0730	0:78ba160ba5f3	2006	* @see MPU9150_RA_MOT_DETECT_STATUS
syundo0730	0:78ba160ba5f3	2007	* @see MPU9150_MOTION_MOT_ZNEG_BIT
syundo0730	0:78ba160ba5f3	2008	*/
syundo0730	0:78ba160ba5f3	2009	bool MPU9150::getZNegMotionDetected() {
syundo0730	0:78ba160ba5f3	2010	I2Cdev::readBit(devAddr, MPU9150_RA_MOT_DETECT_STATUS, MPU9150_MOTION_MOT_ZNEG_BIT, buffer);
syundo0730	0:78ba160ba5f3	2011	return buffer[0];
syundo0730	0:78ba160ba5f3	2012	}
syundo0730	0:78ba160ba5f3	2013	/** Get Z-axis positive motion detection interrupt status.
syundo0730	0:78ba160ba5f3	2014	* @return Motion detection status
syundo0730	0:78ba160ba5f3	2015	* @see MPU9150_RA_MOT_DETECT_STATUS
syundo0730	0:78ba160ba5f3	2016	* @see MPU9150_MOTION_MOT_ZPOS_BIT
syundo0730	0:78ba160ba5f3	2017	*/
syundo0730	0:78ba160ba5f3	2018	bool MPU9150::getZPosMotionDetected() {
syundo0730	0:78ba160ba5f3	2019	I2Cdev::readBit(devAddr, MPU9150_RA_MOT_DETECT_STATUS, MPU9150_MOTION_MOT_ZPOS_BIT, buffer);
syundo0730	0:78ba160ba5f3	2020	return buffer[0];
syundo0730	0:78ba160ba5f3	2021	}
syundo0730	0:78ba160ba5f3	2022	/** Get zero motion detection interrupt status.
syundo0730	0:78ba160ba5f3	2023	* @return Motion detection status
syundo0730	0:78ba160ba5f3	2024	* @see MPU9150_RA_MOT_DETECT_STATUS
syundo0730	0:78ba160ba5f3	2025	* @see MPU9150_MOTION_MOT_ZRMOT_BIT
syundo0730	0:78ba160ba5f3	2026	*/
syundo0730	0:78ba160ba5f3	2027	bool MPU9150::getZeroMotionDetected() {
syundo0730	0:78ba160ba5f3	2028	I2Cdev::readBit(devAddr, MPU9150_RA_MOT_DETECT_STATUS, MPU9150_MOTION_MOT_ZRMOT_BIT, buffer);
syundo0730	0:78ba160ba5f3	2029	return buffer[0];
syundo0730	0:78ba160ba5f3	2030	}
syundo0730	0:78ba160ba5f3	2031
syundo0730	0:78ba160ba5f3	2032	// I2C_SLV*_DO register
syundo0730	0:78ba160ba5f3	2033
syundo0730	0:78ba160ba5f3	2034	/** Write byte to Data Output container for specified slave.
syundo0730	0:78ba160ba5f3	2035	* This register holds the output data written into Slave when Slave is set to
syundo0730	0:78ba160ba5f3	2036	* write mode. For further information regarding Slave control, please
syundo0730	0:78ba160ba5f3	2037	* refer to Registers 37 to 39 and immediately following.
syundo0730	0:78ba160ba5f3	2038	* @param num Slave number (0-3)
syundo0730	0:78ba160ba5f3	2039	* @param data Byte to write
syundo0730	0:78ba160ba5f3	2040	* @see MPU9150_RA_I2C_SLV0_DO
syundo0730	0:78ba160ba5f3	2041	*/
syundo0730	0:78ba160ba5f3	2042	void MPU9150::setSlaveOutputByte(uint8_t num, uint8_t data) {
syundo0730	0:78ba160ba5f3	2043	if (num > 3) return;
syundo0730	0:78ba160ba5f3	2044	I2Cdev::writeByte(devAddr, MPU9150_RA_I2C_SLV0_DO + num, data);
syundo0730	0:78ba160ba5f3	2045	}
syundo0730	0:78ba160ba5f3	2046
syundo0730	0:78ba160ba5f3	2047	// I2C_MST_DELAY_CTRL register
syundo0730	0:78ba160ba5f3	2048
syundo0730	0:78ba160ba5f3	2049	/** Get external data shadow delay enabled status.
syundo0730	0:78ba160ba5f3	2050	* This register is used to specify the timing of external sensor data
syundo0730	0:78ba160ba5f3	2051	* shadowing. When DELAY_ES_SHADOW is set to 1, shadowing of external
syundo0730	0:78ba160ba5f3	2052	* sensor data is delayed until all data has been received.
syundo0730	0:78ba160ba5f3	2053	* @return Current external data shadow delay enabled status.
syundo0730	0:78ba160ba5f3	2054	* @see MPU9150_RA_I2C_MST_DELAY_CTRL
syundo0730	0:78ba160ba5f3	2055	* @see MPU9150_DELAYCTRL_DELAY_ES_SHADOW_BIT
syundo0730	0:78ba160ba5f3	2056	*/
syundo0730	0:78ba160ba5f3	2057	bool MPU9150::getExternalShadowDelayEnabled() {
syundo0730	0:78ba160ba5f3	2058	I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_DELAY_CTRL, MPU9150_DELAYCTRL_DELAY_ES_SHADOW_BIT, buffer);
syundo0730	0:78ba160ba5f3	2059	return buffer[0];
syundo0730	0:78ba160ba5f3	2060	}
syundo0730	0:78ba160ba5f3	2061	/** Set external data shadow delay enabled status.
syundo0730	0:78ba160ba5f3	2062	* @param enabled New external data shadow delay enabled status.
syundo0730	0:78ba160ba5f3	2063	* @see getExternalShadowDelayEnabled()
syundo0730	0:78ba160ba5f3	2064	* @see MPU9150_RA_I2C_MST_DELAY_CTRL
syundo0730	0:78ba160ba5f3	2065	* @see MPU9150_DELAYCTRL_DELAY_ES_SHADOW_BIT
syundo0730	0:78ba160ba5f3	2066	*/
syundo0730	0:78ba160ba5f3	2067	void MPU9150::setExternalShadowDelayEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	2068	I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_MST_DELAY_CTRL, MPU9150_DELAYCTRL_DELAY_ES_SHADOW_BIT, enabled);
syundo0730	0:78ba160ba5f3	2069	}
syundo0730	0:78ba160ba5f3	2070	/** Get slave delay enabled status.
syundo0730	0:78ba160ba5f3	2071	* When a particular slave delay is enabled, the rate of access for the that
syundo0730	0:78ba160ba5f3	2072	* slave device is reduced. When a slave's access rate is decreased relative to
syundo0730	0:78ba160ba5f3	2073	* the Sample Rate, the slave is accessed every:
syundo0730	0:78ba160ba5f3	2074	*
syundo0730	0:78ba160ba5f3	2075	* 1 / (1 + I2C_MST_DLY) Samples
syundo0730	0:78ba160ba5f3	2076	*
syundo0730	0:78ba160ba5f3	2077	* This base Sample Rate in turn is determined by SMPLRT_DIV (register * 25)
syundo0730	0:78ba160ba5f3	2078	* and DLPF_CFG (register 26).
syundo0730	0:78ba160ba5f3	2079	*
syundo0730	0:78ba160ba5f3	2080	* For further information regarding I2C_MST_DLY, please refer to register 52.
syundo0730	0:78ba160ba5f3	2081	* For further information regarding the Sample Rate, please refer to register 25.
syundo0730	0:78ba160ba5f3	2082	*
syundo0730	0:78ba160ba5f3	2083	* @param num Slave number (0-4)
syundo0730	0:78ba160ba5f3	2084	* @return Current slave delay enabled status.
syundo0730	0:78ba160ba5f3	2085	* @see MPU9150_RA_I2C_MST_DELAY_CTRL
syundo0730	0:78ba160ba5f3	2086	* @see MPU9150_DELAYCTRL_I2C_SLV0_DLY_EN_BIT
syundo0730	0:78ba160ba5f3	2087	*/
syundo0730	0:78ba160ba5f3	2088	bool MPU9150::getSlaveDelayEnabled(uint8_t num) {
syundo0730	0:78ba160ba5f3	2089	// MPU9150_DELAYCTRL_I2C_SLV4_DLY_EN_BIT is 4, SLV3 is 3, etc.
syundo0730	0:78ba160ba5f3	2090	if (num > 4) return 0;
syundo0730	0:78ba160ba5f3	2091	I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_DELAY_CTRL, num, buffer);
syundo0730	0:78ba160ba5f3	2092	return buffer[0];
syundo0730	0:78ba160ba5f3	2093	}
syundo0730	0:78ba160ba5f3	2094	/** Set slave delay enabled status.
syundo0730	0:78ba160ba5f3	2095	* @param num Slave number (0-4)
syundo0730	0:78ba160ba5f3	2096	* @param enabled New slave delay enabled status.
syundo0730	0:78ba160ba5f3	2097	* @see MPU9150_RA_I2C_MST_DELAY_CTRL
syundo0730	0:78ba160ba5f3	2098	* @see MPU9150_DELAYCTRL_I2C_SLV0_DLY_EN_BIT
syundo0730	0:78ba160ba5f3	2099	*/
syundo0730	0:78ba160ba5f3	2100	void MPU9150::setSlaveDelayEnabled(uint8_t num, bool enabled) {
syundo0730	0:78ba160ba5f3	2101	I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_MST_DELAY_CTRL, num, enabled);
syundo0730	0:78ba160ba5f3	2102	}
syundo0730	0:78ba160ba5f3	2103
syundo0730	0:78ba160ba5f3	2104	// SIGNAL_PATH_RESET register
syundo0730	0:78ba160ba5f3	2105
syundo0730	0:78ba160ba5f3	2106	/** Reset gyroscope signal path.
syundo0730	0:78ba160ba5f3	2107	* The reset will revert the signal path analog to digital converters and
syundo0730	0:78ba160ba5f3	2108	* filters to their power up configurations.
syundo0730	0:78ba160ba5f3	2109	* @see MPU9150_RA_SIGNAL_PATH_RESET
syundo0730	0:78ba160ba5f3	2110	* @see MPU9150_PATHRESET_GYRO_RESET_BIT
syundo0730	0:78ba160ba5f3	2111	*/
syundo0730	0:78ba160ba5f3	2112	void MPU9150::resetGyroscopePath() {
syundo0730	0:78ba160ba5f3	2113	I2Cdev::writeBit(devAddr, MPU9150_RA_SIGNAL_PATH_RESET, MPU9150_PATHRESET_GYRO_RESET_BIT, true);
syundo0730	0:78ba160ba5f3	2114	}
syundo0730	0:78ba160ba5f3	2115	/** Reset accelerometer signal path.
syundo0730	0:78ba160ba5f3	2116	* The reset will revert the signal path analog to digital converters and
syundo0730	0:78ba160ba5f3	2117	* filters to their power up configurations.
syundo0730	0:78ba160ba5f3	2118	* @see MPU9150_RA_SIGNAL_PATH_RESET
syundo0730	0:78ba160ba5f3	2119	* @see MPU9150_PATHRESET_ACCEL_RESET_BIT
syundo0730	0:78ba160ba5f3	2120	*/
syundo0730	0:78ba160ba5f3	2121	void MPU9150::resetAccelerometerPath() {
syundo0730	0:78ba160ba5f3	2122	I2Cdev::writeBit(devAddr, MPU9150_RA_SIGNAL_PATH_RESET, MPU9150_PATHRESET_ACCEL_RESET_BIT, true);
syundo0730	0:78ba160ba5f3	2123	}
syundo0730	0:78ba160ba5f3	2124	/** Reset temperature sensor signal path.
syundo0730	0:78ba160ba5f3	2125	* The reset will revert the signal path analog to digital converters and
syundo0730	0:78ba160ba5f3	2126	* filters to their power up configurations.
syundo0730	0:78ba160ba5f3	2127	* @see MPU9150_RA_SIGNAL_PATH_RESET
syundo0730	0:78ba160ba5f3	2128	* @see MPU9150_PATHRESET_TEMP_RESET_BIT
syundo0730	0:78ba160ba5f3	2129	*/
syundo0730	0:78ba160ba5f3	2130	void MPU9150::resetTemperaturePath() {
syundo0730	0:78ba160ba5f3	2131	I2Cdev::writeBit(devAddr, MPU9150_RA_SIGNAL_PATH_RESET, MPU9150_PATHRESET_TEMP_RESET_BIT, true);
syundo0730	0:78ba160ba5f3	2132	}
syundo0730	0:78ba160ba5f3	2133
syundo0730	0:78ba160ba5f3	2134	// MOT_DETECT_CTRL register
syundo0730	0:78ba160ba5f3	2135
syundo0730	0:78ba160ba5f3	2136	/** Get accelerometer power-on delay.
syundo0730	0:78ba160ba5f3	2137	* The accelerometer data path provides samples to the sensor registers, Motion
syundo0730	0:78ba160ba5f3	2138	* detection, Zero Motion detection, and Free Fall detection modules. The
syundo0730	0:78ba160ba5f3	2139	* signal path contains filters which must be flushed on wake-up with new
syundo0730	0:78ba160ba5f3	2140	* samples before the detection modules begin operations. The default wake-up
syundo0730	0:78ba160ba5f3	2141	* delay, of 4ms can be lengthened by up to 3ms. This additional delay is
syundo0730	0:78ba160ba5f3	2142	* specified in ACCEL_ON_DELAY in units of 1 LSB = 1 ms. The user may select
syundo0730	0:78ba160ba5f3	2143	* any value above zero unless instructed otherwise by InvenSense. Please refer
syundo0730	0:78ba160ba5f3	2144	* to Section 8 of the MPU-6000/MPU-9150 Product Specification document for
syundo0730	0:78ba160ba5f3	2145	* further information regarding the detection modules.
syundo0730	0:78ba160ba5f3	2146	* @return Current accelerometer power-on delay
syundo0730	0:78ba160ba5f3	2147	* @see MPU9150_RA_MOT_DETECT_CTRL
syundo0730	0:78ba160ba5f3	2148	* @see MPU9150_DETECT_ACCEL_ON_DELAY_BIT
syundo0730	0:78ba160ba5f3	2149	*/
syundo0730	0:78ba160ba5f3	2150	uint8_t MPU9150::getAccelerometerPowerOnDelay() {
syundo0730	0:78ba160ba5f3	2151	I2Cdev::readBits(devAddr, MPU9150_RA_MOT_DETECT_CTRL, MPU9150_DETECT_ACCEL_ON_DELAY_BIT, MPU9150_DETECT_ACCEL_ON_DELAY_LENGTH, buffer);
syundo0730	0:78ba160ba5f3	2152	return buffer[0];
syundo0730	0:78ba160ba5f3	2153	}
syundo0730	0:78ba160ba5f3	2154	/** Set accelerometer power-on delay.
syundo0730	0:78ba160ba5f3	2155	* @param delay New accelerometer power-on delay (0-3)
syundo0730	0:78ba160ba5f3	2156	* @see getAccelerometerPowerOnDelay()
syundo0730	0:78ba160ba5f3	2157	* @see MPU9150_RA_MOT_DETECT_CTRL
syundo0730	0:78ba160ba5f3	2158	* @see MPU9150_DETECT_ACCEL_ON_DELAY_BIT
syundo0730	0:78ba160ba5f3	2159	*/
syundo0730	0:78ba160ba5f3	2160	void MPU9150::setAccelerometerPowerOnDelay(uint8_t delay) {
syundo0730	0:78ba160ba5f3	2161	I2Cdev::writeBits(devAddr, MPU9150_RA_MOT_DETECT_CTRL, MPU9150_DETECT_ACCEL_ON_DELAY_BIT, MPU9150_DETECT_ACCEL_ON_DELAY_LENGTH, delay);
syundo0730	0:78ba160ba5f3	2162	}
syundo0730	0:78ba160ba5f3	2163	/** Get Free Fall detection counter decrement configuration.
syundo0730	0:78ba160ba5f3	2164	* Detection is registered by the Free Fall detection module after accelerometer
syundo0730	0:78ba160ba5f3	2165	* measurements meet their respective threshold conditions over a specified
syundo0730	0:78ba160ba5f3	2166	* number of samples. When the threshold conditions are met, the corresponding
syundo0730	0:78ba160ba5f3	2167	* detection counter increments by 1. The user may control the rate at which the
syundo0730	0:78ba160ba5f3	2168	* detection counter decrements when the threshold condition is not met by
syundo0730	0:78ba160ba5f3	2169	* configuring FF_COUNT. The decrement rate can be set according to the
syundo0730	0:78ba160ba5f3	2170	* following table:
syundo0730	0:78ba160ba5f3	2171	*
syundo0730	0:78ba160ba5f3	2172	* <pre>
syundo0730	0:78ba160ba5f3	2173	* FF_COUNT \| Counter Decrement
syundo0730	0:78ba160ba5f3	2174	* ---------+------------------
syundo0730	0:78ba160ba5f3	2175	* 0 \| Reset
syundo0730	0:78ba160ba5f3	2176	* 1 \| 1
syundo0730	0:78ba160ba5f3	2177	* 2 \| 2
syundo0730	0:78ba160ba5f3	2178	* 3 \| 4
syundo0730	0:78ba160ba5f3	2179	* </pre>
syundo0730	0:78ba160ba5f3	2180	*
syundo0730	0:78ba160ba5f3	2181	* When FF_COUNT is configured to 0 (reset), any non-qualifying sample will
syundo0730	0:78ba160ba5f3	2182	* reset the counter to 0. For further information on Free Fall detection,
syundo0730	0:78ba160ba5f3	2183	* please refer to Registers 29 to 32.
syundo0730	0:78ba160ba5f3	2184	*
syundo0730	0:78ba160ba5f3	2185	* @return Current decrement configuration
syundo0730	0:78ba160ba5f3	2186	* @see MPU9150_RA_MOT_DETECT_CTRL
syundo0730	0:78ba160ba5f3	2187	* @see MPU9150_DETECT_FF_COUNT_BIT
syundo0730	0:78ba160ba5f3	2188	*/
syundo0730	0:78ba160ba5f3	2189	uint8_t MPU9150::getFreefallDetectionCounterDecrement() {
syundo0730	0:78ba160ba5f3	2190	I2Cdev::readBits(devAddr, MPU9150_RA_MOT_DETECT_CTRL, MPU9150_DETECT_FF_COUNT_BIT, MPU9150_DETECT_FF_COUNT_LENGTH, buffer);
syundo0730	0:78ba160ba5f3	2191	return buffer[0];
syundo0730	0:78ba160ba5f3	2192	}
syundo0730	0:78ba160ba5f3	2193	/** Set Free Fall detection counter decrement configuration.
syundo0730	0:78ba160ba5f3	2194	* @param decrement New decrement configuration value
syundo0730	0:78ba160ba5f3	2195	* @see getFreefallDetectionCounterDecrement()
syundo0730	0:78ba160ba5f3	2196	* @see MPU9150_RA_MOT_DETECT_CTRL
syundo0730	0:78ba160ba5f3	2197	* @see MPU9150_DETECT_FF_COUNT_BIT
syundo0730	0:78ba160ba5f3	2198	*/
syundo0730	0:78ba160ba5f3	2199	void MPU9150::setFreefallDetectionCounterDecrement(uint8_t decrement) {
syundo0730	0:78ba160ba5f3	2200	I2Cdev::writeBits(devAddr, MPU9150_RA_MOT_DETECT_CTRL, MPU9150_DETECT_FF_COUNT_BIT, MPU9150_DETECT_FF_COUNT_LENGTH, decrement);
syundo0730	0:78ba160ba5f3	2201	}
syundo0730	0:78ba160ba5f3	2202	/** Get Motion detection counter decrement configuration.
syundo0730	0:78ba160ba5f3	2203	* Detection is registered by the Motion detection module after accelerometer
syundo0730	0:78ba160ba5f3	2204	* measurements meet their respective threshold conditions over a specified
syundo0730	0:78ba160ba5f3	2205	* number of samples. When the threshold conditions are met, the corresponding
syundo0730	0:78ba160ba5f3	2206	* detection counter increments by 1. The user may control the rate at which the
syundo0730	0:78ba160ba5f3	2207	* detection counter decrements when the threshold condition is not met by
syundo0730	0:78ba160ba5f3	2208	* configuring MOT_COUNT. The decrement rate can be set according to the
syundo0730	0:78ba160ba5f3	2209	* following table:
syundo0730	0:78ba160ba5f3	2210	*
syundo0730	0:78ba160ba5f3	2211	* <pre>
syundo0730	0:78ba160ba5f3	2212	* MOT_COUNT \| Counter Decrement
syundo0730	0:78ba160ba5f3	2213	* ----------+------------------
syundo0730	0:78ba160ba5f3	2214	* 0 \| Reset
syundo0730	0:78ba160ba5f3	2215	* 1 \| 1
syundo0730	0:78ba160ba5f3	2216	* 2 \| 2
syundo0730	0:78ba160ba5f3	2217	* 3 \| 4
syundo0730	0:78ba160ba5f3	2218	* </pre>
syundo0730	0:78ba160ba5f3	2219	*
syundo0730	0:78ba160ba5f3	2220	* When MOT_COUNT is configured to 0 (reset), any non-qualifying sample will
syundo0730	0:78ba160ba5f3	2221	* reset the counter to 0. For further information on Motion detection,
syundo0730	0:78ba160ba5f3	2222	* please refer to Registers 29 to 32.
syundo0730	0:78ba160ba5f3	2223	*
syundo0730	0:78ba160ba5f3	2224	*/
syundo0730	0:78ba160ba5f3	2225	uint8_t MPU9150::getMotionDetectionCounterDecrement() {
syundo0730	0:78ba160ba5f3	2226	I2Cdev::readBits(devAddr, MPU9150_RA_MOT_DETECT_CTRL, MPU9150_DETECT_MOT_COUNT_BIT, MPU9150_DETECT_MOT_COUNT_LENGTH, buffer);
syundo0730	0:78ba160ba5f3	2227	return buffer[0];
syundo0730	0:78ba160ba5f3	2228	}
syundo0730	0:78ba160ba5f3	2229	/** Set Motion detection counter decrement configuration.
syundo0730	0:78ba160ba5f3	2230	* @param decrement New decrement configuration value
syundo0730	0:78ba160ba5f3	2231	* @see getMotionDetectionCounterDecrement()
syundo0730	0:78ba160ba5f3	2232	* @see MPU9150_RA_MOT_DETECT_CTRL
syundo0730	0:78ba160ba5f3	2233	* @see MPU9150_DETECT_MOT_COUNT_BIT
syundo0730	0:78ba160ba5f3	2234	*/
syundo0730	0:78ba160ba5f3	2235	void MPU9150::setMotionDetectionCounterDecrement(uint8_t decrement) {
syundo0730	0:78ba160ba5f3	2236	I2Cdev::writeBits(devAddr, MPU9150_RA_MOT_DETECT_CTRL, MPU9150_DETECT_MOT_COUNT_BIT, MPU9150_DETECT_MOT_COUNT_LENGTH, decrement);
syundo0730	0:78ba160ba5f3	2237	}
syundo0730	0:78ba160ba5f3	2238
syundo0730	0:78ba160ba5f3	2239	// USER_CTRL register
syundo0730	0:78ba160ba5f3	2240
syundo0730	0:78ba160ba5f3	2241	/** Get FIFO enabled status.
syundo0730	0:78ba160ba5f3	2242	* When this bit is set to 0, the FIFO buffer is disabled. The FIFO buffer
syundo0730	0:78ba160ba5f3	2243	* cannot be written to or read from while disabled. The FIFO buffer's state
syundo0730	0:78ba160ba5f3	2244	* does not change unless the MPU-60X0 is power cycled.
syundo0730	0:78ba160ba5f3	2245	* @return Current FIFO enabled status
syundo0730	0:78ba160ba5f3	2246	* @see MPU9150_RA_USER_CTRL
syundo0730	0:78ba160ba5f3	2247	* @see MPU9150_USERCTRL_FIFO_EN_BIT
syundo0730	0:78ba160ba5f3	2248	*/
syundo0730	0:78ba160ba5f3	2249	bool MPU9150::getFIFOEnabled() {
syundo0730	0:78ba160ba5f3	2250	I2Cdev::readBit(devAddr, MPU9150_RA_USER_CTRL, MPU9150_USERCTRL_FIFO_EN_BIT, buffer);
syundo0730	0:78ba160ba5f3	2251	return buffer[0];
syundo0730	0:78ba160ba5f3	2252	}
syundo0730	0:78ba160ba5f3	2253	/** Set FIFO enabled status.
syundo0730	0:78ba160ba5f3	2254	* @param enabled New FIFO enabled status
syundo0730	0:78ba160ba5f3	2255	* @see getFIFOEnabled()
syundo0730	0:78ba160ba5f3	2256	* @see MPU9150_RA_USER_CTRL
syundo0730	0:78ba160ba5f3	2257	* @see MPU9150_USERCTRL_FIFO_EN_BIT
syundo0730	0:78ba160ba5f3	2258	*/
syundo0730	0:78ba160ba5f3	2259	void MPU9150::setFIFOEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	2260	I2Cdev::writeBit(devAddr, MPU9150_RA_USER_CTRL, MPU9150_USERCTRL_FIFO_EN_BIT, enabled);
syundo0730	0:78ba160ba5f3	2261	}
syundo0730	0:78ba160ba5f3	2262	/** Get I2C Master Mode enabled status.
syundo0730	0:78ba160ba5f3	2263	* When this mode is enabled, the MPU-60X0 acts as the I2C Master to the
syundo0730	0:78ba160ba5f3	2264	* external sensor slave devices on the auxiliary I2C bus. When this bit is
syundo0730	0:78ba160ba5f3	2265	* cleared to 0, the auxiliary I2C bus lines (AUX_DA and AUX_CL) are logically
syundo0730	0:78ba160ba5f3	2266	* driven by the primary I2C bus (SDA and SCL). This is a precondition to
syundo0730	0:78ba160ba5f3	2267	* enabling Bypass Mode. For further information regarding Bypass Mode, please
syundo0730	0:78ba160ba5f3	2268	* refer to Register 55.
syundo0730	0:78ba160ba5f3	2269	* @return Current I2C Master Mode enabled status
syundo0730	0:78ba160ba5f3	2270	* @see MPU9150_RA_USER_CTRL
syundo0730	0:78ba160ba5f3	2271	* @see MPU9150_USERCTRL_I2C_MST_EN_BIT
syundo0730	0:78ba160ba5f3	2272	*/
syundo0730	0:78ba160ba5f3	2273	bool MPU9150::getI2CMasterModeEnabled() {
syundo0730	0:78ba160ba5f3	2274	I2Cdev::readBit(devAddr, MPU9150_RA_USER_CTRL, MPU9150_USERCTRL_I2C_MST_EN_BIT, buffer);
syundo0730	0:78ba160ba5f3	2275	return buffer[0];
syundo0730	0:78ba160ba5f3	2276	}
syundo0730	0:78ba160ba5f3	2277	/** Set I2C Master Mode enabled status.
syundo0730	0:78ba160ba5f3	2278	* @param enabled New I2C Master Mode enabled status
syundo0730	0:78ba160ba5f3	2279	* @see getI2CMasterModeEnabled()
syundo0730	0:78ba160ba5f3	2280	* @see MPU9150_RA_USER_CTRL
syundo0730	0:78ba160ba5f3	2281	* @see MPU9150_USERCTRL_I2C_MST_EN_BIT
syundo0730	0:78ba160ba5f3	2282	*/
syundo0730	0:78ba160ba5f3	2283	void MPU9150::setI2CMasterModeEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	2284	I2Cdev::writeBit(devAddr, MPU9150_RA_USER_CTRL, MPU9150_USERCTRL_I2C_MST_EN_BIT, enabled);
syundo0730	0:78ba160ba5f3	2285	}
syundo0730	0:78ba160ba5f3	2286	/** Switch from I2C to SPI mode (MPU-6000 only)
syundo0730	0:78ba160ba5f3	2287	* If this is set, the primary SPI interface will be enabled in place of the
syundo0730	0:78ba160ba5f3	2288	* disabled primary I2C interface.
syundo0730	0:78ba160ba5f3	2289	*/
syundo0730	0:78ba160ba5f3	2290	void MPU9150::switchSPIEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	2291	I2Cdev::writeBit(devAddr, MPU9150_RA_USER_CTRL, MPU9150_USERCTRL_I2C_IF_DIS_BIT, enabled);
syundo0730	0:78ba160ba5f3	2292	}
syundo0730	0:78ba160ba5f3	2293	/** Reset the FIFO.
syundo0730	0:78ba160ba5f3	2294	* This bit resets the FIFO buffer when set to 1 while FIFO_EN equals 0. This
syundo0730	0:78ba160ba5f3	2295	* bit automatically clears to 0 after the reset has been triggered.
syundo0730	0:78ba160ba5f3	2296	* @see MPU9150_RA_USER_CTRL
syundo0730	0:78ba160ba5f3	2297	* @see MPU9150_USERCTRL_FIFO_RESET_BIT
syundo0730	0:78ba160ba5f3	2298	*/
syundo0730	0:78ba160ba5f3	2299	void MPU9150::resetFIFO() {
syundo0730	0:78ba160ba5f3	2300	I2Cdev::writeBit(devAddr, MPU9150_RA_USER_CTRL, MPU9150_USERCTRL_FIFO_RESET_BIT, true);
syundo0730	0:78ba160ba5f3	2301	}
syundo0730	0:78ba160ba5f3	2302	/** Reset the I2C Master.
syundo0730	0:78ba160ba5f3	2303	* This bit resets the I2C Master when set to 1 while I2C_MST_EN equals 0.
syundo0730	0:78ba160ba5f3	2304	* This bit automatically clears to 0 after the reset has been triggered.
syundo0730	0:78ba160ba5f3	2305	* @see MPU9150_RA_USER_CTRL
syundo0730	0:78ba160ba5f3	2306	* @see MPU9150_USERCTRL_I2C_MST_RESET_BIT
syundo0730	0:78ba160ba5f3	2307	*/
syundo0730	0:78ba160ba5f3	2308	void MPU9150::resetI2CMaster() {
syundo0730	0:78ba160ba5f3	2309	I2Cdev::writeBit(devAddr, MPU9150_RA_USER_CTRL, MPU9150_USERCTRL_I2C_MST_RESET_BIT, true);
syundo0730	0:78ba160ba5f3	2310	}
syundo0730	0:78ba160ba5f3	2311	/** Reset all sensor registers and signal paths.
syundo0730	0:78ba160ba5f3	2312	* When set to 1, this bit resets the signal paths for all sensors (gyroscopes,
syundo0730	0:78ba160ba5f3	2313	* accelerometers, and temperature sensor). This operation will also clear the
syundo0730	0:78ba160ba5f3	2314	* sensor registers. This bit automatically clears to 0 after the reset has been
syundo0730	0:78ba160ba5f3	2315	* triggered.
syundo0730	0:78ba160ba5f3	2316	*
syundo0730	0:78ba160ba5f3	2317	* When resetting only the signal path (and not the sensor registers), please
syundo0730	0:78ba160ba5f3	2318	* use Register 104, SIGNAL_PATH_RESET.
syundo0730	0:78ba160ba5f3	2319	*
syundo0730	0:78ba160ba5f3	2320	* @see MPU9150_RA_USER_CTRL
syundo0730	0:78ba160ba5f3	2321	* @see MPU9150_USERCTRL_SIG_COND_RESET_BIT
syundo0730	0:78ba160ba5f3	2322	*/
syundo0730	0:78ba160ba5f3	2323	void MPU9150::resetSensors() {
syundo0730	0:78ba160ba5f3	2324	I2Cdev::writeBit(devAddr, MPU9150_RA_USER_CTRL, MPU9150_USERCTRL_SIG_COND_RESET_BIT, true);
syundo0730	0:78ba160ba5f3	2325	}
syundo0730	0:78ba160ba5f3	2326
syundo0730	0:78ba160ba5f3	2327	// PWR_MGMT_1 register
syundo0730	0:78ba160ba5f3	2328
syundo0730	0:78ba160ba5f3	2329	/** Trigger a full device reset.
syundo0730	0:78ba160ba5f3	2330	* A small delay of ~50ms may be desirable after triggering a reset.
syundo0730	0:78ba160ba5f3	2331	* @see MPU9150_RA_PWR_MGMT_1
syundo0730	0:78ba160ba5f3	2332	* @see MPU9150_PWR1_DEVICE_RESET_BIT
syundo0730	0:78ba160ba5f3	2333	*/
syundo0730	0:78ba160ba5f3	2334	void MPU9150::reset() {
syundo0730	0:78ba160ba5f3	2335	I2Cdev::writeBit(devAddr, MPU9150_RA_PWR_MGMT_1, MPU9150_PWR1_DEVICE_RESET_BIT, true);
syundo0730	0:78ba160ba5f3	2336	}
syundo0730	0:78ba160ba5f3	2337	/** Get sleep mode status.
syundo0730	0:78ba160ba5f3	2338	* Setting the SLEEP bit in the register puts the device into very low power
syundo0730	0:78ba160ba5f3	2339	* sleep mode. In this mode, only the serial interface and internal registers
syundo0730	0:78ba160ba5f3	2340	* remain active, allowing for a very low standby current. Clearing this bit
syundo0730	0:78ba160ba5f3	2341	* puts the device back into normal mode. To save power, the individual standby
syundo0730	0:78ba160ba5f3	2342	* selections for each of the gyros should be used if any gyro axis is not used
syundo0730	0:78ba160ba5f3	2343	* by the application.
syundo0730	0:78ba160ba5f3	2344	* @return Current sleep mode enabled status
syundo0730	0:78ba160ba5f3	2345	* @see MPU9150_RA_PWR_MGMT_1
syundo0730	0:78ba160ba5f3	2346	* @see MPU9150_PWR1_SLEEP_BIT
syundo0730	0:78ba160ba5f3	2347	*/
syundo0730	0:78ba160ba5f3	2348	bool MPU9150::getSleepEnabled() {
syundo0730	0:78ba160ba5f3	2349	I2Cdev::readBit(devAddr, MPU9150_RA_PWR_MGMT_1, MPU9150_PWR1_SLEEP_BIT, buffer);
syundo0730	0:78ba160ba5f3	2350	return buffer[0];
syundo0730	0:78ba160ba5f3	2351	}
syundo0730	0:78ba160ba5f3	2352	/** Set sleep mode status.
syundo0730	0:78ba160ba5f3	2353	* @param enabled New sleep mode enabled status
syundo0730	0:78ba160ba5f3	2354	* @see getSleepEnabled()
syundo0730	0:78ba160ba5f3	2355	* @see MPU9150_RA_PWR_MGMT_1
syundo0730	0:78ba160ba5f3	2356	* @see MPU9150_PWR1_SLEEP_BIT
syundo0730	0:78ba160ba5f3	2357	*/
syundo0730	0:78ba160ba5f3	2358	void MPU9150::setSleepEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	2359	I2Cdev::writeBit(devAddr, MPU9150_RA_PWR_MGMT_1, MPU9150_PWR1_SLEEP_BIT, enabled);
syundo0730	0:78ba160ba5f3	2360	}
syundo0730	0:78ba160ba5f3	2361	/** Get wake cycle enabled status.
syundo0730	0:78ba160ba5f3	2362	* When this bit is set to 1 and SLEEP is disabled, the MPU-60X0 will cycle
syundo0730	0:78ba160ba5f3	2363	* between sleep mode and waking up to take a single sample of data from active
syundo0730	0:78ba160ba5f3	2364	* sensors at a rate determined by LP_WAKE_CTRL (register 108).
syundo0730	0:78ba160ba5f3	2365	* @return Current sleep mode enabled status
syundo0730	0:78ba160ba5f3	2366	* @see MPU9150_RA_PWR_MGMT_1
syundo0730	0:78ba160ba5f3	2367	* @see MPU9150_PWR1_CYCLE_BIT
syundo0730	0:78ba160ba5f3	2368	*/
syundo0730	0:78ba160ba5f3	2369	bool MPU9150::getWakeCycleEnabled() {
syundo0730	0:78ba160ba5f3	2370	I2Cdev::readBit(devAddr, MPU9150_RA_PWR_MGMT_1, MPU9150_PWR1_CYCLE_BIT, buffer);
syundo0730	0:78ba160ba5f3	2371	return buffer[0];
syundo0730	0:78ba160ba5f3	2372	}
syundo0730	0:78ba160ba5f3	2373	/** Set wake cycle enabled status.
syundo0730	0:78ba160ba5f3	2374	* @param enabled New sleep mode enabled status
syundo0730	0:78ba160ba5f3	2375	* @see getWakeCycleEnabled()
syundo0730	0:78ba160ba5f3	2376	* @see MPU9150_RA_PWR_MGMT_1
syundo0730	0:78ba160ba5f3	2377	* @see MPU9150_PWR1_CYCLE_BIT
syundo0730	0:78ba160ba5f3	2378	*/
syundo0730	0:78ba160ba5f3	2379	void MPU9150::setWakeCycleEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	2380	I2Cdev::writeBit(devAddr, MPU9150_RA_PWR_MGMT_1, MPU9150_PWR1_CYCLE_BIT, enabled);
syundo0730	0:78ba160ba5f3	2381	}
syundo0730	0:78ba160ba5f3	2382	/** Get temperature sensor enabled status.
syundo0730	0:78ba160ba5f3	2383	* Control the usage of the internal temperature sensor.
syundo0730	0:78ba160ba5f3	2384	*
syundo0730	0:78ba160ba5f3	2385	* Note: this register stores the disabled value, but for consistency with the
syundo0730	0:78ba160ba5f3	2386	* rest of the code, the function is named and used with standard true/false
syundo0730	0:78ba160ba5f3	2387	* values to indicate whether the sensor is enabled or disabled, respectively.
syundo0730	0:78ba160ba5f3	2388	*
syundo0730	0:78ba160ba5f3	2389	* @return Current temperature sensor enabled status
syundo0730	0:78ba160ba5f3	2390	* @see MPU9150_RA_PWR_MGMT_1
syundo0730	0:78ba160ba5f3	2391	* @see MPU9150_PWR1_TEMP_DIS_BIT
syundo0730	0:78ba160ba5f3	2392	*/
syundo0730	0:78ba160ba5f3	2393	bool MPU9150::getTempSensorEnabled() {
syundo0730	0:78ba160ba5f3	2394	I2Cdev::readBit(devAddr, MPU9150_RA_PWR_MGMT_1, MPU9150_PWR1_TEMP_DIS_BIT, buffer);
syundo0730	0:78ba160ba5f3	2395	return buffer[0] == 0; // 1 is actually disabled here
syundo0730	0:78ba160ba5f3	2396	}
syundo0730	0:78ba160ba5f3	2397	/** Set temperature sensor enabled status.
syundo0730	0:78ba160ba5f3	2398	* Note: this register stores the disabled value, but for consistency with the
syundo0730	0:78ba160ba5f3	2399	* rest of the code, the function is named and used with standard true/false
syundo0730	0:78ba160ba5f3	2400	* values to indicate whether the sensor is enabled or disabled, respectively.
syundo0730	0:78ba160ba5f3	2401	*
syundo0730	0:78ba160ba5f3	2402	* @param enabled New temperature sensor enabled status
syundo0730	0:78ba160ba5f3	2403	* @see getTempSensorEnabled()
syundo0730	0:78ba160ba5f3	2404	* @see MPU9150_RA_PWR_MGMT_1
syundo0730	0:78ba160ba5f3	2405	* @see MPU9150_PWR1_TEMP_DIS_BIT
syundo0730	0:78ba160ba5f3	2406	*/
syundo0730	0:78ba160ba5f3	2407	void MPU9150::setTempSensorEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	2408	// 1 is actually disabled here
syundo0730	0:78ba160ba5f3	2409	I2Cdev::writeBit(devAddr, MPU9150_RA_PWR_MGMT_1, MPU9150_PWR1_TEMP_DIS_BIT, !enabled);
syundo0730	0:78ba160ba5f3	2410	}
syundo0730	0:78ba160ba5f3	2411	/** Get clock source setting.
syundo0730	0:78ba160ba5f3	2412	* @return Current clock source setting
syundo0730	0:78ba160ba5f3	2413	* @see MPU9150_RA_PWR_MGMT_1
syundo0730	0:78ba160ba5f3	2414	* @see MPU9150_PWR1_CLKSEL_BIT
syundo0730	0:78ba160ba5f3	2415	* @see MPU9150_PWR1_CLKSEL_LENGTH
syundo0730	0:78ba160ba5f3	2416	*/
syundo0730	0:78ba160ba5f3	2417	uint8_t MPU9150::getClockSource() {
syundo0730	0:78ba160ba5f3	2418	I2Cdev::readBits(devAddr, MPU9150_RA_PWR_MGMT_1, MPU9150_PWR1_CLKSEL_BIT, MPU9150_PWR1_CLKSEL_LENGTH, buffer);
syundo0730	0:78ba160ba5f3	2419	return buffer[0];
syundo0730	0:78ba160ba5f3	2420	}
syundo0730	0:78ba160ba5f3	2421	/** Set clock source setting.
syundo0730	0:78ba160ba5f3	2422	* An internal 8MHz oscillator, gyroscope based clock, or external sources can
syundo0730	0:78ba160ba5f3	2423	* be selected as the MPU-60X0 clock source. When the internal 8 MHz oscillator
syundo0730	0:78ba160ba5f3	2424	* or an external source is chosen as the clock source, the MPU-60X0 can operate
syundo0730	0:78ba160ba5f3	2425	* in low power modes with the gyroscopes disabled.
syundo0730	0:78ba160ba5f3	2426	*
syundo0730	0:78ba160ba5f3	2427	* Upon power up, the MPU-60X0 clock source defaults to the internal oscillator.
syundo0730	0:78ba160ba5f3	2428	* However, it is highly recommended that the device be configured to use one of
syundo0730	0:78ba160ba5f3	2429	* the gyroscopes (or an external clock source) as the clock reference for
syundo0730	0:78ba160ba5f3	2430	* improved stability. The clock source can be selected according to the following table:
syundo0730	0:78ba160ba5f3	2431	*
syundo0730	0:78ba160ba5f3	2432	* <pre>
syundo0730	0:78ba160ba5f3	2433	* CLK_SEL \| Clock Source
syundo0730	0:78ba160ba5f3	2434	* --------+--------------------------------------
syundo0730	0:78ba160ba5f3	2435	* 0 \| Internal oscillator
syundo0730	0:78ba160ba5f3	2436	* 1 \| PLL with X Gyro reference
syundo0730	0:78ba160ba5f3	2437	* 2 \| PLL with Y Gyro reference
syundo0730	0:78ba160ba5f3	2438	* 3 \| PLL with Z Gyro reference
syundo0730	0:78ba160ba5f3	2439	* 4 \| PLL with external 32.768kHz reference
syundo0730	0:78ba160ba5f3	2440	* 5 \| PLL with external 19.2MHz reference
syundo0730	0:78ba160ba5f3	2441	* 6 \| Reserved
syundo0730	0:78ba160ba5f3	2442	* 7 \| Stops the clock and keeps the timing generator in reset
syundo0730	0:78ba160ba5f3	2443	* </pre>
syundo0730	0:78ba160ba5f3	2444	*
syundo0730	0:78ba160ba5f3	2445	* @param source New clock source setting
syundo0730	0:78ba160ba5f3	2446	* @see getClockSource()
syundo0730	0:78ba160ba5f3	2447	* @see MPU9150_RA_PWR_MGMT_1
syundo0730	0:78ba160ba5f3	2448	* @see MPU9150_PWR1_CLKSEL_BIT
syundo0730	0:78ba160ba5f3	2449	* @see MPU9150_PWR1_CLKSEL_LENGTH
syundo0730	0:78ba160ba5f3	2450	*/
syundo0730	0:78ba160ba5f3	2451	void MPU9150::setClockSource(uint8_t source) {
syundo0730	0:78ba160ba5f3	2452	I2Cdev::writeBits(devAddr, MPU9150_RA_PWR_MGMT_1, MPU9150_PWR1_CLKSEL_BIT, MPU9150_PWR1_CLKSEL_LENGTH, source);
syundo0730	0:78ba160ba5f3	2453	}
syundo0730	0:78ba160ba5f3	2454
syundo0730	0:78ba160ba5f3	2455	// PWR_MGMT_2 register
syundo0730	0:78ba160ba5f3	2456
syundo0730	0:78ba160ba5f3	2457	/** Get wake frequency in Accel-Only Low Power Mode.
syundo0730	0:78ba160ba5f3	2458	* The MPU-60X0 can be put into Accerlerometer Only Low Power Mode by setting
syundo0730	0:78ba160ba5f3	2459	* PWRSEL to 1 in the Power Management 1 register (Register 107). In this mode,
syundo0730	0:78ba160ba5f3	2460	* the device will power off all devices except for the primary I2C interface,
syundo0730	0:78ba160ba5f3	2461	* waking only the accelerometer at fixed intervals to take a single
syundo0730	0:78ba160ba5f3	2462	* measurement. The frequency of wake-ups can be configured with LP_WAKE_CTRL
syundo0730	0:78ba160ba5f3	2463	* as shown below:
syundo0730	0:78ba160ba5f3	2464	*
syundo0730	0:78ba160ba5f3	2465	* <pre>
syundo0730	0:78ba160ba5f3	2466	* LP_WAKE_CTRL \| Wake-up Frequency
syundo0730	0:78ba160ba5f3	2467	* -------------+------------------
syundo0730	0:78ba160ba5f3	2468	* 0 \| 1.25 Hz
syundo0730	0:78ba160ba5f3	2469	* 1 \| 2.5 Hz
syundo0730	0:78ba160ba5f3	2470	* 2 \| 5 Hz
syundo0730	0:78ba160ba5f3	2471	* 3 \| 10 Hz
syundo0730	0:78ba160ba5f3	2472	* <pre>
syundo0730	0:78ba160ba5f3	2473	*
syundo0730	0:78ba160ba5f3	2474	* For further information regarding the MPU-60X0's power modes, please refer to
syundo0730	0:78ba160ba5f3	2475	* Register 107.
syundo0730	0:78ba160ba5f3	2476	*
syundo0730	0:78ba160ba5f3	2477	* @return Current wake frequency
syundo0730	0:78ba160ba5f3	2478	* @see MPU9150_RA_PWR_MGMT_2
syundo0730	0:78ba160ba5f3	2479	*/
syundo0730	0:78ba160ba5f3	2480	uint8_t MPU9150::getWakeFrequency() {
syundo0730	0:78ba160ba5f3	2481	I2Cdev::readBits(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_LP_WAKE_CTRL_BIT, MPU9150_PWR2_LP_WAKE_CTRL_LENGTH, buffer);
syundo0730	0:78ba160ba5f3	2482	return buffer[0];
syundo0730	0:78ba160ba5f3	2483	}
syundo0730	0:78ba160ba5f3	2484	/** Set wake frequency in Accel-Only Low Power Mode.
syundo0730	0:78ba160ba5f3	2485	* @param frequency New wake frequency
syundo0730	0:78ba160ba5f3	2486	* @see MPU9150_RA_PWR_MGMT_2
syundo0730	0:78ba160ba5f3	2487	*/
syundo0730	0:78ba160ba5f3	2488	void MPU9150::setWakeFrequency(uint8_t frequency) {
syundo0730	0:78ba160ba5f3	2489	I2Cdev::writeBits(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_LP_WAKE_CTRL_BIT, MPU9150_PWR2_LP_WAKE_CTRL_LENGTH, frequency);
syundo0730	0:78ba160ba5f3	2490	}
syundo0730	0:78ba160ba5f3	2491
syundo0730	0:78ba160ba5f3	2492	/** Get X-axis accelerometer standby enabled status.
syundo0730	0:78ba160ba5f3	2493	* If enabled, the X-axis will not gather or report data (or use power).
syundo0730	0:78ba160ba5f3	2494	* @return Current X-axis standby enabled status
syundo0730	0:78ba160ba5f3	2495	* @see MPU9150_RA_PWR_MGMT_2
syundo0730	0:78ba160ba5f3	2496	* @see MPU9150_PWR2_STBY_XA_BIT
syundo0730	0:78ba160ba5f3	2497	*/
syundo0730	0:78ba160ba5f3	2498	bool MPU9150::getStandbyXAccelEnabled() {
syundo0730	0:78ba160ba5f3	2499	I2Cdev::readBit(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_STBY_XA_BIT, buffer);
syundo0730	0:78ba160ba5f3	2500	return buffer[0];
syundo0730	0:78ba160ba5f3	2501	}
syundo0730	0:78ba160ba5f3	2502	/** Set X-axis accelerometer standby enabled status.
syundo0730	0:78ba160ba5f3	2503	* @param New X-axis standby enabled status
syundo0730	0:78ba160ba5f3	2504	* @see getStandbyXAccelEnabled()
syundo0730	0:78ba160ba5f3	2505	* @see MPU9150_RA_PWR_MGMT_2
syundo0730	0:78ba160ba5f3	2506	* @see MPU9150_PWR2_STBY_XA_BIT
syundo0730	0:78ba160ba5f3	2507	*/
syundo0730	0:78ba160ba5f3	2508	void MPU9150::setStandbyXAccelEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	2509	I2Cdev::writeBit(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_STBY_XA_BIT, enabled);
syundo0730	0:78ba160ba5f3	2510	}
syundo0730	0:78ba160ba5f3	2511	/** Get Y-axis accelerometer standby enabled status.
syundo0730	0:78ba160ba5f3	2512	* If enabled, the Y-axis will not gather or report data (or use power).
syundo0730	0:78ba160ba5f3	2513	* @return Current Y-axis standby enabled status
syundo0730	0:78ba160ba5f3	2514	* @see MPU9150_RA_PWR_MGMT_2
syundo0730	0:78ba160ba5f3	2515	* @see MPU9150_PWR2_STBY_YA_BIT
syundo0730	0:78ba160ba5f3	2516	*/
syundo0730	0:78ba160ba5f3	2517	bool MPU9150::getStandbyYAccelEnabled() {
syundo0730	0:78ba160ba5f3	2518	I2Cdev::readBit(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_STBY_YA_BIT, buffer);
syundo0730	0:78ba160ba5f3	2519	return buffer[0];
syundo0730	0:78ba160ba5f3	2520	}
syundo0730	0:78ba160ba5f3	2521	/** Set Y-axis accelerometer standby enabled status.
syundo0730	0:78ba160ba5f3	2522	* @param New Y-axis standby enabled status
syundo0730	0:78ba160ba5f3	2523	* @see getStandbyYAccelEnabled()
syundo0730	0:78ba160ba5f3	2524	* @see MPU9150_RA_PWR_MGMT_2
syundo0730	0:78ba160ba5f3	2525	* @see MPU9150_PWR2_STBY_YA_BIT
syundo0730	0:78ba160ba5f3	2526	*/
syundo0730	0:78ba160ba5f3	2527	void MPU9150::setStandbyYAccelEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	2528	I2Cdev::writeBit(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_STBY_YA_BIT, enabled);
syundo0730	0:78ba160ba5f3	2529	}
syundo0730	0:78ba160ba5f3	2530	/** Get Z-axis accelerometer standby enabled status.
syundo0730	0:78ba160ba5f3	2531	* If enabled, the Z-axis will not gather or report data (or use power).
syundo0730	0:78ba160ba5f3	2532	* @return Current Z-axis standby enabled status
syundo0730	0:78ba160ba5f3	2533	* @see MPU9150_RA_PWR_MGMT_2
syundo0730	0:78ba160ba5f3	2534	* @see MPU9150_PWR2_STBY_ZA_BIT
syundo0730	0:78ba160ba5f3	2535	*/
syundo0730	0:78ba160ba5f3	2536	bool MPU9150::getStandbyZAccelEnabled() {
syundo0730	0:78ba160ba5f3	2537	I2Cdev::readBit(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_STBY_ZA_BIT, buffer);
syundo0730	0:78ba160ba5f3	2538	return buffer[0];
syundo0730	0:78ba160ba5f3	2539	}
syundo0730	0:78ba160ba5f3	2540	/** Set Z-axis accelerometer standby enabled status.
syundo0730	0:78ba160ba5f3	2541	* @param New Z-axis standby enabled status
syundo0730	0:78ba160ba5f3	2542	* @see getStandbyZAccelEnabled()
syundo0730	0:78ba160ba5f3	2543	* @see MPU9150_RA_PWR_MGMT_2
syundo0730	0:78ba160ba5f3	2544	* @see MPU9150_PWR2_STBY_ZA_BIT
syundo0730	0:78ba160ba5f3	2545	*/
syundo0730	0:78ba160ba5f3	2546	void MPU9150::setStandbyZAccelEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	2547	I2Cdev::writeBit(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_STBY_ZA_BIT, enabled);
syundo0730	0:78ba160ba5f3	2548	}
syundo0730	0:78ba160ba5f3	2549	/** Get X-axis gyroscope standby enabled status.
syundo0730	0:78ba160ba5f3	2550	* If enabled, the X-axis will not gather or report data (or use power).
syundo0730	0:78ba160ba5f3	2551	* @return Current X-axis standby enabled status
syundo0730	0:78ba160ba5f3	2552	* @see MPU9150_RA_PWR_MGMT_2
syundo0730	0:78ba160ba5f3	2553	* @see MPU9150_PWR2_STBY_XG_BIT
syundo0730	0:78ba160ba5f3	2554	*/
syundo0730	0:78ba160ba5f3	2555	bool MPU9150::getStandbyXGyroEnabled() {
syundo0730	0:78ba160ba5f3	2556	I2Cdev::readBit(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_STBY_XG_BIT, buffer);
syundo0730	0:78ba160ba5f3	2557	return buffer[0];
syundo0730	0:78ba160ba5f3	2558	}
syundo0730	0:78ba160ba5f3	2559	/** Set X-axis gyroscope standby enabled status.
syundo0730	0:78ba160ba5f3	2560	* @param New X-axis standby enabled status
syundo0730	0:78ba160ba5f3	2561	* @see getStandbyXGyroEnabled()
syundo0730	0:78ba160ba5f3	2562	* @see MPU9150_RA_PWR_MGMT_2
syundo0730	0:78ba160ba5f3	2563	* @see MPU9150_PWR2_STBY_XG_BIT
syundo0730	0:78ba160ba5f3	2564	*/
syundo0730	0:78ba160ba5f3	2565	void MPU9150::setStandbyXGyroEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	2566	I2Cdev::writeBit(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_STBY_XG_BIT, enabled);
syundo0730	0:78ba160ba5f3	2567	}
syundo0730	0:78ba160ba5f3	2568	/** Get Y-axis gyroscope standby enabled status.
syundo0730	0:78ba160ba5f3	2569	* If enabled, the Y-axis will not gather or report data (or use power).
syundo0730	0:78ba160ba5f3	2570	* @return Current Y-axis standby enabled status
syundo0730	0:78ba160ba5f3	2571	* @see MPU9150_RA_PWR_MGMT_2
syundo0730	0:78ba160ba5f3	2572	* @see MPU9150_PWR2_STBY_YG_BIT
syundo0730	0:78ba160ba5f3	2573	*/
syundo0730	0:78ba160ba5f3	2574	bool MPU9150::getStandbyYGyroEnabled() {
syundo0730	0:78ba160ba5f3	2575	I2Cdev::readBit(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_STBY_YG_BIT, buffer);
syundo0730	0:78ba160ba5f3	2576	return buffer[0];
syundo0730	0:78ba160ba5f3	2577	}
syundo0730	0:78ba160ba5f3	2578	/** Set Y-axis gyroscope standby enabled status.
syundo0730	0:78ba160ba5f3	2579	* @param New Y-axis standby enabled status
syundo0730	0:78ba160ba5f3	2580	* @see getStandbyYGyroEnabled()
syundo0730	0:78ba160ba5f3	2581	* @see MPU9150_RA_PWR_MGMT_2
syundo0730	0:78ba160ba5f3	2582	* @see MPU9150_PWR2_STBY_YG_BIT
syundo0730	0:78ba160ba5f3	2583	*/
syundo0730	0:78ba160ba5f3	2584	void MPU9150::setStandbyYGyroEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	2585	I2Cdev::writeBit(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_STBY_YG_BIT, enabled);
syundo0730	0:78ba160ba5f3	2586	}
syundo0730	0:78ba160ba5f3	2587	/** Get Z-axis gyroscope standby enabled status.
syundo0730	0:78ba160ba5f3	2588	* If enabled, the Z-axis will not gather or report data (or use power).
syundo0730	0:78ba160ba5f3	2589	* @return Current Z-axis standby enabled status
syundo0730	0:78ba160ba5f3	2590	* @see MPU9150_RA_PWR_MGMT_2
syundo0730	0:78ba160ba5f3	2591	* @see MPU9150_PWR2_STBY_ZG_BIT
syundo0730	0:78ba160ba5f3	2592	*/
syundo0730	0:78ba160ba5f3	2593	bool MPU9150::getStandbyZGyroEnabled() {
syundo0730	0:78ba160ba5f3	2594	I2Cdev::readBit(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_STBY_ZG_BIT, buffer);
syundo0730	0:78ba160ba5f3	2595	return buffer[0];
syundo0730	0:78ba160ba5f3	2596	}
syundo0730	0:78ba160ba5f3	2597	/** Set Z-axis gyroscope standby enabled status.
syundo0730	0:78ba160ba5f3	2598	* @param New Z-axis standby enabled status
syundo0730	0:78ba160ba5f3	2599	* @see getStandbyZGyroEnabled()
syundo0730	0:78ba160ba5f3	2600	* @see MPU9150_RA_PWR_MGMT_2
syundo0730	0:78ba160ba5f3	2601	* @see MPU9150_PWR2_STBY_ZG_BIT
syundo0730	0:78ba160ba5f3	2602	*/
syundo0730	0:78ba160ba5f3	2603	void MPU9150::setStandbyZGyroEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	2604	I2Cdev::writeBit(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_STBY_ZG_BIT, enabled);
syundo0730	0:78ba160ba5f3	2605	}
syundo0730	0:78ba160ba5f3	2606
syundo0730	0:78ba160ba5f3	2607	// FIFO_COUNT* registers
syundo0730	0:78ba160ba5f3	2608
syundo0730	0:78ba160ba5f3	2609	/** Get current FIFO buffer size.
syundo0730	0:78ba160ba5f3	2610	* This value indicates the number of bytes stored in the FIFO buffer. This
syundo0730	0:78ba160ba5f3	2611	* number is in turn the number of bytes that can be read from the FIFO buffer
syundo0730	0:78ba160ba5f3	2612	* and it is directly proportional to the number of samples available given the
syundo0730	0:78ba160ba5f3	2613	* set of sensor data bound to be stored in the FIFO (register 35 and 36).
syundo0730	0:78ba160ba5f3	2614	* @return Current FIFO buffer size
syundo0730	0:78ba160ba5f3	2615	*/
syundo0730	0:78ba160ba5f3	2616	uint16_t MPU9150::getFIFOCount() {
syundo0730	0:78ba160ba5f3	2617	I2Cdev::readBytes(devAddr, MPU9150_RA_FIFO_COUNTH, 2, buffer);
syundo0730	0:78ba160ba5f3	2618	return (((uint16_t)buffer[0]) << 8) \| buffer[1];
syundo0730	0:78ba160ba5f3	2619	}
syundo0730	0:78ba160ba5f3	2620
syundo0730	0:78ba160ba5f3	2621	// FIFO_R_W register
syundo0730	0:78ba160ba5f3	2622
syundo0730	0:78ba160ba5f3	2623	/** Get byte from FIFO buffer.
syundo0730	0:78ba160ba5f3	2624	* This register is used to read and write data from the FIFO buffer. Data is
syundo0730	0:78ba160ba5f3	2625	* written to the FIFO in order of register number (from lowest to highest). If
syundo0730	0:78ba160ba5f3	2626	* all the FIFO enable flags (see below) are enabled and all External Sensor
syundo0730	0:78ba160ba5f3	2627	* Data registers (Registers 73 to 96) are associated with a Slave device, the
syundo0730	0:78ba160ba5f3	2628	* contents of registers 59 through 96 will be written in order at the Sample
syundo0730	0:78ba160ba5f3	2629	* Rate.
syundo0730	0:78ba160ba5f3	2630	*
syundo0730	0:78ba160ba5f3	2631	* The contents of the sensor data registers (Registers 59 to 96) are written
syundo0730	0:78ba160ba5f3	2632	* into the FIFO buffer when their corresponding FIFO enable flags are set to 1
syundo0730	0:78ba160ba5f3	2633	* in FIFO_EN (Register 35). An additional flag for the sensor data registers
syundo0730	0:78ba160ba5f3	2634	* associated with I2C Slave 3 can be found in I2C_MST_CTRL (Register 36).
syundo0730	0:78ba160ba5f3	2635	*
syundo0730	0:78ba160ba5f3	2636	* If the FIFO buffer has overflowed, the status bit FIFO_OFLOW_INT is
syundo0730	0:78ba160ba5f3	2637	* automatically set to 1. This bit is located in INT_STATUS (Register 58).
syundo0730	0:78ba160ba5f3	2638	* When the FIFO buffer has overflowed, the oldest data will be lost and new
syundo0730	0:78ba160ba5f3	2639	* data will be written to the FIFO.
syundo0730	0:78ba160ba5f3	2640	*
syundo0730	0:78ba160ba5f3	2641	* If the FIFO buffer is empty, reading this register will return the last byte
syundo0730	0:78ba160ba5f3	2642	* that was previously read from the FIFO until new data is available. The user
syundo0730	0:78ba160ba5f3	2643	* should check FIFO_COUNT to ensure that the FIFO buffer is not read when
syundo0730	0:78ba160ba5f3	2644	* empty.
syundo0730	0:78ba160ba5f3	2645	*
syundo0730	0:78ba160ba5f3	2646	* @return Byte from FIFO buffer
syundo0730	0:78ba160ba5f3	2647	*/
syundo0730	0:78ba160ba5f3	2648	uint8_t MPU9150::getFIFOByte() {
syundo0730	0:78ba160ba5f3	2649	I2Cdev::readByte(devAddr, MPU9150_RA_FIFO_R_W, buffer);
syundo0730	0:78ba160ba5f3	2650	return buffer[0];
syundo0730	0:78ba160ba5f3	2651	}
syundo0730	0:78ba160ba5f3	2652	void MPU9150::getFIFOBytes(uint8_t *data, uint8_t length) {
syundo0730	0:78ba160ba5f3	2653	I2Cdev::readBytes(devAddr, MPU9150_RA_FIFO_R_W, length, data);
syundo0730	0:78ba160ba5f3	2654	}
syundo0730	0:78ba160ba5f3	2655	/** Write byte to FIFO buffer.
syundo0730	0:78ba160ba5f3	2656	* @see getFIFOByte()
syundo0730	0:78ba160ba5f3	2657	* @see MPU9150_RA_FIFO_R_W
syundo0730	0:78ba160ba5f3	2658	*/
syundo0730	0:78ba160ba5f3	2659	void MPU9150::setFIFOByte(uint8_t data) {
syundo0730	0:78ba160ba5f3	2660	I2Cdev::writeByte(devAddr, MPU9150_RA_FIFO_R_W, data);
syundo0730	0:78ba160ba5f3	2661	}
syundo0730	0:78ba160ba5f3	2662
syundo0730	0:78ba160ba5f3	2663	// WHO_AM_I register
syundo0730	0:78ba160ba5f3	2664
syundo0730	0:78ba160ba5f3	2665	/** Get Device ID.
syundo0730	0:78ba160ba5f3	2666	* This register is used to verify the identity of the device (0b110100, 0x34).
syundo0730	0:78ba160ba5f3	2667	* @return Device ID (6 bits only! should be 0x34)
syundo0730	0:78ba160ba5f3	2668	* @see MPU9150_RA_WHO_AM_I
syundo0730	0:78ba160ba5f3	2669	* @see MPU9150_WHO_AM_I_BIT
syundo0730	0:78ba160ba5f3	2670	* @see MPU9150_WHO_AM_I_LENGTH
syundo0730	0:78ba160ba5f3	2671	*/
syundo0730	0:78ba160ba5f3	2672	uint8_t MPU9150::getDeviceID() {
syundo0730	0:78ba160ba5f3	2673	I2Cdev::readBits(devAddr, MPU9150_RA_WHO_AM_I, MPU9150_WHO_AM_I_BIT, MPU9150_WHO_AM_I_LENGTH, buffer);
syundo0730	0:78ba160ba5f3	2674	return buffer[0];
syundo0730	0:78ba160ba5f3	2675	}
syundo0730	0:78ba160ba5f3	2676	/** Set Device ID.
syundo0730	0:78ba160ba5f3	2677	* Write a new ID into the WHO_AM_I register (no idea why this should ever be
syundo0730	0:78ba160ba5f3	2678	* necessary though).
syundo0730	0:78ba160ba5f3	2679	* @param id New device ID to set.
syundo0730	0:78ba160ba5f3	2680	* @see getDeviceID()
syundo0730	0:78ba160ba5f3	2681	* @see MPU9150_RA_WHO_AM_I
syundo0730	0:78ba160ba5f3	2682	* @see MPU9150_WHO_AM_I_BIT
syundo0730	0:78ba160ba5f3	2683	* @see MPU9150_WHO_AM_I_LENGTH
syundo0730	0:78ba160ba5f3	2684	*/
syundo0730	0:78ba160ba5f3	2685	void MPU9150::setDeviceID(uint8_t id) {
syundo0730	0:78ba160ba5f3	2686	I2Cdev::writeBits(devAddr, MPU9150_RA_WHO_AM_I, MPU9150_WHO_AM_I_BIT, MPU9150_WHO_AM_I_LENGTH, id);
syundo0730	0:78ba160ba5f3	2687	}
syundo0730	0:78ba160ba5f3	2688
syundo0730	0:78ba160ba5f3	2689	// ======== UNDOCUMENTED/DMP REGISTERS/METHODS ========
syundo0730	0:78ba160ba5f3	2690
syundo0730	0:78ba160ba5f3	2691	// XG_OFFS_TC register
syundo0730	0:78ba160ba5f3	2692
syundo0730	0:78ba160ba5f3	2693	uint8_t MPU9150::getOTPBankValid() {
syundo0730	0:78ba160ba5f3	2694	I2Cdev::readBit(devAddr, MPU9150_RA_XG_OFFS_TC, MPU9150_TC_OTP_BNK_VLD_BIT, buffer);
syundo0730	0:78ba160ba5f3	2695	return buffer[0];
syundo0730	0:78ba160ba5f3	2696	}
syundo0730	0:78ba160ba5f3	2697	void MPU9150::setOTPBankValid(bool enabled) {
syundo0730	0:78ba160ba5f3	2698	I2Cdev::writeBit(devAddr, MPU9150_RA_XG_OFFS_TC, MPU9150_TC_OTP_BNK_VLD_BIT, enabled);
syundo0730	0:78ba160ba5f3	2699	}
syundo0730	0:78ba160ba5f3	2700	int8_t MPU9150::getXGyroOffsetTC() {
syundo0730	0:78ba160ba5f3	2701	I2Cdev::readBits(devAddr, MPU9150_RA_XG_OFFS_TC, MPU9150_TC_OFFSET_BIT, MPU9150_TC_OFFSET_LENGTH, buffer);
syundo0730	0:78ba160ba5f3	2702	return buffer[0];
syundo0730	0:78ba160ba5f3	2703	}
syundo0730	0:78ba160ba5f3	2704	void MPU9150::setXGyroOffsetTC(int8_t offset) {
syundo0730	0:78ba160ba5f3	2705	I2Cdev::writeBits(devAddr, MPU9150_RA_XG_OFFS_TC, MPU9150_TC_OFFSET_BIT, MPU9150_TC_OFFSET_LENGTH, offset);
syundo0730	0:78ba160ba5f3	2706	}
syundo0730	0:78ba160ba5f3	2707
syundo0730	0:78ba160ba5f3	2708	// YG_OFFS_TC register
syundo0730	0:78ba160ba5f3	2709
syundo0730	0:78ba160ba5f3	2710	int8_t MPU9150::getYGyroOffsetTC() {
syundo0730	0:78ba160ba5f3	2711	I2Cdev::readBits(devAddr, MPU9150_RA_YG_OFFS_TC, MPU9150_TC_OFFSET_BIT, MPU9150_TC_OFFSET_LENGTH, buffer);
syundo0730	0:78ba160ba5f3	2712	return buffer[0];
syundo0730	0:78ba160ba5f3	2713	}
syundo0730	0:78ba160ba5f3	2714	void MPU9150::setYGyroOffsetTC(int8_t offset) {
syundo0730	0:78ba160ba5f3	2715	I2Cdev::writeBits(devAddr, MPU9150_RA_YG_OFFS_TC, MPU9150_TC_OFFSET_BIT, MPU9150_TC_OFFSET_LENGTH, offset);
syundo0730	0:78ba160ba5f3	2716	}
syundo0730	0:78ba160ba5f3	2717
syundo0730	0:78ba160ba5f3	2718	// ZG_OFFS_TC register
syundo0730	0:78ba160ba5f3	2719
syundo0730	0:78ba160ba5f3	2720	int8_t MPU9150::getZGyroOffsetTC() {
syundo0730	0:78ba160ba5f3	2721	I2Cdev::readBits(devAddr, MPU9150_RA_ZG_OFFS_TC, MPU9150_TC_OFFSET_BIT, MPU9150_TC_OFFSET_LENGTH, buffer);
syundo0730	0:78ba160ba5f3	2722	return buffer[0];
syundo0730	0:78ba160ba5f3	2723	}
syundo0730	0:78ba160ba5f3	2724	void MPU9150::setZGyroOffsetTC(int8_t offset) {
syundo0730	0:78ba160ba5f3	2725	I2Cdev::writeBits(devAddr, MPU9150_RA_ZG_OFFS_TC, MPU9150_TC_OFFSET_BIT, MPU9150_TC_OFFSET_LENGTH, offset);
syundo0730	0:78ba160ba5f3	2726	}
syundo0730	0:78ba160ba5f3	2727
syundo0730	0:78ba160ba5f3	2728	// X_FINE_GAIN register
syundo0730	0:78ba160ba5f3	2729
syundo0730	0:78ba160ba5f3	2730	int8_t MPU9150::getXFineGain() {
syundo0730	0:78ba160ba5f3	2731	I2Cdev::readByte(devAddr, MPU9150_RA_X_FINE_GAIN, buffer);
syundo0730	0:78ba160ba5f3	2732	return buffer[0];
syundo0730	0:78ba160ba5f3	2733	}
syundo0730	0:78ba160ba5f3	2734	void MPU9150::setXFineGain(int8_t gain) {
syundo0730	0:78ba160ba5f3	2735	I2Cdev::writeByte(devAddr, MPU9150_RA_X_FINE_GAIN, gain);
syundo0730	0:78ba160ba5f3	2736	}
syundo0730	0:78ba160ba5f3	2737
syundo0730	0:78ba160ba5f3	2738	// Y_FINE_GAIN register
syundo0730	0:78ba160ba5f3	2739
syundo0730	0:78ba160ba5f3	2740	int8_t MPU9150::getYFineGain() {
syundo0730	0:78ba160ba5f3	2741	I2Cdev::readByte(devAddr, MPU9150_RA_Y_FINE_GAIN, buffer);
syundo0730	0:78ba160ba5f3	2742	return buffer[0];
syundo0730	0:78ba160ba5f3	2743	}
syundo0730	0:78ba160ba5f3	2744	void MPU9150::setYFineGain(int8_t gain) {
syundo0730	0:78ba160ba5f3	2745	I2Cdev::writeByte(devAddr, MPU9150_RA_Y_FINE_GAIN, gain);
syundo0730	0:78ba160ba5f3	2746	}
syundo0730	0:78ba160ba5f3	2747
syundo0730	0:78ba160ba5f3	2748	// Z_FINE_GAIN register
syundo0730	0:78ba160ba5f3	2749
syundo0730	0:78ba160ba5f3	2750	int8_t MPU9150::getZFineGain() {
syundo0730	0:78ba160ba5f3	2751	I2Cdev::readByte(devAddr, MPU9150_RA_Z_FINE_GAIN, buffer);
syundo0730	0:78ba160ba5f3	2752	return buffer[0];
syundo0730	0:78ba160ba5f3	2753	}
syundo0730	0:78ba160ba5f3	2754	void MPU9150::setZFineGain(int8_t gain) {
syundo0730	0:78ba160ba5f3	2755	I2Cdev::writeByte(devAddr, MPU9150_RA_Z_FINE_GAIN, gain);
syundo0730	0:78ba160ba5f3	2756	}
syundo0730	0:78ba160ba5f3	2757
syundo0730	0:78ba160ba5f3	2758	// XA_OFFS_* registers
syundo0730	0:78ba160ba5f3	2759
syundo0730	0:78ba160ba5f3	2760	int16_t MPU9150::getXAccelOffset() {
syundo0730	0:78ba160ba5f3	2761	I2Cdev::readBytes(devAddr, MPU9150_RA_XA_OFFS_H, 2, buffer);
syundo0730	0:78ba160ba5f3	2762	return (((int16_t)buffer[0]) << 8) \| buffer[1];
syundo0730	0:78ba160ba5f3	2763	}
syundo0730	0:78ba160ba5f3	2764	void MPU9150::setXAccelOffset(int16_t offset) {
syundo0730	0:78ba160ba5f3	2765	I2Cdev::writeWord(devAddr, MPU9150_RA_XA_OFFS_H, offset);
syundo0730	0:78ba160ba5f3	2766	}
syundo0730	0:78ba160ba5f3	2767
syundo0730	0:78ba160ba5f3	2768	// YA_OFFS_* register
syundo0730	0:78ba160ba5f3	2769
syundo0730	0:78ba160ba5f3	2770	int16_t MPU9150::getYAccelOffset() {
syundo0730	0:78ba160ba5f3	2771	I2Cdev::readBytes(devAddr, MPU9150_RA_YA_OFFS_H, 2, buffer);
syundo0730	0:78ba160ba5f3	2772	return (((int16_t)buffer[0]) << 8) \| buffer[1];
syundo0730	0:78ba160ba5f3	2773	}
syundo0730	0:78ba160ba5f3	2774	void MPU9150::setYAccelOffset(int16_t offset) {
syundo0730	0:78ba160ba5f3	2775	I2Cdev::writeWord(devAddr, MPU9150_RA_YA_OFFS_H, offset);
syundo0730	0:78ba160ba5f3	2776	}
syundo0730	0:78ba160ba5f3	2777
syundo0730	0:78ba160ba5f3	2778	// ZA_OFFS_* register
syundo0730	0:78ba160ba5f3	2779
syundo0730	0:78ba160ba5f3	2780	int16_t MPU9150::getZAccelOffset() {
syundo0730	0:78ba160ba5f3	2781	I2Cdev::readBytes(devAddr, MPU9150_RA_ZA_OFFS_H, 2, buffer);
syundo0730	0:78ba160ba5f3	2782	return (((int16_t)buffer[0]) << 8) \| buffer[1];
syundo0730	0:78ba160ba5f3	2783	}
syundo0730	0:78ba160ba5f3	2784	void MPU9150::setZAccelOffset(int16_t offset) {
syundo0730	0:78ba160ba5f3	2785	I2Cdev::writeWord(devAddr, MPU9150_RA_ZA_OFFS_H, offset);
syundo0730	0:78ba160ba5f3	2786	}
syundo0730	0:78ba160ba5f3	2787
syundo0730	0:78ba160ba5f3	2788	// XG_OFFS_USR* registers
syundo0730	0:78ba160ba5f3	2789
syundo0730	0:78ba160ba5f3	2790	int16_t MPU9150::getXGyroOffset() {
syundo0730	0:78ba160ba5f3	2791	I2Cdev::readBytes(devAddr, MPU9150_RA_XG_OFFS_USRH, 2, buffer);
syundo0730	0:78ba160ba5f3	2792	return (((int16_t)buffer[0]) << 8) \| buffer[1];
syundo0730	0:78ba160ba5f3	2793	}
syundo0730	0:78ba160ba5f3	2794	void MPU9150::setXGyroOffset(int16_t offset) {
syundo0730	0:78ba160ba5f3	2795	I2Cdev::writeWord(devAddr, MPU9150_RA_XG_OFFS_USRH, offset);
syundo0730	0:78ba160ba5f3	2796	}
syundo0730	0:78ba160ba5f3	2797
syundo0730	0:78ba160ba5f3	2798	// YG_OFFS_USR* register
syundo0730	0:78ba160ba5f3	2799
syundo0730	0:78ba160ba5f3	2800	int16_t MPU9150::getYGyroOffset() {
syundo0730	0:78ba160ba5f3	2801	I2Cdev::readBytes(devAddr, MPU9150_RA_YG_OFFS_USRH, 2, buffer);
syundo0730	0:78ba160ba5f3	2802	return (((int16_t)buffer[0]) << 8) \| buffer[1];
syundo0730	0:78ba160ba5f3	2803	}
syundo0730	0:78ba160ba5f3	2804	void MPU9150::setYGyroOffset(int16_t offset) {
syundo0730	0:78ba160ba5f3	2805	I2Cdev::writeWord(devAddr, MPU9150_RA_YG_OFFS_USRH, offset);
syundo0730	0:78ba160ba5f3	2806	}
syundo0730	0:78ba160ba5f3	2807
syundo0730	0:78ba160ba5f3	2808	// ZG_OFFS_USR* register
syundo0730	0:78ba160ba5f3	2809
syundo0730	0:78ba160ba5f3	2810	int16_t MPU9150::getZGyroOffset() {
syundo0730	0:78ba160ba5f3	2811	I2Cdev::readBytes(devAddr, MPU9150_RA_ZG_OFFS_USRH, 2, buffer);
syundo0730	0:78ba160ba5f3	2812	return (((int16_t)buffer[0]) << 8) \| buffer[1];
syundo0730	0:78ba160ba5f3	2813	}
syundo0730	0:78ba160ba5f3	2814	void MPU9150::setZGyroOffset(int16_t offset) {
syundo0730	0:78ba160ba5f3	2815	I2Cdev::writeWord(devAddr, MPU9150_RA_ZG_OFFS_USRH, offset);
syundo0730	0:78ba160ba5f3	2816	}
syundo0730	0:78ba160ba5f3	2817
syundo0730	0:78ba160ba5f3	2818	// INT_ENABLE register (DMP functions)
syundo0730	0:78ba160ba5f3	2819
syundo0730	0:78ba160ba5f3	2820	bool MPU9150::getIntPLLReadyEnabled() {
syundo0730	0:78ba160ba5f3	2821	I2Cdev::readBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_PLL_RDY_INT_BIT, buffer);
syundo0730	0:78ba160ba5f3	2822	return buffer[0];
syundo0730	0:78ba160ba5f3	2823	}
syundo0730	0:78ba160ba5f3	2824	void MPU9150::setIntPLLReadyEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	2825	I2Cdev::writeBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_PLL_RDY_INT_BIT, enabled);
syundo0730	0:78ba160ba5f3	2826	}
syundo0730	0:78ba160ba5f3	2827	bool MPU9150::getIntDMPEnabled() {
syundo0730	0:78ba160ba5f3	2828	I2Cdev::readBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_DMP_INT_BIT, buffer);
syundo0730	0:78ba160ba5f3	2829	return buffer[0];
syundo0730	0:78ba160ba5f3	2830	}
syundo0730	0:78ba160ba5f3	2831	void MPU9150::setIntDMPEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	2832	I2Cdev::writeBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_DMP_INT_BIT, enabled);
syundo0730	0:78ba160ba5f3	2833	}
syundo0730	0:78ba160ba5f3	2834
syundo0730	0:78ba160ba5f3	2835	// DMP_INT_STATUS
syundo0730	0:78ba160ba5f3	2836
syundo0730	0:78ba160ba5f3	2837	bool MPU9150::getDMPInt5Status() {
syundo0730	0:78ba160ba5f3	2838	I2Cdev::readBit(devAddr, MPU9150_RA_DMP_INT_STATUS, MPU9150_DMPINT_5_BIT, buffer);
syundo0730	0:78ba160ba5f3	2839	return buffer[0];
syundo0730	0:78ba160ba5f3	2840	}
syundo0730	0:78ba160ba5f3	2841	bool MPU9150::getDMPInt4Status() {
syundo0730	0:78ba160ba5f3	2842	I2Cdev::readBit(devAddr, MPU9150_RA_DMP_INT_STATUS, MPU9150_DMPINT_4_BIT, buffer);
syundo0730	0:78ba160ba5f3	2843	return buffer[0];
syundo0730	0:78ba160ba5f3	2844	}
syundo0730	0:78ba160ba5f3	2845	bool MPU9150::getDMPInt3Status() {
syundo0730	0:78ba160ba5f3	2846	I2Cdev::readBit(devAddr, MPU9150_RA_DMP_INT_STATUS, MPU9150_DMPINT_3_BIT, buffer);
syundo0730	0:78ba160ba5f3	2847	return buffer[0];
syundo0730	0:78ba160ba5f3	2848	}
syundo0730	0:78ba160ba5f3	2849	bool MPU9150::getDMPInt2Status() {
syundo0730	0:78ba160ba5f3	2850	I2Cdev::readBit(devAddr, MPU9150_RA_DMP_INT_STATUS, MPU9150_DMPINT_2_BIT, buffer);
syundo0730	0:78ba160ba5f3	2851	return buffer[0];
syundo0730	0:78ba160ba5f3	2852	}
syundo0730	0:78ba160ba5f3	2853	bool MPU9150::getDMPInt1Status() {
syundo0730	0:78ba160ba5f3	2854	I2Cdev::readBit(devAddr, MPU9150_RA_DMP_INT_STATUS, MPU9150_DMPINT_1_BIT, buffer);
syundo0730	0:78ba160ba5f3	2855	return buffer[0];
syundo0730	0:78ba160ba5f3	2856	}
syundo0730	0:78ba160ba5f3	2857	bool MPU9150::getDMPInt0Status() {
syundo0730	0:78ba160ba5f3	2858	I2Cdev::readBit(devAddr, MPU9150_RA_DMP_INT_STATUS, MPU9150_DMPINT_0_BIT, buffer);
syundo0730	0:78ba160ba5f3	2859	return buffer[0];
syundo0730	0:78ba160ba5f3	2860	}
syundo0730	0:78ba160ba5f3	2861
syundo0730	0:78ba160ba5f3	2862	// INT_STATUS register (DMP functions)
syundo0730	0:78ba160ba5f3	2863
syundo0730	0:78ba160ba5f3	2864	bool MPU9150::getIntPLLReadyStatus() {
syundo0730	0:78ba160ba5f3	2865	I2Cdev::readBit(devAddr, MPU9150_RA_INT_STATUS, MPU9150_INTERRUPT_PLL_RDY_INT_BIT, buffer);
syundo0730	0:78ba160ba5f3	2866	return buffer[0];
syundo0730	0:78ba160ba5f3	2867	}
syundo0730	0:78ba160ba5f3	2868	bool MPU9150::getIntDMPStatus() {
syundo0730	0:78ba160ba5f3	2869	I2Cdev::readBit(devAddr, MPU9150_RA_INT_STATUS, MPU9150_INTERRUPT_DMP_INT_BIT, buffer);
syundo0730	0:78ba160ba5f3	2870	return buffer[0];
syundo0730	0:78ba160ba5f3	2871	}
syundo0730	0:78ba160ba5f3	2872
syundo0730	0:78ba160ba5f3	2873	// USER_CTRL register (DMP functions)
syundo0730	0:78ba160ba5f3	2874
syundo0730	0:78ba160ba5f3	2875	bool MPU9150::getDMPEnabled() {
syundo0730	0:78ba160ba5f3	2876	I2Cdev::readBit(devAddr, MPU9150_RA_USER_CTRL, MPU9150_USERCTRL_DMP_EN_BIT, buffer);
syundo0730	0:78ba160ba5f3	2877	return buffer[0];
syundo0730	0:78ba160ba5f3	2878	}
syundo0730	0:78ba160ba5f3	2879	void MPU9150::setDMPEnabled(bool enabled) {
syundo0730	0:78ba160ba5f3	2880	I2Cdev::writeBit(devAddr, MPU9150_RA_USER_CTRL, MPU9150_USERCTRL_DMP_EN_BIT, enabled);
syundo0730	0:78ba160ba5f3	2881	}
syundo0730	0:78ba160ba5f3	2882	void MPU9150::resetDMP() {
syundo0730	0:78ba160ba5f3	2883	I2Cdev::writeBit(devAddr, MPU9150_RA_USER_CTRL, MPU9150_USERCTRL_DMP_RESET_BIT, true);
syundo0730	0:78ba160ba5f3	2884	}
syundo0730	0:78ba160ba5f3	2885
syundo0730	0:78ba160ba5f3	2886	// BANK_SEL register
syundo0730	0:78ba160ba5f3	2887
syundo0730	0:78ba160ba5f3	2888	void MPU9150::setMemoryBank(uint8_t bank, bool prefetchEnabled, bool userBank) {
syundo0730	0:78ba160ba5f3	2889	bank &= 0x1F;
syundo0730	0:78ba160ba5f3	2890	if (userBank) bank \|= 0x20;
syundo0730	0:78ba160ba5f3	2891	if (prefetchEnabled) bank \|= 0x40;
syundo0730	0:78ba160ba5f3	2892	I2Cdev::writeByte(devAddr, MPU9150_RA_BANK_SEL, bank);
syundo0730	0:78ba160ba5f3	2893	}
syundo0730	0:78ba160ba5f3	2894
syundo0730	0:78ba160ba5f3	2895	// MEM_START_ADDR register
syundo0730	0:78ba160ba5f3	2896
syundo0730	0:78ba160ba5f3	2897	void MPU9150::setMemoryStartAddress(uint8_t address) {
syundo0730	0:78ba160ba5f3	2898	I2Cdev::writeByte(devAddr, MPU9150_RA_MEM_START_ADDR, address);
syundo0730	0:78ba160ba5f3	2899	}
syundo0730	0:78ba160ba5f3	2900
syundo0730	0:78ba160ba5f3	2901	// MEM_R_W register
syundo0730	0:78ba160ba5f3	2902
syundo0730	0:78ba160ba5f3	2903	uint8_t MPU9150::readMemoryByte() {
syundo0730	0:78ba160ba5f3	2904	I2Cdev::readByte(devAddr, MPU9150_RA_MEM_R_W, buffer);
syundo0730	0:78ba160ba5f3	2905	return buffer[0];
syundo0730	0:78ba160ba5f3	2906	}
syundo0730	0:78ba160ba5f3	2907	void MPU9150::writeMemoryByte(uint8_t data) {
syundo0730	0:78ba160ba5f3	2908	I2Cdev::writeByte(devAddr, MPU9150_RA_MEM_R_W, data);
syundo0730	0:78ba160ba5f3	2909	}
syundo0730	0:78ba160ba5f3	2910	void MPU9150::readMemoryBlock(uint8_t *data, uint16_t dataSize, uint8_t bank, uint8_t address) {
syundo0730	0:78ba160ba5f3	2911	setMemoryBank(bank);
syundo0730	0:78ba160ba5f3	2912	setMemoryStartAddress(address);
syundo0730	0:78ba160ba5f3	2913	uint8_t chunkSize;
syundo0730	0:78ba160ba5f3	2914	for (uint16_t i = 0; i < dataSize;) {
syundo0730	0:78ba160ba5f3	2915	// determine correct chunk size according to bank position and data size
syundo0730	0:78ba160ba5f3	2916	chunkSize = MPU9150_DMP_MEMORY_CHUNK_SIZE;
syundo0730	0:78ba160ba5f3	2917
syundo0730	0:78ba160ba5f3	2918	// make sure we don't go past the data size
syundo0730	0:78ba160ba5f3	2919	if (i + chunkSize > dataSize) chunkSize = dataSize - i;
syundo0730	0:78ba160ba5f3	2920
syundo0730	0:78ba160ba5f3	2921	// make sure this chunk doesn't go past the bank boundary (256 bytes)
syundo0730	0:78ba160ba5f3	2922	if (chunkSize > 256 - address) chunkSize = 256 - address;
syundo0730	0:78ba160ba5f3	2923
syundo0730	0:78ba160ba5f3	2924	// read the chunk of data as specified
syundo0730	0:78ba160ba5f3	2925	I2Cdev::readBytes(devAddr, MPU9150_RA_MEM_R_W, chunkSize, data + i);
syundo0730	0:78ba160ba5f3	2926
syundo0730	0:78ba160ba5f3	2927	// increase byte index by [chunkSize]
syundo0730	0:78ba160ba5f3	2928	i += chunkSize;
syundo0730	0:78ba160ba5f3	2929
syundo0730	0:78ba160ba5f3	2930	// uint8_t automatically wraps to 0 at 256
syundo0730	0:78ba160ba5f3	2931	address += chunkSize;
syundo0730	0:78ba160ba5f3	2932
syundo0730	0:78ba160ba5f3	2933	// if we aren't done, update bank (if necessary) and address
syundo0730	0:78ba160ba5f3	2934	if (i < dataSize) {
syundo0730	0:78ba160ba5f3	2935	if (address == 0) bank++;
syundo0730	0:78ba160ba5f3	2936	setMemoryBank(bank);
syundo0730	0:78ba160ba5f3	2937	setMemoryStartAddress(address);
syundo0730	0:78ba160ba5f3	2938	}
syundo0730	0:78ba160ba5f3	2939	}
syundo0730	0:78ba160ba5f3	2940	}
syundo0730	0:78ba160ba5f3	2941	bool MPU9150::writeMemoryBlock(const uint8_t *data, uint16_t dataSize, uint8_t bank, uint8_t address, bool verify, bool useProgMem) {
syundo0730	0:78ba160ba5f3	2942	setMemoryBank(bank);
syundo0730	0:78ba160ba5f3	2943	setMemoryStartAddress(address);
syundo0730	0:78ba160ba5f3	2944	uint8_t chunkSize;
syundo0730	0:78ba160ba5f3	2945	uint8_t *verifyBuffer;
syundo0730	0:78ba160ba5f3	2946	uint8_t *progBuffer;
syundo0730	0:78ba160ba5f3	2947	uint16_t i;
syundo0730	0:78ba160ba5f3	2948	uint8_t j;
syundo0730	0:78ba160ba5f3	2949	if (verify) verifyBuffer = (uint8_t *)malloc(MPU9150_DMP_MEMORY_CHUNK_SIZE);
syundo0730	0:78ba160ba5f3	2950	if (useProgMem) progBuffer = (uint8_t *)malloc(MPU9150_DMP_MEMORY_CHUNK_SIZE);
syundo0730	0:78ba160ba5f3	2951	for (i = 0; i < dataSize;) {
syundo0730	0:78ba160ba5f3	2952	// determine correct chunk size according to bank position and data size
syundo0730	0:78ba160ba5f3	2953	chunkSize = MPU9150_DMP_MEMORY_CHUNK_SIZE;
syundo0730	0:78ba160ba5f3	2954
syundo0730	0:78ba160ba5f3	2955	// make sure we don't go past the data size
syundo0730	0:78ba160ba5f3	2956	if (i + chunkSize > dataSize) chunkSize = dataSize - i;
syundo0730	0:78ba160ba5f3	2957
syundo0730	0:78ba160ba5f3	2958	// make sure this chunk doesn't go past the bank boundary (256 bytes)
syundo0730	0:78ba160ba5f3	2959	if (chunkSize > 256 - address) chunkSize = 256 - address;
syundo0730	0:78ba160ba5f3	2960
syundo0730	0:78ba160ba5f3	2961	if (useProgMem) {
syundo0730	0:78ba160ba5f3	2962	// write the chunk of data as specified
syundo0730	0:78ba160ba5f3	2963	for (j = 0; j < chunkSize; j++) progBuffer[j] = pgm_read_byte(data + i + j);
syundo0730	0:78ba160ba5f3	2964	} else {
syundo0730	0:78ba160ba5f3	2965	// write the chunk of data as specified
syundo0730	0:78ba160ba5f3	2966	progBuffer = (uint8_t *)data + i;
syundo0730	0:78ba160ba5f3	2967	}
syundo0730	0:78ba160ba5f3	2968
syundo0730	0:78ba160ba5f3	2969	I2Cdev::writeBytes(devAddr, MPU9150_RA_MEM_R_W, chunkSize, progBuffer);
syundo0730	0:78ba160ba5f3	2970
syundo0730	0:78ba160ba5f3	2971	// verify data if needed
syundo0730	0:78ba160ba5f3	2972	if (verify && verifyBuffer) {
syundo0730	0:78ba160ba5f3	2973	setMemoryBank(bank);
syundo0730	0:78ba160ba5f3	2974	setMemoryStartAddress(address);
syundo0730	0:78ba160ba5f3	2975	I2Cdev::readBytes(devAddr, MPU9150_RA_MEM_R_W, chunkSize, verifyBuffer);
syundo0730	0:78ba160ba5f3	2976	if (memcmp(progBuffer, verifyBuffer, chunkSize) != 0) {
syundo0730	0:78ba160ba5f3	2977	/*Serial.print("Block write verification error, bank ");
syundo0730	0:78ba160ba5f3	2978	Serial.print(bank, DEC);
syundo0730	0:78ba160ba5f3	2979	Serial.print(", address ");
syundo0730	0:78ba160ba5f3	2980	Serial.print(address, DEC);
syundo0730	0:78ba160ba5f3	2981	Serial.print("!\nExpected:");
syundo0730	0:78ba160ba5f3	2982	for (j = 0; j < chunkSize; j++) {
syundo0730	0:78ba160ba5f3	2983	Serial.print(" 0x");
syundo0730	0:78ba160ba5f3	2984	if (progBuffer[j] < 16) Serial.print("0");
syundo0730	0:78ba160ba5f3	2985	Serial.print(progBuffer[j], HEX);
syundo0730	0:78ba160ba5f3	2986	}
syundo0730	0:78ba160ba5f3	2987	Serial.print("\nReceived:");
syundo0730	0:78ba160ba5f3	2988	for (uint8_t j = 0; j < chunkSize; j++) {
syundo0730	0:78ba160ba5f3	2989	Serial.print(" 0x");
syundo0730	0:78ba160ba5f3	2990	if (verifyBuffer[i + j] < 16) Serial.print("0");
syundo0730	0:78ba160ba5f3	2991	Serial.print(verifyBuffer[i + j], HEX);
syundo0730	0:78ba160ba5f3	2992	}
syundo0730	0:78ba160ba5f3	2993	Serial.print("\n");*/
syundo0730	0:78ba160ba5f3	2994	free(verifyBuffer);
syundo0730	0:78ba160ba5f3	2995	if (useProgMem) free(progBuffer);
syundo0730	0:78ba160ba5f3	2996	return false; // uh oh.
syundo0730	0:78ba160ba5f3	2997	}
syundo0730	0:78ba160ba5f3	2998	}
syundo0730	0:78ba160ba5f3	2999
syundo0730	0:78ba160ba5f3	3000	// increase byte index by [chunkSize]
syundo0730	0:78ba160ba5f3	3001	i += chunkSize;
syundo0730	0:78ba160ba5f3	3002
syundo0730	0:78ba160ba5f3	3003	// uint8_t automatically wraps to 0 at 256
syundo0730	0:78ba160ba5f3	3004	address += chunkSize;
syundo0730	0:78ba160ba5f3	3005
syundo0730	0:78ba160ba5f3	3006	// if we aren't done, update bank (if necessary) and address
syundo0730	0:78ba160ba5f3	3007	if (i < dataSize) {
syundo0730	0:78ba160ba5f3	3008	if (address == 0) bank++;
syundo0730	0:78ba160ba5f3	3009	setMemoryBank(bank);
syundo0730	0:78ba160ba5f3	3010	setMemoryStartAddress(address);
syundo0730	0:78ba160ba5f3	3011	}
syundo0730	0:78ba160ba5f3	3012	}
syundo0730	0:78ba160ba5f3	3013	if (verify) free(verifyBuffer);
syundo0730	0:78ba160ba5f3	3014	if (useProgMem) free(progBuffer);
syundo0730	0:78ba160ba5f3	3015	return true;
syundo0730	0:78ba160ba5f3	3016	}
syundo0730	0:78ba160ba5f3	3017	bool MPU9150::writeProgMemoryBlock(const uint8_t *data, uint16_t dataSize, uint8_t bank, uint8_t address, bool verify) {
syundo0730	0:78ba160ba5f3	3018	return writeMemoryBlock(data, dataSize, bank, address, verify, true);
syundo0730	0:78ba160ba5f3	3019	}
syundo0730	0:78ba160ba5f3	3020	bool MPU9150::writeDMPConfigurationSet(const uint8_t *data, uint16_t dataSize, bool useProgMem) {
syundo0730	0:78ba160ba5f3	3021	uint8_t *progBuffer, success, special;
syundo0730	0:78ba160ba5f3	3022	uint16_t i, j;
syundo0730	0:78ba160ba5f3	3023	if (useProgMem) {
syundo0730	0:78ba160ba5f3	3024	progBuffer = (uint8_t *)malloc(8); // assume 8-byte blocks, realloc later if necessary
syundo0730	0:78ba160ba5f3	3025	}
syundo0730	0:78ba160ba5f3	3026
syundo0730	0:78ba160ba5f3	3027	// config set data is a long string of blocks with the following structure:
syundo0730	0:78ba160ba5f3	3028	// [bank] [offset] [length] [byte[0], byte[1], ..., byte[length]]
syundo0730	0:78ba160ba5f3	3029	uint8_t bank, offset, length;
syundo0730	0:78ba160ba5f3	3030	for (i = 0; i < dataSize;) {
syundo0730	0:78ba160ba5f3	3031	if (useProgMem) {
syundo0730	0:78ba160ba5f3	3032	bank = pgm_read_byte(data + i++);
syundo0730	0:78ba160ba5f3	3033	offset = pgm_read_byte(data + i++);
syundo0730	0:78ba160ba5f3	3034	length = pgm_read_byte(data + i++);
syundo0730	0:78ba160ba5f3	3035	} else {
syundo0730	0:78ba160ba5f3	3036	bank = data[i++];
syundo0730	0:78ba160ba5f3	3037	offset = data[i++];
syundo0730	0:78ba160ba5f3	3038	length = data[i++];
syundo0730	0:78ba160ba5f3	3039	}
syundo0730	0:78ba160ba5f3	3040
syundo0730	0:78ba160ba5f3	3041	// write data or perform special action
syundo0730	0:78ba160ba5f3	3042	if (length > 0) {
syundo0730	0:78ba160ba5f3	3043	// regular block of data to write
syundo0730	0:78ba160ba5f3	3044	/*Serial.print("Writing config block to bank ");
syundo0730	0:78ba160ba5f3	3045	Serial.print(bank);
syundo0730	0:78ba160ba5f3	3046	Serial.print(", offset ");
syundo0730	0:78ba160ba5f3	3047	Serial.print(offset);
syundo0730	0:78ba160ba5f3	3048	Serial.print(", length=");
syundo0730	0:78ba160ba5f3	3049	Serial.println(length);*/
syundo0730	0:78ba160ba5f3	3050	if (useProgMem) {
syundo0730	0:78ba160ba5f3	3051	if (sizeof(progBuffer) < length) progBuffer = (uint8_t *)realloc(progBuffer, length);
syundo0730	0:78ba160ba5f3	3052	for (j = 0; j < length; j++) progBuffer[j] = pgm_read_byte(data + i + j);
syundo0730	0:78ba160ba5f3	3053	} else {
syundo0730	0:78ba160ba5f3	3054	progBuffer = (uint8_t *)data + i;
syundo0730	0:78ba160ba5f3	3055	}
syundo0730	0:78ba160ba5f3	3056	success = writeMemoryBlock(progBuffer, length, bank, offset, true);
syundo0730	0:78ba160ba5f3	3057	i += length;
syundo0730	0:78ba160ba5f3	3058	} else {
syundo0730	0:78ba160ba5f3	3059	// special instruction
syundo0730	0:78ba160ba5f3	3060	// NOTE: this kind of behavior (what and when to do certain things)
syundo0730	0:78ba160ba5f3	3061	// is totally undocumented. This code is in here based on observed
syundo0730	0:78ba160ba5f3	3062	// behavior only, and exactly why (or even whether) it has to be here
syundo0730	0:78ba160ba5f3	3063	// is anybody's guess for now.
syundo0730	0:78ba160ba5f3	3064	if (useProgMem) {
syundo0730	0:78ba160ba5f3	3065	special = pgm_read_byte(data + i++);
syundo0730	0:78ba160ba5f3	3066	} else {
syundo0730	0:78ba160ba5f3	3067	special = data[i++];
syundo0730	0:78ba160ba5f3	3068	}
syundo0730	0:78ba160ba5f3	3069	/*Serial.print("Special command code ");
syundo0730	0:78ba160ba5f3	3070	Serial.print(special, HEX);
syundo0730	0:78ba160ba5f3	3071	Serial.println(" found...");*/
syundo0730	0:78ba160ba5f3	3072	if (special == 0x01) {
syundo0730	0:78ba160ba5f3	3073	// enable DMP-related interrupts
syundo0730	0:78ba160ba5f3	3074
syundo0730	0:78ba160ba5f3	3075	//setIntZeroMotionEnabled(true);
syundo0730	0:78ba160ba5f3	3076	//setIntFIFOBufferOverflowEnabled(true);
syundo0730	0:78ba160ba5f3	3077	//setIntDMPEnabled(true);
syundo0730	0:78ba160ba5f3	3078	I2Cdev::writeByte(devAddr, MPU9150_RA_INT_ENABLE, 0x32); // single operation
syundo0730	0:78ba160ba5f3	3079
syundo0730	0:78ba160ba5f3	3080	success = true;
syundo0730	0:78ba160ba5f3	3081	} else {
syundo0730	0:78ba160ba5f3	3082	// unknown special command
syundo0730	0:78ba160ba5f3	3083	success = false;
syundo0730	0:78ba160ba5f3	3084	}
syundo0730	0:78ba160ba5f3	3085	}
syundo0730	0:78ba160ba5f3	3086
syundo0730	0:78ba160ba5f3	3087	if (!success) {
syundo0730	0:78ba160ba5f3	3088	if (useProgMem) free(progBuffer);
syundo0730	0:78ba160ba5f3	3089	return false; // uh oh
syundo0730	0:78ba160ba5f3	3090	}
syundo0730	0:78ba160ba5f3	3091	}
syundo0730	0:78ba160ba5f3	3092	if (useProgMem) free(progBuffer);
syundo0730	0:78ba160ba5f3	3093	return true;
syundo0730	0:78ba160ba5f3	3094	}
syundo0730	0:78ba160ba5f3	3095	bool MPU9150::writeProgDMPConfigurationSet(const uint8_t *data, uint16_t dataSize) {
syundo0730	0:78ba160ba5f3	3096	return writeDMPConfigurationSet(data, dataSize, true);
syundo0730	0:78ba160ba5f3	3097	}
syundo0730	0:78ba160ba5f3	3098
syundo0730	0:78ba160ba5f3	3099	// DMP_CFG_1 register
syundo0730	0:78ba160ba5f3	3100
syundo0730	0:78ba160ba5f3	3101	uint8_t MPU9150::getDMPConfig1() {
syundo0730	0:78ba160ba5f3	3102	I2Cdev::readByte(devAddr, MPU9150_RA_DMP_CFG_1, buffer);
syundo0730	0:78ba160ba5f3	3103	return buffer[0];
syundo0730	0:78ba160ba5f3	3104	}
syundo0730	0:78ba160ba5f3	3105	void MPU9150::setDMPConfig1(uint8_t config) {
syundo0730	0:78ba160ba5f3	3106	I2Cdev::writeByte(devAddr, MPU9150_RA_DMP_CFG_1, config);
syundo0730	0:78ba160ba5f3	3107	}
syundo0730	0:78ba160ba5f3	3108
syundo0730	0:78ba160ba5f3	3109	// DMP_CFG_2 register
syundo0730	0:78ba160ba5f3	3110
syundo0730	0:78ba160ba5f3	3111	uint8_t MPU9150::getDMPConfig2() {
syundo0730	0:78ba160ba5f3	3112	I2Cdev::readByte(devAddr, MPU9150_RA_DMP_CFG_2, buffer);
syundo0730	0:78ba160ba5f3	3113	return buffer[0];
syundo0730	0:78ba160ba5f3	3114	}
syundo0730	0:78ba160ba5f3	3115	void MPU9150::setDMPConfig2(uint8_t config) {
syundo0730	0:78ba160ba5f3	3116	I2Cdev::writeByte(devAddr, MPU9150_RA_DMP_CFG_2, config);
syundo0730	0:78ba160ba5f3	3117	}

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Type:	Library
Created:	01 Feb 2016
Imports:	66
Forks:	1
Commits:	2
Dependents:	1
Dependencies:	2
Followers:	2

MPU9150.cpp@1:1a6f1948f43d, 2016-02-01 (annotated)

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