Development mbed library for MAX32630FTHR
Dependents: blinky_max32630fthr
tools/export/codered_lpc1114_cproject.tmpl@0:5c4d7b2438d3, 2016-11-11 (annotated)
- Committer:
- switches
- Date:
- Fri Nov 11 20:59:50 2016 +0000
- Revision:
- 0:5c4d7b2438d3
Initial commit
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
switches | 0:5c4d7b2438d3 | 1 | {% extends "codered_cproject_cortexm0_common.tmpl" %} |
switches | 0:5c4d7b2438d3 | 2 | |
switches | 0:5c4d7b2438d3 | 3 | {% block startup_file %}cr_startup_lpc11xx.c{% endblock %} |
switches | 0:5c4d7b2438d3 | 4 | |
switches | 0:5c4d7b2438d3 | 5 | {% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?> |
switches | 0:5c4d7b2438d3 | 6 | <TargetConfig> |
switches | 0:5c4d7b2438d3 | 7 | <Properties property_0="" property_2="LPC11_12_13_32K_4K.cfx" property_3="NXP" property_4="LPC1114FN/102" property_count="5" version="60100"/> |
switches | 0:5c4d7b2438d3 | 8 | <infoList vendor="NXP"> |
switches | 0:5c4d7b2438d3 | 9 | <info chip="LPC1114FN/102" flash_driver="LPC11_12_13_32K_4K.cfx" match_id="0x0A40902B,0x1A40902B" name="LPC1114FN/102" stub="crt_emu_lpc11_13_nxp"> |
switches | 0:5c4d7b2438d3 | 10 | <chip> |
switches | 0:5c4d7b2438d3 | 11 | <name>LPC1114FN/102</name> |
switches | 0:5c4d7b2438d3 | 12 | <family>LPC11xx</family> |
switches | 0:5c4d7b2438d3 | 13 | <vendor>NXP (formerly Philips)</vendor> |
switches | 0:5c4d7b2438d3 | 14 | <reset board="None" core="Real" sys="Real"/> |
switches | 0:5c4d7b2438d3 | 15 | <clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/> |
switches | 0:5c4d7b2438d3 | 16 | <memory can_program="true" id="Flash" is_ro="true" type="Flash"/> |
switches | 0:5c4d7b2438d3 | 17 | <memory id="RAM" type="RAM"/> |
switches | 0:5c4d7b2438d3 | 18 | <memory id="Periph" is_volatile="true" type="Peripheral"/> |
switches | 0:5c4d7b2438d3 | 19 | <memoryInstance derived_from="Flash" id="MFlash32" location="0x0" size="0x8000"/> |
switches | 0:5c4d7b2438d3 | 20 | <memoryInstance derived_from="RAM" id="RamLoc4" location="0x10000000" size="0x1000"/> |
switches | 0:5c4d7b2438d3 | 21 | <peripheralInstance derived_from="V6M_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/> |
switches | 0:5c4d7b2438d3 | 22 | <peripheralInstance derived_from="V6M_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/> |
switches | 0:5c4d7b2438d3 | 23 | <peripheralInstance derived_from="I2C" determined="infoFile" id="I2C" location="0x40000000"/> |
switches | 0:5c4d7b2438d3 | 24 | <peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x40004000"/> |
switches | 0:5c4d7b2438d3 | 25 | <peripheralInstance derived_from="UART" determined="infoFile" id="UART" location="0x40008000"/> |
switches | 0:5c4d7b2438d3 | 26 | <peripheralInstance derived_from="CT16B0" determined="infoFile" id="CT16B0" location="0x4000c000"/> |
switches | 0:5c4d7b2438d3 | 27 | <peripheralInstance derived_from="CT16B1" determined="infoFile" id="CT16B1" location="0x40010000"/> |
switches | 0:5c4d7b2438d3 | 28 | <peripheralInstance derived_from="CT32B0" determined="infoFile" id="CT32B0" location="0x40014000"/> |
switches | 0:5c4d7b2438d3 | 29 | <peripheralInstance derived_from="CT32B1" determined="infoFile" id="CT32B1" location="0x40018000"/> |
switches | 0:5c4d7b2438d3 | 30 | <peripheralInstance derived_from="ADC" determined="infoFile" id="ADC" location="0x4001c000"/> |
switches | 0:5c4d7b2438d3 | 31 | <peripheralInstance derived_from="PMU" determined="infoFile" id="PMU" location="0x40038000"/> |
switches | 0:5c4d7b2438d3 | 32 | <peripheralInstance derived_from="FLASHCTRL" determined="infoFile" id="FLASHCTRL" location="0x4003c000"/> |
switches | 0:5c4d7b2438d3 | 33 | <peripheralInstance derived_from="SPI0" determined="infoFile" id="SPI0" location="0x40040000"/> |
switches | 0:5c4d7b2438d3 | 34 | <peripheralInstance derived_from="IOCON" determined="infoFile" id="IOCON" location="0x40044000"/> |
switches | 0:5c4d7b2438d3 | 35 | <peripheralInstance derived_from="SYSCON" determined="infoFile" id="SYSCON" location="0x40048000"/> |
switches | 0:5c4d7b2438d3 | 36 | <peripheralInstance derived_from="GPIO0" determined="infoFile" id="GPIO0" location="0x50000000"/> |
switches | 0:5c4d7b2438d3 | 37 | <peripheralInstance derived_from="GPIO1" determined="infoFile" id="GPIO1" location="0x50010000"/> |
switches | 0:5c4d7b2438d3 | 38 | <peripheralInstance derived_from="GPIO2" determined="infoFile" id="GPIO2" location="0x50020000"/> |
switches | 0:5c4d7b2438d3 | 39 | <peripheralInstance derived_from="GPIO3" determined="infoFile" id="GPIO3" location="0x50030000"/> |
switches | 0:5c4d7b2438d3 | 40 | </chip> |
switches | 0:5c4d7b2438d3 | 41 | <processor> |
switches | 0:5c4d7b2438d3 | 42 | <name gcc_name="cortex-m0">Cortex-M0</name> |
switches | 0:5c4d7b2438d3 | 43 | <family>Cortex-M</family> |
switches | 0:5c4d7b2438d3 | 44 | </processor> |
switches | 0:5c4d7b2438d3 | 45 | <link href="LPC11xx_peripheral.xme" show="embed" type="simple"/> |
switches | 0:5c4d7b2438d3 | 46 | </info> |
switches | 0:5c4d7b2438d3 | 47 | </infoList> |
switches | 0:5c4d7b2438d3 | 48 | </TargetConfig>{% endblock %} |