test codes to test DMA features

Dependencies:   mDMA mbed

Committer:
steniu01
Date:
Mon Mar 09 21:47:50 2015 +0000
Revision:
0:9b2f77afaacd
Child:
1:5b946b818a29
test mDMA

Who changed what in which revision?

UserRevisionLine numberNew contents of line
steniu01 0:9b2f77afaacd 1 /**
steniu01 0:9b2f77afaacd 2 M2M : read content from a files using CPU, test the time; read content from a file using DMA. Compare the content
steniu01 0:9b2f77afaacd 3 M2P : demenstrate while DMA-UART working, LED swtich is also working
steniu01 0:9b2f77afaacd 4 P2M : demenstrate m2m, m2p, p2m, could work together ; keep sending
steniu01 0:9b2f77afaacd 5 P2P
steniu01 0:9b2f77afaacd 6
steniu01 0:9b2f77afaacd 7 Do we need constructor?
steniu01 0:9b2f77afaacd 8 Select which ever free or which ever not declared?
steniu01 0:9b2f77afaacd 9 How to put comments?
steniu01 0:9b2f77afaacd 10
steniu01 0:9b2f77afaacd 11
steniu01 0:9b2f77afaacd 12 Done 1. make init struct generic -- Done
steniu01 0:9b2f77afaacd 13 2. make trigger type generic .-- Done
steniu01 0:9b2f77afaacd 14 3. support pass method callback -- no solution
steniu01 0:9b2f77afaacd 15 4. read_adc -- Done
steniu01 0:9b2f77afaacd 16 5. PC app to received data from uart
steniu01 0:9b2f77afaacd 17 6. start ADC transfer rate
steniu01 0:9b2f77afaacd 18 7. trigger on Timer
steniu01 0:9b2f77afaacd 19 8. Add assert --- Done
steniu01 0:9b2f77afaacd 20 9. Destructor - Done
steniu01 0:9b2f77afaacd 21 10. add space/ comments
steniu01 0:9b2f77afaacd 22 */
steniu01 0:9b2f77afaacd 23
steniu01 0:9b2f77afaacd 24 // disassembler memcpy
steniu01 0:9b2f77afaacd 25 #include "mbed.h"
steniu01 0:9b2f77afaacd 26 #include "dma.h"
steniu01 0:9b2f77afaacd 27
steniu01 0:9b2f77afaacd 28 #define test_attach 1
steniu01 0:9b2f77afaacd 29 #define test_m2m 0
steniu01 0:9b2f77afaacd 30 #define test_m2m_int 0
steniu01 0:9b2f77afaacd 31 #define test_m2p 0
steniu01 0:9b2f77afaacd 32 #define test_p2m 0
steniu01 0:9b2f77afaacd 33 #define test_p2p 0
steniu01 0:9b2f77afaacd 34 #define test_all 0
steniu01 0:9b2f77afaacd 35 #define test_adc 0
steniu01 0:9b2f77afaacd 36 #define test_LLI 0
steniu01 0:9b2f77afaacd 37
steniu01 0:9b2f77afaacd 38
steniu01 0:9b2f77afaacd 39 LocalFileSystem local("local");
steniu01 0:9b2f77afaacd 40
steniu01 0:9b2f77afaacd 41 DigitalOut myled1(LED1);
steniu01 0:9b2f77afaacd 42 DigitalOut myled2(LED2);
steniu01 0:9b2f77afaacd 43 DigitalOut myled3(LED3);
steniu01 0:9b2f77afaacd 44 DigitalOut myled4(LED4);
steniu01 0:9b2f77afaacd 45
steniu01 0:9b2f77afaacd 46 // Use Timer to measure the execution time
steniu01 0:9b2f77afaacd 47 Timer t;
steniu01 0:9b2f77afaacd 48
steniu01 0:9b2f77afaacd 49 RawSerial pc (USBTX, USBRX);
steniu01 0:9b2f77afaacd 50
steniu01 0:9b2f77afaacd 51 // Callbacks for DMA interrupts
steniu01 0:9b2f77afaacd 52 void led_switchon_m2m(void);
steniu01 0:9b2f77afaacd 53 void led_switchon_m2p (void);
steniu01 0:9b2f77afaacd 54 void led_switchon_p2m (void);
steniu01 0:9b2f77afaacd 55 void led_switchon_p2p (void);
steniu01 0:9b2f77afaacd 56 void led_show (void);
steniu01 0:9b2f77afaacd 57 void IRQ_err (void);
steniu01 0:9b2f77afaacd 58
steniu01 0:9b2f77afaacd 59
steniu01 0:9b2f77afaacd 60 void ADC_init();
steniu01 0:9b2f77afaacd 61 void old_ADC_init();
steniu01 0:9b2f77afaacd 62 void burst_ADC_init();
steniu01 0:9b2f77afaacd 63 uint32_t ADC_read(uint8_t channel);
steniu01 0:9b2f77afaacd 64
steniu01 0:9b2f77afaacd 65
steniu01 0:9b2f77afaacd 66 volatile bool m2p_finishFlag = 0;
steniu01 0:9b2f77afaacd 67
steniu01 0:9b2f77afaacd 68 class mynumber {
steniu01 0:9b2f77afaacd 69 public:
steniu01 0:9b2f77afaacd 70 int num;
steniu01 0:9b2f77afaacd 71 mynumber(){
steniu01 0:9b2f77afaacd 72 num = 0;
steniu01 0:9b2f77afaacd 73 }
steniu01 0:9b2f77afaacd 74 void print_mynumber(void){
steniu01 0:9b2f77afaacd 75 pc.printf("my number is %d", num);
steniu01 0:9b2f77afaacd 76 }
steniu01 0:9b2f77afaacd 77
steniu01 0:9b2f77afaacd 78 };
steniu01 0:9b2f77afaacd 79
steniu01 0:9b2f77afaacd 80 mynumber mynumber1;
steniu01 0:9b2f77afaacd 81
steniu01 0:9b2f77afaacd 82 void test_mynumber (){
steniu01 0:9b2f77afaacd 83 static_cast<mynumber*>(&mynumber1)->print_mynumber();
steniu01 0:9b2f77afaacd 84 }
steniu01 0:9b2f77afaacd 85
steniu01 0:9b2f77afaacd 86
steniu01 0:9b2f77afaacd 87 template<typename T>
steniu01 0:9b2f77afaacd 88 void led_test_call (T *object, void (T::*member)(void)){
steniu01 0:9b2f77afaacd 89 void (T::*m)(void);
steniu01 0:9b2f77afaacd 90 T* o = static_cast<T*>(object);
steniu01 0:9b2f77afaacd 91 memcpy((char*)&m, (char*)&member, sizeof(m));
steniu01 0:9b2f77afaacd 92 (o->*m)();
steniu01 0:9b2f77afaacd 93 }
steniu01 0:9b2f77afaacd 94
steniu01 0:9b2f77afaacd 95 mynumber mynumber2;
steniu01 0:9b2f77afaacd 96
steniu01 0:9b2f77afaacd 97 void irq_handler(void)
steniu01 0:9b2f77afaacd 98 {
steniu01 0:9b2f77afaacd 99 led_test_call<mynumber> (&mynumber2, &mynumber::print_mynumber);
steniu01 0:9b2f77afaacd 100 }
steniu01 0:9b2f77afaacd 101
steniu01 0:9b2f77afaacd 102
steniu01 0:9b2f77afaacd 103
steniu01 0:9b2f77afaacd 104 int main(void)
steniu01 0:9b2f77afaacd 105 {
steniu01 0:9b2f77afaacd 106 char src[] =
steniu01 0:9b2f77afaacd 107 "Hello world Copy the logical and implementation_tsmc28hpm directories in to the Skadi home directo \r\n" \
steniu01 0:9b2f77afaacd 108 "Thank you for the demonstration. I understand now. I have come to terms with the fact that I misunderstood how \r\n" \
steniu01 0:9b2f77afaacd 109 "memory is laid out. I thought that each individual address was capable of storing an entire word, not just a byte \r\n" \
steniu01 0:9b2f77afaacd 110 "(for instance address 0x12345678 could hold a value of 0xffffffff and then 0x12345679 could hold a completely \r\n" \
steniu01 0:9b2f77afaacd 111 "different value 0x00000000). Now I realize that 0x12345678 holds only one byte of a word and the next word\r\n"\
steniu01 0:9b2f77afaacd 112 "The logic for your memcpy is correct and your interviewer didn't ask you to change it or add a restriction.\r\n"
steniu01 0:9b2f77afaacd 113 "Hello world Copy the logical and implementation_tsmc28hpm directories in to the Skadi home directo \r\n" \
steniu01 0:9b2f77afaacd 114 "Thank you for the demonstration. I understand now. I have come to terms with the fact that I misunderstood how \r\n" \
steniu01 0:9b2f77afaacd 115 "memory is laid out. I thought that each individual address was capable of storing an entire word, not just a byte \r\n" \
steniu01 0:9b2f77afaacd 116 "(for instance address 0x12345678 could hold a value of 0xffffffff and then 0x12345679 could hold a completely \r\n" \
steniu01 0:9b2f77afaacd 117 "different value 0x00000000). Now I realize that 0x12345678 holds only one byte of a word and the next word \r\n" \
steniu01 0:9b2f77afaacd 118 "The logic for your memcpy is correct and your interviewer didn't ask you to change it or add a restriction. \r\n" \
steniu01 0:9b2f77afaacd 119 "different value 0x00000000). Now I realize that 0x12345678 holds only one byte of a word and the next word\r\n" \
steniu01 0:9b2f77afaacd 120 "The logic for your memcpy is correct and your interviewer didn't ask you to change it or add a restriction.\r\n"\
steniu01 0:9b2f77afaacd 121 "Hello world Copy the logical and implementation_tsmc28hpm directories in to the Skadi home directo \r\n"\
steniu01 0:9b2f77afaacd 122 "Thank you for the demonstration. I understand now. I have come to terms with the fact that I misunderstood how \r\n" \
steniu01 0:9b2f77afaacd 123 "memory is laid out. I thought that each individual address was capable of storing an entire word, not just a byte \r\n" \
steniu01 0:9b2f77afaacd 124 "(for instance address 0x12345678 could hold a value of 0xffffffff and then 0x12345679 could hold a completely \r\n" \
steniu01 0:9b2f77afaacd 125 "different value 0x00000000). Now I realize that 0x12345678 holds only one byte of a word and the next word \r\n" \
steniu01 0:9b2f77afaacd 126 "The logic for your memcpy is correct and your interviewer didn't ask you to change it or add a restriction. \r\n" \
steniu01 0:9b2f77afaacd 127 "Thank you for the demonstration. I understand now. I have come to terms with the fact that I misunderstood how \r\n" \
steniu01 0:9b2f77afaacd 128 "Hello world Copy the logical and implementation_tsmc28hpm directories in to the Skadi home directo \r\n" \
steniu01 0:9b2f77afaacd 129 "Thank you for the demonstration. I understand now. I have come to terms with the fact that I misunderstood how \r\n" \
steniu01 0:9b2f77afaacd 130 "memory is laid out. I thought that each individual address was capable of storing an entire word, not just a byte \r\n" \
steniu01 0:9b2f77afaacd 131 "(for instance address 0x12345678 could hold a value of 0xffffffff and then 0x12345679 could hold a completely \r\n" \
steniu01 0:9b2f77afaacd 132 "different value 0x00000000). Now I realize that 0x12345678 holds only one byte of a word and the next word \r\n" \
steniu01 0:9b2f77afaacd 133 "The logic for your memcpy is correct and your interviewer didn't ask you to change it or add a restriction. \r\n" \
steniu01 0:9b2f77afaacd 134 "Thank you for the demonstration. I understand now. I have come to terms with the fact that I misunderstood how\r\n" \
steniu01 0:9b2f77afaacd 135 "memory is laid out. I thought that each individual address was capable of storing an entire word, not just a byte \r\n" \
steniu01 0:9b2f77afaacd 136 "(for instance address 0x12345678 could hold a value of 0xffffffff and then 0x12345679 could hold a completely \r\n" \
steniu01 0:9b2f77afaacd 137 "different value 0x00000000). Now I realize that 0x12345678 holds only one byte of a word and the next word \r\n" \
steniu01 0:9b2f77afaacd 138 "The logic for your memcpy is correct and your interviewer didn't ask you to change it or add a restriction. \r\n" \
steniu01 0:9b2f77afaacd 139 "memory is laid out. I thought that each individual address was capable of storing an entire word, not just a byte \r\n" \
steniu01 0:9b2f77afaacd 140 "(for instance address 0x12345678 could hold a value of 0xffffffff and then 0x12345679 could hold a completely \r\n" \
steniu01 0:9b2f77afaacd 141 "different value 0x00000000). Now I realize that 0x12345678 holds only one byte of a word and the next word \r\n" \
steniu01 0:9b2f77afaacd 142 "The logic for your memcpy is correct and your interviewer didn't ask you to change it or add a restriction. \r\n" \
steniu01 0:9b2f77afaacd 143 "Thank you for the demonstration. I understand now. I have come to terms with the fact that I misunderstood how \r\n" \
steniu01 0:9b2f77afaacd 144 "Thank you for the demonstration. I understand now. I have come to terms with the fact that I misunderstood how \r\n" \
steniu01 0:9b2f77afaacd 145 "memory is laid out. I thought that each individual address was capable of storing an entire word, not just a byte \r\n" \
steniu01 0:9b2f77afaacd 146 "algorithm. Memory operates on words rather than bytes. In a 32-bit system, a word is typically 4 bytes, it\r\n"\
steniu01 0:9b2f77afaacd 147 "akes the same amount of time to read/write 1 byte as it does to read/write 1 word. The second loop is to \r\n"\
steniu01 0:9b2f77afaacd 148 "Hello world Copy the logical and implementation_tsmc28hpm directories in to the Skadi home directory\r\n"\
steniu01 0:9b2f77afaacd 149 "1.pick what kind of geek you want to be there are different kinds of geeks such as sci fi and fantasy geek\r\n"\
steniu01 0:9b2f77afaacd 150 "#book geek manga geek and many more just be who you really are\r\n"\
steniu01 0:9b2f77afaacd 151 "2. Read lots of books. Some good geeky books include The Lord Of The Rings, Harry Potter, The Hunger Games,\r\n"\
steniu01 0:9b2f77afaacd 152 "I Robot and The Zombie Survival Guide. These can be found in your local library.\r\n"\
steniu01 0:9b2f77afaacd 153 "3.Be smart. Try to get an A in every subject except for PE.\r\n"\
steniu01 0:9b2f77afaacd 154 "4.Read geeky comics and graphic novels. You don't have to read superhero comics if you want to be geeky.\r\n"\
steniu01 0:9b2f77afaacd 155 "You can read Science Fiction, Fantasy, Horror or Comedy.\r\n"\
steniu01 0:9b2f77afaacd 156 "5.Watch geeky movies such as Shaun of The Dead, Star Trek, Doctor who, Revenge Of the Nerds, and Star Wars.\r\n"\
steniu01 0:9b2f77afaacd 157 "6.Know all things Star Trek. Captain Kirk's background, the fact that spock is a vulcan, and the vulcan salute are all things that a geek must know\r\n"\
steniu01 0:9b2f77afaacd 158 "7.Watch geeky series such as Doctor Who, Merlin and The Big Bang Theory.\r\n"\
steniu01 0:9b2f77afaacd 159 "8.Be good with computers. Learn a programming language and read books about computers.\r\n"\
steniu01 0:9b2f77afaacd 160 "9.Have geeky friends and a geeky hangout such as the book shop, the tabletop game shop, the comic shop and the computer shop.\r\n"\
steniu01 0:9b2f77afaacd 161 "10.A geek knows everything\"thinkgeek.com\". Thinkgeek is a website which holds everything a geek could want. A geek has an account on thinkgeek and has thinkgeek points.\r\n"\
steniu01 0:9b2f77afaacd 162 "11.A GEEK DOES NOT PLAY ROCK PAPER SCISSORS. A geek plays the famous game invented by Sheldon Cooper: rock-paper-scissors-lizard-Spock.\r\n"\
steniu01 0:9b2f77afaacd 163 "12.Buy some shirts from thinkgeek.com and wear Adidas slides.\r\n";
steniu01 0:9b2f77afaacd 164
steniu01 0:9b2f77afaacd 165
steniu01 0:9b2f77afaacd 166 int src_int[1786];
steniu01 0:9b2f77afaacd 167
steniu01 0:9b2f77afaacd 168
steniu01 0:9b2f77afaacd 169
steniu01 0:9b2f77afaacd 170 #if test_attach
steniu01 0:9b2f77afaacd 171
steniu01 0:9b2f77afaacd 172
steniu01 0:9b2f77afaacd 173 pc.printf("start to test mehtod attach function now!\r\n");
steniu01 0:9b2f77afaacd 174
steniu01 0:9b2f77afaacd 175 char src2[] = "this is for test_attach test";
steniu01 0:9b2f77afaacd 176 wait(2);
steniu01 0:9b2f77afaacd 177 size_t size = sizeof (src2);
steniu01 0:9b2f77afaacd 178 char *dst1 = (char *) malloc(size);
steniu01 0:9b2f77afaacd 179 memset (dst1, '\0', size);
steniu01 0:9b2f77afaacd 180
steniu01 0:9b2f77afaacd 181 mynumber1.num = 3;
steniu01 0:9b2f77afaacd 182 DMA dma1 (-1); // choose whichever free channel
steniu01 0:9b2f77afaacd 183 dma1.source (src2,1, 8); // set source as incremental. Not need to set the transfer width as MBED dma will do it for you.
steniu01 0:9b2f77afaacd 184 dma1.destination (dst1, 1, 8);
steniu01 0:9b2f77afaacd 185 dma1.attach_TC(test_mynumber);
steniu01 0:9b2f77afaacd 186
steniu01 0:9b2f77afaacd 187
steniu01 0:9b2f77afaacd 188 dma1.start(size);
steniu01 0:9b2f77afaacd 189 dma1.wait();
steniu01 0:9b2f77afaacd 190 pc.printf("finish");
steniu01 0:9b2f77afaacd 191
steniu01 0:9b2f77afaacd 192 #endif
steniu01 0:9b2f77afaacd 193
steniu01 0:9b2f77afaacd 194 #if test_m2m
steniu01 0:9b2f77afaacd 195 /* test the DMA M2M, copy data from src to dest, and then print out the dest mem data */
steniu01 0:9b2f77afaacd 196
steniu01 0:9b2f77afaacd 197 pc.printf("start to test DMA M2M test now!\r\n");
steniu01 0:9b2f77afaacd 198 // wait(1);
steniu01 0:9b2f77afaacd 199 size_t size = sizeof(src);
steniu01 0:9b2f77afaacd 200 char *dst1 = (char *) malloc(size);
steniu01 0:9b2f77afaacd 201
steniu01 0:9b2f77afaacd 202 char *dst2 = (char *) malloc(size);
steniu01 0:9b2f77afaacd 203 memset(dst1, '\0', size+1);
steniu01 0:9b2f77afaacd 204 memset(dst2, '\0', size+1);
steniu01 0:9b2f77afaacd 205 t.start();
steniu01 0:9b2f77afaacd 206 memcpy(dst1,src,size);
steniu01 0:9b2f77afaacd 207 t.stop();
steniu01 0:9b2f77afaacd 208 printf("The source size is %d\r\n", size);
steniu01 0:9b2f77afaacd 209 printf("The time CPU took was %f seconds\r\n", t.read());
steniu01 0:9b2f77afaacd 210 t.reset();
steniu01 0:9b2f77afaacd 211
steniu01 0:9b2f77afaacd 212
steniu01 0:9b2f77afaacd 213 DMA dma1(-1); // choose whichever free channel
steniu01 0:9b2f77afaacd 214 dma1.source(src,1, 8); // set source as incremental. Not need to set the transfer width as MBED dma will do it for you.
steniu01 0:9b2f77afaacd 215 dma1.destination(dst2, 1, 8);
steniu01 0:9b2f77afaacd 216
steniu01 0:9b2f77afaacd 217 dma1.attach_TC(led_switchon_m2m);
steniu01 0:9b2f77afaacd 218 dma1.attach_Err(IRQ_err);
steniu01 0:9b2f77afaacd 219 t.start();
steniu01 0:9b2f77afaacd 220 dma1.start(size);
steniu01 0:9b2f77afaacd 221 dma1.wait();
steniu01 0:9b2f77afaacd 222 t.stop();
steniu01 0:9b2f77afaacd 223
steniu01 0:9b2f77afaacd 224 pc.printf("The time DMA took was %f seconds\r\n", t.read());
steniu01 0:9b2f77afaacd 225 wait(5);
steniu01 0:9b2f77afaacd 226 pc.printf("dst text: %s \r\n", dst2);
steniu01 0:9b2f77afaacd 227 t.reset();
steniu01 0:9b2f77afaacd 228 if (strcmp(dst2, dst1) != 0)
steniu01 0:9b2f77afaacd 229 {
steniu01 0:9b2f77afaacd 230 pc.printf("error! \r\n");
steniu01 0:9b2f77afaacd 231 for (int i = 0; i < size +1; i++)
steniu01 0:9b2f77afaacd 232 if(dst1[i] != dst2[i])
steniu01 0:9b2f77afaacd 233 printf ("In the %d charator, dst1 is %c and dst2 is %c \r\n", i+1, dst1[i], dst2[i]);
steniu01 0:9b2f77afaacd 234 }
steniu01 0:9b2f77afaacd 235 else
steniu01 0:9b2f77afaacd 236 pc.printf("correct! \r\n");
steniu01 0:9b2f77afaacd 237 #endif
steniu01 0:9b2f77afaacd 238
steniu01 0:9b2f77afaacd 239 #if test_m2m_int
steniu01 0:9b2f77afaacd 240 pc.printf("start to test DMA M2M test now!\r\n");
steniu01 0:9b2f77afaacd 241 // wait(1);
steniu01 0:9b2f77afaacd 242 for (int i = 0; i < sizeof(src_int)/4; i++)
steniu01 0:9b2f77afaacd 243 src_int[i]=i;
steniu01 0:9b2f77afaacd 244 size_t size = sizeof(src_int)/4;
steniu01 0:9b2f77afaacd 245 int *dst1 = (int *) malloc(sizeof(src_int)/4);
steniu01 0:9b2f77afaacd 246 int *dst2 = (int *) malloc(sizeof(src_int)/4);
steniu01 0:9b2f77afaacd 247 memset(dst1, '\0', size);
steniu01 0:9b2f77afaacd 248 memset(dst2, '\0', size);
steniu01 0:9b2f77afaacd 249 t.start();
steniu01 0:9b2f77afaacd 250 memcpy(dst1,src_int,size);
steniu01 0:9b2f77afaacd 251 t.stop();
steniu01 0:9b2f77afaacd 252 printf("The source size is %d\r\n", size);
steniu01 0:9b2f77afaacd 253 printf("The time CPU took was %f seconds\r\n", t.read());
steniu01 0:9b2f77afaacd 254 t.reset();
steniu01 0:9b2f77afaacd 255
steniu01 0:9b2f77afaacd 256
steniu01 0:9b2f77afaacd 257 DMA dma1(1); // choose whichever free channel
steniu01 0:9b2f77afaacd 258 dma1.source(src_int,1); // set source as incremental. Not need to set the transfer width as MBED dma will do it for you.
steniu01 0:9b2f77afaacd 259 dma1.destination(dst2, 1);
steniu01 0:9b2f77afaacd 260
steniu01 0:9b2f77afaacd 261 // dma1.attach_TC(led_switchon_m2m);
steniu01 0:9b2f77afaacd 262 // dma1.attach_Err(IRQ_err);
steniu01 0:9b2f77afaacd 263 t.start();
steniu01 0:9b2f77afaacd 264 dma1.start(size);
steniu01 0:9b2f77afaacd 265 dma1.wait();
steniu01 0:9b2f77afaacd 266 t.stop();
steniu01 0:9b2f77afaacd 267
steniu01 0:9b2f77afaacd 268 pc.printf("The time DMA took was %f seconds\r\n", t.read());
steniu01 0:9b2f77afaacd 269 wait(5);
steniu01 0:9b2f77afaacd 270 for (int i=0; i<sizeof(src_int)/4;i++)
steniu01 0:9b2f77afaacd 271 pc.printf("dst text: %d \r\n", dst2[i]);
steniu01 0:9b2f77afaacd 272 t.reset();
steniu01 0:9b2f77afaacd 273 if (memcmp(dst2, src_int, sizeof(src_int)/4) != 0)
steniu01 0:9b2f77afaacd 274 pc.printf("error! \r\n");
steniu01 0:9b2f77afaacd 275 else
steniu01 0:9b2f77afaacd 276 pc.printf("correct! \r\n");
steniu01 0:9b2f77afaacd 277 #endif
steniu01 0:9b2f77afaacd 278
steniu01 0:9b2f77afaacd 279 #if test_LLI
steniu01 0:9b2f77afaacd 280
steniu01 0:9b2f77afaacd 281 pc.printf ("start to test LLI now\r\n");
steniu01 0:9b2f77afaacd 282
steniu01 0:9b2f77afaacd 283 wait(2);
steniu01 0:9b2f77afaacd 284
steniu01 0:9b2f77afaacd 285 char src_dma[] = "This is to test the scatter-gather support \r\n";
steniu01 0:9b2f77afaacd 286 char src_LLI[] = "this is from linked item \r\n";
steniu01 0:9b2f77afaacd 287 LPC_UART0->FCR |= 1<<3 ; //Enable UART DMA mode
steniu01 0:9b2f77afaacd 288 LPC_UART0->LCR &= ~(1<<3); // No parity bit generated
steniu01 0:9b2f77afaacd 289
steniu01 0:9b2f77afaacd 290 DMA dmaLLI(2);
steniu01 0:9b2f77afaacd 291 dmaLLI.destination(&(LPC_UART0->THR),0, sizeof(char)*8);
steniu01 0:9b2f77afaacd 292 dmaLLI.source(src_dma,1, sizeof(char)*8);
steniu01 0:9b2f77afaacd 293 dmaLLI.TriggerDestination(_UART0_TX);
steniu01 0:9b2f77afaacd 294 dmaLLI.attach_TC(led_switchon_m2p);// m2p_finishFlag will be set when FINISH interrupt generated
steniu01 0:9b2f77afaacd 295 dmaLLI.attach_Err(IRQ_err);
steniu01 0:9b2f77afaacd 296
steniu01 0:9b2f77afaacd 297 dmaLLI.next((uint32_t)src_LLI, (uint32_t)&(LPC_UART0->THR), sizeof(src_LLI));
steniu01 0:9b2f77afaacd 298 // dmaLLI.next((uint32_t)src_LLI, (uint32_t)dst_LLI, 7);
steniu01 0:9b2f77afaacd 299 // DMA dmaLLI2(3);
steniu01 0:9b2f77afaacd 300 // dmaLLI2.next((uint32_t)src_LLI, (uint32_t)dst_LLI, 7);
steniu01 0:9b2f77afaacd 301 dmaLLI.start(sizeof(src_dma));
steniu01 0:9b2f77afaacd 302 dmaLLI.wait();
steniu01 0:9b2f77afaacd 303 while(1);
steniu01 0:9b2f77afaacd 304 #endif
steniu01 0:9b2f77afaacd 305
steniu01 0:9b2f77afaacd 306
steniu01 0:9b2f77afaacd 307
steniu01 0:9b2f77afaacd 308 #if test_m2p
steniu01 0:9b2f77afaacd 309 /*Test m2P, send the memory data to UART;*/
steniu01 0:9b2f77afaacd 310 pc.printf ("start to test m2p now\r\n");
steniu01 0:9b2f77afaacd 311
steniu01 0:9b2f77afaacd 312 t.start();
steniu01 0:9b2f77afaacd 313 pc.printf(src);
steniu01 0:9b2f77afaacd 314 t.stop();
steniu01 0:9b2f77afaacd 315 wait(1);
steniu01 0:9b2f77afaacd 316 printf("The time CPU took was %f seconds\r\n", t.read());
steniu01 0:9b2f77afaacd 317 wait(1);
steniu01 0:9b2f77afaacd 318 t.reset();
steniu01 0:9b2f77afaacd 319
steniu01 0:9b2f77afaacd 320 LPC_UART0->FCR |= 1<<3 ; //Enable UART DMA mode
steniu01 0:9b2f77afaacd 321 LPC_UART0->LCR &= ~(1<<3); // No parity bit genrated
steniu01 0:9b2f77afaacd 322
steniu01 0:9b2f77afaacd 323 DMA dma2(2);
steniu01 0:9b2f77afaacd 324 dma2.destination(&(LPC_UART0->THR),0, sizeof(char)*8);
steniu01 0:9b2f77afaacd 325 dma2.source(src,1, sizeof(char)*8);
steniu01 0:9b2f77afaacd 326 dma2.TriggerDestination(_UART0_TX);
steniu01 0:9b2f77afaacd 327 dma2.attach_TC(led_switchon_m2p);// m2p_finishFlag will be set when FINISH interrupt generated
steniu01 0:9b2f77afaacd 328 dma2.attach_Err (IRQ_err);
steniu01 0:9b2f77afaacd 329
steniu01 0:9b2f77afaacd 330 t.start();
steniu01 0:9b2f77afaacd 331 dma2.start(sizeof(src));
steniu01 0:9b2f77afaacd 332 dma2.wait();
steniu01 0:9b2f77afaacd 333 t.stop();
steniu01 0:9b2f77afaacd 334 printf("The time DMA took was %f seconds\r\n", t.read());
steniu01 0:9b2f77afaacd 335 printf("The transfer size is %d \r\n", sizeof(src));
steniu01 0:9b2f77afaacd 336 wait(2);
steniu01 0:9b2f77afaacd 337
steniu01 0:9b2f77afaacd 338 pc.printf ("Now demonstrate CPU and DMA could work together\r\n");
steniu01 0:9b2f77afaacd 339 wait(1);
steniu01 0:9b2f77afaacd 340 m2p_finishFlag = 0;
steniu01 0:9b2f77afaacd 341 dma2.start(sizeof(src));
steniu01 0:9b2f77afaacd 342 // Demonstrate CPU and DMA could work together, led2 keep blinking while DMA is transferring data
steniu01 0:9b2f77afaacd 343
steniu01 0:9b2f77afaacd 344 while (!m2p_finishFlag){
steniu01 0:9b2f77afaacd 345 myled2 = !myled2;
steniu01 0:9b2f77afaacd 346 wait (0.2);
steniu01 0:9b2f77afaacd 347 }
steniu01 0:9b2f77afaacd 348
steniu01 0:9b2f77afaacd 349
steniu01 0:9b2f77afaacd 350 // Demonstrate Err interrupt callback also works
steniu01 0:9b2f77afaacd 351 // Dedicately read data from the unallocated memory range to generate error
steniu01 0:9b2f77afaacd 352 wait (1);
steniu01 0:9b2f77afaacd 353 pc.printf ("Now demonstrate error interrupt callback also works\r\n");
steniu01 0:9b2f77afaacd 354 wait(2);
steniu01 0:9b2f77afaacd 355 dma2.attach_Err (IRQ_err);
steniu01 0:9b2f77afaacd 356 dma2.start((sizeof(src)+4));
steniu01 0:9b2f77afaacd 357 dma2.wait();
steniu01 0:9b2f77afaacd 358
steniu01 0:9b2f77afaacd 359 #endif
steniu01 0:9b2f77afaacd 360
steniu01 0:9b2f77afaacd 361 #if test_p2m
steniu01 0:9b2f77afaacd 362
steniu01 0:9b2f77afaacd 363 pc.printf("start to test DMA P2M now!\r\n");
steniu01 0:9b2f77afaacd 364 wait(2);
steniu01 0:9b2f77afaacd 365 volatile unsigned int data = 0;
steniu01 0:9b2f77afaacd 366 unsigned int data2 = 0;
steniu01 0:9b2f77afaacd 367 volatile int *dst3 = (int *) malloc(4);
steniu01 0:9b2f77afaacd 368 old_ADC_init();
steniu01 0:9b2f77afaacd 369
steniu01 0:9b2f77afaacd 370 NVIC_DisableIRQ(ADC_IRQn); // If ADC DMA is used, the ADC interrupt must be disabled
steniu01 0:9b2f77afaacd 371
steniu01 0:9b2f77afaacd 372 DMA dma3(3);
steniu01 0:9b2f77afaacd 373 dma3.destination(dst3, 0, 32); // Some sample codes show it should be half-word as only low 16bit contains the data.
steniu01 0:9b2f77afaacd 374 // But I think it should be 32 as the reigster is 32-bit width
steniu01 0:9b2f77afaacd 375 dma3.source(&(LPC_ADC->ADDR4),0, 32);
steniu01 0:9b2f77afaacd 376 dma3.TriggerSource(_ADC);
steniu01 0:9b2f77afaacd 377 dma3.attach_TC(led_switchon_p2m);
steniu01 0:9b2f77afaacd 378
steniu01 0:9b2f77afaacd 379 while (1)
steniu01 0:9b2f77afaacd 380 {
steniu01 0:9b2f77afaacd 381 // LPC_ADC->ADCR |= 1 << 24;// start the conversion now
steniu01 0:9b2f77afaacd 382 dma3.start(1);
steniu01 0:9b2f77afaacd 383 data= float(dst3[0]>>4 & 0xfff); // Only bit4-bit16 contains the valid ADC data
steniu01 0:9b2f77afaacd 384 data2 = ADC_read(4); // read ADC channel 4
steniu01 0:9b2f77afaacd 385 pc.printf("The ADC data of DMA is: %d\r\n", data);
steniu01 0:9b2f77afaacd 386 pc.printf("The ADC data of CPU is: %d\r\n", data2);
steniu01 0:9b2f77afaacd 387 wait (1);
steniu01 0:9b2f77afaacd 388 }
steniu01 0:9b2f77afaacd 389
steniu01 0:9b2f77afaacd 390 pc.printf("\nFinish!\r\n");
steniu01 0:9b2f77afaacd 391 #endif
steniu01 0:9b2f77afaacd 392
steniu01 0:9b2f77afaacd 393
steniu01 0:9b2f77afaacd 394
steniu01 0:9b2f77afaacd 395
steniu01 0:9b2f77afaacd 396 #if test_p2p
steniu01 0:9b2f77afaacd 397
steniu01 0:9b2f77afaacd 398 wait(2);
steniu01 0:9b2f77afaacd 399 volatile unsigned int data = 0;
steniu01 0:9b2f77afaacd 400 unsigned int data2 = 0;
steniu01 0:9b2f77afaacd 401 volatile unsigned int raw_data = 0;
steniu01 0:9b2f77afaacd 402 volatile int *dst3 = (int *) malloc(4);
steniu01 0:9b2f77afaacd 403 old_ADC_init();
steniu01 0:9b2f77afaacd 404 NVIC_DisableIRQ(ADC_IRQn); // If ADC DMA is used, the ADC interrupt must be disabled
steniu01 0:9b2f77afaacd 405
steniu01 0:9b2f77afaacd 406 LPC_UART0->FCR |= 1<<3 ; //Enable UART DMA mode
steniu01 0:9b2f77afaacd 407 LPC_UART0->LCR &= ~(1<<3); // No parity bit genrated
steniu01 0:9b2f77afaacd 408
steniu01 0:9b2f77afaacd 409 DMA dma4(4);
steniu01 0:9b2f77afaacd 410 dma4.source(&(LPC_ADC->ADDR4),0, 32);
steniu01 0:9b2f77afaacd 411 dma4.destination(&(LPC_UART0->THR),0,8);
steniu01 0:9b2f77afaacd 412 // dma4.destination(dst3, 0, 32);
steniu01 0:9b2f77afaacd 413 dma4.TriggerSource(_ADC);
steniu01 0:9b2f77afaacd 414 dma4.TriggerDestination(_UART0_TX);
steniu01 0:9b2f77afaacd 415 dma4.attach_TC(led_switchon_p2p);
steniu01 0:9b2f77afaacd 416
steniu01 0:9b2f77afaacd 417 while (1)
steniu01 0:9b2f77afaacd 418 {
steniu01 0:9b2f77afaacd 419 LPC_ADC->ADCR |= 1 << 24;// start the conversion now
steniu01 0:9b2f77afaacd 420 dma4.start(1);
steniu01 0:9b2f77afaacd 421
steniu01 0:9b2f77afaacd 422 /*
steniu01 0:9b2f77afaacd 423 data= float(dst3[0]>>4 & 0xfff); // Only bit4-bit16 contains the valid ADC data
steniu01 0:9b2f77afaacd 424 raw_data= (unsigned int )dst3[0] &0x7fffffff;
steniu01 0:9b2f77afaacd 425 pc.printf("The ADC data of raw data is: %d\r\n", raw_data);
steniu01 0:9b2f77afaacd 426 pc.printf("The ADC data of DMA is: %d\r\n", data);
steniu01 0:9b2f77afaacd 427 */
steniu01 0:9b2f77afaacd 428 wait (3);
steniu01 0:9b2f77afaacd 429 }
steniu01 0:9b2f77afaacd 430
steniu01 0:9b2f77afaacd 431
steniu01 0:9b2f77afaacd 432 pc.printf("\nFinish!\r\n");
steniu01 0:9b2f77afaacd 433 #endif
steniu01 0:9b2f77afaacd 434
steniu01 0:9b2f77afaacd 435
steniu01 0:9b2f77afaacd 436
steniu01 0:9b2f77afaacd 437
steniu01 0:9b2f77afaacd 438 #if test_all
steniu01 0:9b2f77afaacd 439
steniu01 0:9b2f77afaacd 440 DMA dma1 (1) ;
steniu01 0:9b2f77afaacd 441 DMA dma2 (2);
steniu01 0:9b2f77afaacd 442 DMA dma3 (3);
steniu01 0:9b2f77afaacd 443
steniu01 0:9b2f77afaacd 444 size_t size1 = sizeof (src);
steniu01 0:9b2f77afaacd 445 char *dst1 = (char *) malloc(size1);
steniu01 0:9b2f77afaacd 446 dma1.source (src,1); // set source as incremental. Not need to set the transfer width as MBED dma will do it for you.
steniu01 0:9b2f77afaacd 447 dma1.destination (dst1, 1);
steniu01 0:9b2f77afaacd 448 dma1.attach_TC(led_switchon_m2m) ;
steniu01 0:9b2f77afaacd 449 dma1.attach_Err (IRQ_err);
steniu01 0:9b2f77afaacd 450
steniu01 0:9b2f77afaacd 451
steniu01 0:9b2f77afaacd 452
steniu01 0:9b2f77afaacd 453 // char src2[] = "This message was transmitted via UART DMA from memor";
steniu01 0:9b2f77afaacd 454
steniu01 0:9b2f77afaacd 455 size_t size2 = sizeof (src);
steniu01 0:9b2f77afaacd 456 pc.printf("the size is %d",size2);
steniu01 0:9b2f77afaacd 457 wait(1);
steniu01 0:9b2f77afaacd 458 LPC_UART0->FCR |= 1<<3 ; //Enable UART DMA mode
steniu01 0:9b2f77afaacd 459 LPC_UART0->LCR &= ~(1<<3); // No parity bit genrated
steniu01 0:9b2f77afaacd 460 dma2.destination(&(LPC_UART0->THR),0, sizeof(char)*8);
steniu01 0:9b2f77afaacd 461 dma2.source(src,1, sizeof(char)*8);
steniu01 0:9b2f77afaacd 462 dma2.TriggerDestination(_UART0_TX);
steniu01 0:9b2f77afaacd 463 dma2.attach_TC(led_switchon_m2p);// m2p_finishFlag will be set when FINISH interrupt generated
steniu01 0:9b2f77afaacd 464 dma2.attach_Err (IRQ_err);
steniu01 0:9b2f77afaacd 465
steniu01 0:9b2f77afaacd 466
steniu01 0:9b2f77afaacd 467 volatile unsigned int data = 0;
steniu01 0:9b2f77afaacd 468 volatile int *dst3 = (int *) malloc(128);
steniu01 0:9b2f77afaacd 469 ADC_init();
steniu01 0:9b2f77afaacd 470 NVIC_DisableIRQ(ADC_IRQn); // If ADC DMA is used, the ADC interrupt must be disabled
steniu01 0:9b2f77afaacd 471 dma3.destination(dst3, 1, 32); // Some sample codes show it should be half-word as only low 16bit contains the data.
steniu01 0:9b2f77afaacd 472 // But I think it should be 32 as the reigster is 32-bit width
steniu01 0:9b2f77afaacd 473 dma3.source(&(LPC_ADC->ADDR0),0, 32);
steniu01 0:9b2f77afaacd 474 dma3.TriggerSource(_ADC);
steniu01 0:9b2f77afaacd 475 dma3.attach_TC(led_switchon_p2m);
steniu01 0:9b2f77afaacd 476 dma3.attach_Err (IRQ_err);
steniu01 0:9b2f77afaacd 477
steniu01 0:9b2f77afaacd 478
steniu01 0:9b2f77afaacd 479 dma1.start(size1);
steniu01 0:9b2f77afaacd 480 dma2.start(size2);
steniu01 0:9b2f77afaacd 481 dma3.start(32);
steniu01 0:9b2f77afaacd 482
steniu01 0:9b2f77afaacd 483 #endif
steniu01 0:9b2f77afaacd 484
steniu01 0:9b2f77afaacd 485 while (1);
steniu01 0:9b2f77afaacd 486 return 0;
steniu01 0:9b2f77afaacd 487 }
steniu01 0:9b2f77afaacd 488
steniu01 0:9b2f77afaacd 489
steniu01 0:9b2f77afaacd 490 void ADC_init()
steniu01 0:9b2f77afaacd 491 {
steniu01 0:9b2f77afaacd 492 // ensure power is turned on
steniu01 0:9b2f77afaacd 493 LPC_SC->PCONP |= (1 << 12);
steniu01 0:9b2f77afaacd 494
steniu01 0:9b2f77afaacd 495 // set PCLK of ADC to 1
steniu01 0:9b2f77afaacd 496 LPC_SC->PCLKSEL0 &= ~(0x3 << 24);
steniu01 0:9b2f77afaacd 497 LPC_SC->PCLKSEL0 |= 1<<24;
steniu01 0:9b2f77afaacd 498
steniu01 0:9b2f77afaacd 499 // select PIN 14, ADC 0.0
steniu01 0:9b2f77afaacd 500 LPC_PINCON->PINSEL1 &= (uint32_t) ~(0x3 << 14);
steniu01 0:9b2f77afaacd 501 LPC_PINCON->PINSEL1 |= 0x1 << 14;
steniu01 0:9b2f77afaacd 502
steniu01 0:9b2f77afaacd 503 // PIN14 no pull-up, no pull-down
steniu01 0:9b2f77afaacd 504 LPC_PINCON->PINMODE2 |= 0x2 << 28;
steniu01 0:9b2f77afaacd 505
steniu01 0:9b2f77afaacd 506 // ADC conversion not start yet
steniu01 0:9b2f77afaacd 507 LPC_ADC->ADCR &= ~ (1 << 24);
steniu01 0:9b2f77afaacd 508
steniu01 0:9b2f77afaacd 509 // the global DONE flat in ADDR must be disabled to generate an interrupt
steniu01 0:9b2f77afaacd 510 LPC_ADC->ADINTEN &= ~(1<<8);
steniu01 0:9b2f77afaacd 511 LPC_ADC->ADINTEN = 0x1;
steniu01 0:9b2f77afaacd 512
steniu01 0:9b2f77afaacd 513 LPC_ADC->ADCR = (uint32_t) ((1 << 21) // ADC is operational
steniu01 0:9b2f77afaacd 514 | (1 << 8) // APB clock is divided by 1
steniu01 0:9b2f77afaacd 515 | 0x01); // Select AD0.0 to be sampled and converted
steniu01 0:9b2f77afaacd 516
steniu01 0:9b2f77afaacd 517
steniu01 0:9b2f77afaacd 518 LPC_ADC->ADCR |= 1 << 16 ; // BURST mode
steniu01 0:9b2f77afaacd 519
steniu01 0:9b2f77afaacd 520 }
steniu01 0:9b2f77afaacd 521
steniu01 0:9b2f77afaacd 522 void led_switchon_m2m(void)
steniu01 0:9b2f77afaacd 523 {
steniu01 0:9b2f77afaacd 524 myled1=1;
steniu01 0:9b2f77afaacd 525 }
steniu01 0:9b2f77afaacd 526
steniu01 0:9b2f77afaacd 527 void led_switchon_m2p(void)
steniu01 0:9b2f77afaacd 528 {
steniu01 0:9b2f77afaacd 529 m2p_finishFlag = 1;
steniu01 0:9b2f77afaacd 530 myled2=1;
steniu01 0:9b2f77afaacd 531 }
steniu01 0:9b2f77afaacd 532
steniu01 0:9b2f77afaacd 533 void led_switchon_p2m(void)
steniu01 0:9b2f77afaacd 534 {
steniu01 0:9b2f77afaacd 535 myled3=1;
steniu01 0:9b2f77afaacd 536 }
steniu01 0:9b2f77afaacd 537
steniu01 0:9b2f77afaacd 538 void led_switchon_p2p(void)
steniu01 0:9b2f77afaacd 539 {
steniu01 0:9b2f77afaacd 540 myled4=1;
steniu01 0:9b2f77afaacd 541 }
steniu01 0:9b2f77afaacd 542
steniu01 0:9b2f77afaacd 543 void IRQ_err (void)
steniu01 0:9b2f77afaacd 544 {
steniu01 0:9b2f77afaacd 545 t.stop();
steniu01 0:9b2f77afaacd 546 pc.printf("The time DMA took was %f seconds\r\n", t.read());
steniu01 0:9b2f77afaacd 547 myled1 = 0;
steniu01 0:9b2f77afaacd 548 myled2 = 0;
steniu01 0:9b2f77afaacd 549 myled3 = 0;
steniu01 0:9b2f77afaacd 550 myled4 = 0;
steniu01 0:9b2f77afaacd 551 wait (0.5);
steniu01 0:9b2f77afaacd 552 pc.printf ("\r\n");
steniu01 0:9b2f77afaacd 553 pc.printf ("Error Interrupt happens\r\n");
steniu01 0:9b2f77afaacd 554 }
steniu01 0:9b2f77afaacd 555
steniu01 0:9b2f77afaacd 556
steniu01 0:9b2f77afaacd 557 static inline int div_round_up(int x, int y)
steniu01 0:9b2f77afaacd 558 {
steniu01 0:9b2f77afaacd 559 return (x + (y - 1)) / y;
steniu01 0:9b2f77afaacd 560 }
steniu01 0:9b2f77afaacd 561 void old_ADC_init()
steniu01 0:9b2f77afaacd 562 {
steniu01 0:9b2f77afaacd 563 // ensure power is turned on
steniu01 0:9b2f77afaacd 564 LPC_SC->PCONP |= (1 << 12);
steniu01 0:9b2f77afaacd 565
steniu01 0:9b2f77afaacd 566 /* p19 pin is set to ADC input.*/
steniu01 0:9b2f77afaacd 567 LPC_PINCON->PINSEL3 |= 0x30000000;
steniu01 0:9b2f77afaacd 568 /* no pull-up, no pull-down */
steniu01 0:9b2f77afaacd 569 LPC_PINCON->PINMODE3 |= 0x20000000;
steniu01 0:9b2f77afaacd 570
steniu01 0:9b2f77afaacd 571 // set PCLK of ADC to 1
steniu01 0:9b2f77afaacd 572 LPC_SC->PCLKSEL0 &= ~(0x3 << 24);
steniu01 0:9b2f77afaacd 573 LPC_SC->PCLKSEL0 |= (0x1 << 24);
steniu01 0:9b2f77afaacd 574 uint32_t PCLK = SystemCoreClock;
steniu01 0:9b2f77afaacd 575
steniu01 0:9b2f77afaacd 576 // calculate minimum clock divider
steniu01 0:9b2f77afaacd 577 // clkdiv = divider - 1
steniu01 0:9b2f77afaacd 578 uint32_t MAX_ADC_CLK = 13000000;
steniu01 0:9b2f77afaacd 579 uint32_t clkdiv = div_round_up(PCLK, MAX_ADC_CLK) - 1;
steniu01 0:9b2f77afaacd 580
steniu01 0:9b2f77afaacd 581
steniu01 0:9b2f77afaacd 582 LPC_ADC->ADCR &= ~(1 << 0) // SEL: 0 = no channels selected
steniu01 0:9b2f77afaacd 583 & ~ (1 << 16) // No BURST mode
steniu01 0:9b2f77afaacd 584 & ~(1 << 17) // CLKS: not applicable
steniu01 0:9b2f77afaacd 585 & ~(1 << 24); // ADC conversion not start yet
steniu01 0:9b2f77afaacd 586
steniu01 0:9b2f77afaacd 587
steniu01 0:9b2f77afaacd 588 LPC_ADC->ADINTEN = 1 <<8;
steniu01 0:9b2f77afaacd 589 // Set the generic software-controlled ADC settings
steniu01 0:9b2f77afaacd 590 LPC_ADC->ADCR |= ( 24 << 8) // CLKDIV: PCLK max ~= 25MHz, /25 to give safe 1MHz at fastest
steniu01 0:9b2f77afaacd 591 | (1 << 21) ; // PDN: 1 = operational
steniu01 0:9b2f77afaacd 592
steniu01 0:9b2f77afaacd 593
steniu01 0:9b2f77afaacd 594 // Select the channel 4
steniu01 0:9b2f77afaacd 595 LPC_ADC->ADCR |= 1 << 4;
steniu01 0:9b2f77afaacd 596 // Start conversionf
steniu01 0:9b2f77afaacd 597 LPC_ADC->ADCR |= 1 << 24;
steniu01 0:9b2f77afaacd 598 }
steniu01 0:9b2f77afaacd 599
steniu01 0:9b2f77afaacd 600 void burst_ADC_init()
steniu01 0:9b2f77afaacd 601 {
steniu01 0:9b2f77afaacd 602 // ensure power is turned on
steniu01 0:9b2f77afaacd 603 LPC_SC->PCONP |= (1 << 12);
steniu01 0:9b2f77afaacd 604
steniu01 0:9b2f77afaacd 605 /* p19 pin is set to ADC input.*/
steniu01 0:9b2f77afaacd 606 LPC_PINCON->PINSEL3 |= 0x30000000;
steniu01 0:9b2f77afaacd 607 /* no pull-up, no pull-down */
steniu01 0:9b2f77afaacd 608 LPC_PINCON->PINMODE3 |= 0x20000000;
steniu01 0:9b2f77afaacd 609
steniu01 0:9b2f77afaacd 610 // set PCLK of ADC to 1
steniu01 0:9b2f77afaacd 611 LPC_SC->PCLKSEL0 &= ~(0x3 << 24);
steniu01 0:9b2f77afaacd 612 LPC_SC->PCLKSEL0 |= (0x1 << 24);
steniu01 0:9b2f77afaacd 613 uint32_t PCLK = SystemCoreClock;
steniu01 0:9b2f77afaacd 614
steniu01 0:9b2f77afaacd 615 // calculate minimum clock divider
steniu01 0:9b2f77afaacd 616 // clkdiv = divider - 1
steniu01 0:9b2f77afaacd 617 uint32_t MAX_ADC_CLK = 13000000;
steniu01 0:9b2f77afaacd 618 uint32_t clkdiv = div_round_up(40000, MAX_ADC_CLK) - 1;
steniu01 0:9b2f77afaacd 619
steniu01 0:9b2f77afaacd 620
steniu01 0:9b2f77afaacd 621 LPC_ADC->ADCR &= ~(1 << 0) // SEL: 0 = no channels selected
steniu01 0:9b2f77afaacd 622 & ~(1 << 17) // CLKS: not applicable
steniu01 0:9b2f77afaacd 623 & ~(1 << 24); // ADC conversion not start yet
steniu01 0:9b2f77afaacd 624
steniu01 0:9b2f77afaacd 625 // ADGINTEN must be set to 0 in burst mode
steniu01 0:9b2f77afaacd 626 LPC_ADC->ADINTEN &= ~(1<<8);
steniu01 0:9b2f77afaacd 627 // Set the generic software-controlled ADC settings
steniu01 0:9b2f77afaacd 628 LPC_ADC->ADCR |= (clkdiv << 8) // CLKDIV: PCLK max ~= 25MHz, /25 to give safe 1MHz at fastest
steniu01 0:9b2f77afaacd 629 | (1 << 16) // Burst mode
steniu01 0:9b2f77afaacd 630 | (1 << 21) ; // PDN: 1 = operational
steniu01 0:9b2f77afaacd 631
steniu01 0:9b2f77afaacd 632
steniu01 0:9b2f77afaacd 633 // Select the channel 4
steniu01 0:9b2f77afaacd 634 LPC_ADC->ADCR |= 1 << 4;
steniu01 0:9b2f77afaacd 635 // Start conversion
steniu01 0:9b2f77afaacd 636 LPC_ADC->ADCR |= 1 << 24;
steniu01 0:9b2f77afaacd 637 }
steniu01 0:9b2f77afaacd 638
steniu01 0:9b2f77afaacd 639
steniu01 0:9b2f77afaacd 640 uint32_t ADC_read(uint8_t channel)
steniu01 0:9b2f77afaacd 641 {
steniu01 0:9b2f77afaacd 642 // Select the appropriate channel and start conversion
steniu01 0:9b2f77afaacd 643 LPC_ADC->ADCR &= ~0xFF;
steniu01 0:9b2f77afaacd 644 LPC_ADC->ADCR |= 1 << channel;
steniu01 0:9b2f77afaacd 645 LPC_ADC->ADCR |= 1 << 24;
steniu01 0:9b2f77afaacd 646 // Repeatedly get the sample data until DONE bit
steniu01 0:9b2f77afaacd 647 unsigned int data;
steniu01 0:9b2f77afaacd 648
steniu01 0:9b2f77afaacd 649 do {
steniu01 0:9b2f77afaacd 650 data = LPC_ADC->ADGDR;
steniu01 0:9b2f77afaacd 651 } while ((data & ((unsigned int)1 << 31)) == 0);
steniu01 0:9b2f77afaacd 652 // Stop conversion
steniu01 0:9b2f77afaacd 653 LPC_ADC->ADCR &= ~(1 << 24);
steniu01 0:9b2f77afaacd 654 return (data >> 4) & 0xfff; // 12 bit
steniu01 0:9b2f77afaacd 655 }