steven niu / Mbed 2 deprecated test_mDMA

test codes to test DMA features

Dependencies:   mDMA mbed

main.cpp@1:5b946b818a29, 2015-03-10 (annotated)

Committer:
steniu01
Date:
Tue Mar 10 22:31:59 2015 +0000
Revision:
1:5b946b818a29
Parent:
0:9b2f77afaacd 
improve coding style

Who changed what in which revision?

UserRevisionLine numberNew contents of line
steniu01 0:9b2f77afaacd 1 /**
steniu01 0:9b2f77afaacd 2 M2M : read content from a files using CPU, test the time; read content from a file using DMA. Compare the content
steniu01 0:9b2f77afaacd 3 M2P : demenstrate while DMA-UART working, LED swtich is also working
steniu01 0:9b2f77afaacd 4 P2M : demenstrate m2m, m2p, p2m, could work together ; keep sending
steniu01 0:9b2f77afaacd 5 P2P
steniu01 0:9b2f77afaacd 6 */
steniu01 0:9b2f77afaacd 7
steniu01 0:9b2f77afaacd 8 #include "mbed.h"
steniu01 0:9b2f77afaacd 9 #include "dma.h"
steniu01 0:9b2f77afaacd 10
steniu01 0:9b2f77afaacd 11 #define test_attach 1
steniu01 0:9b2f77afaacd 12 #define test_m2m 0
steniu01 0:9b2f77afaacd 13 #define test_m2m_int 0
steniu01 0:9b2f77afaacd 14 #define test_m2p 0
steniu01 0:9b2f77afaacd 15 #define test_p2m 0
steniu01 0:9b2f77afaacd 16 #define test_p2p 0
steniu01 0:9b2f77afaacd 17 #define test_all 0
steniu01 0:9b2f77afaacd 18 #define test_adc 0
steniu01 0:9b2f77afaacd 19 #define test_LLI 0
steniu01 0:9b2f77afaacd 20
steniu01 0:9b2f77afaacd 21
steniu01 0:9b2f77afaacd 22 LocalFileSystem local("local");
steniu01 0:9b2f77afaacd 23
steniu01 0:9b2f77afaacd 24 DigitalOut myled1(LED1);
steniu01 0:9b2f77afaacd 25 DigitalOut myled2(LED2);
steniu01 0:9b2f77afaacd 26 DigitalOut myled3(LED3);
steniu01 0:9b2f77afaacd 27 DigitalOut myled4(LED4);
steniu01 0:9b2f77afaacd 28
steniu01 0:9b2f77afaacd 29 // Use Timer to measure the execution time
steniu01 0:9b2f77afaacd 30 Timer t;
steniu01 0:9b2f77afaacd 31
steniu01 0:9b2f77afaacd 32 RawSerial pc (USBTX, USBRX);
steniu01 0:9b2f77afaacd 33
steniu01 0:9b2f77afaacd 34 // Callbacks for DMA interrupts
steniu01 0:9b2f77afaacd 35 void led_switchon_m2m(void);
steniu01 0:9b2f77afaacd 36 void led_switchon_m2p (void);
steniu01 0:9b2f77afaacd 37 void led_switchon_p2m (void);
steniu01 0:9b2f77afaacd 38 void led_switchon_p2p (void);
steniu01 0:9b2f77afaacd 39 void led_show (void);
steniu01 0:9b2f77afaacd 40 void IRQ_err (void);
steniu01 0:9b2f77afaacd 41
steniu01 0:9b2f77afaacd 42
steniu01 0:9b2f77afaacd 43 void ADC_init();
steniu01 0:9b2f77afaacd 44 void old_ADC_init();
steniu01 0:9b2f77afaacd 45 void burst_ADC_init();
steniu01 0:9b2f77afaacd 46 uint32_t ADC_read(uint8_t channel);
steniu01 0:9b2f77afaacd 47
steniu01 0:9b2f77afaacd 48
steniu01 0:9b2f77afaacd 49 volatile bool m2p_finishFlag = 0;
steniu01 0:9b2f77afaacd 50
steniu01 0:9b2f77afaacd 51 class mynumber {
steniu01 0:9b2f77afaacd 52 public:
steniu01 0:9b2f77afaacd 53 int num;
steniu01 0:9b2f77afaacd 54 mynumber(){
steniu01 0:9b2f77afaacd 55 num = 0;
steniu01 0:9b2f77afaacd 56 }
steniu01 0:9b2f77afaacd 57 void print_mynumber(void){
steniu01 0:9b2f77afaacd 58 pc.printf("my number is %d", num);
steniu01 0:9b2f77afaacd 59 }
steniu01 0:9b2f77afaacd 60
steniu01 0:9b2f77afaacd 61 };
steniu01 0:9b2f77afaacd 62
steniu01 0:9b2f77afaacd 63 mynumber mynumber1;
steniu01 0:9b2f77afaacd 64
steniu01 0:9b2f77afaacd 65 void test_mynumber (){
steniu01 0:9b2f77afaacd 66 static_cast<mynumber*>(&mynumber1)->print_mynumber();
steniu01 0:9b2f77afaacd 67 }
steniu01 0:9b2f77afaacd 68
steniu01 0:9b2f77afaacd 69
steniu01 0:9b2f77afaacd 70 template<typename T>
steniu01 0:9b2f77afaacd 71 void led_test_call (T *object, void (T::*member)(void)){
steniu01 0:9b2f77afaacd 72 void (T::*m)(void);
steniu01 0:9b2f77afaacd 73 T* o = static_cast<T*>(object);
steniu01 0:9b2f77afaacd 74 memcpy((char*)&m, (char*)&member, sizeof(m));
steniu01 0:9b2f77afaacd 75 (o->*m)();
steniu01 0:9b2f77afaacd 76 }
steniu01 0:9b2f77afaacd 77
steniu01 0:9b2f77afaacd 78 mynumber mynumber2;
steniu01 0:9b2f77afaacd 79
steniu01 0:9b2f77afaacd 80 void irq_handler(void)
steniu01 0:9b2f77afaacd 81 {
steniu01 0:9b2f77afaacd 82 led_test_call<mynumber> (&mynumber2, &mynumber::print_mynumber);
steniu01 0:9b2f77afaacd 83 }
steniu01 0:9b2f77afaacd 84
steniu01 0:9b2f77afaacd 85
steniu01 0:9b2f77afaacd 86
steniu01 0:9b2f77afaacd 87 int main(void)
steniu01 0:9b2f77afaacd 88 {
steniu01 0:9b2f77afaacd 89 char src[] =
steniu01 0:9b2f77afaacd 90 "Hello world Copy the logical and implementation_tsmc28hpm directories in to the Skadi home directo \r\n" \
steniu01 0:9b2f77afaacd 91 "Thank you for the demonstration. I understand now. I have come to terms with the fact that I misunderstood how \r\n" \
steniu01 0:9b2f77afaacd 92 "memory is laid out. I thought that each individual address was capable of storing an entire word, not just a byte \r\n" \
steniu01 0:9b2f77afaacd 93 "(for instance address 0x12345678 could hold a value of 0xffffffff and then 0x12345679 could hold a completely \r\n" \
steniu01 0:9b2f77afaacd 94 "different value 0x00000000). Now I realize that 0x12345678 holds only one byte of a word and the next word\r\n"\
steniu01 0:9b2f77afaacd 95 "The logic for your memcpy is correct and your interviewer didn't ask you to change it or add a restriction.\r\n"
steniu01 0:9b2f77afaacd 96 "Hello world Copy the logical and implementation_tsmc28hpm directories in to the Skadi home directo \r\n" \
steniu01 0:9b2f77afaacd 97 "Thank you for the demonstration. I understand now. I have come to terms with the fact that I misunderstood how \r\n" \
steniu01 0:9b2f77afaacd 98 "memory is laid out. I thought that each individual address was capable of storing an entire word, not just a byte \r\n" \
steniu01 0:9b2f77afaacd 99 "(for instance address 0x12345678 could hold a value of 0xffffffff and then 0x12345679 could hold a completely \r\n" \
steniu01 0:9b2f77afaacd 100 "different value 0x00000000). Now I realize that 0x12345678 holds only one byte of a word and the next word \r\n" \
steniu01 0:9b2f77afaacd 101 "The logic for your memcpy is correct and your interviewer didn't ask you to change it or add a restriction. \r\n" \
steniu01 0:9b2f77afaacd 102 "different value 0x00000000). Now I realize that 0x12345678 holds only one byte of a word and the next word\r\n" \
steniu01 0:9b2f77afaacd 103 "The logic for your memcpy is correct and your interviewer didn't ask you to change it or add a restriction.\r\n"\
steniu01 0:9b2f77afaacd 104 "Hello world Copy the logical and implementation_tsmc28hpm directories in to the Skadi home directo \r\n"\
steniu01 0:9b2f77afaacd 105 "Thank you for the demonstration. I understand now. I have come to terms with the fact that I misunderstood how \r\n" \
steniu01 0:9b2f77afaacd 106 "memory is laid out. I thought that each individual address was capable of storing an entire word, not just a byte \r\n" \
steniu01 0:9b2f77afaacd 107 "(for instance address 0x12345678 could hold a value of 0xffffffff and then 0x12345679 could hold a completely \r\n" \
steniu01 0:9b2f77afaacd 108 "different value 0x00000000). Now I realize that 0x12345678 holds only one byte of a word and the next word \r\n" \
steniu01 0:9b2f77afaacd 109 "The logic for your memcpy is correct and your interviewer didn't ask you to change it or add a restriction. \r\n" \
steniu01 0:9b2f77afaacd 110 "Thank you for the demonstration. I understand now. I have come to terms with the fact that I misunderstood how \r\n" \
steniu01 0:9b2f77afaacd 111 "Hello world Copy the logical and implementation_tsmc28hpm directories in to the Skadi home directo \r\n" \
steniu01 0:9b2f77afaacd 112 "Thank you for the demonstration. I understand now. I have come to terms with the fact that I misunderstood how \r\n" \
steniu01 0:9b2f77afaacd 113 "memory is laid out. I thought that each individual address was capable of storing an entire word, not just a byte \r\n" \
steniu01 0:9b2f77afaacd 114 "(for instance address 0x12345678 could hold a value of 0xffffffff and then 0x12345679 could hold a completely \r\n" \
steniu01 0:9b2f77afaacd 115 "different value 0x00000000). Now I realize that 0x12345678 holds only one byte of a word and the next word \r\n" \
steniu01 0:9b2f77afaacd 116 "The logic for your memcpy is correct and your interviewer didn't ask you to change it or add a restriction. \r\n" \
steniu01 0:9b2f77afaacd 117 "Thank you for the demonstration. I understand now. I have come to terms with the fact that I misunderstood how\r\n" \
steniu01 0:9b2f77afaacd 118 "memory is laid out. I thought that each individual address was capable of storing an entire word, not just a byte \r\n" \
steniu01 0:9b2f77afaacd 119 "(for instance address 0x12345678 could hold a value of 0xffffffff and then 0x12345679 could hold a completely \r\n" \
steniu01 0:9b2f77afaacd 120 "different value 0x00000000). Now I realize that 0x12345678 holds only one byte of a word and the next word \r\n" \
steniu01 0:9b2f77afaacd 121 "The logic for your memcpy is correct and your interviewer didn't ask you to change it or add a restriction. \r\n" \
steniu01 0:9b2f77afaacd 122 "memory is laid out. I thought that each individual address was capable of storing an entire word, not just a byte \r\n" \
steniu01 0:9b2f77afaacd 123 "(for instance address 0x12345678 could hold a value of 0xffffffff and then 0x12345679 could hold a completely \r\n" \
steniu01 0:9b2f77afaacd 124 "different value 0x00000000). Now I realize that 0x12345678 holds only one byte of a word and the next word \r\n" \
steniu01 0:9b2f77afaacd 125 "The logic for your memcpy is correct and your interviewer didn't ask you to change it or add a restriction. \r\n" \
steniu01 0:9b2f77afaacd 126 "Thank you for the demonstration. I understand now. I have come to terms with the fact that I misunderstood how \r\n" \
steniu01 0:9b2f77afaacd 127 "Thank you for the demonstration. I understand now. I have come to terms with the fact that I misunderstood how \r\n" \
steniu01 0:9b2f77afaacd 128 "memory is laid out. I thought that each individual address was capable of storing an entire word, not just a byte \r\n" \
steniu01 0:9b2f77afaacd 129 "algorithm. Memory operates on words rather than bytes. In a 32-bit system, a word is typically 4 bytes, it\r\n"\
steniu01 0:9b2f77afaacd 130 "akes the same amount of time to read/write 1 byte as it does to read/write 1 word. The second loop is to \r\n"\
steniu01 0:9b2f77afaacd 131 "Hello world Copy the logical and implementation_tsmc28hpm directories in to the Skadi home directory\r\n"\
steniu01 0:9b2f77afaacd 132 "1.pick what kind of geek you want to be there are different kinds of geeks such as sci fi and fantasy geek\r\n"\
steniu01 0:9b2f77afaacd 133 "#book geek manga geek and many more just be who you really are\r\n"\
steniu01 0:9b2f77afaacd 134 "2. Read lots of books. Some good geeky books include The Lord Of The Rings, Harry Potter, The Hunger Games,\r\n"\
steniu01 0:9b2f77afaacd 135 "I Robot and The Zombie Survival Guide. These can be found in your local library.\r\n"\
steniu01 0:9b2f77afaacd 136 "3.Be smart. Try to get an A in every subject except for PE.\r\n"\
steniu01 0:9b2f77afaacd 137 "4.Read geeky comics and graphic novels. You don't have to read superhero comics if you want to be geeky.\r\n"\
steniu01 0:9b2f77afaacd 138 "You can read Science Fiction, Fantasy, Horror or Comedy.\r\n"\
steniu01 0:9b2f77afaacd 139 "5.Watch geeky movies such as Shaun of The Dead, Star Trek, Doctor who, Revenge Of the Nerds, and Star Wars.\r\n"\
steniu01 0:9b2f77afaacd 140 "6.Know all things Star Trek. Captain Kirk's background, the fact that spock is a vulcan, and the vulcan salute are all things that a geek must know\r\n"\
steniu01 0:9b2f77afaacd 141 "7.Watch geeky series such as Doctor Who, Merlin and The Big Bang Theory.\r\n"\
steniu01 0:9b2f77afaacd 142 "8.Be good with computers. Learn a programming language and read books about computers.\r\n"\
steniu01 0:9b2f77afaacd 143 "9.Have geeky friends and a geeky hangout such as the book shop, the tabletop game shop, the comic shop and the computer shop.\r\n"\
steniu01 0:9b2f77afaacd 144 "10.A geek knows everything\"thinkgeek.com\". Thinkgeek is a website which holds everything a geek could want. A geek has an account on thinkgeek and has thinkgeek points.\r\n"\
steniu01 0:9b2f77afaacd 145 "11.A GEEK DOES NOT PLAY ROCK PAPER SCISSORS. A geek plays the famous game invented by Sheldon Cooper: rock-paper-scissors-lizard-Spock.\r\n"\
steniu01 0:9b2f77afaacd 146 "12.Buy some shirts from thinkgeek.com and wear Adidas slides.\r\n";
steniu01 0:9b2f77afaacd 147
steniu01 0:9b2f77afaacd 148
steniu01 0:9b2f77afaacd 149 int src_int[1786];
steniu01 0:9b2f77afaacd 150
steniu01 0:9b2f77afaacd 151
steniu01 0:9b2f77afaacd 152
steniu01 0:9b2f77afaacd 153 #if test_attach
steniu01 0:9b2f77afaacd 154 pc.printf("start to test mehtod attach function now!\r\n");
steniu01 0:9b2f77afaacd 155
steniu01 0:9b2f77afaacd 156 char src2[] = "this is for test_attach test";
steniu01 0:9b2f77afaacd 157 wait(2);
steniu01 0:9b2f77afaacd 158 size_t size = sizeof (src2);
steniu01 0:9b2f77afaacd 159 char *dst1 = (char *) malloc(size);
steniu01 0:9b2f77afaacd 160 memset (dst1, '\0', size);
steniu01 0:9b2f77afaacd 161
steniu01 0:9b2f77afaacd 162 mynumber1.num = 3;
steniu01 0:9b2f77afaacd 163 DMA dma1 (-1); // choose whichever free channel
steniu01 0:9b2f77afaacd 164 dma1.source (src2,1, 8); // set source as incremental. Not need to set the transfer width as MBED dma will do it for you.
steniu01 0:9b2f77afaacd 165 dma1.destination (dst1, 1, 8);
steniu01 0:9b2f77afaacd 166 dma1.attach_TC(test_mynumber);
steniu01 0:9b2f77afaacd 167
steniu01 0:9b2f77afaacd 168
steniu01 0:9b2f77afaacd 169 dma1.start(size);
steniu01 0:9b2f77afaacd 170 dma1.wait();
steniu01 0:9b2f77afaacd 171 pc.printf("finish");
steniu01 0:9b2f77afaacd 172
steniu01 0:9b2f77afaacd 173 #endif
steniu01 0:9b2f77afaacd 174
steniu01 0:9b2f77afaacd 175 #if test_m2m
steniu01 0:9b2f77afaacd 176 /* test the DMA M2M, copy data from src to dest, and then print out the dest mem data */
steniu01 0:9b2f77afaacd 177
steniu01 0:9b2f77afaacd 178 pc.printf("start to test DMA M2M test now!\r\n");
steniu01 1:5b946b818a29 179
steniu01 0:9b2f77afaacd 180 size_t size = sizeof(src);
steniu01 1:5b946b818a29 181 char *dst1 = (char *) malloc(size);
steniu01 0:9b2f77afaacd 182 char *dst2 = (char *) malloc(size);
steniu01 0:9b2f77afaacd 183 memset(dst1, '\0', size+1);
steniu01 0:9b2f77afaacd 184 memset(dst2, '\0', size+1);
steniu01 1:5b946b818a29 185
steniu01 0:9b2f77afaacd 186 t.start();
steniu01 0:9b2f77afaacd 187 memcpy(dst1,src,size);
steniu01 0:9b2f77afaacd 188 t.stop();
steniu01 0:9b2f77afaacd 189 printf("The source size is %d\r\n", size);
steniu01 0:9b2f77afaacd 190 printf("The time CPU took was %f seconds\r\n", t.read());
steniu01 0:9b2f77afaacd 191 t.reset();
steniu01 0:9b2f77afaacd 192
steniu01 0:9b2f77afaacd 193
steniu01 0:9b2f77afaacd 194 DMA dma1(-1); // choose whichever free channel
steniu01 0:9b2f77afaacd 195 dma1.source(src,1, 8); // set source as incremental. Not need to set the transfer width as MBED dma will do it for you.
steniu01 0:9b2f77afaacd 196 dma1.destination(dst2, 1, 8);
steniu01 0:9b2f77afaacd 197
steniu01 0:9b2f77afaacd 198 dma1.attach_TC(led_switchon_m2m);
steniu01 0:9b2f77afaacd 199 dma1.attach_Err(IRQ_err);
steniu01 0:9b2f77afaacd 200 t.start();
steniu01 0:9b2f77afaacd 201 dma1.start(size);
steniu01 0:9b2f77afaacd 202 dma1.wait();
steniu01 0:9b2f77afaacd 203 t.stop();
steniu01 0:9b2f77afaacd 204
steniu01 0:9b2f77afaacd 205 pc.printf("The time DMA took was %f seconds\r\n", t.read());
steniu01 0:9b2f77afaacd 206 wait(5);
steniu01 0:9b2f77afaacd 207 pc.printf("dst text: %s \r\n", dst2);
steniu01 0:9b2f77afaacd 208 t.reset();
steniu01 0:9b2f77afaacd 209 if (strcmp(dst2, dst1) != 0)
steniu01 0:9b2f77afaacd 210 {
steniu01 0:9b2f77afaacd 211 pc.printf("error! \r\n");
steniu01 0:9b2f77afaacd 212 for (int i = 0; i < size +1; i++)
steniu01 0:9b2f77afaacd 213 if(dst1[i] != dst2[i])
steniu01 0:9b2f77afaacd 214 printf ("In the %d charator, dst1 is %c and dst2 is %c \r\n", i+1, dst1[i], dst2[i]);
steniu01 0:9b2f77afaacd 215 }
steniu01 0:9b2f77afaacd 216 else
steniu01 0:9b2f77afaacd 217 pc.printf("correct! \r\n");
steniu01 0:9b2f77afaacd 218 #endif
steniu01 0:9b2f77afaacd 219
steniu01 0:9b2f77afaacd 220 #if test_m2m_int
steniu01 0:9b2f77afaacd 221 pc.printf("start to test DMA M2M test now!\r\n");
steniu01 0:9b2f77afaacd 222 // wait(1);
steniu01 0:9b2f77afaacd 223 for (int i = 0; i < sizeof(src_int)/4; i++)
steniu01 0:9b2f77afaacd 224 src_int[i]=i;
steniu01 0:9b2f77afaacd 225 size_t size = sizeof(src_int)/4;
steniu01 0:9b2f77afaacd 226 int *dst1 = (int *) malloc(sizeof(src_int)/4);
steniu01 0:9b2f77afaacd 227 int *dst2 = (int *) malloc(sizeof(src_int)/4);
steniu01 0:9b2f77afaacd 228 memset(dst1, '\0', size);
steniu01 0:9b2f77afaacd 229 memset(dst2, '\0', size);
steniu01 0:9b2f77afaacd 230 t.start();
steniu01 0:9b2f77afaacd 231 memcpy(dst1,src_int,size);
steniu01 0:9b2f77afaacd 232 t.stop();
steniu01 0:9b2f77afaacd 233 printf("The source size is %d\r\n", size);
steniu01 0:9b2f77afaacd 234 printf("The time CPU took was %f seconds\r\n", t.read());
steniu01 0:9b2f77afaacd 235 t.reset();
steniu01 0:9b2f77afaacd 236
steniu01 0:9b2f77afaacd 237
steniu01 0:9b2f77afaacd 238 DMA dma1(1); // choose whichever free channel
steniu01 0:9b2f77afaacd 239 dma1.source(src_int,1); // set source as incremental. Not need to set the transfer width as MBED dma will do it for you.
steniu01 0:9b2f77afaacd 240 dma1.destination(dst2, 1);
steniu01 0:9b2f77afaacd 241
steniu01 0:9b2f77afaacd 242 // dma1.attach_TC(led_switchon_m2m);
steniu01 0:9b2f77afaacd 243 // dma1.attach_Err(IRQ_err);
steniu01 0:9b2f77afaacd 244 t.start();
steniu01 0:9b2f77afaacd 245 dma1.start(size);
steniu01 0:9b2f77afaacd 246 dma1.wait();
steniu01 0:9b2f77afaacd 247 t.stop();
steniu01 0:9b2f77afaacd 248
steniu01 0:9b2f77afaacd 249 pc.printf("The time DMA took was %f seconds\r\n", t.read());
steniu01 0:9b2f77afaacd 250 wait(5);
steniu01 0:9b2f77afaacd 251 for (int i=0; i<sizeof(src_int)/4;i++)
steniu01 0:9b2f77afaacd 252 pc.printf("dst text: %d \r\n", dst2[i]);
steniu01 0:9b2f77afaacd 253 t.reset();
steniu01 0:9b2f77afaacd 254 if (memcmp(dst2, src_int, sizeof(src_int)/4) != 0)
steniu01 0:9b2f77afaacd 255 pc.printf("error! \r\n");
steniu01 0:9b2f77afaacd 256 else
steniu01 0:9b2f77afaacd 257 pc.printf("correct! \r\n");
steniu01 0:9b2f77afaacd 258 #endif
steniu01 0:9b2f77afaacd 259
steniu01 0:9b2f77afaacd 260 #if test_LLI
steniu01 0:9b2f77afaacd 261
steniu01 0:9b2f77afaacd 262 pc.printf ("start to test LLI now\r\n");
steniu01 0:9b2f77afaacd 263
steniu01 0:9b2f77afaacd 264 wait(2);
steniu01 0:9b2f77afaacd 265
steniu01 0:9b2f77afaacd 266 char src_dma[] = "This is to test the scatter-gather support \r\n";
steniu01 0:9b2f77afaacd 267 char src_LLI[] = "this is from linked item \r\n";
steniu01 0:9b2f77afaacd 268 LPC_UART0->FCR |= 1<<3 ; //Enable UART DMA mode
steniu01 0:9b2f77afaacd 269 LPC_UART0->LCR &= ~(1<<3); // No parity bit generated
steniu01 0:9b2f77afaacd 270
steniu01 0:9b2f77afaacd 271 DMA dmaLLI(2);
steniu01 0:9b2f77afaacd 272 dmaLLI.destination(&(LPC_UART0->THR),0, sizeof(char)*8);
steniu01 0:9b2f77afaacd 273 dmaLLI.source(src_dma,1, sizeof(char)*8);
steniu01 0:9b2f77afaacd 274 dmaLLI.TriggerDestination(_UART0_TX);
steniu01 0:9b2f77afaacd 275 dmaLLI.attach_TC(led_switchon_m2p);// m2p_finishFlag will be set when FINISH interrupt generated
steniu01 0:9b2f77afaacd 276 dmaLLI.attach_Err(IRQ_err);
steniu01 0:9b2f77afaacd 277
steniu01 0:9b2f77afaacd 278 dmaLLI.next((uint32_t)src_LLI, (uint32_t)&(LPC_UART0->THR), sizeof(src_LLI));
steniu01 0:9b2f77afaacd 279 dmaLLI.start(sizeof(src_dma));
steniu01 0:9b2f77afaacd 280 dmaLLI.wait();
steniu01 0:9b2f77afaacd 281 while(1);
steniu01 0:9b2f77afaacd 282 #endif
steniu01 0:9b2f77afaacd 283
steniu01 0:9b2f77afaacd 284
steniu01 0:9b2f77afaacd 285
steniu01 0:9b2f77afaacd 286 #if test_m2p
steniu01 0:9b2f77afaacd 287 /*Test m2P, send the memory data to UART;*/
steniu01 0:9b2f77afaacd 288 pc.printf ("start to test m2p now\r\n");
steniu01 0:9b2f77afaacd 289
steniu01 0:9b2f77afaacd 290 t.start();
steniu01 0:9b2f77afaacd 291 pc.printf(src);
steniu01 0:9b2f77afaacd 292 t.stop();
steniu01 0:9b2f77afaacd 293 wait(1);
steniu01 0:9b2f77afaacd 294 printf("The time CPU took was %f seconds\r\n", t.read());
steniu01 0:9b2f77afaacd 295 wait(1);
steniu01 0:9b2f77afaacd 296 t.reset();
steniu01 0:9b2f77afaacd 297
steniu01 0:9b2f77afaacd 298 LPC_UART0->FCR |= 1<<3 ; //Enable UART DMA mode
steniu01 0:9b2f77afaacd 299 LPC_UART0->LCR &= ~(1<<3); // No parity bit genrated
steniu01 0:9b2f77afaacd 300
steniu01 0:9b2f77afaacd 301 DMA dma2(2);
steniu01 0:9b2f77afaacd 302 dma2.destination(&(LPC_UART0->THR),0, sizeof(char)*8);
steniu01 0:9b2f77afaacd 303 dma2.source(src,1, sizeof(char)*8);
steniu01 0:9b2f77afaacd 304 dma2.TriggerDestination(_UART0_TX);
steniu01 0:9b2f77afaacd 305 dma2.attach_TC(led_switchon_m2p);// m2p_finishFlag will be set when FINISH interrupt generated
steniu01 0:9b2f77afaacd 306 dma2.attach_Err (IRQ_err);
steniu01 0:9b2f77afaacd 307
steniu01 0:9b2f77afaacd 308 t.start();
steniu01 0:9b2f77afaacd 309 dma2.start(sizeof(src));
steniu01 0:9b2f77afaacd 310 dma2.wait();
steniu01 0:9b2f77afaacd 311 t.stop();
steniu01 0:9b2f77afaacd 312 printf("The time DMA took was %f seconds\r\n", t.read());
steniu01 0:9b2f77afaacd 313 printf("The transfer size is %d \r\n", sizeof(src));
steniu01 0:9b2f77afaacd 314 wait(2);
steniu01 0:9b2f77afaacd 315
steniu01 0:9b2f77afaacd 316 pc.printf ("Now demonstrate CPU and DMA could work together\r\n");
steniu01 0:9b2f77afaacd 317 wait(1);
steniu01 0:9b2f77afaacd 318 m2p_finishFlag = 0;
steniu01 0:9b2f77afaacd 319 dma2.start(sizeof(src));
steniu01 0:9b2f77afaacd 320 // Demonstrate CPU and DMA could work together, led2 keep blinking while DMA is transferring data
steniu01 0:9b2f77afaacd 321
steniu01 0:9b2f77afaacd 322 while (!m2p_finishFlag){
steniu01 0:9b2f77afaacd 323 myled2 = !myled2;
steniu01 0:9b2f77afaacd 324 wait (0.2);
steniu01 0:9b2f77afaacd 325 }
steniu01 0:9b2f77afaacd 326
steniu01 0:9b2f77afaacd 327
steniu01 0:9b2f77afaacd 328 // Demonstrate Err interrupt callback also works
steniu01 0:9b2f77afaacd 329 // Dedicately read data from the unallocated memory range to generate error
steniu01 0:9b2f77afaacd 330 wait (1);
steniu01 0:9b2f77afaacd 331 pc.printf ("Now demonstrate error interrupt callback also works\r\n");
steniu01 0:9b2f77afaacd 332 wait(2);
steniu01 0:9b2f77afaacd 333 dma2.attach_Err (IRQ_err);
steniu01 0:9b2f77afaacd 334 dma2.start((sizeof(src)+4));
steniu01 0:9b2f77afaacd 335 dma2.wait();
steniu01 0:9b2f77afaacd 336
steniu01 0:9b2f77afaacd 337 #endif
steniu01 0:9b2f77afaacd 338
steniu01 0:9b2f77afaacd 339 #if test_p2m
steniu01 0:9b2f77afaacd 340
steniu01 0:9b2f77afaacd 341 pc.printf("start to test DMA P2M now!\r\n");
steniu01 0:9b2f77afaacd 342 wait(2);
steniu01 0:9b2f77afaacd 343 volatile unsigned int data = 0;
steniu01 0:9b2f77afaacd 344 unsigned int data2 = 0;
steniu01 0:9b2f77afaacd 345 volatile int *dst3 = (int *) malloc(4);
steniu01 0:9b2f77afaacd 346 old_ADC_init();
steniu01 0:9b2f77afaacd 347
steniu01 0:9b2f77afaacd 348 NVIC_DisableIRQ(ADC_IRQn); // If ADC DMA is used, the ADC interrupt must be disabled
steniu01 0:9b2f77afaacd 349
steniu01 0:9b2f77afaacd 350 DMA dma3(3);
steniu01 0:9b2f77afaacd 351 dma3.destination(dst3, 0, 32); // Some sample codes show it should be half-word as only low 16bit contains the data.
steniu01 0:9b2f77afaacd 352 // But I think it should be 32 as the reigster is 32-bit width
steniu01 0:9b2f77afaacd 353 dma3.source(&(LPC_ADC->ADDR4),0, 32);
steniu01 0:9b2f77afaacd 354 dma3.TriggerSource(_ADC);
steniu01 0:9b2f77afaacd 355 dma3.attach_TC(led_switchon_p2m);
steniu01 0:9b2f77afaacd 356
steniu01 0:9b2f77afaacd 357 while (1)
steniu01 0:9b2f77afaacd 358 {
steniu01 0:9b2f77afaacd 359 // LPC_ADC->ADCR |= 1 << 24;// start the conversion now
steniu01 0:9b2f77afaacd 360 dma3.start(1);
steniu01 0:9b2f77afaacd 361 data= float(dst3[0]>>4 & 0xfff); // Only bit4-bit16 contains the valid ADC data
steniu01 0:9b2f77afaacd 362 data2 = ADC_read(4); // read ADC channel 4
steniu01 0:9b2f77afaacd 363 pc.printf("The ADC data of DMA is: %d\r\n", data);
steniu01 0:9b2f77afaacd 364 pc.printf("The ADC data of CPU is: %d\r\n", data2);
steniu01 0:9b2f77afaacd 365 wait (1);
steniu01 0:9b2f77afaacd 366 }
steniu01 0:9b2f77afaacd 367
steniu01 0:9b2f77afaacd 368 pc.printf("\nFinish!\r\n");
steniu01 0:9b2f77afaacd 369 #endif
steniu01 0:9b2f77afaacd 370
steniu01 0:9b2f77afaacd 371
steniu01 0:9b2f77afaacd 372
steniu01 0:9b2f77afaacd 373
steniu01 0:9b2f77afaacd 374 #if test_p2p
steniu01 0:9b2f77afaacd 375
steniu01 0:9b2f77afaacd 376 wait(2);
steniu01 0:9b2f77afaacd 377 volatile unsigned int data = 0;
steniu01 0:9b2f77afaacd 378 unsigned int data2 = 0;
steniu01 0:9b2f77afaacd 379 volatile unsigned int raw_data = 0;
steniu01 0:9b2f77afaacd 380 volatile int *dst3 = (int *) malloc(4);
steniu01 0:9b2f77afaacd 381 old_ADC_init();
steniu01 0:9b2f77afaacd 382 NVIC_DisableIRQ(ADC_IRQn); // If ADC DMA is used, the ADC interrupt must be disabled
steniu01 0:9b2f77afaacd 383
steniu01 0:9b2f77afaacd 384 LPC_UART0->FCR |= 1<<3 ; //Enable UART DMA mode
steniu01 0:9b2f77afaacd 385 LPC_UART0->LCR &= ~(1<<3); // No parity bit genrated
steniu01 0:9b2f77afaacd 386
steniu01 0:9b2f77afaacd 387 DMA dma4(4);
steniu01 0:9b2f77afaacd 388 dma4.source(&(LPC_ADC->ADDR4),0, 32);
steniu01 0:9b2f77afaacd 389 dma4.destination(&(LPC_UART0->THR),0,8);
steniu01 0:9b2f77afaacd 390 // dma4.destination(dst3, 0, 32);
steniu01 0:9b2f77afaacd 391 dma4.TriggerSource(_ADC);
steniu01 0:9b2f77afaacd 392 dma4.TriggerDestination(_UART0_TX);
steniu01 0:9b2f77afaacd 393 dma4.attach_TC(led_switchon_p2p);
steniu01 0:9b2f77afaacd 394
steniu01 0:9b2f77afaacd 395 while (1)
steniu01 0:9b2f77afaacd 396 {
steniu01 0:9b2f77afaacd 397 LPC_ADC->ADCR |= 1 << 24;// start the conversion now
steniu01 0:9b2f77afaacd 398 dma4.start(1);
steniu01 1:5b946b818a29 399 wait (3);
steniu01 0:9b2f77afaacd 400 }
steniu01 0:9b2f77afaacd 401
steniu01 0:9b2f77afaacd 402
steniu01 0:9b2f77afaacd 403 pc.printf("\nFinish!\r\n");
steniu01 0:9b2f77afaacd 404 #endif
steniu01 0:9b2f77afaacd 405
steniu01 0:9b2f77afaacd 406
steniu01 0:9b2f77afaacd 407
steniu01 0:9b2f77afaacd 408 #if test_all
steniu01 0:9b2f77afaacd 409
steniu01 0:9b2f77afaacd 410 DMA dma1 (1) ;
steniu01 0:9b2f77afaacd 411 DMA dma2 (2);
steniu01 0:9b2f77afaacd 412 DMA dma3 (3);
steniu01 0:9b2f77afaacd 413
steniu01 0:9b2f77afaacd 414 size_t size1 = sizeof (src);
steniu01 0:9b2f77afaacd 415 char *dst1 = (char *) malloc(size1);
steniu01 0:9b2f77afaacd 416 dma1.source (src,1); // set source as incremental. Not need to set the transfer width as MBED dma will do it for you.
steniu01 0:9b2f77afaacd 417 dma1.destination (dst1, 1);
steniu01 0:9b2f77afaacd 418 dma1.attach_TC(led_switchon_m2m) ;
steniu01 0:9b2f77afaacd 419 dma1.attach_Err (IRQ_err);
steniu01 0:9b2f77afaacd 420
steniu01 0:9b2f77afaacd 421
steniu01 0:9b2f77afaacd 422 size_t size2 = sizeof (src);
steniu01 0:9b2f77afaacd 423 pc.printf("the size is %d",size2);
steniu01 0:9b2f77afaacd 424 wait(1);
steniu01 0:9b2f77afaacd 425 LPC_UART0->FCR |= 1<<3 ; //Enable UART DMA mode
steniu01 0:9b2f77afaacd 426 LPC_UART0->LCR &= ~(1<<3); // No parity bit genrated
steniu01 0:9b2f77afaacd 427 dma2.destination(&(LPC_UART0->THR),0, sizeof(char)*8);
steniu01 0:9b2f77afaacd 428 dma2.source(src,1, sizeof(char)*8);
steniu01 0:9b2f77afaacd 429 dma2.TriggerDestination(_UART0_TX);
steniu01 0:9b2f77afaacd 430 dma2.attach_TC(led_switchon_m2p);// m2p_finishFlag will be set when FINISH interrupt generated
steniu01 0:9b2f77afaacd 431 dma2.attach_Err (IRQ_err);
steniu01 0:9b2f77afaacd 432
steniu01 0:9b2f77afaacd 433
steniu01 0:9b2f77afaacd 434 volatile unsigned int data = 0;
steniu01 0:9b2f77afaacd 435 volatile int *dst3 = (int *) malloc(128);
steniu01 0:9b2f77afaacd 436 ADC_init();
steniu01 0:9b2f77afaacd 437 NVIC_DisableIRQ(ADC_IRQn); // If ADC DMA is used, the ADC interrupt must be disabled
steniu01 0:9b2f77afaacd 438 dma3.destination(dst3, 1, 32); // Some sample codes show it should be half-word as only low 16bit contains the data.
steniu01 0:9b2f77afaacd 439 // But I think it should be 32 as the reigster is 32-bit width
steniu01 0:9b2f77afaacd 440 dma3.source(&(LPC_ADC->ADDR0),0, 32);
steniu01 0:9b2f77afaacd 441 dma3.TriggerSource(_ADC);
steniu01 0:9b2f77afaacd 442 dma3.attach_TC(led_switchon_p2m);
steniu01 0:9b2f77afaacd 443 dma3.attach_Err (IRQ_err);
steniu01 0:9b2f77afaacd 444
steniu01 0:9b2f77afaacd 445
steniu01 0:9b2f77afaacd 446 dma1.start(size1);
steniu01 0:9b2f77afaacd 447 dma2.start(size2);
steniu01 0:9b2f77afaacd 448 dma3.start(32);
steniu01 0:9b2f77afaacd 449
steniu01 0:9b2f77afaacd 450 #endif
steniu01 0:9b2f77afaacd 451
steniu01 0:9b2f77afaacd 452 while (1);
steniu01 0:9b2f77afaacd 453 return 0;
steniu01 0:9b2f77afaacd 454 }
steniu01 0:9b2f77afaacd 455
steniu01 0:9b2f77afaacd 456
steniu01 0:9b2f77afaacd 457 void ADC_init()
steniu01 0:9b2f77afaacd 458 {
steniu01 0:9b2f77afaacd 459 // ensure power is turned on
steniu01 0:9b2f77afaacd 460 LPC_SC->PCONP |= (1 << 12);
steniu01 0:9b2f77afaacd 461
steniu01 0:9b2f77afaacd 462 // set PCLK of ADC to 1
steniu01 0:9b2f77afaacd 463 LPC_SC->PCLKSEL0 &= ~(0x3 << 24);
steniu01 0:9b2f77afaacd 464 LPC_SC->PCLKSEL0 |= 1<<24;
steniu01 0:9b2f77afaacd 465
steniu01 0:9b2f77afaacd 466 // select PIN 14, ADC 0.0
steniu01 0:9b2f77afaacd 467 LPC_PINCON->PINSEL1 &= (uint32_t) ~(0x3 << 14);
steniu01 0:9b2f77afaacd 468 LPC_PINCON->PINSEL1 |= 0x1 << 14;
steniu01 0:9b2f77afaacd 469
steniu01 0:9b2f77afaacd 470 // PIN14 no pull-up, no pull-down
steniu01 0:9b2f77afaacd 471 LPC_PINCON->PINMODE2 |= 0x2 << 28;
steniu01 0:9b2f77afaacd 472
steniu01 0:9b2f77afaacd 473 // ADC conversion not start yet
steniu01 0:9b2f77afaacd 474 LPC_ADC->ADCR &= ~ (1 << 24);
steniu01 0:9b2f77afaacd 475
steniu01 0:9b2f77afaacd 476 // the global DONE flat in ADDR must be disabled to generate an interrupt
steniu01 0:9b2f77afaacd 477 LPC_ADC->ADINTEN &= ~(1<<8);
steniu01 0:9b2f77afaacd 478 LPC_ADC->ADINTEN = 0x1;
steniu01 0:9b2f77afaacd 479
steniu01 0:9b2f77afaacd 480 LPC_ADC->ADCR = (uint32_t) ((1 << 21) // ADC is operational
steniu01 0:9b2f77afaacd 481 | (1 << 8) // APB clock is divided by 1
steniu01 0:9b2f77afaacd 482 | 0x01); // Select AD0.0 to be sampled and converted
steniu01 0:9b2f77afaacd 483
steniu01 0:9b2f77afaacd 484
steniu01 0:9b2f77afaacd 485 LPC_ADC->ADCR |= 1 << 16 ; // BURST mode
steniu01 0:9b2f77afaacd 486
steniu01 0:9b2f77afaacd 487 }
steniu01 0:9b2f77afaacd 488
steniu01 0:9b2f77afaacd 489 void led_switchon_m2m(void)
steniu01 0:9b2f77afaacd 490 {
steniu01 0:9b2f77afaacd 491 myled1=1;
steniu01 0:9b2f77afaacd 492 }
steniu01 0:9b2f77afaacd 493
steniu01 0:9b2f77afaacd 494 void led_switchon_m2p(void)
steniu01 0:9b2f77afaacd 495 {
steniu01 0:9b2f77afaacd 496 m2p_finishFlag = 1;
steniu01 0:9b2f77afaacd 497 myled2=1;
steniu01 0:9b2f77afaacd 498 }
steniu01 0:9b2f77afaacd 499
steniu01 0:9b2f77afaacd 500 void led_switchon_p2m(void)
steniu01 0:9b2f77afaacd 501 {
steniu01 0:9b2f77afaacd 502 myled3=1;
steniu01 0:9b2f77afaacd 503 }
steniu01 0:9b2f77afaacd 504
steniu01 0:9b2f77afaacd 505 void led_switchon_p2p(void)
steniu01 0:9b2f77afaacd 506 {
steniu01 0:9b2f77afaacd 507 myled4=1;
steniu01 0:9b2f77afaacd 508 }
steniu01 0:9b2f77afaacd 509
steniu01 0:9b2f77afaacd 510 void IRQ_err (void)
steniu01 0:9b2f77afaacd 511 {
steniu01 0:9b2f77afaacd 512 t.stop();
steniu01 0:9b2f77afaacd 513 pc.printf("The time DMA took was %f seconds\r\n", t.read());
steniu01 0:9b2f77afaacd 514 myled1 = 0;
steniu01 0:9b2f77afaacd 515 myled2 = 0;
steniu01 0:9b2f77afaacd 516 myled3 = 0;
steniu01 0:9b2f77afaacd 517 myled4 = 0;
steniu01 0:9b2f77afaacd 518 wait (0.5);
steniu01 0:9b2f77afaacd 519 pc.printf ("\r\n");
steniu01 0:9b2f77afaacd 520 pc.printf ("Error Interrupt happens\r\n");
steniu01 0:9b2f77afaacd 521 }
steniu01 0:9b2f77afaacd 522
steniu01 0:9b2f77afaacd 523
steniu01 0:9b2f77afaacd 524 static inline int div_round_up(int x, int y)
steniu01 0:9b2f77afaacd 525 {
steniu01 0:9b2f77afaacd 526 return (x + (y - 1)) / y;
steniu01 0:9b2f77afaacd 527 }
steniu01 0:9b2f77afaacd 528 void old_ADC_init()
steniu01 0:9b2f77afaacd 529 {
steniu01 0:9b2f77afaacd 530 // ensure power is turned on
steniu01 0:9b2f77afaacd 531 LPC_SC->PCONP |= (1 << 12);
steniu01 0:9b2f77afaacd 532
steniu01 0:9b2f77afaacd 533 /* p19 pin is set to ADC input.*/
steniu01 0:9b2f77afaacd 534 LPC_PINCON->PINSEL3 |= 0x30000000;
steniu01 0:9b2f77afaacd 535 /* no pull-up, no pull-down */
steniu01 0:9b2f77afaacd 536 LPC_PINCON->PINMODE3 |= 0x20000000;
steniu01 0:9b2f77afaacd 537
steniu01 0:9b2f77afaacd 538 // set PCLK of ADC to 1
steniu01 0:9b2f77afaacd 539 LPC_SC->PCLKSEL0 &= ~(0x3 << 24);
steniu01 0:9b2f77afaacd 540 LPC_SC->PCLKSEL0 |= (0x1 << 24);
steniu01 0:9b2f77afaacd 541 uint32_t PCLK = SystemCoreClock;
steniu01 0:9b2f77afaacd 542
steniu01 0:9b2f77afaacd 543 // calculate minimum clock divider
steniu01 0:9b2f77afaacd 544 // clkdiv = divider - 1
steniu01 0:9b2f77afaacd 545 uint32_t MAX_ADC_CLK = 13000000;
steniu01 0:9b2f77afaacd 546 uint32_t clkdiv = div_round_up(PCLK, MAX_ADC_CLK) - 1;
steniu01 0:9b2f77afaacd 547
steniu01 0:9b2f77afaacd 548
steniu01 0:9b2f77afaacd 549 LPC_ADC->ADCR &= ~(1 << 0) // SEL: 0 = no channels selected
steniu01 0:9b2f77afaacd 550 & ~ (1 << 16) // No BURST mode
steniu01 0:9b2f77afaacd 551 & ~(1 << 17) // CLKS: not applicable
steniu01 0:9b2f77afaacd 552 & ~(1 << 24); // ADC conversion not start yet
steniu01 0:9b2f77afaacd 553
steniu01 0:9b2f77afaacd 554
steniu01 0:9b2f77afaacd 555 LPC_ADC->ADINTEN = 1 <<8;
steniu01 0:9b2f77afaacd 556 // Set the generic software-controlled ADC settings
steniu01 0:9b2f77afaacd 557 LPC_ADC->ADCR |= ( 24 << 8) // CLKDIV: PCLK max ~= 25MHz, /25 to give safe 1MHz at fastest
steniu01 0:9b2f77afaacd 558 | (1 << 21) ; // PDN: 1 = operational
steniu01 0:9b2f77afaacd 559
steniu01 0:9b2f77afaacd 560
steniu01 0:9b2f77afaacd 561 // Select the channel 4
steniu01 0:9b2f77afaacd 562 LPC_ADC->ADCR |= 1 << 4;
steniu01 0:9b2f77afaacd 563 // Start conversionf
steniu01 0:9b2f77afaacd 564 LPC_ADC->ADCR |= 1 << 24;
steniu01 0:9b2f77afaacd 565 }
steniu01 0:9b2f77afaacd 566
steniu01 0:9b2f77afaacd 567 void burst_ADC_init()
steniu01 0:9b2f77afaacd 568 {
steniu01 0:9b2f77afaacd 569 // ensure power is turned on
steniu01 0:9b2f77afaacd 570 LPC_SC->PCONP |= (1 << 12);
steniu01 0:9b2f77afaacd 571
steniu01 0:9b2f77afaacd 572 /* p19 pin is set to ADC input.*/
steniu01 0:9b2f77afaacd 573 LPC_PINCON->PINSEL3 |= 0x30000000;
steniu01 0:9b2f77afaacd 574 /* no pull-up, no pull-down */
steniu01 0:9b2f77afaacd 575 LPC_PINCON->PINMODE3 |= 0x20000000;
steniu01 0:9b2f77afaacd 576
steniu01 0:9b2f77afaacd 577 // set PCLK of ADC to 1
steniu01 0:9b2f77afaacd 578 LPC_SC->PCLKSEL0 &= ~(0x3 << 24);
steniu01 0:9b2f77afaacd 579 LPC_SC->PCLKSEL0 |= (0x1 << 24);
steniu01 0:9b2f77afaacd 580 uint32_t PCLK = SystemCoreClock;
steniu01 0:9b2f77afaacd 581
steniu01 0:9b2f77afaacd 582 // calculate minimum clock divider
steniu01 0:9b2f77afaacd 583 // clkdiv = divider - 1
steniu01 0:9b2f77afaacd 584 uint32_t MAX_ADC_CLK = 13000000;
steniu01 0:9b2f77afaacd 585 uint32_t clkdiv = div_round_up(40000, MAX_ADC_CLK) - 1;
steniu01 0:9b2f77afaacd 586
steniu01 0:9b2f77afaacd 587
steniu01 0:9b2f77afaacd 588 LPC_ADC->ADCR &= ~(1 << 0) // SEL: 0 = no channels selected
steniu01 0:9b2f77afaacd 589 & ~(1 << 17) // CLKS: not applicable
steniu01 0:9b2f77afaacd 590 & ~(1 << 24); // ADC conversion not start yet
steniu01 0:9b2f77afaacd 591
steniu01 0:9b2f77afaacd 592 // ADGINTEN must be set to 0 in burst mode
steniu01 0:9b2f77afaacd 593 LPC_ADC->ADINTEN &= ~(1<<8);
steniu01 0:9b2f77afaacd 594 // Set the generic software-controlled ADC settings
steniu01 0:9b2f77afaacd 595 LPC_ADC->ADCR |= (clkdiv << 8) // CLKDIV: PCLK max ~= 25MHz, /25 to give safe 1MHz at fastest
steniu01 0:9b2f77afaacd 596 | (1 << 16) // Burst mode
steniu01 0:9b2f77afaacd 597 | (1 << 21) ; // PDN: 1 = operational
steniu01 0:9b2f77afaacd 598
steniu01 0:9b2f77afaacd 599
steniu01 0:9b2f77afaacd 600 // Select the channel 4
steniu01 0:9b2f77afaacd 601 LPC_ADC->ADCR |= 1 << 4;
steniu01 0:9b2f77afaacd 602 // Start conversion
steniu01 0:9b2f77afaacd 603 LPC_ADC->ADCR |= 1 << 24;
steniu01 0:9b2f77afaacd 604 }
steniu01 0:9b2f77afaacd 605
steniu01 0:9b2f77afaacd 606
steniu01 0:9b2f77afaacd 607 uint32_t ADC_read(uint8_t channel)
steniu01 0:9b2f77afaacd 608 {
steniu01 0:9b2f77afaacd 609 // Select the appropriate channel and start conversion
steniu01 0:9b2f77afaacd 610 LPC_ADC->ADCR &= ~0xFF;
steniu01 0:9b2f77afaacd 611 LPC_ADC->ADCR |= 1 << channel;
steniu01 0:9b2f77afaacd 612 LPC_ADC->ADCR |= 1 << 24;
steniu01 0:9b2f77afaacd 613 // Repeatedly get the sample data until DONE bit
steniu01 0:9b2f77afaacd 614 unsigned int data;
steniu01 0:9b2f77afaacd 615
steniu01 0:9b2f77afaacd 616 do {
steniu01 0:9b2f77afaacd 617 data = LPC_ADC->ADGDR;
steniu01 0:9b2f77afaacd 618 } while ((data & ((unsigned int)1 << 31)) == 0);
steniu01 0:9b2f77afaacd 619 // Stop conversion
steniu01 0:9b2f77afaacd 620 LPC_ADC->ADCR &= ~(1 << 24);
steniu01 0:9b2f77afaacd 621 return (data >> 4) & 0xfff; // 12 bit
steniu01 1:5b946b818a29 622 }