Stanly Chen / DMX

Add support new target MCU: LPC1114FN28 or LPC11XX

Fork of DMX by Suga koubou

DMX.cpp@1:f0d988e15810, 2012-07-12 (annotated)

Committer:
okini3939
Date:
Thu Jul 12 14:57:09 2012 +0000
Revision:
1:f0d988e15810
Parent:
0:cbff6bf41542
Child:
2:d7677060f8eb
use uart rbr

Who changed what in which revision?

UserRevisionLine numberNew contents of line
okini3939 0:cbff6bf41542 1 /*
okini3939 0:cbff6bf41542 2 * DMX512 send/recv library
okini3939 0:cbff6bf41542 3 * Copyright (c) 2011 Hiroshi Suga
okini3939 0:cbff6bf41542 4 * Released under the MIT License: http://mbed.org/license/mit
okini3939 0:cbff6bf41542 5 */
okini3939 0:cbff6bf41542 6
okini3939 0:cbff6bf41542 7 /** @file DMX.cpp
okini3939 0:cbff6bf41542 8 * @brief DMX512 send/recv
okini3939 0:cbff6bf41542 9 */
okini3939 0:cbff6bf41542 10
okini3939 0:cbff6bf41542 11 #include "mbed.h"
okini3939 0:cbff6bf41542 12 #include "DMX.h"
okini3939 0:cbff6bf41542 13
okini3939 0:cbff6bf41542 14 DMX::DMX (PinName p_tx, PinName p_rx) : dmx(p_tx, p_rx) {
okini3939 0:cbff6bf41542 15 int i;
okini3939 0:cbff6bf41542 16
okini3939 0:cbff6bf41542 17 for (i = 0; i < DMX_SIZE; i ++) {
okini3939 0:cbff6bf41542 18 data_tx[i] = 0;
okini3939 0:cbff6bf41542 19 data_rx[i] = 0;
okini3939 0:cbff6bf41542 20 }
okini3939 0:cbff6bf41542 21 mode_tx = DMX_MODE_BEGIN;
okini3939 0:cbff6bf41542 22 mode_rx = DMX_MODE_BEGIN;
okini3939 0:cbff6bf41542 23 is_recived = 0;
okini3939 0:cbff6bf41542 24 is_sent = 0;
okini3939 0:cbff6bf41542 25
okini3939 0:cbff6bf41542 26 if (p_tx == p9) {
okini3939 0:cbff6bf41542 27 uart_lcr = &LPC_UART3->LCR;
okini3939 0:cbff6bf41542 28 uart_thr = &LPC_UART3->THR;
okini3939 0:cbff6bf41542 29 } else
okini3939 0:cbff6bf41542 30 if (p_tx == p13) {
okini3939 0:cbff6bf41542 31 uart_lcr = &LPC_UART1->LCR;
okini3939 0:cbff6bf41542 32 uart_thr = &LPC_UART1->THR;
okini3939 0:cbff6bf41542 33 } else
okini3939 0:cbff6bf41542 34 if (p_tx == p28) {
okini3939 0:cbff6bf41542 35 uart_lcr = &LPC_UART2->LCR;
okini3939 0:cbff6bf41542 36 uart_thr = &LPC_UART2->THR;
okini3939 0:cbff6bf41542 37 }
okini3939 0:cbff6bf41542 38 if (p_rx == p10) {
okini3939 0:cbff6bf41542 39 uart_lsr = &LPC_UART3->LSR;
okini3939 0:cbff6bf41542 40 uart_rbr = &LPC_UART3->RBR;
okini3939 0:cbff6bf41542 41 NVIC_SetPriority(UART3_IRQn, 1);
okini3939 0:cbff6bf41542 42 } else
okini3939 0:cbff6bf41542 43 if (p_rx == p14) {
okini3939 0:cbff6bf41542 44 uart_lsr = &LPC_UART1->LSR;
okini3939 0:cbff6bf41542 45 uart_rbr = &LPC_UART1->RBR;
okini3939 0:cbff6bf41542 46 NVIC_SetPriority(UART1_IRQn, 1);
okini3939 0:cbff6bf41542 47 } else
okini3939 0:cbff6bf41542 48 if (p_rx == p27) {
okini3939 0:cbff6bf41542 49 uart_lsr = &LPC_UART2->LSR;
okini3939 0:cbff6bf41542 50 uart_rbr = &LPC_UART2->RBR;
okini3939 0:cbff6bf41542 51 NVIC_SetPriority(UART2_IRQn, 1);
okini3939 0:cbff6bf41542 52 }
okini3939 0:cbff6bf41542 53
okini3939 0:cbff6bf41542 54 dmx.baud(250000);
okini3939 0:cbff6bf41542 55 dmx.format(8, Serial::None, 2);
okini3939 0:cbff6bf41542 56 dmx.attach(this, &DMX::int_rx, Serial::RxIrq);
okini3939 0:cbff6bf41542 57
okini3939 0:cbff6bf41542 58 timeout01.attach_us(this, &DMX::int_timer, DMX_TIME_BETWEEN);
okini3939 0:cbff6bf41542 59 }
okini3939 0:cbff6bf41542 60
okini3939 0:cbff6bf41542 61 void DMX::put (int ch, int data) {
okini3939 0:cbff6bf41542 62 data_tx[ch] = data;
okini3939 0:cbff6bf41542 63 }
okini3939 0:cbff6bf41542 64
okini3939 0:cbff6bf41542 65 int DMX::get (int ch) {
okini3939 0:cbff6bf41542 66 return data_rx[ch];
okini3939 0:cbff6bf41542 67 }
okini3939 0:cbff6bf41542 68
okini3939 0:cbff6bf41542 69 void DMX::int_timer () {
okini3939 0:cbff6bf41542 70
okini3939 0:cbff6bf41542 71 switch (mode_tx) {
okini3939 0:cbff6bf41542 72 case DMX_MODE_BEGIN:
okini3939 0:cbff6bf41542 73 // Break Time
okini3939 0:cbff6bf41542 74 timeout01.detach();
okini3939 0:cbff6bf41542 75 *uart_lcr |= (1 << 6);
okini3939 0:cbff6bf41542 76 mode_tx = DMX_MODE_BREAK;
okini3939 0:cbff6bf41542 77 timeout01.attach_us(this, &DMX::int_timer, DMX_TIME_BREAK);
okini3939 0:cbff6bf41542 78 break;
okini3939 0:cbff6bf41542 79
okini3939 0:cbff6bf41542 80 case DMX_MODE_BREAK:
okini3939 0:cbff6bf41542 81 // Mark After Break
okini3939 0:cbff6bf41542 82 timeout01.detach();
okini3939 0:cbff6bf41542 83 *uart_lcr &= ~(1 << 6);
okini3939 0:cbff6bf41542 84 mode_tx = DMX_MODE_MAB;
okini3939 0:cbff6bf41542 85 timeout01.attach_us(this, &DMX::int_timer, DMX_TIME_MAB);
okini3939 0:cbff6bf41542 86 break;
okini3939 0:cbff6bf41542 87
okini3939 0:cbff6bf41542 88 case DMX_MODE_MAB:
okini3939 0:cbff6bf41542 89 // Start code
okini3939 0:cbff6bf41542 90 timeout01.detach();
okini3939 0:cbff6bf41542 91 addr_tx = 0;
okini3939 0:cbff6bf41542 92 mode_tx = DMX_MODE_DATA;
okini3939 0:cbff6bf41542 93 dmx.attach(this, &DMX::int_tx, Serial::TxIrq);
okini3939 0:cbff6bf41542 94 dmx.putc(0);
okini3939 0:cbff6bf41542 95 break;
okini3939 0:cbff6bf41542 96 }
okini3939 0:cbff6bf41542 97 }
okini3939 0:cbff6bf41542 98
okini3939 0:cbff6bf41542 99 void DMX::int_tx () {
okini3939 0:cbff6bf41542 100 // Data
okini3939 0:cbff6bf41542 101 if (mode_tx == DMX_MODE_DATA) {
okini3939 0:cbff6bf41542 102 if (addr_tx < DMX_SIZE) {
okini3939 1:f0d988e15810 103 #ifdef DMX_UART_DIRECT
okini3939 0:cbff6bf41542 104 *uart_thr = (uint8_t)data_tx[addr_tx];
okini3939 0:cbff6bf41542 105 #else
okini3939 0:cbff6bf41542 106 dmx.putc(data_tx[addr_tx]);
okini3939 0:cbff6bf41542 107 #endif
okini3939 0:cbff6bf41542 108 addr_tx ++;
okini3939 0:cbff6bf41542 109 } else {
okini3939 0:cbff6bf41542 110 dmx.attach(0, Serial::TxIrq);
okini3939 0:cbff6bf41542 111 mode_tx = DMX_MODE_BEGIN;
okini3939 0:cbff6bf41542 112 is_sent = 1;
okini3939 0:cbff6bf41542 113 timeout01.attach_us(this, &DMX::int_timer, DMX_TIME_BETWEEN);
okini3939 0:cbff6bf41542 114 }
okini3939 0:cbff6bf41542 115 }
okini3939 0:cbff6bf41542 116 }
okini3939 0:cbff6bf41542 117
okini3939 0:cbff6bf41542 118 void DMX::int_rx () {
okini3939 0:cbff6bf41542 119 int flg, dat;
okini3939 0:cbff6bf41542 120
okini3939 0:cbff6bf41542 121 flg = *uart_lsr;
okini3939 1:f0d988e15810 122 #ifdef DMX_UART_DIRECT
okini3939 1:f0d988e15810 123 dat = *uart_rbr;
okini3939 1:f0d988e15810 124 #else
okini3939 0:cbff6bf41542 125 dat = dmx.getc();
okini3939 1:f0d988e15810 126 #endif
okini3939 0:cbff6bf41542 127
okini3939 0:cbff6bf41542 128 if (flg & ((1 << 7)|(1 << 3)|(1 << 4))) {
okini3939 0:cbff6bf41542 129 // Break Time
okini3939 0:cbff6bf41542 130 if (addr_rx > 0) {
okini3939 0:cbff6bf41542 131 is_recived = 1;
okini3939 0:cbff6bf41542 132 }
okini3939 0:cbff6bf41542 133 mode_rx = DMX_MODE_BREAK;
okini3939 0:cbff6bf41542 134 return;
okini3939 0:cbff6bf41542 135 }
okini3939 0:cbff6bf41542 136
okini3939 0:cbff6bf41542 137 if (mode_rx == DMX_MODE_BREAK) {
okini3939 0:cbff6bf41542 138
okini3939 0:cbff6bf41542 139 // Start Code
okini3939 0:cbff6bf41542 140 if (dat == 0) {
okini3939 0:cbff6bf41542 141 addr_rx = 0;
okini3939 0:cbff6bf41542 142 mode_rx = DMX_MODE_DATA;
okini3939 0:cbff6bf41542 143 } else {
okini3939 0:cbff6bf41542 144 mode_rx = DMX_MODE_ERROR;
okini3939 0:cbff6bf41542 145 }
okini3939 0:cbff6bf41542 146
okini3939 0:cbff6bf41542 147 } else
okini3939 0:cbff6bf41542 148 if (mode_rx == DMX_MODE_DATA) {
okini3939 0:cbff6bf41542 149
okini3939 0:cbff6bf41542 150 // Data
okini3939 0:cbff6bf41542 151 data_rx[addr_rx] = dat;
okini3939 0:cbff6bf41542 152 addr_rx ++;
okini3939 0:cbff6bf41542 153
okini3939 0:cbff6bf41542 154 if (addr_rx >= DMX_SIZE) {
okini3939 0:cbff6bf41542 155 is_recived = 1;
okini3939 0:cbff6bf41542 156 mode_rx = DMX_MODE_BEGIN;
okini3939 0:cbff6bf41542 157 }
okini3939 0:cbff6bf41542 158 }
okini3939 0:cbff6bf41542 159 }
okini3939 0:cbff6bf41542 160