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LPC_DMA_T Struct Reference
[CHIP: LPC11u6x DMA Controller driver]
DMA Controller register block structure. More...
#include <dma_11u6x.h>
Data Fields | |
| __IO uint32_t | CTRL |
| __I uint32_t | INTSTAT |
| __IO uint32_t | SRAMBASE |
| LPC_DMA_COMMON_T | DMACOMMON [1] |
| LPC_DMA_CHANNEL_T | DMACH [MAX_DMA_CHANNEL] |
Detailed Description
DMA Controller register block structure.
Definition at line 95 of file dma_11u6x.h.
Field Documentation
| __IO uint32_t CTRL |
< DMA Structure DMA control register
Definition at line 96 of file dma_11u6x.h.
| LPC_DMA_CHANNEL_T DMACH[MAX_DMA_CHANNEL] |
DMA channel registers
Definition at line 102 of file dma_11u6x.h.
DMA shared channel (common) registers
Definition at line 100 of file dma_11u6x.h.
| __I uint32_t INTSTAT |
DMA Interrupt status register
Definition at line 97 of file dma_11u6x.h.
| __IO uint32_t SRAMBASE |
DMA SRAM address of the channel configuration table
Definition at line 98 of file dma_11u6x.h.
Generated on Tue Jul 12 2022 21:03:53 by
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