Freeman Oldman / NUCLEO_STM32F401RE_CC3000_ILI9341

The code from https://github.com/vpcola/Nucleo

mbed-rtos/rtx/HAL_CM.c@0:5464d5e415e5, 2014-10-08 (annotated)

Committer:
sinrab
Date:
Wed Oct 08 11:00:24 2014 +0000
Revision:
0:5464d5e415e5
The code from https://github.com/vpcola/Nucleo

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sinrab 0:5464d5e415e5 1 /*----------------------------------------------------------------------------
sinrab 0:5464d5e415e5 2 * RL-ARM - RTX
sinrab 0:5464d5e415e5 3 *----------------------------------------------------------------------------
sinrab 0:5464d5e415e5 4 * Name: HAL_CM.C
sinrab 0:5464d5e415e5 5 * Purpose: Hardware Abstraction Layer for Cortex-M
sinrab 0:5464d5e415e5 6 * Rev.: V4.60
sinrab 0:5464d5e415e5 7 *----------------------------------------------------------------------------
sinrab 0:5464d5e415e5 8 *
sinrab 0:5464d5e415e5 9 * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
sinrab 0:5464d5e415e5 10 * All rights reserved.
sinrab 0:5464d5e415e5 11 * Redistribution and use in source and binary forms, with or without
sinrab 0:5464d5e415e5 12 * modification, are permitted provided that the following conditions are met:
sinrab 0:5464d5e415e5 13 * - Redistributions of source code must retain the above copyright
sinrab 0:5464d5e415e5 14 * notice, this list of conditions and the following disclaimer.
sinrab 0:5464d5e415e5 15 * - Redistributions in binary form must reproduce the above copyright
sinrab 0:5464d5e415e5 16 * notice, this list of conditions and the following disclaimer in the
sinrab 0:5464d5e415e5 17 * documentation and/or other materials provided with the distribution.
sinrab 0:5464d5e415e5 18 * - Neither the name of ARM nor the names of its contributors may be used
sinrab 0:5464d5e415e5 19 * to endorse or promote products derived from this software without
sinrab 0:5464d5e415e5 20 * specific prior written permission.
sinrab 0:5464d5e415e5 21 *
sinrab 0:5464d5e415e5 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sinrab 0:5464d5e415e5 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sinrab 0:5464d5e415e5 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
sinrab 0:5464d5e415e5 25 * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
sinrab 0:5464d5e415e5 26 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
sinrab 0:5464d5e415e5 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
sinrab 0:5464d5e415e5 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
sinrab 0:5464d5e415e5 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
sinrab 0:5464d5e415e5 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
sinrab 0:5464d5e415e5 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
sinrab 0:5464d5e415e5 32 * POSSIBILITY OF SUCH DAMAGE.
sinrab 0:5464d5e415e5 33 *---------------------------------------------------------------------------*/
sinrab 0:5464d5e415e5 34
sinrab 0:5464d5e415e5 35 #include "rt_TypeDef.h"
sinrab 0:5464d5e415e5 36 #include "RTX_Conf.h"
sinrab 0:5464d5e415e5 37 #include "rt_HAL_CM.h"
sinrab 0:5464d5e415e5 38
sinrab 0:5464d5e415e5 39
sinrab 0:5464d5e415e5 40 /*----------------------------------------------------------------------------
sinrab 0:5464d5e415e5 41 * Global Variables
sinrab 0:5464d5e415e5 42 *---------------------------------------------------------------------------*/
sinrab 0:5464d5e415e5 43
sinrab 0:5464d5e415e5 44 #ifdef DBG_MSG
sinrab 0:5464d5e415e5 45 BIT dbg_msg;
sinrab 0:5464d5e415e5 46 #endif
sinrab 0:5464d5e415e5 47
sinrab 0:5464d5e415e5 48 /*----------------------------------------------------------------------------
sinrab 0:5464d5e415e5 49 * Functions
sinrab 0:5464d5e415e5 50 *---------------------------------------------------------------------------*/
sinrab 0:5464d5e415e5 51
sinrab 0:5464d5e415e5 52
sinrab 0:5464d5e415e5 53 /*--------------------------- rt_init_stack ---------------------------------*/
sinrab 0:5464d5e415e5 54
sinrab 0:5464d5e415e5 55 void rt_init_stack (P_TCB p_TCB, FUNCP task_body) {
sinrab 0:5464d5e415e5 56 /* Prepare TCB and saved context for a first time start of a task. */
sinrab 0:5464d5e415e5 57 U32 *stk,i,size;
sinrab 0:5464d5e415e5 58
sinrab 0:5464d5e415e5 59 /* Prepare a complete interrupt frame for first task start */
sinrab 0:5464d5e415e5 60 size = p_TCB->priv_stack >> 2;
sinrab 0:5464d5e415e5 61
sinrab 0:5464d5e415e5 62 /* Write to the top of stack. */
sinrab 0:5464d5e415e5 63 stk = &p_TCB->stack[size];
sinrab 0:5464d5e415e5 64
sinrab 0:5464d5e415e5 65 /* Auto correct to 8-byte ARM stack alignment. */
sinrab 0:5464d5e415e5 66 if ((U32)stk & 0x04) {
sinrab 0:5464d5e415e5 67 stk--;
sinrab 0:5464d5e415e5 68 }
sinrab 0:5464d5e415e5 69
sinrab 0:5464d5e415e5 70 stk -= 16;
sinrab 0:5464d5e415e5 71
sinrab 0:5464d5e415e5 72 /* Default xPSR and initial PC */
sinrab 0:5464d5e415e5 73 stk[15] = INITIAL_xPSR;
sinrab 0:5464d5e415e5 74 stk[14] = (U32)task_body;
sinrab 0:5464d5e415e5 75
sinrab 0:5464d5e415e5 76 /* Clear R4-R11,R0-R3,R12,LR registers. */
sinrab 0:5464d5e415e5 77 for (i = 0; i < 14; i++) {
sinrab 0:5464d5e415e5 78 stk[i] = 0;
sinrab 0:5464d5e415e5 79 }
sinrab 0:5464d5e415e5 80
sinrab 0:5464d5e415e5 81 /* Assign a void pointer to R0. */
sinrab 0:5464d5e415e5 82 stk[8] = (U32)p_TCB->msg;
sinrab 0:5464d5e415e5 83
sinrab 0:5464d5e415e5 84 /* Initial Task stack pointer. */
sinrab 0:5464d5e415e5 85 p_TCB->tsk_stack = (U32)stk;
sinrab 0:5464d5e415e5 86
sinrab 0:5464d5e415e5 87 /* Task entry point. */
sinrab 0:5464d5e415e5 88 p_TCB->ptask = task_body;
sinrab 0:5464d5e415e5 89
sinrab 0:5464d5e415e5 90 /* Set a magic word for checking of stack overflow.
sinrab 0:5464d5e415e5 91 For the main thread (ID: 0x01) the stack is in a memory area shared with the
sinrab 0:5464d5e415e5 92 heap, therefore the last word of the stack is a moving target.
sinrab 0:5464d5e415e5 93 We want to do stack/heap collision detection instead.
sinrab 0:5464d5e415e5 94 */
sinrab 0:5464d5e415e5 95 if (p_TCB->task_id != 0x01)
sinrab 0:5464d5e415e5 96 p_TCB->stack[0] = MAGIC_WORD;
sinrab 0:5464d5e415e5 97 }
sinrab 0:5464d5e415e5 98
sinrab 0:5464d5e415e5 99
sinrab 0:5464d5e415e5 100 /*--------------------------- rt_ret_val ----------------------------------*/
sinrab 0:5464d5e415e5 101
sinrab 0:5464d5e415e5 102 static __inline U32 *rt_ret_regs (P_TCB p_TCB) {
sinrab 0:5464d5e415e5 103 /* Get pointer to task return value registers (R0..R3) in Stack */
sinrab 0:5464d5e415e5 104 #if (__TARGET_FPU_VFP)
sinrab 0:5464d5e415e5 105 if (p_TCB->stack_frame) {
sinrab 0:5464d5e415e5 106 /* Extended Stack Frame: R4-R11,S16-S31,R0-R3,R12,LR,PC,xPSR,S0-S15,FPSCR */
sinrab 0:5464d5e415e5 107 return (U32 *)(p_TCB->tsk_stack + 8*4 + 16*4);
sinrab 0:5464d5e415e5 108 } else {
sinrab 0:5464d5e415e5 109 /* Basic Stack Frame: R4-R11,R0-R3,R12,LR,PC,xPSR */
sinrab 0:5464d5e415e5 110 return (U32 *)(p_TCB->tsk_stack + 8*4);
sinrab 0:5464d5e415e5 111 }
sinrab 0:5464d5e415e5 112 #else
sinrab 0:5464d5e415e5 113 /* Stack Frame: R4-R11,R0-R3,R12,LR,PC,xPSR */
sinrab 0:5464d5e415e5 114 return (U32 *)(p_TCB->tsk_stack + 8*4);
sinrab 0:5464d5e415e5 115 #endif
sinrab 0:5464d5e415e5 116 }
sinrab 0:5464d5e415e5 117
sinrab 0:5464d5e415e5 118 void rt_ret_val (P_TCB p_TCB, U32 v0) {
sinrab 0:5464d5e415e5 119 U32 *ret;
sinrab 0:5464d5e415e5 120
sinrab 0:5464d5e415e5 121 ret = rt_ret_regs(p_TCB);
sinrab 0:5464d5e415e5 122 ret[0] = v0;
sinrab 0:5464d5e415e5 123 }
sinrab 0:5464d5e415e5 124
sinrab 0:5464d5e415e5 125 void rt_ret_val2(P_TCB p_TCB, U32 v0, U32 v1) {
sinrab 0:5464d5e415e5 126 U32 *ret;
sinrab 0:5464d5e415e5 127
sinrab 0:5464d5e415e5 128 ret = rt_ret_regs(p_TCB);
sinrab 0:5464d5e415e5 129 ret[0] = v0;
sinrab 0:5464d5e415e5 130 ret[1] = v1;
sinrab 0:5464d5e415e5 131 }
sinrab 0:5464d5e415e5 132
sinrab 0:5464d5e415e5 133
sinrab 0:5464d5e415e5 134 /*--------------------------- dbg_init --------------------------------------*/
sinrab 0:5464d5e415e5 135
sinrab 0:5464d5e415e5 136 #ifdef DBG_MSG
sinrab 0:5464d5e415e5 137 void dbg_init (void) {
sinrab 0:5464d5e415e5 138 if ((DEMCR & DEMCR_TRCENA) &&
sinrab 0:5464d5e415e5 139 (ITM_CONTROL & ITM_ITMENA) &&
sinrab 0:5464d5e415e5 140 (ITM_ENABLE & (1UL << 31))) {
sinrab 0:5464d5e415e5 141 dbg_msg = __TRUE;
sinrab 0:5464d5e415e5 142 }
sinrab 0:5464d5e415e5 143 }
sinrab 0:5464d5e415e5 144 #endif
sinrab 0:5464d5e415e5 145
sinrab 0:5464d5e415e5 146 /*--------------------------- dbg_task_notify -------------------------------*/
sinrab 0:5464d5e415e5 147
sinrab 0:5464d5e415e5 148 #ifdef DBG_MSG
sinrab 0:5464d5e415e5 149 void dbg_task_notify (P_TCB p_tcb, BOOL create) {
sinrab 0:5464d5e415e5 150 while (ITM_PORT31_U32 == 0);
sinrab 0:5464d5e415e5 151 ITM_PORT31_U32 = (U32)p_tcb->ptask;
sinrab 0:5464d5e415e5 152 while (ITM_PORT31_U32 == 0);
sinrab 0:5464d5e415e5 153 ITM_PORT31_U16 = (create << 8) | p_tcb->task_id;
sinrab 0:5464d5e415e5 154 }
sinrab 0:5464d5e415e5 155 #endif
sinrab 0:5464d5e415e5 156
sinrab 0:5464d5e415e5 157 /*--------------------------- dbg_task_switch -------------------------------*/
sinrab 0:5464d5e415e5 158
sinrab 0:5464d5e415e5 159 #ifdef DBG_MSG
sinrab 0:5464d5e415e5 160 void dbg_task_switch (U32 task_id) {
sinrab 0:5464d5e415e5 161 while (ITM_PORT31_U32 == 0);
sinrab 0:5464d5e415e5 162 ITM_PORT31_U8 = task_id;
sinrab 0:5464d5e415e5 163 }
sinrab 0:5464d5e415e5 164 #endif
sinrab 0:5464d5e415e5 165
sinrab 0:5464d5e415e5 166
sinrab 0:5464d5e415e5 167 /*----------------------------------------------------------------------------
sinrab 0:5464d5e415e5 168 * end of file
sinrab 0:5464d5e415e5 169 *---------------------------------------------------------------------------*/
sinrab 0:5464d5e415e5 170
sinrab 0:5464d5e415e5 171