Shivanand Gowda / S70FL01GS

Serial Peripheral Interface (SPI) Serial Single IO NOR Flash Memory Interfacing 1Gb

Dependents:   SPI_FLASH_MEM_1Gb

Fork of S25FL256S by Shivanand Gowda

S25FL256S.cpp@5:c2707c92ecb5, 2018-05-21 (annotated)

Committer:
shivanandgowdakr
Date:
Mon May 21 07:50:39 2018 +0000
Revision:
5:c2707c92ecb5
Parent:
4:8c463abb67d5 
SPI NOR Flash Single IO Nucleo F767ZI  Test Program;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
shivanandgowdakr 4:8c463abb67d5 1 // S25FL256S.cpp
shivanandgowdakr 4:8c463abb67d5 2
shivanandgowdakr 4:8c463abb67d5 3 #include"S25FL256S.h"
shivanandgowdakr 4:8c463abb67d5 4
shivanandgowdakr 4:8c463abb67d5 5 // CONSTRUCTOR
shivanandgowdakr 4:8c463abb67d5 6 S25FL256S::S25FL256S(PinName mosi, PinName miso, PinName sclk, PinName cs) : SPI(mosi, miso, sclk), _cs(cs)
shivanandgowdakr 4:8c463abb67d5 7 {
shivanandgowdakr 4:8c463abb67d5 8 this->format(SPI_NBIT, SPI_MODE);
shivanandgowdakr 4:8c463abb67d5 9 this->frequency(SPI_FREQ);
shivanandgowdakr 4:8c463abb67d5 10 chipDisable();
shivanandgowdakr 4:8c463abb67d5 11 }
shivanandgowdakr 4:8c463abb67d5 12 // READING
shivanandgowdakr 4:8c463abb67d5 13 int S25FL256S::readByte(int addr)
shivanandgowdakr 4:8c463abb67d5 14 {
shivanandgowdakr 4:8c463abb67d5 15 chipEnable();
shivanandgowdakr 4:8c463abb67d5 16 this->write(FOUR_READ);
shivanandgowdakr 4:8c463abb67d5 17 this->write((addr & ADDR_BMASK3) >> ADDR_BSHIFT3);
shivanandgowdakr 4:8c463abb67d5 18 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 4:8c463abb67d5 19 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 4:8c463abb67d5 20 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 4:8c463abb67d5 21 int response = this->write(DUMMY_ADDR);
shivanandgowdakr 4:8c463abb67d5 22 chipDisable();
shivanandgowdakr 4:8c463abb67d5 23 return response;
shivanandgowdakr 4:8c463abb67d5 24 }
shivanandgowdakr 4:8c463abb67d5 25
shivanandgowdakr 4:8c463abb67d5 26 void S25FL256S::readStream(int addr, char* buf, int count)
shivanandgowdakr 4:8c463abb67d5 27 {
shivanandgowdakr 4:8c463abb67d5 28 if (count < 1)
shivanandgowdakr 4:8c463abb67d5 29 return;
shivanandgowdakr 4:8c463abb67d5 30 chipEnable();
shivanandgowdakr 4:8c463abb67d5 31 this->write(FOUR_READ);
shivanandgowdakr 4:8c463abb67d5 32 this->write((addr & ADDR_BMASK3) >> ADDR_BSHIFT3);
shivanandgowdakr 4:8c463abb67d5 33 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 4:8c463abb67d5 34 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 4:8c463abb67d5 35 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 4:8c463abb67d5 36 for (int i = 0; i < count; i++) {
shivanandgowdakr 4:8c463abb67d5 37 buf[i] = this->write(DUMMY_ADDR);
shivanandgowdakr 4:8c463abb67d5 38 printf("i= %d :%c \r\n",i,buf[i]);
shivanandgowdakr 4:8c463abb67d5 39 }
shivanandgowdakr 4:8c463abb67d5 40 chipDisable();
shivanandgowdakr 4:8c463abb67d5 41 }
shivanandgowdakr 4:8c463abb67d5 42
shivanandgowdakr 4:8c463abb67d5 43 // WRITING
shivanandgowdakr 4:8c463abb67d5 44 void S25FL256S::writeByte(int addr, int data)
shivanandgowdakr 4:8c463abb67d5 45 {
shivanandgowdakr 4:8c463abb67d5 46 writeEnable();
shivanandgowdakr 4:8c463abb67d5 47 chipEnable();
shivanandgowdakr 4:8c463abb67d5 48 this->write(FOUR_PP);
shivanandgowdakr 4:8c463abb67d5 49 this->write((addr & ADDR_BMASK3) >> ADDR_BSHIFT3);
shivanandgowdakr 4:8c463abb67d5 50 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 4:8c463abb67d5 51 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 4:8c463abb67d5 52 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 4:8c463abb67d5 53 this->write(data);
shivanandgowdakr 4:8c463abb67d5 54 chipDisable();
shivanandgowdakr 4:8c463abb67d5 55 writeDisable();
shivanandgowdakr 4:8c463abb67d5 56 // wait(WAIT_TIME);//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails
shivanandgowdakr 4:8c463abb67d5 57 }
shivanandgowdakr 4:8c463abb67d5 58
shivanandgowdakr 4:8c463abb67d5 59 void S25FL256S::writeStream(int addr, char* buf, int count)
shivanandgowdakr 4:8c463abb67d5 60 {
shivanandgowdakr 4:8c463abb67d5 61 if (count < 1)
shivanandgowdakr 4:8c463abb67d5 62 return;
shivanandgowdakr 4:8c463abb67d5 63 writeEnable();
shivanandgowdakr 4:8c463abb67d5 64 wait(0.1);
shivanandgowdakr 4:8c463abb67d5 65 chipEnable();
shivanandgowdakr 4:8c463abb67d5 66 this->write(FOUR_PP);
shivanandgowdakr 4:8c463abb67d5 67 this->write((addr & ADDR_BMASK3) >> ADDR_BSHIFT3);
shivanandgowdakr 4:8c463abb67d5 68 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 4:8c463abb67d5 69 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 4:8c463abb67d5 70 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 4:8c463abb67d5 71 for (int i = 0; i < count; i++) {
shivanandgowdakr 4:8c463abb67d5 72 this->write(buf[i]);
shivanandgowdakr 4:8c463abb67d5 73 }
shivanandgowdakr 4:8c463abb67d5 74 wait(0.1);
shivanandgowdakr 4:8c463abb67d5 75 chipDisable();
shivanandgowdakr 4:8c463abb67d5 76 writeDisable();
shivanandgowdakr 4:8c463abb67d5 77 wait(WAIT_TIME);
shivanandgowdakr 4:8c463abb67d5 78 }
shivanandgowdakr 4:8c463abb67d5 79
shivanandgowdakr 4:8c463abb67d5 80 void S25FL256S::writeString(int addr, string str)
shivanandgowdakr 4:8c463abb67d5 81 {
shivanandgowdakr 4:8c463abb67d5 82 if (str.length() < 1)
shivanandgowdakr 4:8c463abb67d5 83 return;
shivanandgowdakr 4:8c463abb67d5 84 writeEnable();
shivanandgowdakr 4:8c463abb67d5 85 chipEnable();
shivanandgowdakr 4:8c463abb67d5 86 this->write(FOUR_PP);
shivanandgowdakr 4:8c463abb67d5 87 this->write((addr & ADDR_BMASK3) >> ADDR_BSHIFT3);
shivanandgowdakr 4:8c463abb67d5 88 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 4:8c463abb67d5 89 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 4:8c463abb67d5 90 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 4:8c463abb67d5 91 for (int i = 0; i < str.length(); i++)
shivanandgowdakr 4:8c463abb67d5 92 this->write(str.at(i));
shivanandgowdakr 4:8c463abb67d5 93 chipDisable();
shivanandgowdakr 4:8c463abb67d5 94 writeDisable();
shivanandgowdakr 4:8c463abb67d5 95 wait(WAIT_TIME);//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails
shivanandgowdakr 4:8c463abb67d5 96 }
shivanandgowdakr 4:8c463abb67d5 97
shivanandgowdakr 4:8c463abb67d5 98
shivanandgowdakr 4:8c463abb67d5 99
shivanandgowdakr 4:8c463abb67d5 100 uint8_t S25FL256S::readRegister()
shivanandgowdakr 4:8c463abb67d5 101 {
shivanandgowdakr 4:8c463abb67d5 102
shivanandgowdakr 4:8c463abb67d5 103 chipEnable();
shivanandgowdakr 4:8c463abb67d5 104 this->write(RDSR1);
shivanandgowdakr 4:8c463abb67d5 105 uint8_t val=this->write(DUMMY_ADDR);
shivanandgowdakr 4:8c463abb67d5 106 chipDisable();
shivanandgowdakr 4:8c463abb67d5 107 //wait(WAIT_TIME);//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails
shivanandgowdakr 4:8c463abb67d5 108 //printf("value of reg is %X \r\n",val);
shivanandgowdakr 4:8c463abb67d5 109 return(val);
shivanandgowdakr 4:8c463abb67d5 110
shivanandgowdakr 4:8c463abb67d5 111 }
shivanandgowdakr 4:8c463abb67d5 112 //ERASING
shivanandgowdakr 4:8c463abb67d5 113 void S25FL256S::chipErase()
shivanandgowdakr 4:8c463abb67d5 114 {
shivanandgowdakr 4:8c463abb67d5 115 writeEnable();
shivanandgowdakr 4:8c463abb67d5 116 chipEnable();
shivanandgowdakr 4:8c463abb67d5 117 this->write(BE);
shivanandgowdakr 4:8c463abb67d5 118 chipDisable();
shivanandgowdakr 4:8c463abb67d5 119 writeDisable();
shivanandgowdakr 4:8c463abb67d5 120 wait(WAIT_TIME);//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails
shivanandgowdakr 4:8c463abb67d5 121 }
shivanandgowdakr 4:8c463abb67d5 122
shivanandgowdakr 4:8c463abb67d5 123 void S25FL256S::Read_Identification(uint8_t *buf)
shivanandgowdakr 4:8c463abb67d5 124 {
shivanandgowdakr 4:8c463abb67d5 125
shivanandgowdakr 4:8c463abb67d5 126
shivanandgowdakr 4:8c463abb67d5 127 chipEnable();
shivanandgowdakr 4:8c463abb67d5 128 this->write(RDID);
shivanandgowdakr 4:8c463abb67d5 129 for(int i=0; i<80; i++)
shivanandgowdakr 4:8c463abb67d5 130 buf[i]=this->write(DUMMY_ADDR);
shivanandgowdakr 4:8c463abb67d5 131 chipDisable();
shivanandgowdakr 4:8c463abb67d5 132 wait(WAIT_TIME);//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails
shivanandgowdakr 4:8c463abb67d5 133 }
shivanandgowdakr 4:8c463abb67d5 134
shivanandgowdakr 4:8c463abb67d5 135 void S25FL256S::sectorErase(int addr)
shivanandgowdakr 4:8c463abb67d5 136 {
shivanandgowdakr 4:8c463abb67d5 137 writeEnable();
shivanandgowdakr 4:8c463abb67d5 138 chipEnable();
shivanandgowdakr 4:8c463abb67d5 139 this->write(FOUR_SE);
shivanandgowdakr 4:8c463abb67d5 140 this->write((addr & ADDR_BMASK3) >> ADDR_BSHIFT3);
shivanandgowdakr 4:8c463abb67d5 141 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 4:8c463abb67d5 142 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 4:8c463abb67d5 143 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 4:8c463abb67d5 144 chipDisable();
shivanandgowdakr 4:8c463abb67d5 145 writeDisable();
shivanandgowdakr 4:8c463abb67d5 146 wait(WAIT_TIME);//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails
shivanandgowdakr 4:8c463abb67d5 147 }
shivanandgowdakr 4:8c463abb67d5 148 void S25FL256S::reset()
shivanandgowdakr 4:8c463abb67d5 149 {
shivanandgowdakr 4:8c463abb67d5 150 writeEnable();
shivanandgowdakr 4:8c463abb67d5 151 chipEnable();
shivanandgowdakr 4:8c463abb67d5 152 this->write(RESET);
shivanandgowdakr 4:8c463abb67d5 153 chipDisable();
shivanandgowdakr 4:8c463abb67d5 154 writeDisable();
shivanandgowdakr 4:8c463abb67d5 155 }
shivanandgowdakr 4:8c463abb67d5 156
shivanandgowdakr 4:8c463abb67d5 157 uint8_t S25FL256S::checkIfBusy()
shivanandgowdakr 4:8c463abb67d5 158 {
shivanandgowdakr 4:8c463abb67d5 159 uint8_t value=readRegister();
shivanandgowdakr 4:8c463abb67d5 160 printf("Value of Status Reg=%X\r\n\r\n",value);
shivanandgowdakr 4:8c463abb67d5 161 if((value&0x01)==0x01)
shivanandgowdakr 4:8c463abb67d5 162 return 1;
shivanandgowdakr 4:8c463abb67d5 163 else
shivanandgowdakr 4:8c463abb67d5 164 return 0;
shivanandgowdakr 4:8c463abb67d5 165
shivanandgowdakr 4:8c463abb67d5 166 }
shivanandgowdakr 4:8c463abb67d5 167 void S25FL256S::writeRegister(uint8_t regValue)
shivanandgowdakr 4:8c463abb67d5 168 {
shivanandgowdakr 4:8c463abb67d5 169 writeEnable();
shivanandgowdakr 4:8c463abb67d5 170 chipEnable();
shivanandgowdakr 4:8c463abb67d5 171 this->write(WRR);
shivanandgowdakr 4:8c463abb67d5 172 this->write(regValue);
shivanandgowdakr 4:8c463abb67d5 173 chipDisable();
shivanandgowdakr 4:8c463abb67d5 174 writeDisable();
shivanandgowdakr 4:8c463abb67d5 175 wait(WAIT_TIME);//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails
shivanandgowdakr 4:8c463abb67d5 176
shivanandgowdakr 4:8c463abb67d5 177 }
shivanandgowdakr 4:8c463abb67d5 178
shivanandgowdakr 4:8c463abb67d5 179 void S25FL256S::clearRegister(void)
shivanandgowdakr 4:8c463abb67d5 180 {
shivanandgowdakr 4:8c463abb67d5 181 writeEnable();
shivanandgowdakr 4:8c463abb67d5 182 chipEnable();
shivanandgowdakr 4:8c463abb67d5 183 this->write(CLSR);
shivanandgowdakr 4:8c463abb67d5 184 chipDisable();
shivanandgowdakr 4:8c463abb67d5 185 writeDisable();
shivanandgowdakr 4:8c463abb67d5 186 wait(WAIT_TIME);//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails
shivanandgowdakr 4:8c463abb67d5 187
shivanandgowdakr 4:8c463abb67d5 188 }
shivanandgowdakr 4:8c463abb67d5 189
shivanandgowdakr 4:8c463abb67d5 190
shivanandgowdakr 4:8c463abb67d5 191 void S25FL256S::writeLong(int addr, long value)
shivanandgowdakr 4:8c463abb67d5 192 {
shivanandgowdakr 4:8c463abb67d5 193 //Decomposition from a long to 4 bytes by using bitshift.
shivanandgowdakr 4:8c463abb67d5 194 //One = Most significant -> Four = Least significant byte
shivanandgowdakr 4:8c463abb67d5 195 uint8_t four = (value & 0xFF);
shivanandgowdakr 4:8c463abb67d5 196 uint8_t three = ((value >> 8) & 0xFF);
shivanandgowdakr 4:8c463abb67d5 197 uint8_t two = ((value >> 16) & 0xFF);
shivanandgowdakr 4:8c463abb67d5 198 uint8_t one = ((value >> 24) & 0xFF);
shivanandgowdakr 4:8c463abb67d5 199
shivanandgowdakr 4:8c463abb67d5 200 writeEnable();
shivanandgowdakr 4:8c463abb67d5 201 chipEnable();
shivanandgowdakr 4:8c463abb67d5 202 this->write(FOUR_PP);
shivanandgowdakr 4:8c463abb67d5 203 this->write((addr & ADDR_BMASK3) >> ADDR_BSHIFT3);
shivanandgowdakr 4:8c463abb67d5 204 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 4:8c463abb67d5 205 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 4:8c463abb67d5 206 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 4:8c463abb67d5 207 this->write(four);
shivanandgowdakr 4:8c463abb67d5 208 this->write(three);
shivanandgowdakr 4:8c463abb67d5 209 this->write(two);
shivanandgowdakr 4:8c463abb67d5 210 this->write(one);
shivanandgowdakr 4:8c463abb67d5 211 chipDisable();
shivanandgowdakr 4:8c463abb67d5 212 writeDisable();
shivanandgowdakr 4:8c463abb67d5 213 wait(0.1);
shivanandgowdakr 4:8c463abb67d5 214 }
shivanandgowdakr 4:8c463abb67d5 215
shivanandgowdakr 4:8c463abb67d5 216 long S25FL256S::raedLong(int addr)
shivanandgowdakr 4:8c463abb67d5 217 {
shivanandgowdakr 4:8c463abb67d5 218 //Read the 4 bytes from the eeprom memory.
shivanandgowdakr 4:8c463abb67d5 219 writeEnable();
shivanandgowdakr 4:8c463abb67d5 220 chipEnable();
shivanandgowdakr 4:8c463abb67d5 221 this->write(FOUR_READ);
shivanandgowdakr 4:8c463abb67d5 222 this->write((addr & ADDR_BMASK3) >> ADDR_BSHIFT3);
shivanandgowdakr 4:8c463abb67d5 223 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 4:8c463abb67d5 224 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 4:8c463abb67d5 225 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 4:8c463abb67d5 226
shivanandgowdakr 4:8c463abb67d5 227 long four = this->write(DUMMY_ADDR);
shivanandgowdakr 4:8c463abb67d5 228 long three = this->write(DUMMY_ADDR);
shivanandgowdakr 4:8c463abb67d5 229 long two = this->write(DUMMY_ADDR);
shivanandgowdakr 4:8c463abb67d5 230 long one = this->write(DUMMY_ADDR);
shivanandgowdakr 4:8c463abb67d5 231
shivanandgowdakr 4:8c463abb67d5 232 //Return the recomposed long by using bitshift.
shivanandgowdakr 4:8c463abb67d5 233 return ((four << 0) & 0xFF) + ((three << 8) & 0xFFFF) + ((two << 16) & 0xFFFFFF) + ((one << 24) & 0xFFFFFFFF);
shivanandgowdakr 4:8c463abb67d5 234 }
shivanandgowdakr 4:8c463abb67d5 235
shivanandgowdakr 4:8c463abb67d5 236
shivanandgowdakr 4:8c463abb67d5 237 //ENABLE/DISABLE (private functions)
shivanandgowdakr 4:8c463abb67d5 238 void S25FL256S::writeEnable()
shivanandgowdakr 4:8c463abb67d5 239 {
shivanandgowdakr 4:8c463abb67d5 240 chipEnable();
shivanandgowdakr 4:8c463abb67d5 241 this->write(WREN);
shivanandgowdakr 4:8c463abb67d5 242 chipDisable();
shivanandgowdakr 4:8c463abb67d5 243 }
shivanandgowdakr 4:8c463abb67d5 244 void S25FL256S::writeDisable()
shivanandgowdakr 4:8c463abb67d5 245 {
shivanandgowdakr 4:8c463abb67d5 246 chipEnable();
shivanandgowdakr 4:8c463abb67d5 247 this->write(WRDI);
shivanandgowdakr 4:8c463abb67d5 248 chipDisable();
shivanandgowdakr 4:8c463abb67d5 249 }
shivanandgowdakr 4:8c463abb67d5 250 void S25FL256S::chipEnable()
shivanandgowdakr 4:8c463abb67d5 251 {
shivanandgowdakr 4:8c463abb67d5 252 _cs = 0;
shivanandgowdakr 4:8c463abb67d5 253 }
shivanandgowdakr 4:8c463abb67d5 254 void S25FL256S::chipDisable()
shivanandgowdakr 4:8c463abb67d5 255 {
shivanandgowdakr 4:8c463abb67d5 256 _cs = 1;
shivanandgowdakr 4:8c463abb67d5 257 }
shivanandgowdakr 4:8c463abb67d5 258