Shivanand Gowda / S70FL01GS

Serial Peripheral Interface (SPI) Serial Single IO NOR Flash Memory Interfacing 1Gb

Dependents:   SPI_FLASH_MEM_1Gb

Fork of S25FL256S by Shivanand Gowda

S70FL01GS.cpp@6:b3c242976f7e, 2018-05-21 (annotated)

Committer:
shivanandgowdakr
Date:
Mon May 21 10:22:55 2018 +0000
Revision:
6:b3c242976f7e
SPI Single IO Read Write Erase Operations S70FL01GS; Nucleo F767ZI

Who changed what in which revision?

UserRevisionLine numberNew contents of line
shivanandgowdakr 6:b3c242976f7e 1 // S70FL01GS.cpp
shivanandgowdakr 6:b3c242976f7e 2
shivanandgowdakr 6:b3c242976f7e 3 #include"S70FL01GS.h"
shivanandgowdakr 6:b3c242976f7e 4
shivanandgowdakr 6:b3c242976f7e 5 // CONSTRUCTOR
shivanandgowdakr 6:b3c242976f7e 6 S70FL01GS::S70FL01GS(PinName mosi, PinName miso, PinName sclk, PinName cs) : SPI(mosi, miso, sclk), _cs(cs)
shivanandgowdakr 6:b3c242976f7e 7 {
shivanandgowdakr 6:b3c242976f7e 8 this->format(SPI_NBIT, SPI_MODE);
shivanandgowdakr 6:b3c242976f7e 9 this->frequency(SPI_FREQ);
shivanandgowdakr 6:b3c242976f7e 10 chipDisable();
shivanandgowdakr 6:b3c242976f7e 11 }
shivanandgowdakr 6:b3c242976f7e 12 // READING
shivanandgowdakr 6:b3c242976f7e 13 int S70FL01GS::readByte(int addr)
shivanandgowdakr 6:b3c242976f7e 14 {
shivanandgowdakr 6:b3c242976f7e 15 chipEnable();
shivanandgowdakr 6:b3c242976f7e 16 this->write(FOUR_READ);
shivanandgowdakr 6:b3c242976f7e 17 this->write((addr & ADDR_BMASK3) >> ADDR_BSHIFT3);
shivanandgowdakr 6:b3c242976f7e 18 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 6:b3c242976f7e 19 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 6:b3c242976f7e 20 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 6:b3c242976f7e 21 int response = this->write(DUMMY_ADDR);
shivanandgowdakr 6:b3c242976f7e 22 chipDisable();
shivanandgowdakr 6:b3c242976f7e 23 return response;
shivanandgowdakr 6:b3c242976f7e 24 }
shivanandgowdakr 6:b3c242976f7e 25
shivanandgowdakr 6:b3c242976f7e 26 void S70FL01GS::readStream(int addr, char* buf, int count)
shivanandgowdakr 6:b3c242976f7e 27 {
shivanandgowdakr 6:b3c242976f7e 28 if (count < 1)
shivanandgowdakr 6:b3c242976f7e 29 return;
shivanandgowdakr 6:b3c242976f7e 30 chipEnable();
shivanandgowdakr 6:b3c242976f7e 31 this->write(FOUR_READ);
shivanandgowdakr 6:b3c242976f7e 32 this->write((addr & ADDR_BMASK3) >> ADDR_BSHIFT3);
shivanandgowdakr 6:b3c242976f7e 33 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 6:b3c242976f7e 34 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 6:b3c242976f7e 35 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 6:b3c242976f7e 36 for (int i = 0; i < count; i++) {
shivanandgowdakr 6:b3c242976f7e 37 buf[i] = this->write(DUMMY_ADDR);
shivanandgowdakr 6:b3c242976f7e 38 printf("i= %d :%c \r\n",i,buf[i]);
shivanandgowdakr 6:b3c242976f7e 39 }
shivanandgowdakr 6:b3c242976f7e 40 chipDisable();
shivanandgowdakr 6:b3c242976f7e 41 }
shivanandgowdakr 6:b3c242976f7e 42
shivanandgowdakr 6:b3c242976f7e 43 // WRITING
shivanandgowdakr 6:b3c242976f7e 44 void S70FL01GS::writeByte(int addr, int data)
shivanandgowdakr 6:b3c242976f7e 45 {
shivanandgowdakr 6:b3c242976f7e 46 writeEnable();
shivanandgowdakr 6:b3c242976f7e 47 chipEnable();
shivanandgowdakr 6:b3c242976f7e 48 this->write(FOUR_PP);
shivanandgowdakr 6:b3c242976f7e 49 this->write((addr & ADDR_BMASK3) >> ADDR_BSHIFT3);
shivanandgowdakr 6:b3c242976f7e 50 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 6:b3c242976f7e 51 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 6:b3c242976f7e 52 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 6:b3c242976f7e 53 this->write(data);
shivanandgowdakr 6:b3c242976f7e 54 chipDisable();
shivanandgowdakr 6:b3c242976f7e 55 writeDisable();
shivanandgowdakr 6:b3c242976f7e 56 // wait(WAIT_TIME);//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails
shivanandgowdakr 6:b3c242976f7e 57 }
shivanandgowdakr 6:b3c242976f7e 58
shivanandgowdakr 6:b3c242976f7e 59 void S70FL01GS::writeStream(int addr, char* buf, int count)
shivanandgowdakr 6:b3c242976f7e 60 {
shivanandgowdakr 6:b3c242976f7e 61 if (count < 1)
shivanandgowdakr 6:b3c242976f7e 62 return;
shivanandgowdakr 6:b3c242976f7e 63 writeEnable();
shivanandgowdakr 6:b3c242976f7e 64 wait(0.1);
shivanandgowdakr 6:b3c242976f7e 65 chipEnable();
shivanandgowdakr 6:b3c242976f7e 66 this->write(FOUR_PP);
shivanandgowdakr 6:b3c242976f7e 67 this->write((addr & ADDR_BMASK3) >> ADDR_BSHIFT3);
shivanandgowdakr 6:b3c242976f7e 68 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 6:b3c242976f7e 69 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 6:b3c242976f7e 70 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 6:b3c242976f7e 71 for (int i = 0; i < count; i++) {
shivanandgowdakr 6:b3c242976f7e 72 this->write(buf[i]);
shivanandgowdakr 6:b3c242976f7e 73 }
shivanandgowdakr 6:b3c242976f7e 74 wait(0.1);
shivanandgowdakr 6:b3c242976f7e 75 chipDisable();
shivanandgowdakr 6:b3c242976f7e 76 writeDisable();
shivanandgowdakr 6:b3c242976f7e 77 wait(WAIT_TIME);
shivanandgowdakr 6:b3c242976f7e 78 }
shivanandgowdakr 6:b3c242976f7e 79
shivanandgowdakr 6:b3c242976f7e 80 void S70FL01GS::writeString(int addr, string str)
shivanandgowdakr 6:b3c242976f7e 81 {
shivanandgowdakr 6:b3c242976f7e 82 if (str.length() < 1)
shivanandgowdakr 6:b3c242976f7e 83 return;
shivanandgowdakr 6:b3c242976f7e 84 writeEnable();
shivanandgowdakr 6:b3c242976f7e 85 chipEnable();
shivanandgowdakr 6:b3c242976f7e 86 this->write(FOUR_PP);
shivanandgowdakr 6:b3c242976f7e 87 this->write((addr & ADDR_BMASK3) >> ADDR_BSHIFT3);
shivanandgowdakr 6:b3c242976f7e 88 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 6:b3c242976f7e 89 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 6:b3c242976f7e 90 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 6:b3c242976f7e 91 for (int i = 0; i < str.length(); i++)
shivanandgowdakr 6:b3c242976f7e 92 this->write(str.at(i));
shivanandgowdakr 6:b3c242976f7e 93 chipDisable();
shivanandgowdakr 6:b3c242976f7e 94 writeDisable();
shivanandgowdakr 6:b3c242976f7e 95 wait(WAIT_TIME);//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails
shivanandgowdakr 6:b3c242976f7e 96 }
shivanandgowdakr 6:b3c242976f7e 97
shivanandgowdakr 6:b3c242976f7e 98
shivanandgowdakr 6:b3c242976f7e 99
shivanandgowdakr 6:b3c242976f7e 100 uint8_t S70FL01GS::readRegister()
shivanandgowdakr 6:b3c242976f7e 101 {
shivanandgowdakr 6:b3c242976f7e 102
shivanandgowdakr 6:b3c242976f7e 103 chipEnable();
shivanandgowdakr 6:b3c242976f7e 104 this->write(RDSR1);
shivanandgowdakr 6:b3c242976f7e 105 uint8_t val=this->write(DUMMY_ADDR);
shivanandgowdakr 6:b3c242976f7e 106 chipDisable();
shivanandgowdakr 6:b3c242976f7e 107 //wait(WAIT_TIME);//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails
shivanandgowdakr 6:b3c242976f7e 108 //printf("value of reg is %X \r\n",val);
shivanandgowdakr 6:b3c242976f7e 109 return(val);
shivanandgowdakr 6:b3c242976f7e 110
shivanandgowdakr 6:b3c242976f7e 111 }
shivanandgowdakr 6:b3c242976f7e 112 //ERASING
shivanandgowdakr 6:b3c242976f7e 113 void S70FL01GS::chipErase()
shivanandgowdakr 6:b3c242976f7e 114 {
shivanandgowdakr 6:b3c242976f7e 115 writeEnable();
shivanandgowdakr 6:b3c242976f7e 116 chipEnable();
shivanandgowdakr 6:b3c242976f7e 117 this->write(BE);
shivanandgowdakr 6:b3c242976f7e 118 chipDisable();
shivanandgowdakr 6:b3c242976f7e 119 writeDisable();
shivanandgowdakr 6:b3c242976f7e 120 wait(WAIT_TIME);//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails
shivanandgowdakr 6:b3c242976f7e 121 }
shivanandgowdakr 6:b3c242976f7e 122
shivanandgowdakr 6:b3c242976f7e 123 void S70FL01GS::Read_Identification(uint8_t *buf)
shivanandgowdakr 6:b3c242976f7e 124 {
shivanandgowdakr 6:b3c242976f7e 125
shivanandgowdakr 6:b3c242976f7e 126
shivanandgowdakr 6:b3c242976f7e 127 chipEnable();
shivanandgowdakr 6:b3c242976f7e 128 this->write(RDID);
shivanandgowdakr 6:b3c242976f7e 129 for(int i=0; i<80; i++)
shivanandgowdakr 6:b3c242976f7e 130 buf[i]=this->write(DUMMY_ADDR);
shivanandgowdakr 6:b3c242976f7e 131 chipDisable();
shivanandgowdakr 6:b3c242976f7e 132 wait(WAIT_TIME);//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails
shivanandgowdakr 6:b3c242976f7e 133 }
shivanandgowdakr 6:b3c242976f7e 134
shivanandgowdakr 6:b3c242976f7e 135 void S70FL01GS::sectorErase(int addr)
shivanandgowdakr 6:b3c242976f7e 136 {
shivanandgowdakr 6:b3c242976f7e 137 writeEnable();
shivanandgowdakr 6:b3c242976f7e 138 chipEnable();
shivanandgowdakr 6:b3c242976f7e 139 this->write(FOUR_SE);
shivanandgowdakr 6:b3c242976f7e 140 this->write((addr & ADDR_BMASK3) >> ADDR_BSHIFT3);
shivanandgowdakr 6:b3c242976f7e 141 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 6:b3c242976f7e 142 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 6:b3c242976f7e 143 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 6:b3c242976f7e 144 chipDisable();
shivanandgowdakr 6:b3c242976f7e 145 writeDisable();
shivanandgowdakr 6:b3c242976f7e 146 wait(WAIT_TIME);//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails
shivanandgowdakr 6:b3c242976f7e 147 }
shivanandgowdakr 6:b3c242976f7e 148 void S70FL01GS::reset()
shivanandgowdakr 6:b3c242976f7e 149 {
shivanandgowdakr 6:b3c242976f7e 150 writeEnable();
shivanandgowdakr 6:b3c242976f7e 151 chipEnable();
shivanandgowdakr 6:b3c242976f7e 152 this->write(RESET);
shivanandgowdakr 6:b3c242976f7e 153 chipDisable();
shivanandgowdakr 6:b3c242976f7e 154 writeDisable();
shivanandgowdakr 6:b3c242976f7e 155 }
shivanandgowdakr 6:b3c242976f7e 156
shivanandgowdakr 6:b3c242976f7e 157 uint8_t S70FL01GS::checkIfBusy()
shivanandgowdakr 6:b3c242976f7e 158 {
shivanandgowdakr 6:b3c242976f7e 159 uint8_t value=readRegister();
shivanandgowdakr 6:b3c242976f7e 160 printf("Value of Status Reg=%X\r\n\r\n",value);
shivanandgowdakr 6:b3c242976f7e 161 if((value&0x01)==0x01)
shivanandgowdakr 6:b3c242976f7e 162 return 1;
shivanandgowdakr 6:b3c242976f7e 163 else
shivanandgowdakr 6:b3c242976f7e 164 return 0;
shivanandgowdakr 6:b3c242976f7e 165
shivanandgowdakr 6:b3c242976f7e 166 }
shivanandgowdakr 6:b3c242976f7e 167 void S70FL01GS::writeRegister(uint8_t regValue)
shivanandgowdakr 6:b3c242976f7e 168 {
shivanandgowdakr 6:b3c242976f7e 169 writeEnable();
shivanandgowdakr 6:b3c242976f7e 170 chipEnable();
shivanandgowdakr 6:b3c242976f7e 171 this->write(WRR);
shivanandgowdakr 6:b3c242976f7e 172 this->write(regValue);
shivanandgowdakr 6:b3c242976f7e 173 chipDisable();
shivanandgowdakr 6:b3c242976f7e 174 writeDisable();
shivanandgowdakr 6:b3c242976f7e 175 wait(WAIT_TIME);//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails
shivanandgowdakr 6:b3c242976f7e 176
shivanandgowdakr 6:b3c242976f7e 177 }
shivanandgowdakr 6:b3c242976f7e 178
shivanandgowdakr 6:b3c242976f7e 179 void S70FL01GS::clearRegister(void)
shivanandgowdakr 6:b3c242976f7e 180 {
shivanandgowdakr 6:b3c242976f7e 181 writeEnable();
shivanandgowdakr 6:b3c242976f7e 182 chipEnable();
shivanandgowdakr 6:b3c242976f7e 183 this->write(CLSR);
shivanandgowdakr 6:b3c242976f7e 184 chipDisable();
shivanandgowdakr 6:b3c242976f7e 185 writeDisable();
shivanandgowdakr 6:b3c242976f7e 186 wait(WAIT_TIME);//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails
shivanandgowdakr 6:b3c242976f7e 187
shivanandgowdakr 6:b3c242976f7e 188 }
shivanandgowdakr 6:b3c242976f7e 189
shivanandgowdakr 6:b3c242976f7e 190
shivanandgowdakr 6:b3c242976f7e 191 void S70FL01GS::writeLong(int addr, long value)
shivanandgowdakr 6:b3c242976f7e 192 {
shivanandgowdakr 6:b3c242976f7e 193 //Decomposition from a long to 4 bytes by using bitshift.
shivanandgowdakr 6:b3c242976f7e 194 //One = Most significant -> Four = Least significant byte
shivanandgowdakr 6:b3c242976f7e 195 uint8_t four = (value & 0xFF);
shivanandgowdakr 6:b3c242976f7e 196 uint8_t three = ((value >> 8) & 0xFF);
shivanandgowdakr 6:b3c242976f7e 197 uint8_t two = ((value >> 16) & 0xFF);
shivanandgowdakr 6:b3c242976f7e 198 uint8_t one = ((value >> 24) & 0xFF);
shivanandgowdakr 6:b3c242976f7e 199
shivanandgowdakr 6:b3c242976f7e 200 writeEnable();
shivanandgowdakr 6:b3c242976f7e 201 chipEnable();
shivanandgowdakr 6:b3c242976f7e 202 this->write(FOUR_PP);
shivanandgowdakr 6:b3c242976f7e 203 this->write((addr & ADDR_BMASK3) >> ADDR_BSHIFT3);
shivanandgowdakr 6:b3c242976f7e 204 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 6:b3c242976f7e 205 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 6:b3c242976f7e 206 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 6:b3c242976f7e 207 this->write(four);
shivanandgowdakr 6:b3c242976f7e 208 this->write(three);
shivanandgowdakr 6:b3c242976f7e 209 this->write(two);
shivanandgowdakr 6:b3c242976f7e 210 this->write(one);
shivanandgowdakr 6:b3c242976f7e 211 chipDisable();
shivanandgowdakr 6:b3c242976f7e 212 writeDisable();
shivanandgowdakr 6:b3c242976f7e 213 wait(0.1);
shivanandgowdakr 6:b3c242976f7e 214 }
shivanandgowdakr 6:b3c242976f7e 215
shivanandgowdakr 6:b3c242976f7e 216 long S70FL01GS::raedLong(int addr)
shivanandgowdakr 6:b3c242976f7e 217 {
shivanandgowdakr 6:b3c242976f7e 218 //Read the 4 bytes from the eeprom memory.
shivanandgowdakr 6:b3c242976f7e 219 writeEnable();
shivanandgowdakr 6:b3c242976f7e 220 chipEnable();
shivanandgowdakr 6:b3c242976f7e 221 this->write(FOUR_READ);
shivanandgowdakr 6:b3c242976f7e 222 this->write((addr & ADDR_BMASK3) >> ADDR_BSHIFT3);
shivanandgowdakr 6:b3c242976f7e 223 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 6:b3c242976f7e 224 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 6:b3c242976f7e 225 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 6:b3c242976f7e 226
shivanandgowdakr 6:b3c242976f7e 227 long four = this->write(DUMMY_ADDR);
shivanandgowdakr 6:b3c242976f7e 228 long three = this->write(DUMMY_ADDR);
shivanandgowdakr 6:b3c242976f7e 229 long two = this->write(DUMMY_ADDR);
shivanandgowdakr 6:b3c242976f7e 230 long one = this->write(DUMMY_ADDR);
shivanandgowdakr 6:b3c242976f7e 231
shivanandgowdakr 6:b3c242976f7e 232 //Return the recomposed long by using bitshift.
shivanandgowdakr 6:b3c242976f7e 233 return ((four << 0) & 0xFF) + ((three << 8) & 0xFFFF) + ((two << 16) & 0xFFFFFF) + ((one << 24) & 0xFFFFFFFF);
shivanandgowdakr 6:b3c242976f7e 234 }
shivanandgowdakr 6:b3c242976f7e 235
shivanandgowdakr 6:b3c242976f7e 236
shivanandgowdakr 6:b3c242976f7e 237 //ENABLE/DISABLE (private functions)
shivanandgowdakr 6:b3c242976f7e 238 void S70FL01GS::writeEnable()
shivanandgowdakr 6:b3c242976f7e 239 {
shivanandgowdakr 6:b3c242976f7e 240 chipEnable();
shivanandgowdakr 6:b3c242976f7e 241 this->write(WREN);
shivanandgowdakr 6:b3c242976f7e 242 chipDisable();
shivanandgowdakr 6:b3c242976f7e 243 }
shivanandgowdakr 6:b3c242976f7e 244 void S70FL01GS::writeDisable()
shivanandgowdakr 6:b3c242976f7e 245 {
shivanandgowdakr 6:b3c242976f7e 246 chipEnable();
shivanandgowdakr 6:b3c242976f7e 247 this->write(WRDI);
shivanandgowdakr 6:b3c242976f7e 248 chipDisable();
shivanandgowdakr 6:b3c242976f7e 249 }
shivanandgowdakr 6:b3c242976f7e 250 void S70FL01GS::chipEnable()
shivanandgowdakr 6:b3c242976f7e 251 {
shivanandgowdakr 6:b3c242976f7e 252 _cs = 0;
shivanandgowdakr 6:b3c242976f7e 253 }
shivanandgowdakr 6:b3c242976f7e 254 void S70FL01GS::chipDisable()
shivanandgowdakr 6:b3c242976f7e 255 {
shivanandgowdakr 6:b3c242976f7e 256 _cs = 1;
shivanandgowdakr 6:b3c242976f7e 257 }
shivanandgowdakr 6:b3c242976f7e 258