Shivanand Gowda / S2568FBLL

Static RAM 256 kilo bytes using SPI single IO Serial SRAM

Dependents:   SPI_SRAM_READ_WRITE

IS62/65WVS2568FBLL

KEY FEATURES

• SPI-Compatible Bus Interface: - 16/20 MHz Clock rate - SPI/SDI/SQI mode • Low-Power CMOS Technology: - Read Current: 8 mA (max) at 3.6V, 20 MHz, 85°C. - CMOS Standby Current: 4 uA (typ). • 256K x 8-bit Organization: - 32-byte page • Byte, Page and Sequential mode for Reads and Writes.

https://www.mouser.in/datasheet/2/198/IS62-65WVS2568FALL-BLL-1147362.pdf for more details please look into datasheet

S2568FBLL.cpp@1:7d8adf80c30d, 2018-05-22 (annotated)

Committer:
shivanandgowdakr
Date:
Tue May 22 10:43:05 2018 +0000
Revision:
1:7d8adf80c30d
Parent:
0:0339901bb4b0 
Read Write operations in SRAM 2 Megabit or 256 k bytes.; ; Serial SPI SRAM NUCLEO F767ZI

Who changed what in which revision?

UserRevisionLine numberNew contents of line
shivanandgowdakr 0:0339901bb4b0 1 // S2568FBLL.cpp
shivanandgowdakr 0:0339901bb4b0 2
shivanandgowdakr 0:0339901bb4b0 3 #include"S2568FBLL.h"
shivanandgowdakr 0:0339901bb4b0 4
shivanandgowdakr 0:0339901bb4b0 5 // CONSTRUCTOR
shivanandgowdakr 0:0339901bb4b0 6 S2568FBLL::S2568FBLL(PinName mosi, PinName miso, PinName sclk, PinName cs,PinName hold) : SPI(mosi, miso, sclk), _cs(cs), _hold(hold)
shivanandgowdakr 0:0339901bb4b0 7 {
shivanandgowdakr 0:0339901bb4b0 8 this->format(SPI_NBIT, SPI_MODE);
shivanandgowdakr 0:0339901bb4b0 9 this->frequency(SPI_FREQ);
shivanandgowdakr 0:0339901bb4b0 10 chipDisable();
shivanandgowdakr 0:0339901bb4b0 11 holdEnable(); // Keep Hold High Always.... for read write operations.
shivanandgowdakr 0:0339901bb4b0 12 // if you want to abort while transaction is happening use holdDiasable();
shivanandgowdakr 0:0339901bb4b0 13 // Read Data Sheet Before Using Hold Disable
shivanandgowdakr 0:0339901bb4b0 14
shivanandgowdakr 0:0339901bb4b0 15 }
shivanandgowdakr 0:0339901bb4b0 16 // READING
shivanandgowdakr 0:0339901bb4b0 17 int S2568FBLL::readByte(int addr)
shivanandgowdakr 0:0339901bb4b0 18 {
shivanandgowdakr 0:0339901bb4b0 19 writeRegister(RWMODE_BYTE);
shivanandgowdakr 0:0339901bb4b0 20 chipEnable();
shivanandgowdakr 0:0339901bb4b0 21 this->write(READ);
shivanandgowdakr 0:0339901bb4b0 22 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 0:0339901bb4b0 23 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 0:0339901bb4b0 24 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 0:0339901bb4b0 25 int response = this->write(DUMMY_ADDR);
shivanandgowdakr 0:0339901bb4b0 26 chipDisable();
shivanandgowdakr 0:0339901bb4b0 27 return response;
shivanandgowdakr 0:0339901bb4b0 28 }
shivanandgowdakr 0:0339901bb4b0 29
shivanandgowdakr 0:0339901bb4b0 30 void S2568FBLL::readStream(int addr, char* buf, int count)
shivanandgowdakr 0:0339901bb4b0 31 {
shivanandgowdakr 0:0339901bb4b0 32 if (count < 1)
shivanandgowdakr 0:0339901bb4b0 33 return;
shivanandgowdakr 0:0339901bb4b0 34 writeRegister(RWMODE_SEQ);
shivanandgowdakr 0:0339901bb4b0 35 chipEnable();
shivanandgowdakr 0:0339901bb4b0 36 this->write(READ);
shivanandgowdakr 0:0339901bb4b0 37 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 0:0339901bb4b0 38 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 0:0339901bb4b0 39 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 0:0339901bb4b0 40 for (int i = 0; i < count; i++) {
shivanandgowdakr 0:0339901bb4b0 41 buf[i] = this->write(DUMMY_ADDR);
shivanandgowdakr 0:0339901bb4b0 42 printf("i= %d :%c \r\n",i,buf[i]);
shivanandgowdakr 0:0339901bb4b0 43 }
shivanandgowdakr 0:0339901bb4b0 44 chipDisable();
shivanandgowdakr 0:0339901bb4b0 45 }
shivanandgowdakr 0:0339901bb4b0 46
shivanandgowdakr 0:0339901bb4b0 47 // WRITING
shivanandgowdakr 0:0339901bb4b0 48 void S2568FBLL::writeByte(int addr, int data)
shivanandgowdakr 0:0339901bb4b0 49 {
shivanandgowdakr 0:0339901bb4b0 50 writeRegister(RWMODE_BYTE);
shivanandgowdakr 0:0339901bb4b0 51 chipEnable();
shivanandgowdakr 0:0339901bb4b0 52 this->write(WRITE);
shivanandgowdakr 0:0339901bb4b0 53 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 0:0339901bb4b0 54 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 0:0339901bb4b0 55 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 0:0339901bb4b0 56 this->write(data);
shivanandgowdakr 0:0339901bb4b0 57 chipDisable();
shivanandgowdakr 0:0339901bb4b0 58 // wait(WAIT_TIME);//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails
shivanandgowdakr 0:0339901bb4b0 59 }
shivanandgowdakr 0:0339901bb4b0 60
shivanandgowdakr 0:0339901bb4b0 61 void S2568FBLL::writeStream(int addr, char* buf, int count)
shivanandgowdakr 0:0339901bb4b0 62 {
shivanandgowdakr 0:0339901bb4b0 63 if (count < 1)
shivanandgowdakr 0:0339901bb4b0 64 return;
shivanandgowdakr 0:0339901bb4b0 65 writeRegister(RWMODE_SEQ);
shivanandgowdakr 0:0339901bb4b0 66 chipEnable();
shivanandgowdakr 0:0339901bb4b0 67 this->write(WRITE);
shivanandgowdakr 0:0339901bb4b0 68 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 0:0339901bb4b0 69 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 0:0339901bb4b0 70 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 0:0339901bb4b0 71 for (int i = 0; i < count; i++) {
shivanandgowdakr 0:0339901bb4b0 72 this->write(buf[i]);
shivanandgowdakr 0:0339901bb4b0 73 }
shivanandgowdakr 0:0339901bb4b0 74 wait(0.1);
shivanandgowdakr 0:0339901bb4b0 75 chipDisable();
shivanandgowdakr 0:0339901bb4b0 76 wait(WAIT_TIME);
shivanandgowdakr 0:0339901bb4b0 77 }
shivanandgowdakr 0:0339901bb4b0 78
shivanandgowdakr 0:0339901bb4b0 79 void S2568FBLL::writeString(int addr, string str)
shivanandgowdakr 0:0339901bb4b0 80 {
shivanandgowdakr 0:0339901bb4b0 81 if (str.length() < 1)
shivanandgowdakr 0:0339901bb4b0 82 return;
shivanandgowdakr 0:0339901bb4b0 83 writeRegister(RWMODE_SEQ);
shivanandgowdakr 0:0339901bb4b0 84 chipEnable();
shivanandgowdakr 0:0339901bb4b0 85 this->write(WRITE);
shivanandgowdakr 0:0339901bb4b0 86 this->write((addr & ADDR_BMASK3) >> ADDR_BSHIFT3);
shivanandgowdakr 0:0339901bb4b0 87 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 0:0339901bb4b0 88 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 0:0339901bb4b0 89 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 0:0339901bb4b0 90 for (int i = 0; i < str.length(); i++)
shivanandgowdakr 0:0339901bb4b0 91 this->write(str.at(i));
shivanandgowdakr 0:0339901bb4b0 92 chipDisable();
shivanandgowdakr 0:0339901bb4b0 93 wait(WAIT_TIME);//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails
shivanandgowdakr 0:0339901bb4b0 94 }
shivanandgowdakr 0:0339901bb4b0 95
shivanandgowdakr 0:0339901bb4b0 96
shivanandgowdakr 0:0339901bb4b0 97
shivanandgowdakr 0:0339901bb4b0 98 uint8_t S2568FBLL::readRegister(void)
shivanandgowdakr 0:0339901bb4b0 99 {
shivanandgowdakr 0:0339901bb4b0 100 chipEnable();
shivanandgowdakr 0:0339901bb4b0 101 this->write(RDMR);
shivanandgowdakr 0:0339901bb4b0 102 uint8_t val=this->write(DUMMY_ADDR);
shivanandgowdakr 0:0339901bb4b0 103 chipDisable();
shivanandgowdakr 0:0339901bb4b0 104 //wait(WAIT_TIME);//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails
shivanandgowdakr 0:0339901bb4b0 105 //printf("value of reg is %X \r\n",val);
shivanandgowdakr 0:0339901bb4b0 106 return(val);
shivanandgowdakr 0:0339901bb4b0 107
shivanandgowdakr 0:0339901bb4b0 108 }
shivanandgowdakr 0:0339901bb4b0 109
shivanandgowdakr 0:0339901bb4b0 110
shivanandgowdakr 0:0339901bb4b0 111
shivanandgowdakr 0:0339901bb4b0 112 void S2568FBLL::writeRegister(uint8_t regValue)
shivanandgowdakr 0:0339901bb4b0 113 {
shivanandgowdakr 0:0339901bb4b0 114
shivanandgowdakr 0:0339901bb4b0 115 chipEnable();
shivanandgowdakr 0:0339901bb4b0 116 this->write(WRMR);
shivanandgowdakr 0:0339901bb4b0 117 this->write(regValue);
shivanandgowdakr 0:0339901bb4b0 118 chipDisable();
shivanandgowdakr 0:0339901bb4b0 119
shivanandgowdakr 0:0339901bb4b0 120 // wait(WAIT_TIME); //instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails
shivanandgowdakr 0:0339901bb4b0 121 }
shivanandgowdakr 0:0339901bb4b0 122
shivanandgowdakr 0:0339901bb4b0 123
shivanandgowdakr 0:0339901bb4b0 124
shivanandgowdakr 0:0339901bb4b0 125
shivanandgowdakr 0:0339901bb4b0 126 void S2568FBLL::writeLong(int addr, long value)
shivanandgowdakr 0:0339901bb4b0 127 {
shivanandgowdakr 0:0339901bb4b0 128 //Decomposition from a long to 4 bytes by using bitshift.
shivanandgowdakr 0:0339901bb4b0 129 //One = Most significant -> Four = Least significant byte
shivanandgowdakr 0:0339901bb4b0 130 uint8_t four = (value & 0xFF);
shivanandgowdakr 0:0339901bb4b0 131 uint8_t three = ((value >> 8) & 0xFF);
shivanandgowdakr 0:0339901bb4b0 132 uint8_t two = ((value >> 16) & 0xFF);
shivanandgowdakr 0:0339901bb4b0 133 uint8_t one = ((value >> 24) & 0xFF);
shivanandgowdakr 0:0339901bb4b0 134
shivanandgowdakr 0:0339901bb4b0 135 writeRegister(RWMODE_SEQ);
shivanandgowdakr 0:0339901bb4b0 136 chipEnable();
shivanandgowdakr 0:0339901bb4b0 137 this->write(WRITE);
shivanandgowdakr 0:0339901bb4b0 138
shivanandgowdakr 0:0339901bb4b0 139 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 0:0339901bb4b0 140 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 0:0339901bb4b0 141 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 0:0339901bb4b0 142 this->write(four);
shivanandgowdakr 0:0339901bb4b0 143 this->write(three);
shivanandgowdakr 0:0339901bb4b0 144 this->write(two);
shivanandgowdakr 0:0339901bb4b0 145 this->write(one);
shivanandgowdakr 0:0339901bb4b0 146 chipDisable();
shivanandgowdakr 0:0339901bb4b0 147 wait(0.1);
shivanandgowdakr 0:0339901bb4b0 148 }
shivanandgowdakr 0:0339901bb4b0 149
shivanandgowdakr 0:0339901bb4b0 150 long S2568FBLL::raedLong(int addr)
shivanandgowdakr 0:0339901bb4b0 151 {
shivanandgowdakr 0:0339901bb4b0 152 //Read the 4 bytes from the eeprom memory.
shivanandgowdakr 0:0339901bb4b0 153 writeRegister(RWMODE_SEQ);
shivanandgowdakr 0:0339901bb4b0 154 chipEnable();
shivanandgowdakr 0:0339901bb4b0 155 this->write(READ);
shivanandgowdakr 0:0339901bb4b0 156 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 0:0339901bb4b0 157 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 0:0339901bb4b0 158 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 0:0339901bb4b0 159
shivanandgowdakr 0:0339901bb4b0 160 long four = this->write(DUMMY_ADDR);
shivanandgowdakr 0:0339901bb4b0 161 long three = this->write(DUMMY_ADDR);
shivanandgowdakr 0:0339901bb4b0 162 long two = this->write(DUMMY_ADDR);
shivanandgowdakr 0:0339901bb4b0 163 long one = this->write(DUMMY_ADDR);
shivanandgowdakr 1:7d8adf80c30d 164 chipDisable();
shivanandgowdakr 0:0339901bb4b0 165 //Return the recomposed long by using bitshift.
shivanandgowdakr 0:0339901bb4b0 166 return ((four << 0) & 0xFF) + ((three << 8) & 0xFFFF) + ((two << 16) & 0xFFFFFF) + ((one << 24) & 0xFFFFFFFF);
shivanandgowdakr 1:7d8adf80c30d 167
shivanandgowdakr 0:0339901bb4b0 168 }
shivanandgowdakr 0:0339901bb4b0 169
shivanandgowdakr 0:0339901bb4b0 170
shivanandgowdakr 0:0339901bb4b0 171 //ENABLE/DISABLE (private functions)
shivanandgowdakr 0:0339901bb4b0 172
shivanandgowdakr 0:0339901bb4b0 173 void S2568FBLL::chipEnable()
shivanandgowdakr 0:0339901bb4b0 174 {
shivanandgowdakr 0:0339901bb4b0 175 _cs = 0;
shivanandgowdakr 0:0339901bb4b0 176 }
shivanandgowdakr 0:0339901bb4b0 177 void S2568FBLL::chipDisable()
shivanandgowdakr 0:0339901bb4b0 178 {
shivanandgowdakr 0:0339901bb4b0 179 _cs = 1;
shivanandgowdakr 0:0339901bb4b0 180 }
shivanandgowdakr 0:0339901bb4b0 181
shivanandgowdakr 0:0339901bb4b0 182 void S2568FBLL::holdEnable()
shivanandgowdakr 0:0339901bb4b0 183 {
shivanandgowdakr 0:0339901bb4b0 184 _hold = 1;
shivanandgowdakr 0:0339901bb4b0 185 }
shivanandgowdakr 0:0339901bb4b0 186
shivanandgowdakr 0:0339901bb4b0 187 void S2568FBLL::holdDisable()
shivanandgowdakr 0:0339901bb4b0 188 {
shivanandgowdakr 0:0339901bb4b0 189 _hold = 0;
shivanandgowdakr 0:0339901bb4b0 190 }