128K Serial EEPROM read write erase chip erase functions SPI EEPROM Nucleo F767ZI

Dependents:   SPI_EEPROM

Committer:
shivanandgowdakr
Date:
Tue Oct 23 09:39:31 2018 +0000
Revision:
1:c389d5f4913d
Parent:
0:81848bf6dd4a
No Change

Who changed what in which revision?

UserRevisionLine numberNew contents of line
shivanandgowdakr 0:81848bf6dd4a 1 // EE25LC1024.cpp
shivanandgowdakr 1:c389d5f4913d 2 #include "includes.h"
shivanandgowdakr 0:81848bf6dd4a 3 #include"EE25LC1024.h"
shivanandgowdakr 0:81848bf6dd4a 4
shivanandgowdakr 0:81848bf6dd4a 5 // CONSTRUCTOR
shivanandgowdakr 0:81848bf6dd4a 6 EE25LC1024::EE25LC1024(PinName mosi, PinName miso, PinName sclk, PinName cs) : SPI(mosi, miso, sclk), _cs(cs)
shivanandgowdakr 0:81848bf6dd4a 7 {
shivanandgowdakr 0:81848bf6dd4a 8 this->format(SPI_NBIT, SPI_MODE);
shivanandgowdakr 1:c389d5f4913d 9 this->frequency(SPI_FREQ_EEPROM);
shivanandgowdakr 0:81848bf6dd4a 10 chipDisable();
shivanandgowdakr 0:81848bf6dd4a 11 }
shivanandgowdakr 0:81848bf6dd4a 12 // READING
shivanandgowdakr 0:81848bf6dd4a 13
shivanandgowdakr 0:81848bf6dd4a 14
shivanandgowdakr 0:81848bf6dd4a 15 void EE25LC1024::deepPowerDown(void)
shivanandgowdakr 0:81848bf6dd4a 16 {
shivanandgowdakr 0:81848bf6dd4a 17 chipEnable();
shivanandgowdakr 0:81848bf6dd4a 18 this->write(DPD);
shivanandgowdakr 0:81848bf6dd4a 19 chipDisable();
shivanandgowdakr 0:81848bf6dd4a 20 }
shivanandgowdakr 0:81848bf6dd4a 21
shivanandgowdakr 0:81848bf6dd4a 22 int EE25LC1024::ReleaseDPD_ReadSign(void)
shivanandgowdakr 0:81848bf6dd4a 23 {
shivanandgowdakr 0:81848bf6dd4a 24 chipEnable();
shivanandgowdakr 1:c389d5f4913d 25 this->write(ReadID);
shivanandgowdakr 0:81848bf6dd4a 26 this->write(DUMMY_ADDR);
shivanandgowdakr 0:81848bf6dd4a 27 this->write(DUMMY_ADDR);
shivanandgowdakr 0:81848bf6dd4a 28 this->write(DUMMY_ADDR);
shivanandgowdakr 0:81848bf6dd4a 29 int response = this->write(DUMMY_ADDR);
shivanandgowdakr 0:81848bf6dd4a 30 chipDisable();
shivanandgowdakr 0:81848bf6dd4a 31 return response;
shivanandgowdakr 0:81848bf6dd4a 32 }
shivanandgowdakr 0:81848bf6dd4a 33
shivanandgowdakr 0:81848bf6dd4a 34
shivanandgowdakr 0:81848bf6dd4a 35 int EE25LC1024::readByte(int addr)
shivanandgowdakr 0:81848bf6dd4a 36 {
shivanandgowdakr 0:81848bf6dd4a 37 chipEnable();
shivanandgowdakr 0:81848bf6dd4a 38 this->write(READ);
shivanandgowdakr 0:81848bf6dd4a 39 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 0:81848bf6dd4a 40 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 0:81848bf6dd4a 41 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 0:81848bf6dd4a 42 int response = this->write(DUMMY_ADDR);
shivanandgowdakr 0:81848bf6dd4a 43 chipDisable();
shivanandgowdakr 0:81848bf6dd4a 44 return response;
shivanandgowdakr 0:81848bf6dd4a 45 }
shivanandgowdakr 0:81848bf6dd4a 46
shivanandgowdakr 0:81848bf6dd4a 47 void EE25LC1024::readStream(int addr, char* buf, int count)
shivanandgowdakr 0:81848bf6dd4a 48 {
shivanandgowdakr 0:81848bf6dd4a 49 if (count < 1)
shivanandgowdakr 0:81848bf6dd4a 50 return;
shivanandgowdakr 0:81848bf6dd4a 51 chipEnable();
shivanandgowdakr 0:81848bf6dd4a 52 this->write(READ);
shivanandgowdakr 0:81848bf6dd4a 53 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 0:81848bf6dd4a 54 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 0:81848bf6dd4a 55 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 0:81848bf6dd4a 56 for (int i = 0; i < count; i++) {
shivanandgowdakr 0:81848bf6dd4a 57 buf[i] = this->write(DUMMY_ADDR);
shivanandgowdakr 1:c389d5f4913d 58 // printf("i= %d :%c \r\n",i,buf[i]);
shivanandgowdakr 0:81848bf6dd4a 59 }
shivanandgowdakr 0:81848bf6dd4a 60 chipDisable();
shivanandgowdakr 1:c389d5f4913d 61 // wait_ms(2);
shivanandgowdakr 0:81848bf6dd4a 62 }
shivanandgowdakr 0:81848bf6dd4a 63
shivanandgowdakr 0:81848bf6dd4a 64 // WRITING
shivanandgowdakr 0:81848bf6dd4a 65 void EE25LC1024::writeByte(int addr, int data)
shivanandgowdakr 0:81848bf6dd4a 66 {
shivanandgowdakr 0:81848bf6dd4a 67 writeEnable();
shivanandgowdakr 0:81848bf6dd4a 68 chipEnable();
shivanandgowdakr 0:81848bf6dd4a 69 this->write(WRITE);
shivanandgowdakr 0:81848bf6dd4a 70 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 0:81848bf6dd4a 71 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 0:81848bf6dd4a 72 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 0:81848bf6dd4a 73 this->write(data);
shivanandgowdakr 0:81848bf6dd4a 74 chipDisable();
shivanandgowdakr 0:81848bf6dd4a 75 writeDisable();
shivanandgowdakr 1:c389d5f4913d 76 uint8_t busy=checkIfBusy();
shivanandgowdakr 1:c389d5f4913d 77 while(busy)
shivanandgowdakr 1:c389d5f4913d 78 {
shivanandgowdakr 1:c389d5f4913d 79 busy=checkIfBusy();
shivanandgowdakr 1:c389d5f4913d 80 }
shivanandgowdakr 0:81848bf6dd4a 81 // wait(WAIT_TIME);//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails
shivanandgowdakr 0:81848bf6dd4a 82 }
shivanandgowdakr 0:81848bf6dd4a 83
shivanandgowdakr 0:81848bf6dd4a 84 void EE25LC1024::writeStream(int addr, char* buf, int count)
shivanandgowdakr 0:81848bf6dd4a 85 {
shivanandgowdakr 1:c389d5f4913d 86
shivanandgowdakr 0:81848bf6dd4a 87 if (count < 1)
shivanandgowdakr 0:81848bf6dd4a 88 return;
shivanandgowdakr 1:c389d5f4913d 89
shivanandgowdakr 0:81848bf6dd4a 90 writeEnable();
shivanandgowdakr 1:c389d5f4913d 91
shivanandgowdakr 1:c389d5f4913d 92
shivanandgowdakr 1:c389d5f4913d 93
shivanandgowdakr 0:81848bf6dd4a 94 chipEnable();
shivanandgowdakr 0:81848bf6dd4a 95 this->write(WRITE);
shivanandgowdakr 0:81848bf6dd4a 96 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 0:81848bf6dd4a 97 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 0:81848bf6dd4a 98 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 0:81848bf6dd4a 99 for (int i = 0; i < count; i++) {
shivanandgowdakr 0:81848bf6dd4a 100 this->write(buf[i]);
shivanandgowdakr 0:81848bf6dd4a 101 }
shivanandgowdakr 0:81848bf6dd4a 102 chipDisable();
shivanandgowdakr 0:81848bf6dd4a 103 writeDisable();
shivanandgowdakr 1:c389d5f4913d 104 wait_ms(2);
shivanandgowdakr 1:c389d5f4913d 105 uint8_t busy= checkIfBusy();
shivanandgowdakr 1:c389d5f4913d 106 while(busy==1)
shivanandgowdakr 1:c389d5f4913d 107 {
shivanandgowdakr 1:c389d5f4913d 108 //printf("Busy :%d\r\n",busy);
shivanandgowdakr 1:c389d5f4913d 109 wait_ms(1);
shivanandgowdakr 1:c389d5f4913d 110 busy= checkIfBusy();
shivanandgowdakr 1:c389d5f4913d 111 }
shivanandgowdakr 1:c389d5f4913d 112 }
shivanandgowdakr 0:81848bf6dd4a 113
shivanandgowdakr 0:81848bf6dd4a 114 void EE25LC1024::writeString(int addr, string str)
shivanandgowdakr 0:81848bf6dd4a 115 {
shivanandgowdakr 0:81848bf6dd4a 116 if (str.length() < 1)
shivanandgowdakr 0:81848bf6dd4a 117 return;
shivanandgowdakr 0:81848bf6dd4a 118 writeEnable();
shivanandgowdakr 0:81848bf6dd4a 119 chipEnable();
shivanandgowdakr 0:81848bf6dd4a 120 this->write(WRITE);
shivanandgowdakr 0:81848bf6dd4a 121 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 0:81848bf6dd4a 122 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 0:81848bf6dd4a 123 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 0:81848bf6dd4a 124 for (int i = 0; i < str.length(); i++)
shivanandgowdakr 0:81848bf6dd4a 125 this->write(str.at(i));
shivanandgowdakr 0:81848bf6dd4a 126 chipDisable();
shivanandgowdakr 0:81848bf6dd4a 127 writeDisable();
shivanandgowdakr 1:c389d5f4913d 128 uint8_t busy=checkIfBusy();
shivanandgowdakr 1:c389d5f4913d 129 while(busy)
shivanandgowdakr 1:c389d5f4913d 130 {
shivanandgowdakr 1:c389d5f4913d 131 busy=checkIfBusy();
shivanandgowdakr 1:c389d5f4913d 132 }//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails
shivanandgowdakr 0:81848bf6dd4a 133 }
shivanandgowdakr 0:81848bf6dd4a 134
shivanandgowdakr 0:81848bf6dd4a 135
shivanandgowdakr 0:81848bf6dd4a 136
shivanandgowdakr 0:81848bf6dd4a 137 uint8_t EE25LC1024::readRegister()
shivanandgowdakr 0:81848bf6dd4a 138 {
shivanandgowdakr 0:81848bf6dd4a 139
shivanandgowdakr 0:81848bf6dd4a 140 chipEnable();
shivanandgowdakr 0:81848bf6dd4a 141 this->write(RDSR);
shivanandgowdakr 0:81848bf6dd4a 142 uint8_t val=this->write(DUMMY_ADDR);
shivanandgowdakr 0:81848bf6dd4a 143 chipDisable();
shivanandgowdakr 0:81848bf6dd4a 144 //wait(WAIT_TIME);//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails
shivanandgowdakr 0:81848bf6dd4a 145 //printf("value of reg is %X \r\n",val);
shivanandgowdakr 0:81848bf6dd4a 146 return(val);
shivanandgowdakr 0:81848bf6dd4a 147 }
shivanandgowdakr 0:81848bf6dd4a 148 //ERASING
shivanandgowdakr 0:81848bf6dd4a 149 void EE25LC1024::chipErase()
shivanandgowdakr 0:81848bf6dd4a 150 {
shivanandgowdakr 0:81848bf6dd4a 151 writeEnable();
shivanandgowdakr 0:81848bf6dd4a 152 chipEnable();
shivanandgowdakr 0:81848bf6dd4a 153 this->write(CE);
shivanandgowdakr 0:81848bf6dd4a 154 chipDisable();
shivanandgowdakr 0:81848bf6dd4a 155 writeDisable();
shivanandgowdakr 1:c389d5f4913d 156 uint8_t busy=checkIfBusy();
shivanandgowdakr 1:c389d5f4913d 157 while(busy)
shivanandgowdakr 1:c389d5f4913d 158 {
shivanandgowdakr 1:c389d5f4913d 159 busy=checkIfBusy();
shivanandgowdakr 1:c389d5f4913d 160 }//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails
shivanandgowdakr 0:81848bf6dd4a 161 }
shivanandgowdakr 0:81848bf6dd4a 162
shivanandgowdakr 0:81848bf6dd4a 163
shivanandgowdakr 0:81848bf6dd4a 164 void EE25LC1024::sectorErase(int addr)
shivanandgowdakr 0:81848bf6dd4a 165 {
shivanandgowdakr 0:81848bf6dd4a 166 writeEnable();
shivanandgowdakr 0:81848bf6dd4a 167 chipEnable();
shivanandgowdakr 0:81848bf6dd4a 168 this->write(SE);
shivanandgowdakr 0:81848bf6dd4a 169 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 0:81848bf6dd4a 170 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 0:81848bf6dd4a 171 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 0:81848bf6dd4a 172 chipDisable();
shivanandgowdakr 0:81848bf6dd4a 173 writeDisable();
shivanandgowdakr 1:c389d5f4913d 174 uint8_t busy=checkIfBusy();
shivanandgowdakr 1:c389d5f4913d 175 while(busy)
shivanandgowdakr 1:c389d5f4913d 176 {
shivanandgowdakr 1:c389d5f4913d 177 busy=checkIfBusy();
shivanandgowdakr 1:c389d5f4913d 178 }//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails
shivanandgowdakr 0:81848bf6dd4a 179 }
shivanandgowdakr 0:81848bf6dd4a 180
shivanandgowdakr 0:81848bf6dd4a 181 void EE25LC1024::pageErase(int addr)
shivanandgowdakr 0:81848bf6dd4a 182 {
shivanandgowdakr 0:81848bf6dd4a 183
shivanandgowdakr 0:81848bf6dd4a 184 writeEnable();
shivanandgowdakr 1:c389d5f4913d 185
shivanandgowdakr 0:81848bf6dd4a 186 chipEnable();
shivanandgowdakr 1:c389d5f4913d 187
shivanandgowdakr 0:81848bf6dd4a 188 this->write(SE);
shivanandgowdakr 0:81848bf6dd4a 189 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 0:81848bf6dd4a 190 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 0:81848bf6dd4a 191 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 0:81848bf6dd4a 192 chipDisable();
shivanandgowdakr 0:81848bf6dd4a 193 writeDisable();
shivanandgowdakr 1:c389d5f4913d 194 uint8_t busy=checkIfBusy();
shivanandgowdakr 1:c389d5f4913d 195 while(busy)
shivanandgowdakr 1:c389d5f4913d 196 {
shivanandgowdakr 1:c389d5f4913d 197 busy=checkIfBusy();
shivanandgowdakr 1:c389d5f4913d 198 }//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails
shivanandgowdakr 0:81848bf6dd4a 199
shivanandgowdakr 0:81848bf6dd4a 200
shivanandgowdakr 0:81848bf6dd4a 201 }
shivanandgowdakr 0:81848bf6dd4a 202
shivanandgowdakr 0:81848bf6dd4a 203
shivanandgowdakr 0:81848bf6dd4a 204 uint8_t EE25LC1024::checkIfBusy()
shivanandgowdakr 0:81848bf6dd4a 205 {
shivanandgowdakr 0:81848bf6dd4a 206 uint8_t value=readRegister();
shivanandgowdakr 1:c389d5f4913d 207 // printf("\r\n Value of Status Reg=%X\r\n\r\n",value);
shivanandgowdakr 1:c389d5f4913d 208 if((value & 0x01)==0x01 )
shivanandgowdakr 1:c389d5f4913d 209 {
shivanandgowdakr 1:c389d5f4913d 210 wait_ms(1);
shivanandgowdakr 0:81848bf6dd4a 211 return 1;
shivanandgowdakr 1:c389d5f4913d 212 }
shivanandgowdakr 0:81848bf6dd4a 213 else
shivanandgowdakr 1:c389d5f4913d 214 {
shivanandgowdakr 1:c389d5f4913d 215 wait_ms(1);
shivanandgowdakr 0:81848bf6dd4a 216 return 0;
shivanandgowdakr 1:c389d5f4913d 217 }
shivanandgowdakr 0:81848bf6dd4a 218 }
shivanandgowdakr 0:81848bf6dd4a 219
shivanandgowdakr 0:81848bf6dd4a 220 void EE25LC1024::writeRegister(uint8_t regValue)
shivanandgowdakr 0:81848bf6dd4a 221 {
shivanandgowdakr 0:81848bf6dd4a 222 writeEnable();
shivanandgowdakr 0:81848bf6dd4a 223 chipEnable();
shivanandgowdakr 0:81848bf6dd4a 224 this->write(WRSR);
shivanandgowdakr 0:81848bf6dd4a 225 this->write(regValue);
shivanandgowdakr 0:81848bf6dd4a 226 chipDisable();
shivanandgowdakr 0:81848bf6dd4a 227 writeDisable();
shivanandgowdakr 0:81848bf6dd4a 228 wait(WAIT_TIME);//instead of wait poll for WIP flag of status reg or use checkIfBusy() function...see main for more dtails
shivanandgowdakr 0:81848bf6dd4a 229
shivanandgowdakr 0:81848bf6dd4a 230 }
shivanandgowdakr 0:81848bf6dd4a 231
shivanandgowdakr 0:81848bf6dd4a 232
shivanandgowdakr 0:81848bf6dd4a 233 void EE25LC1024::writeLong(int addr, long value)
shivanandgowdakr 0:81848bf6dd4a 234 {
shivanandgowdakr 0:81848bf6dd4a 235 //Decomposition from a long to 4 bytes by using bitshift.
shivanandgowdakr 0:81848bf6dd4a 236 //One = Most significant -> Four = Least significant byte
shivanandgowdakr 0:81848bf6dd4a 237 uint8_t four = (value & 0xFF);
shivanandgowdakr 0:81848bf6dd4a 238 uint8_t three = ((value >> 8) & 0xFF);
shivanandgowdakr 0:81848bf6dd4a 239 uint8_t two = ((value >> 16) & 0xFF);
shivanandgowdakr 0:81848bf6dd4a 240 uint8_t one = ((value >> 24) & 0xFF);
shivanandgowdakr 0:81848bf6dd4a 241
shivanandgowdakr 0:81848bf6dd4a 242 writeEnable();
shivanandgowdakr 0:81848bf6dd4a 243 chipEnable();
shivanandgowdakr 0:81848bf6dd4a 244 this->write(WRITE);
shivanandgowdakr 0:81848bf6dd4a 245 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 0:81848bf6dd4a 246 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 0:81848bf6dd4a 247 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 0:81848bf6dd4a 248 this->write(four);
shivanandgowdakr 0:81848bf6dd4a 249 this->write(three);
shivanandgowdakr 0:81848bf6dd4a 250 this->write(two);
shivanandgowdakr 0:81848bf6dd4a 251 this->write(one);
shivanandgowdakr 0:81848bf6dd4a 252 chipDisable();
shivanandgowdakr 0:81848bf6dd4a 253 writeDisable();
shivanandgowdakr 1:c389d5f4913d 254 uint8_t busy=checkIfBusy();
shivanandgowdakr 1:c389d5f4913d 255 while(busy)
shivanandgowdakr 1:c389d5f4913d 256 {
shivanandgowdakr 1:c389d5f4913d 257 busy=checkIfBusy();
shivanandgowdakr 1:c389d5f4913d 258 }
shivanandgowdakr 0:81848bf6dd4a 259 }
shivanandgowdakr 0:81848bf6dd4a 260
shivanandgowdakr 1:c389d5f4913d 261 long EE25LC1024::readLong1(int addr)
shivanandgowdakr 0:81848bf6dd4a 262 {
shivanandgowdakr 0:81848bf6dd4a 263 //Read the 4 bytes from the eeprom memory.
shivanandgowdakr 0:81848bf6dd4a 264 chipEnable();
shivanandgowdakr 0:81848bf6dd4a 265 this->write(READ);
shivanandgowdakr 0:81848bf6dd4a 266 this->write((addr & ADDR_BMASK2) >> ADDR_BSHIFT2);
shivanandgowdakr 0:81848bf6dd4a 267 this->write((addr & ADDR_BMASK1) >> ADDR_BSHIFT1);
shivanandgowdakr 0:81848bf6dd4a 268 this->write((addr & ADDR_BMASK0) >> ADDR_BSHIFT0);
shivanandgowdakr 0:81848bf6dd4a 269
shivanandgowdakr 0:81848bf6dd4a 270 long four = this->write(DUMMY_ADDR);
shivanandgowdakr 0:81848bf6dd4a 271 long three = this->write(DUMMY_ADDR);
shivanandgowdakr 0:81848bf6dd4a 272 long two = this->write(DUMMY_ADDR);
shivanandgowdakr 0:81848bf6dd4a 273 long one = this->write(DUMMY_ADDR);
shivanandgowdakr 0:81848bf6dd4a 274 chipDisable();
shivanandgowdakr 0:81848bf6dd4a 275 //Return the recomposed long by using bitshift.
shivanandgowdakr 0:81848bf6dd4a 276 return ((four << 0) & 0xFF) + ((three << 8) & 0xFFFF) + ((two << 16) & 0xFFFFFF) + ((one << 24) & 0xFFFFFFFF);
shivanandgowdakr 0:81848bf6dd4a 277
shivanandgowdakr 0:81848bf6dd4a 278 }
shivanandgowdakr 0:81848bf6dd4a 279
shivanandgowdakr 0:81848bf6dd4a 280
shivanandgowdakr 0:81848bf6dd4a 281 //ENABLE/DISABLE (private functions)
shivanandgowdakr 0:81848bf6dd4a 282 void EE25LC1024::writeEnable()
shivanandgowdakr 0:81848bf6dd4a 283 {
shivanandgowdakr 0:81848bf6dd4a 284 chipEnable();
shivanandgowdakr 0:81848bf6dd4a 285 this->write(WREN);
shivanandgowdakr 0:81848bf6dd4a 286 chipDisable();
shivanandgowdakr 0:81848bf6dd4a 287 }
shivanandgowdakr 0:81848bf6dd4a 288 void EE25LC1024::writeDisable()
shivanandgowdakr 0:81848bf6dd4a 289 {
shivanandgowdakr 0:81848bf6dd4a 290 chipEnable();
shivanandgowdakr 0:81848bf6dd4a 291 this->write(WRDI);
shivanandgowdakr 0:81848bf6dd4a 292 chipDisable();
shivanandgowdakr 0:81848bf6dd4a 293 }
shivanandgowdakr 0:81848bf6dd4a 294 void EE25LC1024::chipEnable()
shivanandgowdakr 0:81848bf6dd4a 295 {
shivanandgowdakr 0:81848bf6dd4a 296 _cs = 0;
shivanandgowdakr 0:81848bf6dd4a 297 }
shivanandgowdakr 0:81848bf6dd4a 298 void EE25LC1024::chipDisable()
shivanandgowdakr 0:81848bf6dd4a 299 {
shivanandgowdakr 0:81848bf6dd4a 300 _cs = 1;
shivanandgowdakr 0:81848bf6dd4a 301 }
shivanandgowdakr 0:81848bf6dd4a 302