canuck lehead / lib_mma8451q

mma8451q driver with a few minor modifications

Dependents:   Senet NAMote

Fork of lib_mma8451q by wayne roberts

mma8451q.h@7:a68d2ad81d11, 2017-07-31 (annotated)

Committer:
shaunkrnelson
Date:
Mon Jul 31 13:47:22 2017 -0400
Revision:
7:a68d2ad81d11
Parent:
4:b06535efa239 
Add header ifdef wrapper

Who changed what in which revision?

UserRevisionLine numberNew contents of line
shaunkrnelson 7:a68d2ad81d11 1 #ifndef __MMA8451Q_H__
shaunkrnelson 7:a68d2ad81d11 2 #define __MMA8451Q_H__
shaunkrnelson 7:a68d2ad81d11 3
dudmuck 0:cb0046a629c1 4 #include "mbed.h"
dudmuck 0:cb0046a629c1 5
dudmuck 0:cb0046a629c1 6 /* Xtrinsic accelerometer */
dudmuck 0:cb0046a629c1 7
dudmuck 0:cb0046a629c1 8 /*
dudmuck 0:cb0046a629c1 9 * MMA8451 Registers
dudmuck 0:cb0046a629c1 10 */
dudmuck 0:cb0046a629c1 11 #define MMA8451_STATUS 0x00
dudmuck 0:cb0046a629c1 12 #define MMA8451_OUT_X_MSB 0x01
dudmuck 0:cb0046a629c1 13 #define MMA8451_SYSMOD 0x0b //
dudmuck 0:cb0046a629c1 14 #define MMA8451_INT_SOURCE 0x0c //
dudmuck 0:cb0046a629c1 15 #define MMA8451_ID 0x0d
dudmuck 1:778b685c3ad0 16 #define MMA8451_PL_STATUS 0x10
dudmuck 2:4bc96749141e 17 #define MMA8451_PL_CFG 0x11
dudmuck 2:4bc96749141e 18 #define MMA8451_PL_COUNT 0x12 // orientation debounce
dudmuck 2:4bc96749141e 19 #define MMA8451_PL_BF_ZCOMP 0x13
dudmuck 2:4bc96749141e 20 #define MMA8451_PL_THS_REG 0x14
dudmuck 1:778b685c3ad0 21 #define MMA8451_FF_MT_SRC 0x16
dudmuck 0:cb0046a629c1 22 #define MMA8451_TRANSIENT_CFG 0x1d // transient enable
dudmuck 0:cb0046a629c1 23 #define MMA8451_TRANSIENT_SRC 0x1e // transient read/clear interrupt
dudmuck 0:cb0046a629c1 24 #define MMA8451_TRANSIENT_THS 0x1f // transient threshold
dudmuck 0:cb0046a629c1 25 #define MMA8451_TRANSIENT_COUNT 0x20 // transient debounce
dudmuck 1:778b685c3ad0 26 #define MMA8451_PULSE_SRC 0x22
dudmuck 0:cb0046a629c1 27 #define MMA8451_CTRL_REG1 0x2a
dudmuck 0:cb0046a629c1 28 #define MMA8451_CTRL_REG2 0x2b
dudmuck 1:778b685c3ad0 29 #define MMA8451_CTRL_REG3 0x2c // interrupt control
dudmuck 0:cb0046a629c1 30 #define MMA8451_CTRL_REG4 0x2d // interrupt enable
dudmuck 0:cb0046a629c1 31 #define MMA8451_CTRL_REG5 0x2e // interrupt pin selection
dudmuck 0:cb0046a629c1 32
shaunkrnelson 3:96faac0d688e 33
dudmuck 0:cb0046a629c1 34 typedef union {
dudmuck 0:cb0046a629c1 35 struct {
dudmuck 0:cb0046a629c1 36 int16_t x;
dudmuck 0:cb0046a629c1 37 int16_t y;
dudmuck 0:cb0046a629c1 38 int16_t z;
dudmuck 0:cb0046a629c1 39 } v;
dudmuck 0:cb0046a629c1 40 uint8_t octets[6];
dudmuck 0:cb0046a629c1 41 } mma_out_t;
dudmuck 0:cb0046a629c1 42
dudmuck 0:cb0046a629c1 43 typedef union {
dudmuck 0:cb0046a629c1 44 struct { // at 0x0c
dudmuck 0:cb0046a629c1 45 uint8_t SRC_DRDY : 1; // 0
dudmuck 0:cb0046a629c1 46 uint8_t reserved1 : 1; // 1
dudmuck 0:cb0046a629c1 47 uint8_t SRC_FF_MT : 1; // 2
dudmuck 0:cb0046a629c1 48 uint8_t SRC_PULSE : 1; // 3
dudmuck 0:cb0046a629c1 49 uint8_t SRC_LNDPRT : 1; // 4
dudmuck 0:cb0046a629c1 50 uint8_t SRC_TRANS : 1; // 5
dudmuck 0:cb0046a629c1 51 uint8_t reserved6 : 1; // 6
dudmuck 0:cb0046a629c1 52 uint8_t SRC_ASLP : 1; // 7
dudmuck 0:cb0046a629c1 53 } bits;
dudmuck 0:cb0046a629c1 54 uint8_t octet;
dudmuck 1:778b685c3ad0 55 } mma_int_source_t;
dudmuck 0:cb0046a629c1 56
dudmuck 2:4bc96749141e 57 typedef union {
dudmuck 2:4bc96749141e 58 struct { // at 0x10
dudmuck 2:4bc96749141e 59 uint8_t BAFRO : 1; // 0 0=front, 1=back
dudmuck 2:4bc96749141e 60 uint8_t LAPO : 2; // 1,2 up, down, right, left
dudmuck 2:4bc96749141e 61 uint8_t res : 3; // 3,4,5
dudmuck 2:4bc96749141e 62 uint8_t LO : 1; // 6 Z-tilt lockout
dudmuck 2:4bc96749141e 63 uint8_t NEWLP : 1; // 7 1 = BAFRO or LO has changed
dudmuck 2:4bc96749141e 64 } bits;
dudmuck 2:4bc96749141e 65 uint8_t octet;
dudmuck 2:4bc96749141e 66 } mma_pl_status_t;
dudmuck 2:4bc96749141e 67
dudmuck 0:cb0046a629c1 68 typedef union {
dudmuck 0:cb0046a629c1 69 struct { // at 0x1d
dudmuck 0:cb0046a629c1 70 uint8_t HPF_BYP : 1; // 0
dudmuck 0:cb0046a629c1 71 uint8_t XTEFE : 1; // 1
dudmuck 0:cb0046a629c1 72 uint8_t YTEFE : 1; // 2
dudmuck 0:cb0046a629c1 73 uint8_t ZTEFE : 1; // 3
dudmuck 0:cb0046a629c1 74 uint8_t ELE : 1; // 4
dudmuck 0:cb0046a629c1 75 uint8_t pad : 3; // 5,6,7
dudmuck 0:cb0046a629c1 76 } bits;
dudmuck 0:cb0046a629c1 77 uint8_t octet;
dudmuck 0:cb0046a629c1 78 } transient_cfg_t;
dudmuck 0:cb0046a629c1 79
dudmuck 0:cb0046a629c1 80 typedef union {
dudmuck 0:cb0046a629c1 81 struct { // at 0x1e
dudmuck 0:cb0046a629c1 82 uint8_t X_Trans_Pol : 1; // 0
dudmuck 0:cb0046a629c1 83 uint8_t XTRANSE : 1; // 1
dudmuck 0:cb0046a629c1 84 uint8_t Y_Trans_Pol : 1; // 2
dudmuck 0:cb0046a629c1 85 uint8_t YTRANSE : 1; // 3
dudmuck 0:cb0046a629c1 86 uint8_t Z_Trans_Pol : 1; // 4
dudmuck 0:cb0046a629c1 87 uint8_t ZTRANSE : 1; // 5
dudmuck 0:cb0046a629c1 88 uint8_t EA : 1; // 6
dudmuck 0:cb0046a629c1 89 uint8_t pad : 1; // 7
dudmuck 0:cb0046a629c1 90 } bits;
dudmuck 0:cb0046a629c1 91 uint8_t octet;
dudmuck 0:cb0046a629c1 92 } transient_src_t;
dudmuck 0:cb0046a629c1 93
dudmuck 0:cb0046a629c1 94 typedef union {
dudmuck 0:cb0046a629c1 95 struct { // at 0x2a
dudmuck 0:cb0046a629c1 96 uint8_t ACTIVE : 1; // 0
dudmuck 0:cb0046a629c1 97 uint8_t F_READ : 1; // 1
dudmuck 0:cb0046a629c1 98 uint8_t LNOISE : 1; // 2
dudmuck 0:cb0046a629c1 99 uint8_t DR : 3; // 3,4,5
dudmuck 0:cb0046a629c1 100 uint8_t ASLP_RATE : 2; // 6,7
dudmuck 0:cb0046a629c1 101 } bits;
dudmuck 0:cb0046a629c1 102 uint8_t octet;
dudmuck 0:cb0046a629c1 103 } ctrl_reg1_t;
dudmuck 0:cb0046a629c1 104
dudmuck 0:cb0046a629c1 105 typedef union {
dudmuck 0:cb0046a629c1 106 struct { // at 0x2d
dudmuck 0:cb0046a629c1 107 uint8_t INT_EN_DRDY : 1; // 0
dudmuck 0:cb0046a629c1 108 uint8_t reserved1 : 1; // 1
dudmuck 0:cb0046a629c1 109 uint8_t INT_EN_FF_MT : 1; // 2
dudmuck 0:cb0046a629c1 110 uint8_t INT_EN_PULSE : 1; // 3
dudmuck 0:cb0046a629c1 111 uint8_t INT_EN_LNDPRT : 1; // 4
dudmuck 0:cb0046a629c1 112 uint8_t INT_EN_TRANS : 1; // 5
dudmuck 0:cb0046a629c1 113 uint8_t reserved6 : 1; // 6
dudmuck 0:cb0046a629c1 114 uint8_t INT_EN_ASLP : 1; // 7
dudmuck 0:cb0046a629c1 115 } bits;
dudmuck 0:cb0046a629c1 116 uint8_t octet;
dudmuck 0:cb0046a629c1 117 } ctrl_reg4_t;
dudmuck 0:cb0046a629c1 118
dudmuck 0:cb0046a629c1 119 typedef union {
dudmuck 0:cb0046a629c1 120 struct { // at 0x2e
dudmuck 0:cb0046a629c1 121 uint8_t INT_CFG_DRDY : 1; // 0
dudmuck 0:cb0046a629c1 122 uint8_t reserved1 : 1; // 1
dudmuck 0:cb0046a629c1 123 uint8_t INT_CFG_FF_MT : 1; // 2
dudmuck 0:cb0046a629c1 124 uint8_t INT_CFG_PULSE : 1; // 3
dudmuck 0:cb0046a629c1 125 uint8_t INT_CFG_LNDPRT : 1; // 4
dudmuck 0:cb0046a629c1 126 uint8_t INT_CFG_TRANS : 1; // 5
dudmuck 0:cb0046a629c1 127 uint8_t reserved6 : 1; // 6
dudmuck 0:cb0046a629c1 128 uint8_t INT_CFG_ASLP : 1; // 7
dudmuck 0:cb0046a629c1 129 } bits;
dudmuck 0:cb0046a629c1 130 uint8_t octet;
dudmuck 0:cb0046a629c1 131 } ctrl_reg5_t;
dudmuck 0:cb0046a629c1 132
shaunkrnelson 3:96faac0d688e 133
shaunkrnelson 3:96faac0d688e 134 struct MMA_orientation
shaunkrnelson 3:96faac0d688e 135 {
shaunkrnelson 3:96faac0d688e 136 bool up;
shaunkrnelson 3:96faac0d688e 137 bool down;
shaunkrnelson 3:96faac0d688e 138 bool right;
shaunkrnelson 3:96faac0d688e 139 bool left;
shaunkrnelson 3:96faac0d688e 140 bool front;
shaunkrnelson 3:96faac0d688e 141 bool back;
shaunkrnelson 3:96faac0d688e 142 bool low;
shaunkrnelson 3:96faac0d688e 143
shaunkrnelson 4:b06535efa239 144 mma_pl_status_t pl_status;
shaunkrnelson 4:b06535efa239 145
shaunkrnelson 3:96faac0d688e 146 MMA_orientation()
shaunkrnelson 3:96faac0d688e 147 {
shaunkrnelson 3:96faac0d688e 148 reset();
shaunkrnelson 3:96faac0d688e 149 }
shaunkrnelson 3:96faac0d688e 150
shaunkrnelson 3:96faac0d688e 151 inline void reset()
shaunkrnelson 3:96faac0d688e 152 {
shaunkrnelson 3:96faac0d688e 153 up=down=right=left=front=back=low=false;
shaunkrnelson 4:b06535efa239 154 pl_status.octet = 0;
shaunkrnelson 3:96faac0d688e 155 }
shaunkrnelson 3:96faac0d688e 156
shaunkrnelson 3:96faac0d688e 157 bool operator==(const MMA_orientation &rhs)
shaunkrnelson 3:96faac0d688e 158 {
shaunkrnelson 3:96faac0d688e 159 return ((up == rhs.up) &&
shaunkrnelson 3:96faac0d688e 160 (down == rhs.down) &&
shaunkrnelson 3:96faac0d688e 161 (left == rhs.left) &&
shaunkrnelson 3:96faac0d688e 162 (front == rhs.front) &&
shaunkrnelson 3:96faac0d688e 163 (back == rhs.back) &&
shaunkrnelson 3:96faac0d688e 164 (low == rhs.low));
shaunkrnelson 3:96faac0d688e 165 }
shaunkrnelson 3:96faac0d688e 166
shaunkrnelson 3:96faac0d688e 167 bool operator!=(const MMA_orientation &rhs) { return !operator==(rhs); }
shaunkrnelson 3:96faac0d688e 168
shaunkrnelson 3:96faac0d688e 169
shaunkrnelson 3:96faac0d688e 170 };
shaunkrnelson 3:96faac0d688e 171
dudmuck 0:cb0046a629c1 172 class MMA8451Q {
dudmuck 0:cb0046a629c1 173 public:
dudmuck 1:778b685c3ad0 174 MMA8451Q(I2C& r, DigitalIn& int_pin);
dudmuck 0:cb0046a629c1 175 ~MMA8451Q();
dudmuck 0:cb0046a629c1 176 void print_regs(void);
dudmuck 0:cb0046a629c1 177 void set_active(char);
dudmuck 1:778b685c3ad0 178 bool get_active(void);
dudmuck 0:cb0046a629c1 179
dudmuck 0:cb0046a629c1 180 uint8_t read_single(uint8_t addr);
dudmuck 0:cb0046a629c1 181 void read(uint8_t addr, uint8_t *dst_buf, int length);
dudmuck 0:cb0046a629c1 182 void write(uint8_t addr, uint8_t data);
dudmuck 0:cb0046a629c1 183 void transient_detect(void);
dudmuck 2:4bc96749141e 184 void orient_detect(void);
dudmuck 2:4bc96749141e 185 uint8_t service(void); // returns 0 if no interrupt occurred
dudmuck 0:cb0046a629c1 186
shaunkrnelson 3:96faac0d688e 187 inline MMA_orientation& getOrientation() { return orientation; }
shaunkrnelson 3:96faac0d688e 188
dudmuck 2:4bc96749141e 189 bool verbose; // print interrupt event
dudmuck 0:cb0046a629c1 190 mma_out_t out;
dudmuck 0:cb0046a629c1 191 transient_cfg_t transient_cfg;
dudmuck 0:cb0046a629c1 192 ctrl_reg1_t ctrl_reg1;
dudmuck 0:cb0046a629c1 193 ctrl_reg4_t ctrl_reg4;
dudmuck 0:cb0046a629c1 194 ctrl_reg5_t ctrl_reg5;
dudmuck 0:cb0046a629c1 195
dudmuck 0:cb0046a629c1 196 private:
dudmuck 0:cb0046a629c1 197 I2C& m_i2c;
dudmuck 1:778b685c3ad0 198 DigitalIn& m_int_pin;
shaunkrnelson 3:96faac0d688e 199 MMA_orientation orientation;
dudmuck 0:cb0046a629c1 200 };
dudmuck 0:cb0046a629c1 201
shaunkrnelson 7:a68d2ad81d11 202 #endif