shao ziyang / mbed-src-kl05

mbed library sources

Dependents:   frdm_kl05z_gpio_test

Fork of mbed-src by mbed official

targets/hal/TARGET_NXP/TARGET_LPC43XX/analogin_api.c@285:31249416b6f9, 2014-08-15 (annotated)

Committer:
mbed_official
Date:
Fri Aug 15 16:30:08 2014 +0100
Revision:
285:31249416b6f9
Parent:
256:76fd9a263045 
Synchronized with git revision 601712595f49bbd2a2771c52cf3e84c9c7a591af



Full URL: https://github.com/mbedmicro/mbed/commit/601712595f49bbd2a2771c52cf3e84c9c7a591af/

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 20:4263a77256ae 1 /* mbed Microcontroller Library
bogdanm 20:4263a77256ae 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 20:4263a77256ae 3 *
bogdanm 20:4263a77256ae 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 20:4263a77256ae 5 * you may not use this file except in compliance with the License.
bogdanm 20:4263a77256ae 6 * You may obtain a copy of the License at
bogdanm 20:4263a77256ae 7 *
bogdanm 20:4263a77256ae 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 20:4263a77256ae 9 *
bogdanm 20:4263a77256ae 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 20:4263a77256ae 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 20:4263a77256ae 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 20:4263a77256ae 13 * See the License for the specific language governing permissions and
bogdanm 20:4263a77256ae 14 * limitations under the License.
bogdanm 20:4263a77256ae 15 *
bogdanm 20:4263a77256ae 16 * Ported to NXP LPC43XX by Micromint USA <support@micromint.com>
bogdanm 20:4263a77256ae 17 */
mbed_official 227:7bd0639b8911 18 #include "mbed_assert.h"
bogdanm 20:4263a77256ae 19 #include "analogin_api.h"
bogdanm 20:4263a77256ae 20 #include "cmsis.h"
bogdanm 20:4263a77256ae 21 #include "pinmap.h"
mbed_official 285:31249416b6f9 22 #include "mbed_error.h"
mbed_official 256:76fd9a263045 23 #include "gpio_api.h"
bogdanm 20:4263a77256ae 24
bogdanm 20:4263a77256ae 25 #define ANALOGIN_MEDIAN_FILTER 1
bogdanm 20:4263a77256ae 26
bogdanm 20:4263a77256ae 27 static inline int div_round_up(int x, int y) {
bogdanm 20:4263a77256ae 28 return (x + (y - 1)) / y;
bogdanm 20:4263a77256ae 29 }
bogdanm 20:4263a77256ae 30
bogdanm 20:4263a77256ae 31 static const PinMap PinMap_ADC[] = {
mbed_official 256:76fd9a263045 32 {P4_3, ADC0_0, 0},
mbed_official 256:76fd9a263045 33 {P4_1, ADC0_1, 0},
mbed_official 256:76fd9a263045 34 {PF_8, ADC0_2, 0},
mbed_official 256:76fd9a263045 35 {P7_5, ADC0_3, 0},
mbed_official 256:76fd9a263045 36 {P7_4, ADC0_4, 0},
mbed_official 256:76fd9a263045 37 {PF_10, ADC0_5, 0},
mbed_official 256:76fd9a263045 38 {PB_6, ADC0_6, 0},
mbed_official 256:76fd9a263045 39 {PC_3, ADC1_0, 0},
mbed_official 256:76fd9a263045 40 {PC_0, ADC1_1, 0},
mbed_official 256:76fd9a263045 41 {PF_9, ADC1_2, 0},
mbed_official 256:76fd9a263045 42 {PF_6, ADC1_3, 0},
mbed_official 256:76fd9a263045 43 {PF_5, ADC1_4, 0},
mbed_official 256:76fd9a263045 44 {PF_11, ADC1_5, 0},
mbed_official 256:76fd9a263045 45 {P7_7, ADC1_6, 0},
mbed_official 256:76fd9a263045 46 {PF_7, ADC1_7, 0},
mbed_official 256:76fd9a263045 47 {NC, NC, 0 }
bogdanm 20:4263a77256ae 48 };
bogdanm 20:4263a77256ae 49
bogdanm 20:4263a77256ae 50 void analogin_init(analogin_t *obj, PinName pin) {
mbed_official 256:76fd9a263045 51 ADCName name;
bogdanm 20:4263a77256ae 52
mbed_official 256:76fd9a263045 53 name = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
mbed_official 256:76fd9a263045 54 MBED_ASSERT(obj->adc != (LPC_ADC_T *)NC);
bogdanm 20:4263a77256ae 55
mbed_official 256:76fd9a263045 56 // Set ADC register, number and channel
mbed_official 256:76fd9a263045 57 obj->num = (name >> ADC0_7) ? 1 : 0;
mbed_official 256:76fd9a263045 58 obj->ch = name % (ADC0_7 + 1);
mbed_official 256:76fd9a263045 59 obj->adc = (LPC_ADC_T *) (obj->num > 0) ? LPC_ADC1 : LPC_ADC0;
bogdanm 20:4263a77256ae 60
mbed_official 256:76fd9a263045 61 // Reset pin function to GPIO
mbed_official 256:76fd9a263045 62 gpio_set(pin);
mbed_official 256:76fd9a263045 63 // Select ADC on analog function select register in SCU
mbed_official 256:76fd9a263045 64 LPC_SCU->ENAIO[obj->num] |= (1 << obj->ch);
mbed_official 256:76fd9a263045 65
bogdanm 20:4263a77256ae 66 // Calculate minimum clock divider
bogdanm 20:4263a77256ae 67 // clkdiv = divider - 1
mbed_official 256:76fd9a263045 68 uint32_t PCLK = SystemCoreClock;
bogdanm 20:4263a77256ae 69 uint32_t adcRate = 400000;
bogdanm 20:4263a77256ae 70 uint32_t clkdiv = div_round_up(PCLK, adcRate) - 1;
bogdanm 20:4263a77256ae 71
bogdanm 20:4263a77256ae 72 // Set the generic software-controlled ADC settings
mbed_official 256:76fd9a263045 73 obj->adc->CR = (0 << 0) // SEL: 0 = no channels selected
bogdanm 20:4263a77256ae 74 | (clkdiv << 8) // CLKDIV:
bogdanm 20:4263a77256ae 75 | (0 << 16) // BURST: 0 = software control
bogdanm 20:4263a77256ae 76 | (1 << 21) // PDN: 1 = operational
bogdanm 20:4263a77256ae 77 | (0 << 24) // START: 0 = no start
bogdanm 20:4263a77256ae 78 | (0 << 27); // EDGE: not applicable
bogdanm 20:4263a77256ae 79 }
bogdanm 20:4263a77256ae 80
bogdanm 20:4263a77256ae 81 static inline uint32_t adc_read(analogin_t *obj) {
mbed_official 256:76fd9a263045 82 uint32_t temp;
mbed_official 256:76fd9a263045 83 uint8_t channel = obj->ch;
mbed_official 256:76fd9a263045 84 LPC_ADC_T *pADC = obj->adc;
mbed_official 256:76fd9a263045 85
bogdanm 20:4263a77256ae 86 // Select the appropriate channel and start conversion
mbed_official 256:76fd9a263045 87 pADC->CR |= ADC_CR_CH_SEL(channel);
mbed_official 256:76fd9a263045 88 temp = pADC->CR & ~ADC_CR_START_MASK;
mbed_official 256:76fd9a263045 89 pADC->CR = temp | (ADC_CR_START_MODE_SEL(ADC_START_NOW));
bogdanm 20:4263a77256ae 90
mbed_official 256:76fd9a263045 91 // Wait for DONE bit and read data
mbed_official 256:76fd9a263045 92 while (!(pADC->STAT & ADC_CR_CH_SEL(channel)));
mbed_official 256:76fd9a263045 93 temp = pADC->DR[channel];
bogdanm 20:4263a77256ae 94
mbed_official 256:76fd9a263045 95 // Deselect channel and return result
mbed_official 256:76fd9a263045 96 pADC->CR &= ~ADC_CR_START_MASK;
mbed_official 256:76fd9a263045 97 pADC->CR &= ~ADC_CR_CH_SEL(channel);
mbed_official 256:76fd9a263045 98 return ADC_DR_RESULT(temp);
bogdanm 20:4263a77256ae 99 }
bogdanm 20:4263a77256ae 100
bogdanm 20:4263a77256ae 101 static inline void order(uint32_t *a, uint32_t *b) {
bogdanm 20:4263a77256ae 102 if (*a > *b) {
bogdanm 20:4263a77256ae 103 uint32_t t = *a;
bogdanm 20:4263a77256ae 104 *a = *b;
bogdanm 20:4263a77256ae 105 *b = t;
bogdanm 20:4263a77256ae 106 }
bogdanm 20:4263a77256ae 107 }
bogdanm 20:4263a77256ae 108
bogdanm 20:4263a77256ae 109 static inline uint32_t adc_read_u32(analogin_t *obj) {
bogdanm 20:4263a77256ae 110 uint32_t value;
bogdanm 20:4263a77256ae 111 #if ANALOGIN_MEDIAN_FILTER
bogdanm 20:4263a77256ae 112 uint32_t v1 = adc_read(obj);
bogdanm 20:4263a77256ae 113 uint32_t v2 = adc_read(obj);
bogdanm 20:4263a77256ae 114 uint32_t v3 = adc_read(obj);
bogdanm 20:4263a77256ae 115 order(&v1, &v2);
bogdanm 20:4263a77256ae 116 order(&v2, &v3);
bogdanm 20:4263a77256ae 117 order(&v1, &v2);
bogdanm 20:4263a77256ae 118 value = v2;
bogdanm 20:4263a77256ae 119 #else
bogdanm 20:4263a77256ae 120 value = adc_read(obj);
bogdanm 20:4263a77256ae 121 #endif
bogdanm 20:4263a77256ae 122 return value;
bogdanm 20:4263a77256ae 123 }
bogdanm 20:4263a77256ae 124
bogdanm 20:4263a77256ae 125 uint16_t analogin_read_u16(analogin_t *obj) {
bogdanm 20:4263a77256ae 126 uint32_t value = adc_read_u32(obj);
bogdanm 20:4263a77256ae 127
bogdanm 20:4263a77256ae 128 return (value << 6) | ((value >> 4) & 0x003F); // 10 bit
bogdanm 20:4263a77256ae 129 }
bogdanm 20:4263a77256ae 130
bogdanm 20:4263a77256ae 131 float analogin_read(analogin_t *obj) {
bogdanm 20:4263a77256ae 132 uint32_t value = adc_read_u32(obj);
bogdanm 20:4263a77256ae 133 return (float)value * (1.0f / (float)ADC_RANGE);
bogdanm 20:4263a77256ae 134 }