mbed library sources

Dependents:   frdm_kl05z_gpio_test

Fork of mbed-src by mbed official

Committer:
mbed_official
Date:
Wed Jun 11 16:00:09 2014 +0100
Revision:
227:7bd0639b8911
Parent:
20:4263a77256ae
Child:
256:76fd9a263045
Synchronized with git revision d58d532ebc0e0a96f4fffb8edefc082b71b964af

Full URL: https://github.com/mbedmicro/mbed/commit/d58d532ebc0e0a96f4fffb8edefc082b71b964af/

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 20:4263a77256ae 1 /* mbed Microcontroller Library
bogdanm 20:4263a77256ae 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 20:4263a77256ae 3 *
bogdanm 20:4263a77256ae 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 20:4263a77256ae 5 * you may not use this file except in compliance with the License.
bogdanm 20:4263a77256ae 6 * You may obtain a copy of the License at
bogdanm 20:4263a77256ae 7 *
bogdanm 20:4263a77256ae 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 20:4263a77256ae 9 *
bogdanm 20:4263a77256ae 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 20:4263a77256ae 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 20:4263a77256ae 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 20:4263a77256ae 13 * See the License for the specific language governing permissions and
bogdanm 20:4263a77256ae 14 * limitations under the License.
bogdanm 20:4263a77256ae 15 *
bogdanm 20:4263a77256ae 16 * Ported to NXP LPC43XX by Micromint USA <support@micromint.com>
bogdanm 20:4263a77256ae 17 */
mbed_official 227:7bd0639b8911 18 #include "mbed_assert.h"
bogdanm 20:4263a77256ae 19 #include "analogin_api.h"
bogdanm 20:4263a77256ae 20 #include "cmsis.h"
bogdanm 20:4263a77256ae 21 #include "pinmap.h"
bogdanm 20:4263a77256ae 22
bogdanm 20:4263a77256ae 23 #define ANALOGIN_MEDIAN_FILTER 1
bogdanm 20:4263a77256ae 24
bogdanm 20:4263a77256ae 25 static inline int div_round_up(int x, int y) {
bogdanm 20:4263a77256ae 26 return (x + (y - 1)) / y;
bogdanm 20:4263a77256ae 27 }
bogdanm 20:4263a77256ae 28
bogdanm 20:4263a77256ae 29 // ToDo: Add support for ADC1
bogdanm 20:4263a77256ae 30 static const PinMap PinMap_ADC[] = {
bogdanm 20:4263a77256ae 31 {P_ADC0, ADC0_0, 0x08},
bogdanm 20:4263a77256ae 32 {P_ADC1, ADC0_1, 0x07},
bogdanm 20:4263a77256ae 33 {P_ADC2, ADC0_2, 0x01},
bogdanm 20:4263a77256ae 34 {P_ADC3, ADC0_3, 0x08},
bogdanm 20:4263a77256ae 35 {P_ADC4, ADC0_4, 0x08},
bogdanm 20:4263a77256ae 36 {P_ADC5, ADC0_5, 0x08},
bogdanm 20:4263a77256ae 37 {NC , NC , 0 }
bogdanm 20:4263a77256ae 38 };
bogdanm 20:4263a77256ae 39
bogdanm 20:4263a77256ae 40 void analogin_init(analogin_t *obj, PinName pin) {
bogdanm 20:4263a77256ae 41 uint8_t num, chan;
bogdanm 20:4263a77256ae 42
bogdanm 20:4263a77256ae 43 obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
mbed_official 227:7bd0639b8911 44 MBED_ASSERT(obj->adc != (ADCName)NC);
bogdanm 20:4263a77256ae 45
bogdanm 20:4263a77256ae 46 // Configure the pin as GPIO input
bogdanm 20:4263a77256ae 47 if (pin < SFP_AIO0) {
bogdanm 20:4263a77256ae 48 pin_function(pin, (SCU_PINIO_PULLNONE | 0x0));
bogdanm 20:4263a77256ae 49 pin_mode(pin, PullNone);
bogdanm 20:4263a77256ae 50 num = (uint8_t)(obj->adc) / 8; // Heuristic?
bogdanm 20:4263a77256ae 51 chan = (uint8_t)(obj->adc) % 7;
bogdanm 20:4263a77256ae 52 } else {
bogdanm 20:4263a77256ae 53 num = MBED_ADC_NUM(pin);
bogdanm 20:4263a77256ae 54 chan = MBED_ADC_CHAN(pin);
bogdanm 20:4263a77256ae 55 }
bogdanm 20:4263a77256ae 56
bogdanm 20:4263a77256ae 57 // Calculate minimum clock divider
bogdanm 20:4263a77256ae 58 // clkdiv = divider - 1
bogdanm 20:4263a77256ae 59 uint32_t PCLK = SystemCoreClock;
bogdanm 20:4263a77256ae 60 uint32_t adcRate = 400000;
bogdanm 20:4263a77256ae 61 uint32_t clkdiv = div_round_up(PCLK, adcRate) - 1;
bogdanm 20:4263a77256ae 62
bogdanm 20:4263a77256ae 63 // Set the generic software-controlled ADC settings
bogdanm 20:4263a77256ae 64 LPC_ADC0->CR = (0 << 0) // SEL: 0 = no channels selected
bogdanm 20:4263a77256ae 65 | (clkdiv << 8) // CLKDIV:
bogdanm 20:4263a77256ae 66 | (0 << 16) // BURST: 0 = software control
bogdanm 20:4263a77256ae 67 | (1 << 21) // PDN: 1 = operational
bogdanm 20:4263a77256ae 68 | (0 << 24) // START: 0 = no start
bogdanm 20:4263a77256ae 69 | (0 << 27); // EDGE: not applicable
bogdanm 20:4263a77256ae 70
bogdanm 20:4263a77256ae 71 // Select ADC on analog function select register in SCU
bogdanm 20:4263a77256ae 72 LPC_SCU->ENAIO[num] |= 1UL << chan;
bogdanm 20:4263a77256ae 73 }
bogdanm 20:4263a77256ae 74
bogdanm 20:4263a77256ae 75 static inline uint32_t adc_read(analogin_t *obj) {
bogdanm 20:4263a77256ae 76 // Select the appropriate channel and start conversion
bogdanm 20:4263a77256ae 77 LPC_ADC0->CR &= ~0xFF;
bogdanm 20:4263a77256ae 78 LPC_ADC0->CR |= 1 << (int)obj->adc;
bogdanm 20:4263a77256ae 79 LPC_ADC0->CR |= 1 << 24;
bogdanm 20:4263a77256ae 80
bogdanm 20:4263a77256ae 81 // Repeatedly get the sample data until DONE bit
bogdanm 20:4263a77256ae 82 unsigned int data;
bogdanm 20:4263a77256ae 83 do {
bogdanm 20:4263a77256ae 84 data = LPC_ADC0->GDR;
bogdanm 20:4263a77256ae 85 } while ((data & ((unsigned int)1 << 31)) == 0);
bogdanm 20:4263a77256ae 86
bogdanm 20:4263a77256ae 87 // Stop conversion
bogdanm 20:4263a77256ae 88 LPC_ADC0->CR &= ~(1 << 24);
bogdanm 20:4263a77256ae 89
bogdanm 20:4263a77256ae 90 return (data >> 6) & ADC_RANGE; // 10 bit
bogdanm 20:4263a77256ae 91 }
bogdanm 20:4263a77256ae 92
bogdanm 20:4263a77256ae 93 static inline void order(uint32_t *a, uint32_t *b) {
bogdanm 20:4263a77256ae 94 if (*a > *b) {
bogdanm 20:4263a77256ae 95 uint32_t t = *a;
bogdanm 20:4263a77256ae 96 *a = *b;
bogdanm 20:4263a77256ae 97 *b = t;
bogdanm 20:4263a77256ae 98 }
bogdanm 20:4263a77256ae 99 }
bogdanm 20:4263a77256ae 100
bogdanm 20:4263a77256ae 101 static inline uint32_t adc_read_u32(analogin_t *obj) {
bogdanm 20:4263a77256ae 102 uint32_t value;
bogdanm 20:4263a77256ae 103 #if ANALOGIN_MEDIAN_FILTER
bogdanm 20:4263a77256ae 104 uint32_t v1 = adc_read(obj);
bogdanm 20:4263a77256ae 105 uint32_t v2 = adc_read(obj);
bogdanm 20:4263a77256ae 106 uint32_t v3 = adc_read(obj);
bogdanm 20:4263a77256ae 107 order(&v1, &v2);
bogdanm 20:4263a77256ae 108 order(&v2, &v3);
bogdanm 20:4263a77256ae 109 order(&v1, &v2);
bogdanm 20:4263a77256ae 110 value = v2;
bogdanm 20:4263a77256ae 111 #else
bogdanm 20:4263a77256ae 112 value = adc_read(obj);
bogdanm 20:4263a77256ae 113 #endif
bogdanm 20:4263a77256ae 114 return value;
bogdanm 20:4263a77256ae 115 }
bogdanm 20:4263a77256ae 116
bogdanm 20:4263a77256ae 117 uint16_t analogin_read_u16(analogin_t *obj) {
bogdanm 20:4263a77256ae 118 uint32_t value = adc_read_u32(obj);
bogdanm 20:4263a77256ae 119
bogdanm 20:4263a77256ae 120 return (value << 6) | ((value >> 4) & 0x003F); // 10 bit
bogdanm 20:4263a77256ae 121 }
bogdanm 20:4263a77256ae 122
bogdanm 20:4263a77256ae 123 float analogin_read(analogin_t *obj) {
bogdanm 20:4263a77256ae 124 uint32_t value = adc_read_u32(obj);
bogdanm 20:4263a77256ae 125 return (float)value * (1.0f / (float)ADC_RANGE);
bogdanm 20:4263a77256ae 126 }