mbed library sources
Dependents: frdm_kl05z_gpio_test
Fork of mbed-src by
targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/us_ticker.c@54:24d77221bceb, 2013-12-07 (annotated)
- Committer:
- mbed_official
- Date:
- Sat Dec 07 12:45:04 2013 +0000
- Revision:
- 54:24d77221bceb
- Parent:
- 52:a51c77007319
- Child:
- 70:c1fbde68b492
Synchronized with git revision 2b8e05e0020d3b14d38f2de0b0f00a00b43e571b
Full URL: https://github.com/mbedmicro/mbed/commit/2b8e05e0020d3b14d38f2de0b0f00a00b43e571b/
- the timer data structures were not properly initialized
- changed slave timer mode to external clock 1 (section 15.3.15 of the manual)
- avoid a possible race condition when concatenating the values of the
two 16-bit timers
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 52:a51c77007319 | 1 | /* mbed Microcontroller Library |
mbed_official | 52:a51c77007319 | 2 | * Copyright (c) 2006-2013 ARM Limited |
mbed_official | 52:a51c77007319 | 3 | * |
mbed_official | 52:a51c77007319 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
mbed_official | 52:a51c77007319 | 5 | * you may not use this file except in compliance with the License. |
mbed_official | 52:a51c77007319 | 6 | * You may obtain a copy of the License at |
mbed_official | 52:a51c77007319 | 7 | * |
mbed_official | 52:a51c77007319 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
mbed_official | 52:a51c77007319 | 9 | * |
mbed_official | 52:a51c77007319 | 10 | * Unless required by applicable law or agreed to in writing, software |
mbed_official | 52:a51c77007319 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
mbed_official | 52:a51c77007319 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
mbed_official | 52:a51c77007319 | 13 | * See the License for the specific language governing permissions and |
mbed_official | 52:a51c77007319 | 14 | * limitations under the License. |
mbed_official | 52:a51c77007319 | 15 | */ |
mbed_official | 52:a51c77007319 | 16 | #include <stddef.h> |
mbed_official | 52:a51c77007319 | 17 | #include "us_ticker_api.h" |
mbed_official | 52:a51c77007319 | 18 | #include "PeripheralNames.h" |
mbed_official | 52:a51c77007319 | 19 | |
mbed_official | 52:a51c77007319 | 20 | int us_ticker_inited = 0; |
mbed_official | 52:a51c77007319 | 21 | |
mbed_official | 52:a51c77007319 | 22 | void us_ticker_init(void) { |
mbed_official | 52:a51c77007319 | 23 | |
mbed_official | 52:a51c77007319 | 24 | TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; |
mbed_official | 52:a51c77007319 | 25 | TIM_OCInitTypeDef TIM_OCInitStructure; |
mbed_official | 52:a51c77007319 | 26 | |
mbed_official | 52:a51c77007319 | 27 | if (us_ticker_inited) return; |
mbed_official | 52:a51c77007319 | 28 | us_ticker_inited = 1; |
mbed_official | 52:a51c77007319 | 29 | |
mbed_official | 52:a51c77007319 | 30 | // Enable Timers clock |
mbed_official | 52:a51c77007319 | 31 | RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE); |
mbed_official | 52:a51c77007319 | 32 | RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE); |
mbed_official | 52:a51c77007319 | 33 | |
mbed_official | 52:a51c77007319 | 34 | // Time base configuration |
mbed_official | 52:a51c77007319 | 35 | // TIM1 is used as "master", "TIM4" as "slave". TIM4 is clocked by TIM1. |
mbed_official | 54:24d77221bceb | 36 | TIM_TimeBaseStructInit(&TIM_TimeBaseStructure); |
mbed_official | 52:a51c77007319 | 37 | TIM_TimeBaseStructure.TIM_Period = 0xFFFF; |
mbed_official | 52:a51c77007319 | 38 | TIM_TimeBaseStructure.TIM_Prescaler = (uint16_t)(SystemCoreClock / 1000000) - 1; // 1 µs tick |
mbed_official | 52:a51c77007319 | 39 | TIM_TimeBaseStructure.TIM_ClockDivision = 0; |
mbed_official | 52:a51c77007319 | 40 | TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; |
mbed_official | 52:a51c77007319 | 41 | TIM_TimeBaseInit(TIM1, &TIM_TimeBaseStructure); |
mbed_official | 52:a51c77007319 | 42 | TIM_TimeBaseStructure.TIM_Prescaler = 0; |
mbed_official | 52:a51c77007319 | 43 | TIM_TimeBaseInit(TIM4, &TIM_TimeBaseStructure); |
mbed_official | 52:a51c77007319 | 44 | |
mbed_official | 52:a51c77007319 | 45 | // Master timer configuration |
mbed_official | 54:24d77221bceb | 46 | TIM_OCStructInit(&TIM_OCInitStructure); |
mbed_official | 52:a51c77007319 | 47 | TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_Toggle; |
mbed_official | 52:a51c77007319 | 48 | TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; |
mbed_official | 52:a51c77007319 | 49 | TIM_OCInitStructure.TIM_Pulse = 0; |
mbed_official | 52:a51c77007319 | 50 | TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High; |
mbed_official | 52:a51c77007319 | 51 | TIM_OC1Init(TIM1, &TIM_OCInitStructure); |
mbed_official | 52:a51c77007319 | 52 | TIM_SelectMasterSlaveMode(TIM1, TIM_MasterSlaveMode_Enable); |
mbed_official | 52:a51c77007319 | 53 | TIM_SelectOutputTrigger(TIM1, TIM_TRGOSource_Update); |
mbed_official | 52:a51c77007319 | 54 | |
mbed_official | 52:a51c77007319 | 55 | // Slave timer configuration |
mbed_official | 54:24d77221bceb | 56 | TIM_SelectSlaveMode(TIM4, TIM_SlaveMode_External1); |
mbed_official | 52:a51c77007319 | 57 | TIM_SelectInputTrigger(TIM4, TIM_TS_ITR0); |
mbed_official | 52:a51c77007319 | 58 | |
mbed_official | 52:a51c77007319 | 59 | // Enable timers |
mbed_official | 52:a51c77007319 | 60 | TIM_Cmd(TIM4, ENABLE); |
mbed_official | 52:a51c77007319 | 61 | TIM_Cmd(TIM1, ENABLE); |
mbed_official | 52:a51c77007319 | 62 | } |
mbed_official | 52:a51c77007319 | 63 | |
mbed_official | 52:a51c77007319 | 64 | uint32_t us_ticker_read() { |
mbed_official | 54:24d77221bceb | 65 | uint32_t counter, counter2; |
mbed_official | 52:a51c77007319 | 66 | if (!us_ticker_inited) us_ticker_init(); |
mbed_official | 54:24d77221bceb | 67 | // A situation might appear when TIM1 overflows right after TIM4 is read and before the |
mbed_official | 54:24d77221bceb | 68 | // new (overflowed) value of TIM1 is read, which would make the code below consider the |
mbed_official | 54:24d77221bceb | 69 | // previous (incorrect) value of TIM4 and the new value of TIM1, which would return a |
mbed_official | 54:24d77221bceb | 70 | // value in the past. Avoid this by computing consecutive values of the timer until they |
mbed_official | 54:24d77221bceb | 71 | // are properly ordered. |
mbed_official | 54:24d77221bceb | 72 | counter = counter2 = (uint32_t)((uint32_t)TIM_GetCounter(TIM4) << 16) + (uint32_t)TIM_GetCounter(TIM1); |
mbed_official | 54:24d77221bceb | 73 | while (1) { |
mbed_official | 54:24d77221bceb | 74 | counter2 = (uint32_t)((uint32_t)TIM_GetCounter(TIM4) << 16) + (uint32_t)TIM_GetCounter(TIM1); |
mbed_official | 54:24d77221bceb | 75 | if (counter2 > counter) |
mbed_official | 54:24d77221bceb | 76 | break; |
mbed_official | 54:24d77221bceb | 77 | counter = counter2; |
mbed_official | 54:24d77221bceb | 78 | } |
mbed_official | 54:24d77221bceb | 79 | return counter2; |
mbed_official | 52:a51c77007319 | 80 | } |
mbed_official | 52:a51c77007319 | 81 | |
mbed_official | 52:a51c77007319 | 82 | void us_ticker_set_interrupt(unsigned int timestamp) { |
mbed_official | 52:a51c77007319 | 83 | if (timestamp > 0xFFFF) { |
mbed_official | 52:a51c77007319 | 84 | TIM_SetCompare1(TIM4, (uint16_t)((timestamp >> 16) & 0xFFFF)); |
mbed_official | 52:a51c77007319 | 85 | TIM_ITConfig(TIM4, TIM_IT_CC1, ENABLE); |
mbed_official | 52:a51c77007319 | 86 | NVIC_SetVector(TIM4_IRQn, (uint32_t)us_ticker_irq_handler); |
mbed_official | 52:a51c77007319 | 87 | NVIC_EnableIRQ(TIM4_IRQn); |
mbed_official | 52:a51c77007319 | 88 | } |
mbed_official | 52:a51c77007319 | 89 | else { |
mbed_official | 52:a51c77007319 | 90 | TIM_SetCompare1(TIM1, (uint16_t)timestamp); |
mbed_official | 52:a51c77007319 | 91 | TIM_ITConfig(TIM1, TIM_IT_CC1, ENABLE); |
mbed_official | 52:a51c77007319 | 92 | NVIC_SetVector(TIM1_CC_IRQn, (uint32_t)us_ticker_irq_handler); |
mbed_official | 52:a51c77007319 | 93 | NVIC_EnableIRQ(TIM1_CC_IRQn); |
mbed_official | 52:a51c77007319 | 94 | } |
mbed_official | 52:a51c77007319 | 95 | } |
mbed_official | 52:a51c77007319 | 96 | |
mbed_official | 52:a51c77007319 | 97 | void us_ticker_disable_interrupt(void) { |
mbed_official | 52:a51c77007319 | 98 | TIM_ITConfig(TIM1, TIM_IT_CC1, DISABLE); |
mbed_official | 52:a51c77007319 | 99 | TIM_ITConfig(TIM4, TIM_IT_CC1, DISABLE); |
mbed_official | 52:a51c77007319 | 100 | } |
mbed_official | 52:a51c77007319 | 101 | |
mbed_official | 52:a51c77007319 | 102 | void us_ticker_clear_interrupt(void) { |
mbed_official | 52:a51c77007319 | 103 | TIM_ClearITPendingBit(TIM1, TIM_IT_CC1); |
mbed_official | 52:a51c77007319 | 104 | TIM_ClearITPendingBit(TIM4, TIM_IT_CC1); |
mbed_official | 52:a51c77007319 | 105 | } |