mbed library sources

Dependents:   frdm_kl05z_gpio_test

Fork of mbed-src by mbed official

Committer:
mbed_official
Date:
Thu Aug 21 15:00:08 2014 +0100
Revision:
296:ec1b66a3d094
Parent:
targets/cmsis/TARGET_STM/TARGET_DISCO_F407VG/stm32f4xx_hal_nand.c@242:7074e42da0b2
Synchronized with git revision bbc120c4786e99dfa586e7a13f8638064f1e5938

Full URL: https://github.com/mbedmicro/mbed/commit/bbc120c4786e99dfa586e7a13f8638064f1e5938/

DISCO_F407VG - add USBDevice support and a variant - ARCH_MAX

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 133:d4dda5c437f0 1 /**
mbed_official 133:d4dda5c437f0 2 ******************************************************************************
mbed_official 133:d4dda5c437f0 3 * @file stm32f4xx_hal_nand.c
mbed_official 133:d4dda5c437f0 4 * @author MCD Application Team
mbed_official 242:7074e42da0b2 5 * @version V1.1.0RC2
mbed_official 242:7074e42da0b2 6 * @date 14-May-2014
mbed_official 133:d4dda5c437f0 7 * @brief NAND HAL module driver.
mbed_official 133:d4dda5c437f0 8 * This file provides a generic firmware to drive NAND memories mounted
mbed_official 133:d4dda5c437f0 9 * as external device.
mbed_official 133:d4dda5c437f0 10 *
mbed_official 133:d4dda5c437f0 11 @verbatim
mbed_official 133:d4dda5c437f0 12 ==============================================================================
mbed_official 133:d4dda5c437f0 13 ##### How to use this driver #####
mbed_official 133:d4dda5c437f0 14 ==============================================================================
mbed_official 133:d4dda5c437f0 15 [..]
mbed_official 133:d4dda5c437f0 16 This driver is a generic layered driver which contains a set of APIs used to
mbed_official 133:d4dda5c437f0 17 control NAND flash memories. It uses the FMC/FSMC layer functions to interface
mbed_official 133:d4dda5c437f0 18 with NAND devices. This driver is used as follows:
mbed_official 133:d4dda5c437f0 19
mbed_official 133:d4dda5c437f0 20 (+) NAND flash memory configuration sequence using the function HAL_NAND_Init()
mbed_official 133:d4dda5c437f0 21 with control and timing parameters for both common and attribute spaces.
mbed_official 133:d4dda5c437f0 22
mbed_official 133:d4dda5c437f0 23 (+) Read NAND flash memory maker and device IDs using the function
mbed_official 133:d4dda5c437f0 24 HAL_NAND_Read_ID(). The read information is stored in the NAND_ID_TypeDef
mbed_official 133:d4dda5c437f0 25 structure declared by the function caller.
mbed_official 133:d4dda5c437f0 26
mbed_official 133:d4dda5c437f0 27 (+) Access NAND flash memory by read/write operations using the functions
mbed_official 133:d4dda5c437f0 28 HAL_NAND_Read_Page()/HAL_NAND_Read_SpareArea(), HAL_NAND_Write_Page()/HAL_NAND_Write_SpareArea()
mbed_official 133:d4dda5c437f0 29 to read/write page(s)/spare area(s). These functions use specific device
mbed_official 133:d4dda5c437f0 30 information (Block, page size..) predefined by the user in the HAL_NAND_Info_TypeDef
mbed_official 133:d4dda5c437f0 31 structure. The read/write address information is contained by the Nand_Address_Typedef
mbed_official 133:d4dda5c437f0 32 structure passed as parameter.
mbed_official 133:d4dda5c437f0 33
mbed_official 133:d4dda5c437f0 34 (+) Perform NAND flash Reset chip operation using the function HAL_NAND_Reset().
mbed_official 133:d4dda5c437f0 35
mbed_official 133:d4dda5c437f0 36 (+) Perform NAND flash erase block operation using the function HAL_NAND_Erase_Block().
mbed_official 133:d4dda5c437f0 37 The erase block address information is contained in the Nand_Address_Typedef
mbed_official 133:d4dda5c437f0 38 structure passed as parameter.
mbed_official 133:d4dda5c437f0 39
mbed_official 133:d4dda5c437f0 40 (+) Read the NAND flash status operation using the function HAL_NAND_Read_Status().
mbed_official 133:d4dda5c437f0 41
mbed_official 133:d4dda5c437f0 42 (+) You can also control the NAND device by calling the control APIs HAL_NAND_ECC_Enable()/
mbed_official 133:d4dda5c437f0 43 HAL_NAND_ECC_Disable() to respectively enable/disable the ECC code correction
mbed_official 133:d4dda5c437f0 44 feature or the function HAL_NAND_GetECC() to get the ECC correction code.
mbed_official 133:d4dda5c437f0 45
mbed_official 133:d4dda5c437f0 46 (+) You can monitor the NAND device HAL state by calling the function
mbed_official 133:d4dda5c437f0 47 HAL_NAND_GetState()
mbed_official 133:d4dda5c437f0 48
mbed_official 133:d4dda5c437f0 49 [..]
mbed_official 133:d4dda5c437f0 50 (@) This driver is a set of generic APIs which handle standard NAND flash operations.
mbed_official 133:d4dda5c437f0 51 If a NAND flash device contains different operations and/or implementations,
mbed_official 133:d4dda5c437f0 52 it should be implemented separately.
mbed_official 133:d4dda5c437f0 53
mbed_official 133:d4dda5c437f0 54 @endverbatim
mbed_official 133:d4dda5c437f0 55 ******************************************************************************
mbed_official 133:d4dda5c437f0 56 * @attention
mbed_official 133:d4dda5c437f0 57 *
mbed_official 133:d4dda5c437f0 58 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 133:d4dda5c437f0 59 *
mbed_official 133:d4dda5c437f0 60 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 133:d4dda5c437f0 61 * are permitted provided that the following conditions are met:
mbed_official 133:d4dda5c437f0 62 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 133:d4dda5c437f0 63 * this list of conditions and the following disclaimer.
mbed_official 133:d4dda5c437f0 64 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 133:d4dda5c437f0 65 * this list of conditions and the following disclaimer in the documentation
mbed_official 133:d4dda5c437f0 66 * and/or other materials provided with the distribution.
mbed_official 133:d4dda5c437f0 67 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 133:d4dda5c437f0 68 * may be used to endorse or promote products derived from this software
mbed_official 133:d4dda5c437f0 69 * without specific prior written permission.
mbed_official 133:d4dda5c437f0 70 *
mbed_official 133:d4dda5c437f0 71 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 133:d4dda5c437f0 72 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 133:d4dda5c437f0 73 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 133:d4dda5c437f0 74 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 133:d4dda5c437f0 75 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 133:d4dda5c437f0 76 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 133:d4dda5c437f0 77 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 133:d4dda5c437f0 78 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 133:d4dda5c437f0 79 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 133:d4dda5c437f0 80 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 133:d4dda5c437f0 81 *
mbed_official 133:d4dda5c437f0 82 ******************************************************************************
mbed_official 133:d4dda5c437f0 83 */
mbed_official 133:d4dda5c437f0 84
mbed_official 133:d4dda5c437f0 85 /* Includes ------------------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 86 #include "stm32f4xx_hal.h"
mbed_official 133:d4dda5c437f0 87
mbed_official 133:d4dda5c437f0 88 /** @addtogroup STM32F4xx_HAL_Driver
mbed_official 133:d4dda5c437f0 89 * @{
mbed_official 133:d4dda5c437f0 90 */
mbed_official 133:d4dda5c437f0 91
mbed_official 133:d4dda5c437f0 92 /** @defgroup NAND
mbed_official 133:d4dda5c437f0 93 * @brief NAND driver modules
mbed_official 133:d4dda5c437f0 94 * @{
mbed_official 133:d4dda5c437f0 95 */
mbed_official 133:d4dda5c437f0 96 #ifdef HAL_NAND_MODULE_ENABLED
mbed_official 133:d4dda5c437f0 97
mbed_official 133:d4dda5c437f0 98 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
mbed_official 133:d4dda5c437f0 99
mbed_official 133:d4dda5c437f0 100 /* Private typedef -----------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 101 /* Private define ------------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 102 /* Private macro -------------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 103 /* Private variables ---------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 104 /* Private function prototypes -----------------------------------------------*/
mbed_official 133:d4dda5c437f0 105 /* Private functions ---------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 106
mbed_official 133:d4dda5c437f0 107 /** @defgroup NAND_Private_Functions
mbed_official 133:d4dda5c437f0 108 * @{
mbed_official 133:d4dda5c437f0 109 */
mbed_official 133:d4dda5c437f0 110
mbed_official 133:d4dda5c437f0 111 /** @defgroup NAND_Group1 Initialization and de-initialization functions
mbed_official 133:d4dda5c437f0 112 * @brief Initialization and Configuration functions
mbed_official 133:d4dda5c437f0 113 *
mbed_official 133:d4dda5c437f0 114 @verbatim
mbed_official 133:d4dda5c437f0 115 ==============================================================================
mbed_official 133:d4dda5c437f0 116 ##### NAND Initialization and de-initialization functions #####
mbed_official 133:d4dda5c437f0 117 ==============================================================================
mbed_official 133:d4dda5c437f0 118 [..]
mbed_official 133:d4dda5c437f0 119 This section provides functions allowing to initialize/de-initialize
mbed_official 133:d4dda5c437f0 120 the NAND memory
mbed_official 133:d4dda5c437f0 121
mbed_official 133:d4dda5c437f0 122 @endverbatim
mbed_official 133:d4dda5c437f0 123 * @{
mbed_official 133:d4dda5c437f0 124 */
mbed_official 133:d4dda5c437f0 125
mbed_official 133:d4dda5c437f0 126 /**
mbed_official 133:d4dda5c437f0 127 * @brief Perform NAND memory Initialization sequence
mbed_official 242:7074e42da0b2 128 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
mbed_official 242:7074e42da0b2 129 * the configuration information for NAND module.
mbed_official 133:d4dda5c437f0 130 * @param ComSpace_Timing: pointer to Common space timing structure
mbed_official 133:d4dda5c437f0 131 * @param AttSpace_Timing: pointer to Attribute space timing structure
mbed_official 133:d4dda5c437f0 132 * @retval HAL status
mbed_official 133:d4dda5c437f0 133 */
mbed_official 133:d4dda5c437f0 134 HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing)
mbed_official 133:d4dda5c437f0 135 {
mbed_official 133:d4dda5c437f0 136 /* Check the NAND handle state */
mbed_official 133:d4dda5c437f0 137 if(hnand == NULL)
mbed_official 133:d4dda5c437f0 138 {
mbed_official 133:d4dda5c437f0 139 return HAL_ERROR;
mbed_official 133:d4dda5c437f0 140 }
mbed_official 133:d4dda5c437f0 141
mbed_official 133:d4dda5c437f0 142 if(hnand->State == HAL_NAND_STATE_RESET)
mbed_official 133:d4dda5c437f0 143 {
mbed_official 133:d4dda5c437f0 144 /* Initialize the low level hardware (MSP) */
mbed_official 133:d4dda5c437f0 145 HAL_NAND_MspInit(hnand);
mbed_official 133:d4dda5c437f0 146 }
mbed_official 133:d4dda5c437f0 147
mbed_official 133:d4dda5c437f0 148 /* Initialize NAND control Interface */
mbed_official 133:d4dda5c437f0 149 FMC_NAND_Init(hnand->Instance, &(hnand->Init));
mbed_official 133:d4dda5c437f0 150
mbed_official 133:d4dda5c437f0 151 /* Initialize NAND common space timing Interface */
mbed_official 133:d4dda5c437f0 152 FMC_NAND_CommonSpace_Timing_Init(hnand->Instance, ComSpace_Timing, hnand->Init.NandBank);
mbed_official 133:d4dda5c437f0 153
mbed_official 133:d4dda5c437f0 154 /* Initialize NAND attribute space timing Interface */
mbed_official 133:d4dda5c437f0 155 FMC_NAND_AttributeSpace_Timing_Init(hnand->Instance, AttSpace_Timing, hnand->Init.NandBank);
mbed_official 133:d4dda5c437f0 156
mbed_official 133:d4dda5c437f0 157 /* Enable the NAND device */
mbed_official 133:d4dda5c437f0 158 __FMC_NAND_ENABLE(hnand->Instance, hnand->Init.NandBank);
mbed_official 133:d4dda5c437f0 159
mbed_official 133:d4dda5c437f0 160 /* Update the NAND controller state */
mbed_official 133:d4dda5c437f0 161 hnand->State = HAL_NAND_STATE_READY;
mbed_official 133:d4dda5c437f0 162
mbed_official 133:d4dda5c437f0 163 return HAL_OK;
mbed_official 133:d4dda5c437f0 164 }
mbed_official 133:d4dda5c437f0 165
mbed_official 133:d4dda5c437f0 166 /**
mbed_official 133:d4dda5c437f0 167 * @brief Perform NAND memory De-Initialization sequence
mbed_official 242:7074e42da0b2 168 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
mbed_official 242:7074e42da0b2 169 * the configuration information for NAND module.
mbed_official 133:d4dda5c437f0 170 * @retval HAL status
mbed_official 133:d4dda5c437f0 171 */
mbed_official 133:d4dda5c437f0 172 HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand)
mbed_official 133:d4dda5c437f0 173 {
mbed_official 133:d4dda5c437f0 174 /* Initialize the low level hardware (MSP) */
mbed_official 133:d4dda5c437f0 175 HAL_NAND_MspDeInit(hnand);
mbed_official 133:d4dda5c437f0 176
mbed_official 133:d4dda5c437f0 177 /* Configure the NAND registers with their reset values */
mbed_official 133:d4dda5c437f0 178 FMC_NAND_DeInit(hnand->Instance, hnand->Init.NandBank);
mbed_official 133:d4dda5c437f0 179
mbed_official 133:d4dda5c437f0 180 /* Reset the NAND controller state */
mbed_official 133:d4dda5c437f0 181 hnand->State = HAL_NAND_STATE_RESET;
mbed_official 133:d4dda5c437f0 182
mbed_official 133:d4dda5c437f0 183 /* Release Lock */
mbed_official 133:d4dda5c437f0 184 __HAL_UNLOCK(hnand);
mbed_official 133:d4dda5c437f0 185
mbed_official 133:d4dda5c437f0 186 return HAL_OK;
mbed_official 133:d4dda5c437f0 187 }
mbed_official 133:d4dda5c437f0 188
mbed_official 133:d4dda5c437f0 189 /**
mbed_official 133:d4dda5c437f0 190 * @brief NAND MSP Init
mbed_official 242:7074e42da0b2 191 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
mbed_official 242:7074e42da0b2 192 * the configuration information for NAND module.
mbed_official 133:d4dda5c437f0 193 * @retval None
mbed_official 133:d4dda5c437f0 194 */
mbed_official 133:d4dda5c437f0 195 __weak void HAL_NAND_MspInit(NAND_HandleTypeDef *hnand)
mbed_official 133:d4dda5c437f0 196 {
mbed_official 133:d4dda5c437f0 197 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 133:d4dda5c437f0 198 the HAL_NAND_MspInit could be implemented in the user file
mbed_official 133:d4dda5c437f0 199 */
mbed_official 133:d4dda5c437f0 200 }
mbed_official 133:d4dda5c437f0 201
mbed_official 133:d4dda5c437f0 202 /**
mbed_official 133:d4dda5c437f0 203 * @brief NAND MSP DeInit
mbed_official 242:7074e42da0b2 204 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
mbed_official 242:7074e42da0b2 205 * the configuration information for NAND module.
mbed_official 133:d4dda5c437f0 206 * @retval None
mbed_official 133:d4dda5c437f0 207 */
mbed_official 133:d4dda5c437f0 208 __weak void HAL_NAND_MspDeInit(NAND_HandleTypeDef *hnand)
mbed_official 133:d4dda5c437f0 209 {
mbed_official 133:d4dda5c437f0 210 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 133:d4dda5c437f0 211 the HAL_NAND_MspDeInit could be implemented in the user file
mbed_official 133:d4dda5c437f0 212 */
mbed_official 133:d4dda5c437f0 213 }
mbed_official 133:d4dda5c437f0 214
mbed_official 133:d4dda5c437f0 215
mbed_official 133:d4dda5c437f0 216 /**
mbed_official 133:d4dda5c437f0 217 * @brief This function handles NAND device interrupt request.
mbed_official 242:7074e42da0b2 218 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
mbed_official 242:7074e42da0b2 219 * the configuration information for NAND module.
mbed_official 133:d4dda5c437f0 220 * @retval HAL status
mbed_official 133:d4dda5c437f0 221 */
mbed_official 133:d4dda5c437f0 222 void HAL_NAND_IRQHandler(NAND_HandleTypeDef *hnand)
mbed_official 133:d4dda5c437f0 223 {
mbed_official 133:d4dda5c437f0 224 /* Check NAND interrupt Rising edge flag */
mbed_official 133:d4dda5c437f0 225 if(__FMC_NAND_GET_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_RISING_EDGE))
mbed_official 133:d4dda5c437f0 226 {
mbed_official 133:d4dda5c437f0 227 /* NAND interrupt callback*/
mbed_official 133:d4dda5c437f0 228 HAL_NAND_ITCallback(hnand);
mbed_official 133:d4dda5c437f0 229
mbed_official 133:d4dda5c437f0 230 /* Clear NAND interrupt Rising edge pending bit */
mbed_official 133:d4dda5c437f0 231 __FMC_NAND_CLEAR_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_RISING_EDGE);
mbed_official 133:d4dda5c437f0 232 }
mbed_official 133:d4dda5c437f0 233
mbed_official 133:d4dda5c437f0 234 /* Check NAND interrupt Level flag */
mbed_official 133:d4dda5c437f0 235 if(__FMC_NAND_GET_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_LEVEL))
mbed_official 133:d4dda5c437f0 236 {
mbed_official 133:d4dda5c437f0 237 /* NAND interrupt callback*/
mbed_official 133:d4dda5c437f0 238 HAL_NAND_ITCallback(hnand);
mbed_official 133:d4dda5c437f0 239
mbed_official 133:d4dda5c437f0 240 /* Clear NAND interrupt Level pending bit */
mbed_official 133:d4dda5c437f0 241 __FMC_NAND_CLEAR_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_LEVEL);
mbed_official 133:d4dda5c437f0 242 }
mbed_official 133:d4dda5c437f0 243
mbed_official 133:d4dda5c437f0 244 /* Check NAND interrupt Falling edge flag */
mbed_official 133:d4dda5c437f0 245 if(__FMC_NAND_GET_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_FALLING_EDGE))
mbed_official 133:d4dda5c437f0 246 {
mbed_official 133:d4dda5c437f0 247 /* NAND interrupt callback*/
mbed_official 133:d4dda5c437f0 248 HAL_NAND_ITCallback(hnand);
mbed_official 133:d4dda5c437f0 249
mbed_official 133:d4dda5c437f0 250 /* Clear NAND interrupt Falling edge pending bit */
mbed_official 133:d4dda5c437f0 251 __FMC_NAND_CLEAR_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_FALLING_EDGE);
mbed_official 133:d4dda5c437f0 252 }
mbed_official 133:d4dda5c437f0 253
mbed_official 133:d4dda5c437f0 254 /* Check NAND interrupt FIFO empty flag */
mbed_official 133:d4dda5c437f0 255 if(__FMC_NAND_GET_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_FEMPT))
mbed_official 133:d4dda5c437f0 256 {
mbed_official 133:d4dda5c437f0 257 /* NAND interrupt callback*/
mbed_official 133:d4dda5c437f0 258 HAL_NAND_ITCallback(hnand);
mbed_official 133:d4dda5c437f0 259
mbed_official 133:d4dda5c437f0 260 /* Clear NAND interrupt FIFO empty pending bit */
mbed_official 133:d4dda5c437f0 261 __FMC_NAND_CLEAR_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_FEMPT);
mbed_official 133:d4dda5c437f0 262 }
mbed_official 133:d4dda5c437f0 263
mbed_official 133:d4dda5c437f0 264 }
mbed_official 133:d4dda5c437f0 265
mbed_official 133:d4dda5c437f0 266 /**
mbed_official 133:d4dda5c437f0 267 * @brief NAND interrupt feature callback
mbed_official 242:7074e42da0b2 268 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
mbed_official 242:7074e42da0b2 269 * the configuration information for NAND module.
mbed_official 133:d4dda5c437f0 270 * @retval None
mbed_official 133:d4dda5c437f0 271 */
mbed_official 133:d4dda5c437f0 272 __weak void HAL_NAND_ITCallback(NAND_HandleTypeDef *hnand)
mbed_official 133:d4dda5c437f0 273 {
mbed_official 133:d4dda5c437f0 274 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 133:d4dda5c437f0 275 the HAL_NAND_ITCallback could be implemented in the user file
mbed_official 133:d4dda5c437f0 276 */
mbed_official 133:d4dda5c437f0 277 }
mbed_official 133:d4dda5c437f0 278
mbed_official 133:d4dda5c437f0 279 /**
mbed_official 133:d4dda5c437f0 280 * @}
mbed_official 133:d4dda5c437f0 281 */
mbed_official 133:d4dda5c437f0 282
mbed_official 133:d4dda5c437f0 283 /** @defgroup NAND_Group2 Input and Output functions
mbed_official 133:d4dda5c437f0 284 * @brief Input Output and memory control functions
mbed_official 133:d4dda5c437f0 285 *
mbed_official 133:d4dda5c437f0 286 @verbatim
mbed_official 133:d4dda5c437f0 287 ==============================================================================
mbed_official 133:d4dda5c437f0 288 ##### NAND Input and Output functions #####
mbed_official 133:d4dda5c437f0 289 ==============================================================================
mbed_official 133:d4dda5c437f0 290 [..]
mbed_official 133:d4dda5c437f0 291 This section provides functions allowing to use and control the NAND
mbed_official 133:d4dda5c437f0 292 memory
mbed_official 133:d4dda5c437f0 293
mbed_official 133:d4dda5c437f0 294 @endverbatim
mbed_official 133:d4dda5c437f0 295 * @{
mbed_official 133:d4dda5c437f0 296 */
mbed_official 133:d4dda5c437f0 297
mbed_official 133:d4dda5c437f0 298 /**
mbed_official 133:d4dda5c437f0 299 * @brief Read the NAND memory electronic signature
mbed_official 242:7074e42da0b2 300 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
mbed_official 242:7074e42da0b2 301 * the configuration information for NAND module.
mbed_official 133:d4dda5c437f0 302 * @param pNAND_ID: NAND ID structure
mbed_official 133:d4dda5c437f0 303 * @retval HAL status
mbed_official 133:d4dda5c437f0 304 */
mbed_official 133:d4dda5c437f0 305 HAL_StatusTypeDef HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID)
mbed_official 133:d4dda5c437f0 306 {
mbed_official 133:d4dda5c437f0 307 __IO uint32_t data = 0;
mbed_official 133:d4dda5c437f0 308 uint32_t deviceAddress = 0;
mbed_official 133:d4dda5c437f0 309
mbed_official 133:d4dda5c437f0 310 /* Process Locked */
mbed_official 133:d4dda5c437f0 311 __HAL_LOCK(hnand);
mbed_official 133:d4dda5c437f0 312
mbed_official 133:d4dda5c437f0 313 /* Check the NAND controller state */
mbed_official 133:d4dda5c437f0 314 if(hnand->State == HAL_NAND_STATE_BUSY)
mbed_official 133:d4dda5c437f0 315 {
mbed_official 133:d4dda5c437f0 316 return HAL_BUSY;
mbed_official 133:d4dda5c437f0 317 }
mbed_official 133:d4dda5c437f0 318
mbed_official 133:d4dda5c437f0 319 /* Identify the device address */
mbed_official 133:d4dda5c437f0 320 if(hnand->Init.NandBank == FMC_NAND_BANK2)
mbed_official 133:d4dda5c437f0 321 {
mbed_official 133:d4dda5c437f0 322 deviceAddress = NAND_DEVICE1;
mbed_official 133:d4dda5c437f0 323 }
mbed_official 133:d4dda5c437f0 324 else
mbed_official 133:d4dda5c437f0 325 {
mbed_official 133:d4dda5c437f0 326 deviceAddress = NAND_DEVICE2;
mbed_official 133:d4dda5c437f0 327 }
mbed_official 133:d4dda5c437f0 328
mbed_official 133:d4dda5c437f0 329 /* Update the NAND controller state */
mbed_official 133:d4dda5c437f0 330 hnand->State = HAL_NAND_STATE_BUSY;
mbed_official 133:d4dda5c437f0 331
mbed_official 133:d4dda5c437f0 332 /* Send Read ID command sequence */
mbed_official 133:d4dda5c437f0 333 *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = 0x90;
mbed_official 133:d4dda5c437f0 334 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00;
mbed_official 133:d4dda5c437f0 335
mbed_official 133:d4dda5c437f0 336 /* Read the electronic signature from NAND flash */
mbed_official 133:d4dda5c437f0 337 data = *(__IO uint32_t *)deviceAddress;
mbed_official 133:d4dda5c437f0 338
mbed_official 133:d4dda5c437f0 339 /* Return the data read */
mbed_official 133:d4dda5c437f0 340 pNAND_ID->Maker_Id = ADDR_1st_CYCLE(data);
mbed_official 133:d4dda5c437f0 341 pNAND_ID->Device_Id = ADDR_2nd_CYCLE(data);
mbed_official 133:d4dda5c437f0 342 pNAND_ID->Third_Id = ADDR_3rd_CYCLE(data);
mbed_official 133:d4dda5c437f0 343 pNAND_ID->Fourth_Id = ADDR_4th_CYCLE(data);
mbed_official 133:d4dda5c437f0 344
mbed_official 133:d4dda5c437f0 345 /* Update the NAND controller state */
mbed_official 133:d4dda5c437f0 346 hnand->State = HAL_NAND_STATE_READY;
mbed_official 133:d4dda5c437f0 347
mbed_official 133:d4dda5c437f0 348 /* Process unlocked */
mbed_official 133:d4dda5c437f0 349 __HAL_UNLOCK(hnand);
mbed_official 133:d4dda5c437f0 350
mbed_official 133:d4dda5c437f0 351 return HAL_OK;
mbed_official 133:d4dda5c437f0 352 }
mbed_official 133:d4dda5c437f0 353
mbed_official 133:d4dda5c437f0 354 /**
mbed_official 133:d4dda5c437f0 355 * @brief NAND memory reset
mbed_official 242:7074e42da0b2 356 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
mbed_official 242:7074e42da0b2 357 * the configuration information for NAND module.
mbed_official 133:d4dda5c437f0 358 * @retval HAL status
mbed_official 133:d4dda5c437f0 359 */
mbed_official 133:d4dda5c437f0 360 HAL_StatusTypeDef HAL_NAND_Reset(NAND_HandleTypeDef *hnand)
mbed_official 133:d4dda5c437f0 361 {
mbed_official 133:d4dda5c437f0 362 uint32_t deviceAddress = 0;
mbed_official 133:d4dda5c437f0 363
mbed_official 133:d4dda5c437f0 364 /* Process Locked */
mbed_official 133:d4dda5c437f0 365 __HAL_LOCK(hnand);
mbed_official 133:d4dda5c437f0 366
mbed_official 133:d4dda5c437f0 367 /* Check the NAND controller state */
mbed_official 133:d4dda5c437f0 368 if(hnand->State == HAL_NAND_STATE_BUSY)
mbed_official 133:d4dda5c437f0 369 {
mbed_official 133:d4dda5c437f0 370 return HAL_BUSY;
mbed_official 133:d4dda5c437f0 371 }
mbed_official 133:d4dda5c437f0 372
mbed_official 133:d4dda5c437f0 373 /* Identify the device address */
mbed_official 133:d4dda5c437f0 374 if(hnand->Init.NandBank == FMC_NAND_BANK2)
mbed_official 133:d4dda5c437f0 375 {
mbed_official 133:d4dda5c437f0 376 deviceAddress = NAND_DEVICE1;
mbed_official 133:d4dda5c437f0 377 }
mbed_official 133:d4dda5c437f0 378 else
mbed_official 133:d4dda5c437f0 379 {
mbed_official 133:d4dda5c437f0 380 deviceAddress = NAND_DEVICE2;
mbed_official 133:d4dda5c437f0 381 }
mbed_official 133:d4dda5c437f0 382
mbed_official 133:d4dda5c437f0 383 /* Update the NAND controller state */
mbed_official 133:d4dda5c437f0 384 hnand->State = HAL_NAND_STATE_BUSY;
mbed_official 133:d4dda5c437f0 385
mbed_official 133:d4dda5c437f0 386 /* Send NAND reset command */
mbed_official 133:d4dda5c437f0 387 *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = 0xFF;
mbed_official 133:d4dda5c437f0 388
mbed_official 133:d4dda5c437f0 389
mbed_official 133:d4dda5c437f0 390 /* Update the NAND controller state */
mbed_official 133:d4dda5c437f0 391 hnand->State = HAL_NAND_STATE_READY;
mbed_official 133:d4dda5c437f0 392
mbed_official 133:d4dda5c437f0 393 /* Process unlocked */
mbed_official 133:d4dda5c437f0 394 __HAL_UNLOCK(hnand);
mbed_official 133:d4dda5c437f0 395
mbed_official 133:d4dda5c437f0 396 return HAL_OK;
mbed_official 133:d4dda5c437f0 397
mbed_official 133:d4dda5c437f0 398 }
mbed_official 133:d4dda5c437f0 399
mbed_official 133:d4dda5c437f0 400
mbed_official 133:d4dda5c437f0 401 /**
mbed_official 133:d4dda5c437f0 402 * @brief Read Page(s) from NAND memory block
mbed_official 242:7074e42da0b2 403 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
mbed_official 242:7074e42da0b2 404 * the configuration information for NAND module.
mbed_official 133:d4dda5c437f0 405 * @param pAddress : pointer to NAND address structure
mbed_official 133:d4dda5c437f0 406 * @param pBuffer : pointer to destination read buffer
mbed_official 133:d4dda5c437f0 407 * @param NumPageToRead : number of pages to read from block
mbed_official 133:d4dda5c437f0 408 * @retval HAL status
mbed_official 133:d4dda5c437f0 409 */
mbed_official 133:d4dda5c437f0 410 HAL_StatusTypeDef HAL_NAND_Read_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypedef *pAddress, uint8_t *pBuffer, uint32_t NumPageToRead)
mbed_official 133:d4dda5c437f0 411 {
mbed_official 133:d4dda5c437f0 412 __IO uint32_t index = 0;
mbed_official 133:d4dda5c437f0 413 uint32_t deviceAddress = 0, size = 0, numPagesRead = 0, nandAddress = 0;
mbed_official 133:d4dda5c437f0 414
mbed_official 133:d4dda5c437f0 415 /* Process Locked */
mbed_official 133:d4dda5c437f0 416 __HAL_LOCK(hnand);
mbed_official 133:d4dda5c437f0 417
mbed_official 133:d4dda5c437f0 418 /* Check the NAND controller state */
mbed_official 133:d4dda5c437f0 419 if(hnand->State == HAL_NAND_STATE_BUSY)
mbed_official 133:d4dda5c437f0 420 {
mbed_official 133:d4dda5c437f0 421 return HAL_BUSY;
mbed_official 133:d4dda5c437f0 422 }
mbed_official 133:d4dda5c437f0 423
mbed_official 133:d4dda5c437f0 424 /* Identify the device address */
mbed_official 133:d4dda5c437f0 425 if(hnand->Init.NandBank == FMC_NAND_BANK2)
mbed_official 133:d4dda5c437f0 426 {
mbed_official 133:d4dda5c437f0 427 deviceAddress = NAND_DEVICE1;
mbed_official 133:d4dda5c437f0 428 }
mbed_official 133:d4dda5c437f0 429 else
mbed_official 133:d4dda5c437f0 430 {
mbed_official 133:d4dda5c437f0 431 deviceAddress = NAND_DEVICE2;
mbed_official 133:d4dda5c437f0 432 }
mbed_official 133:d4dda5c437f0 433
mbed_official 133:d4dda5c437f0 434 /* Update the NAND controller state */
mbed_official 133:d4dda5c437f0 435 hnand->State = HAL_NAND_STATE_BUSY;
mbed_official 133:d4dda5c437f0 436
mbed_official 133:d4dda5c437f0 437 /* NAND raw address calculation */
mbed_official 133:d4dda5c437f0 438 nandAddress = ARRAY_ADDRESS(pAddress, hnand);
mbed_official 133:d4dda5c437f0 439
mbed_official 133:d4dda5c437f0 440 /* Page(s) read loop */
mbed_official 133:d4dda5c437f0 441 while((NumPageToRead != 0) && (nandAddress < (hnand->Info.BlockSize) * (hnand->Info.PageSize)))
mbed_official 133:d4dda5c437f0 442 {
mbed_official 133:d4dda5c437f0 443 /* update the buffer size */
mbed_official 133:d4dda5c437f0 444 size = (hnand->Info.PageSize) + ((hnand->Info.PageSize) * numPagesRead);
mbed_official 133:d4dda5c437f0 445
mbed_official 133:d4dda5c437f0 446 /* Send read page command sequence */
mbed_official 133:d4dda5c437f0 447 *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = NAND_CMD_AREA_A;
mbed_official 133:d4dda5c437f0 448
mbed_official 133:d4dda5c437f0 449 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00;
mbed_official 133:d4dda5c437f0 450 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_1st_CYCLE(nandAddress);
mbed_official 133:d4dda5c437f0 451 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_2nd_CYCLE(nandAddress);
mbed_official 133:d4dda5c437f0 452 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_3rd_CYCLE(nandAddress);
mbed_official 133:d4dda5c437f0 453
mbed_official 133:d4dda5c437f0 454 /* for 512 and 1 GB devices, 4th cycle is required */
mbed_official 133:d4dda5c437f0 455 if(hnand->Info.BlockNbr >= 1024)
mbed_official 133:d4dda5c437f0 456 {
mbed_official 133:d4dda5c437f0 457 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_4th_CYCLE(nandAddress);
mbed_official 133:d4dda5c437f0 458 }
mbed_official 133:d4dda5c437f0 459
mbed_official 133:d4dda5c437f0 460 *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = 0x30;
mbed_official 133:d4dda5c437f0 461
mbed_official 133:d4dda5c437f0 462 /* Get Data into Buffer */
mbed_official 133:d4dda5c437f0 463 for(; index < size; index++)
mbed_official 133:d4dda5c437f0 464 {
mbed_official 133:d4dda5c437f0 465 *(uint8_t *)pBuffer++ = *(uint8_t *)deviceAddress;
mbed_official 133:d4dda5c437f0 466 }
mbed_official 133:d4dda5c437f0 467
mbed_official 133:d4dda5c437f0 468 /* Increment read pages number */
mbed_official 133:d4dda5c437f0 469 numPagesRead++;
mbed_official 133:d4dda5c437f0 470
mbed_official 133:d4dda5c437f0 471 /* Decrement pages to read */
mbed_official 133:d4dda5c437f0 472 NumPageToRead--;
mbed_official 133:d4dda5c437f0 473
mbed_official 133:d4dda5c437f0 474 /* Increment the NAND address */
mbed_official 133:d4dda5c437f0 475 nandAddress = (uint32_t)(nandAddress + (hnand->Info.PageSize * 8));
mbed_official 133:d4dda5c437f0 476
mbed_official 133:d4dda5c437f0 477 }
mbed_official 133:d4dda5c437f0 478
mbed_official 133:d4dda5c437f0 479 /* Update the NAND controller state */
mbed_official 133:d4dda5c437f0 480 hnand->State = HAL_NAND_STATE_READY;
mbed_official 133:d4dda5c437f0 481
mbed_official 133:d4dda5c437f0 482 /* Process unlocked */
mbed_official 133:d4dda5c437f0 483 __HAL_UNLOCK(hnand);
mbed_official 133:d4dda5c437f0 484
mbed_official 133:d4dda5c437f0 485 return HAL_OK;
mbed_official 133:d4dda5c437f0 486
mbed_official 133:d4dda5c437f0 487 }
mbed_official 133:d4dda5c437f0 488
mbed_official 133:d4dda5c437f0 489 /**
mbed_official 133:d4dda5c437f0 490 * @brief Write Page(s) to NAND memory block
mbed_official 242:7074e42da0b2 491 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
mbed_official 242:7074e42da0b2 492 * the configuration information for NAND module.
mbed_official 133:d4dda5c437f0 493 * @param pAddress : pointer to NAND address structure
mbed_official 133:d4dda5c437f0 494 * @param pBuffer : pointer to source buffer to write
mbed_official 133:d4dda5c437f0 495 * @param NumPageToWrite : number of pages to write to block
mbed_official 133:d4dda5c437f0 496 * @retval HAL status
mbed_official 133:d4dda5c437f0 497 */
mbed_official 133:d4dda5c437f0 498 HAL_StatusTypeDef HAL_NAND_Write_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypedef *pAddress, uint8_t *pBuffer, uint32_t NumPageToWrite)
mbed_official 133:d4dda5c437f0 499 {
mbed_official 133:d4dda5c437f0 500 __IO uint32_t index = 0;
mbed_official 133:d4dda5c437f0 501 uint32_t timeout = 0;
mbed_official 133:d4dda5c437f0 502 uint32_t deviceAddress = 0, size = 0 , numPagesWritten = 0, nandAddress = 0;
mbed_official 133:d4dda5c437f0 503
mbed_official 133:d4dda5c437f0 504 /* Process Locked */
mbed_official 133:d4dda5c437f0 505 __HAL_LOCK(hnand);
mbed_official 133:d4dda5c437f0 506
mbed_official 133:d4dda5c437f0 507 /* Check the NAND controller state */
mbed_official 133:d4dda5c437f0 508 if(hnand->State == HAL_NAND_STATE_BUSY)
mbed_official 133:d4dda5c437f0 509 {
mbed_official 133:d4dda5c437f0 510 return HAL_BUSY;
mbed_official 133:d4dda5c437f0 511 }
mbed_official 133:d4dda5c437f0 512
mbed_official 133:d4dda5c437f0 513 /* Identify the device address */
mbed_official 133:d4dda5c437f0 514 if(hnand->Init.NandBank == FMC_NAND_BANK2)
mbed_official 133:d4dda5c437f0 515 {
mbed_official 133:d4dda5c437f0 516 deviceAddress = NAND_DEVICE1;
mbed_official 133:d4dda5c437f0 517 }
mbed_official 133:d4dda5c437f0 518 else
mbed_official 133:d4dda5c437f0 519 {
mbed_official 133:d4dda5c437f0 520 deviceAddress = NAND_DEVICE2;
mbed_official 133:d4dda5c437f0 521 }
mbed_official 133:d4dda5c437f0 522
mbed_official 133:d4dda5c437f0 523 /* Update the NAND controller state */
mbed_official 133:d4dda5c437f0 524 hnand->State = HAL_NAND_STATE_BUSY;
mbed_official 133:d4dda5c437f0 525
mbed_official 133:d4dda5c437f0 526 /* NAND raw address calculation */
mbed_official 133:d4dda5c437f0 527 nandAddress = ARRAY_ADDRESS(pAddress, hnand);
mbed_official 133:d4dda5c437f0 528
mbed_official 133:d4dda5c437f0 529 /* Page(s) write loop */
mbed_official 133:d4dda5c437f0 530 while((NumPageToWrite != 0) && (nandAddress < (hnand->Info.BlockSize) * (hnand->Info.PageSize)))
mbed_official 133:d4dda5c437f0 531 {
mbed_official 133:d4dda5c437f0 532 /* update the buffer size */
mbed_official 133:d4dda5c437f0 533 size = (hnand->Info.PageSize) + ((hnand->Info.PageSize) * numPagesWritten);
mbed_official 133:d4dda5c437f0 534
mbed_official 133:d4dda5c437f0 535 /* Send write page command sequence */
mbed_official 133:d4dda5c437f0 536 *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = NAND_CMD_AREA_A;
mbed_official 133:d4dda5c437f0 537 *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = 0x80;
mbed_official 133:d4dda5c437f0 538
mbed_official 133:d4dda5c437f0 539 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00;
mbed_official 133:d4dda5c437f0 540 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_1st_CYCLE(nandAddress);
mbed_official 133:d4dda5c437f0 541 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_2nd_CYCLE(nandAddress);
mbed_official 133:d4dda5c437f0 542 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_3rd_CYCLE(nandAddress);
mbed_official 133:d4dda5c437f0 543
mbed_official 133:d4dda5c437f0 544 /* for 512 and 1 GB devices, 4th cycle is required */
mbed_official 133:d4dda5c437f0 545 if(hnand->Info.BlockNbr >= 1024)
mbed_official 133:d4dda5c437f0 546 {
mbed_official 133:d4dda5c437f0 547 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_4th_CYCLE(nandAddress);
mbed_official 133:d4dda5c437f0 548 }
mbed_official 133:d4dda5c437f0 549
mbed_official 133:d4dda5c437f0 550 /* Write data to memory */
mbed_official 133:d4dda5c437f0 551 for(; index < size; index++)
mbed_official 133:d4dda5c437f0 552 {
mbed_official 133:d4dda5c437f0 553 *(__IO uint8_t *)deviceAddress = *(uint8_t *)pBuffer++;
mbed_official 133:d4dda5c437f0 554 }
mbed_official 133:d4dda5c437f0 555
mbed_official 133:d4dda5c437f0 556 *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = 0x10;
mbed_official 133:d4dda5c437f0 557
mbed_official 133:d4dda5c437f0 558 /* Read status until NAND is ready */
mbed_official 133:d4dda5c437f0 559 while(HAL_NAND_Read_Status(hnand) != NAND_READY)
mbed_official 133:d4dda5c437f0 560 {
mbed_official 133:d4dda5c437f0 561 /* Check for timeout value */
mbed_official 133:d4dda5c437f0 562 timeout = HAL_GetTick() + NAND_WRITE_TIMEOUT;
mbed_official 133:d4dda5c437f0 563
mbed_official 133:d4dda5c437f0 564 if(HAL_GetTick() >= timeout)
mbed_official 133:d4dda5c437f0 565 {
mbed_official 133:d4dda5c437f0 566 return HAL_TIMEOUT;
mbed_official 133:d4dda5c437f0 567 }
mbed_official 133:d4dda5c437f0 568 }
mbed_official 133:d4dda5c437f0 569
mbed_official 133:d4dda5c437f0 570 /* Increment written pages number */
mbed_official 133:d4dda5c437f0 571 numPagesWritten++;
mbed_official 133:d4dda5c437f0 572
mbed_official 133:d4dda5c437f0 573 /* Decrement pages to write */
mbed_official 133:d4dda5c437f0 574 NumPageToWrite--;
mbed_official 133:d4dda5c437f0 575
mbed_official 133:d4dda5c437f0 576 /* Increment the NAND address */
mbed_official 133:d4dda5c437f0 577 nandAddress = (uint32_t)(nandAddress + (hnand->Info.PageSize * 8));
mbed_official 133:d4dda5c437f0 578
mbed_official 133:d4dda5c437f0 579 }
mbed_official 133:d4dda5c437f0 580
mbed_official 133:d4dda5c437f0 581 /* Update the NAND controller state */
mbed_official 133:d4dda5c437f0 582 hnand->State = HAL_NAND_STATE_READY;
mbed_official 133:d4dda5c437f0 583
mbed_official 133:d4dda5c437f0 584 /* Process unlocked */
mbed_official 133:d4dda5c437f0 585 __HAL_UNLOCK(hnand);
mbed_official 133:d4dda5c437f0 586
mbed_official 133:d4dda5c437f0 587 return HAL_OK;
mbed_official 133:d4dda5c437f0 588 }
mbed_official 133:d4dda5c437f0 589
mbed_official 133:d4dda5c437f0 590
mbed_official 133:d4dda5c437f0 591 /**
mbed_official 133:d4dda5c437f0 592 * @brief Read Spare area(s) from NAND memory
mbed_official 242:7074e42da0b2 593 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
mbed_official 242:7074e42da0b2 594 * the configuration information for NAND module.
mbed_official 133:d4dda5c437f0 595 * @param pAddress : pointer to NAND address structure
mbed_official 133:d4dda5c437f0 596 * @param pBuffer: pointer to source buffer to write
mbed_official 133:d4dda5c437f0 597 * @param NumSpareAreaToRead: Number of spare area to read
mbed_official 133:d4dda5c437f0 598 * @retval HAL status
mbed_official 133:d4dda5c437f0 599 */
mbed_official 133:d4dda5c437f0 600 HAL_StatusTypeDef HAL_NAND_Read_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypedef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaToRead)
mbed_official 133:d4dda5c437f0 601 {
mbed_official 133:d4dda5c437f0 602 __IO uint32_t index = 0;
mbed_official 133:d4dda5c437f0 603 uint32_t deviceAddress = 0, size = 0, numSpareAreaRead = 0, nandAddress = 0;
mbed_official 133:d4dda5c437f0 604
mbed_official 133:d4dda5c437f0 605 /* Process Locked */
mbed_official 133:d4dda5c437f0 606 __HAL_LOCK(hnand);
mbed_official 133:d4dda5c437f0 607
mbed_official 133:d4dda5c437f0 608 /* Check the NAND controller state */
mbed_official 133:d4dda5c437f0 609 if(hnand->State == HAL_NAND_STATE_BUSY)
mbed_official 133:d4dda5c437f0 610 {
mbed_official 133:d4dda5c437f0 611 return HAL_BUSY;
mbed_official 133:d4dda5c437f0 612 }
mbed_official 133:d4dda5c437f0 613
mbed_official 133:d4dda5c437f0 614 /* Identify the device address */
mbed_official 133:d4dda5c437f0 615 if(hnand->Init.NandBank == FMC_NAND_BANK2)
mbed_official 133:d4dda5c437f0 616 {
mbed_official 133:d4dda5c437f0 617 deviceAddress = NAND_DEVICE1;
mbed_official 133:d4dda5c437f0 618 }
mbed_official 133:d4dda5c437f0 619 else
mbed_official 133:d4dda5c437f0 620 {
mbed_official 133:d4dda5c437f0 621 deviceAddress = NAND_DEVICE2;
mbed_official 133:d4dda5c437f0 622 }
mbed_official 133:d4dda5c437f0 623
mbed_official 133:d4dda5c437f0 624 /* Update the NAND controller state */
mbed_official 133:d4dda5c437f0 625 hnand->State = HAL_NAND_STATE_BUSY;
mbed_official 133:d4dda5c437f0 626
mbed_official 133:d4dda5c437f0 627 /* NAND raw address calculation */
mbed_official 133:d4dda5c437f0 628 nandAddress = ARRAY_ADDRESS(pAddress, hnand);
mbed_official 133:d4dda5c437f0 629
mbed_official 133:d4dda5c437f0 630 /* Spare area(s) read loop */
mbed_official 133:d4dda5c437f0 631 while((NumSpareAreaToRead != 0) && (nandAddress < (hnand->Info.BlockSize) * (hnand->Info.SpareAreaSize)))
mbed_official 133:d4dda5c437f0 632 {
mbed_official 133:d4dda5c437f0 633
mbed_official 133:d4dda5c437f0 634 /* update the buffer size */
mbed_official 133:d4dda5c437f0 635 size = (hnand->Info.PageSize) + ((hnand->Info.PageSize) * numSpareAreaRead);
mbed_official 133:d4dda5c437f0 636
mbed_official 133:d4dda5c437f0 637 /* Send read spare area command sequence */
mbed_official 133:d4dda5c437f0 638 *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = NAND_CMD_AREA_C;
mbed_official 133:d4dda5c437f0 639
mbed_official 133:d4dda5c437f0 640 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00;
mbed_official 133:d4dda5c437f0 641 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_1st_CYCLE(nandAddress);
mbed_official 133:d4dda5c437f0 642 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_2nd_CYCLE(nandAddress);
mbed_official 133:d4dda5c437f0 643 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_3rd_CYCLE(nandAddress);
mbed_official 133:d4dda5c437f0 644
mbed_official 133:d4dda5c437f0 645 /* for 512 and 1 GB devices, 4th cycle is required */
mbed_official 133:d4dda5c437f0 646 if(hnand->Info.BlockNbr >= 1024)
mbed_official 133:d4dda5c437f0 647 {
mbed_official 133:d4dda5c437f0 648 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_4th_CYCLE(nandAddress);
mbed_official 133:d4dda5c437f0 649 }
mbed_official 133:d4dda5c437f0 650
mbed_official 133:d4dda5c437f0 651 *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = 0x30;
mbed_official 133:d4dda5c437f0 652
mbed_official 133:d4dda5c437f0 653 /* Get Data into Buffer */
mbed_official 133:d4dda5c437f0 654 for ( ;index < size; index++)
mbed_official 133:d4dda5c437f0 655 {
mbed_official 133:d4dda5c437f0 656 *(uint8_t *)pBuffer++ = *(uint8_t *)deviceAddress;
mbed_official 133:d4dda5c437f0 657 }
mbed_official 133:d4dda5c437f0 658
mbed_official 133:d4dda5c437f0 659 /* Increment read spare areas number */
mbed_official 133:d4dda5c437f0 660 numSpareAreaRead++;
mbed_official 133:d4dda5c437f0 661
mbed_official 133:d4dda5c437f0 662 /* Decrement spare areas to read */
mbed_official 133:d4dda5c437f0 663 NumSpareAreaToRead--;
mbed_official 133:d4dda5c437f0 664
mbed_official 133:d4dda5c437f0 665 /* Increment the NAND address */
mbed_official 133:d4dda5c437f0 666 nandAddress = (uint32_t)(nandAddress + (hnand->Info.SpareAreaSize));
mbed_official 133:d4dda5c437f0 667 }
mbed_official 133:d4dda5c437f0 668
mbed_official 133:d4dda5c437f0 669 /* Update the NAND controller state */
mbed_official 133:d4dda5c437f0 670 hnand->State = HAL_NAND_STATE_READY;
mbed_official 133:d4dda5c437f0 671
mbed_official 133:d4dda5c437f0 672 /* Process unlocked */
mbed_official 133:d4dda5c437f0 673 __HAL_UNLOCK(hnand);
mbed_official 133:d4dda5c437f0 674
mbed_official 133:d4dda5c437f0 675 return HAL_OK;
mbed_official 133:d4dda5c437f0 676 }
mbed_official 133:d4dda5c437f0 677
mbed_official 133:d4dda5c437f0 678 /**
mbed_official 133:d4dda5c437f0 679 * @brief Write Spare area(s) to NAND memory
mbed_official 242:7074e42da0b2 680 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
mbed_official 242:7074e42da0b2 681 * the configuration information for NAND module.
mbed_official 133:d4dda5c437f0 682 * @param pAddress : pointer to NAND address structure
mbed_official 133:d4dda5c437f0 683 * @param pBuffer : pointer to source buffer to write
mbed_official 133:d4dda5c437f0 684 * @param NumSpareAreaTowrite : number of spare areas to write to block
mbed_official 133:d4dda5c437f0 685 * @retval HAL status
mbed_official 133:d4dda5c437f0 686 */
mbed_official 133:d4dda5c437f0 687 HAL_StatusTypeDef HAL_NAND_Write_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypedef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaTowrite)
mbed_official 133:d4dda5c437f0 688 {
mbed_official 133:d4dda5c437f0 689 __IO uint32_t index = 0;
mbed_official 133:d4dda5c437f0 690 uint32_t timeout = 0;
mbed_official 133:d4dda5c437f0 691 uint32_t deviceAddress = 0, size = 0, numSpareAreaWritten = 0, nandAddress = 0;
mbed_official 133:d4dda5c437f0 692
mbed_official 133:d4dda5c437f0 693 /* Process Locked */
mbed_official 133:d4dda5c437f0 694 __HAL_LOCK(hnand);
mbed_official 133:d4dda5c437f0 695
mbed_official 133:d4dda5c437f0 696 /* Check the NAND controller state */
mbed_official 133:d4dda5c437f0 697 if(hnand->State == HAL_NAND_STATE_BUSY)
mbed_official 133:d4dda5c437f0 698 {
mbed_official 133:d4dda5c437f0 699 return HAL_BUSY;
mbed_official 133:d4dda5c437f0 700 }
mbed_official 133:d4dda5c437f0 701
mbed_official 133:d4dda5c437f0 702 /* Identify the device address */
mbed_official 133:d4dda5c437f0 703 if(hnand->Init.NandBank == FMC_NAND_BANK2)
mbed_official 133:d4dda5c437f0 704 {
mbed_official 133:d4dda5c437f0 705 deviceAddress = NAND_DEVICE1;
mbed_official 133:d4dda5c437f0 706 }
mbed_official 133:d4dda5c437f0 707 else
mbed_official 133:d4dda5c437f0 708 {
mbed_official 133:d4dda5c437f0 709 deviceAddress = NAND_DEVICE2;
mbed_official 133:d4dda5c437f0 710 }
mbed_official 133:d4dda5c437f0 711
mbed_official 133:d4dda5c437f0 712 /* Update the FMC_NAND controller state */
mbed_official 133:d4dda5c437f0 713 hnand->State = HAL_NAND_STATE_BUSY;
mbed_official 133:d4dda5c437f0 714
mbed_official 133:d4dda5c437f0 715 /* NAND raw address calculation */
mbed_official 133:d4dda5c437f0 716 nandAddress = ARRAY_ADDRESS(pAddress, hnand);
mbed_official 133:d4dda5c437f0 717
mbed_official 133:d4dda5c437f0 718 /* Spare area(s) write loop */
mbed_official 133:d4dda5c437f0 719 while((NumSpareAreaTowrite != 0) && (nandAddress < (hnand->Info.BlockSize) * (hnand->Info.SpareAreaSize)))
mbed_official 133:d4dda5c437f0 720 {
mbed_official 133:d4dda5c437f0 721 /* update the buffer size */
mbed_official 133:d4dda5c437f0 722 size = (hnand->Info.PageSize) + ((hnand->Info.PageSize) * numSpareAreaWritten);
mbed_official 133:d4dda5c437f0 723
mbed_official 133:d4dda5c437f0 724 /* Send write Spare area command sequence */
mbed_official 133:d4dda5c437f0 725 *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = NAND_CMD_AREA_C;
mbed_official 133:d4dda5c437f0 726 *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = 0x80;
mbed_official 133:d4dda5c437f0 727
mbed_official 133:d4dda5c437f0 728 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00;
mbed_official 133:d4dda5c437f0 729 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_1st_CYCLE(nandAddress);
mbed_official 133:d4dda5c437f0 730 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_2nd_CYCLE(nandAddress);
mbed_official 133:d4dda5c437f0 731 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_3rd_CYCLE(nandAddress);
mbed_official 133:d4dda5c437f0 732
mbed_official 133:d4dda5c437f0 733 /* for 512 and 1 GB devices, 4th cycle is required */
mbed_official 133:d4dda5c437f0 734 if(hnand->Info.BlockNbr >= 1024)
mbed_official 133:d4dda5c437f0 735 {
mbed_official 133:d4dda5c437f0 736 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_4th_CYCLE(nandAddress);
mbed_official 133:d4dda5c437f0 737 }
mbed_official 133:d4dda5c437f0 738
mbed_official 133:d4dda5c437f0 739 /* Write data to memory */
mbed_official 133:d4dda5c437f0 740 for(; index < size; index++)
mbed_official 133:d4dda5c437f0 741 {
mbed_official 133:d4dda5c437f0 742 *(__IO uint8_t *)deviceAddress = *(uint8_t *)pBuffer++;
mbed_official 133:d4dda5c437f0 743 }
mbed_official 133:d4dda5c437f0 744
mbed_official 133:d4dda5c437f0 745 *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = 0x10;
mbed_official 133:d4dda5c437f0 746
mbed_official 133:d4dda5c437f0 747
mbed_official 133:d4dda5c437f0 748 /* Read status until NAND is ready */
mbed_official 133:d4dda5c437f0 749 while(HAL_NAND_Read_Status(hnand) != NAND_READY)
mbed_official 133:d4dda5c437f0 750 {
mbed_official 133:d4dda5c437f0 751 /* Check for timeout value */
mbed_official 133:d4dda5c437f0 752 timeout = HAL_GetTick() + NAND_WRITE_TIMEOUT;
mbed_official 133:d4dda5c437f0 753
mbed_official 133:d4dda5c437f0 754 if(HAL_GetTick() >= timeout)
mbed_official 133:d4dda5c437f0 755 {
mbed_official 133:d4dda5c437f0 756 return HAL_TIMEOUT;
mbed_official 133:d4dda5c437f0 757 }
mbed_official 133:d4dda5c437f0 758 }
mbed_official 133:d4dda5c437f0 759
mbed_official 133:d4dda5c437f0 760 /* Increment written spare areas number */
mbed_official 133:d4dda5c437f0 761 numSpareAreaWritten++;
mbed_official 133:d4dda5c437f0 762
mbed_official 133:d4dda5c437f0 763 /* Decrement spare areas to write */
mbed_official 133:d4dda5c437f0 764 NumSpareAreaTowrite--;
mbed_official 133:d4dda5c437f0 765
mbed_official 133:d4dda5c437f0 766 /* Increment the NAND address */
mbed_official 133:d4dda5c437f0 767 nandAddress = (uint32_t)(nandAddress + (hnand->Info.PageSize));
mbed_official 133:d4dda5c437f0 768
mbed_official 133:d4dda5c437f0 769 }
mbed_official 133:d4dda5c437f0 770
mbed_official 133:d4dda5c437f0 771 /* Update the NAND controller state */
mbed_official 133:d4dda5c437f0 772 hnand->State = HAL_NAND_STATE_READY;
mbed_official 133:d4dda5c437f0 773
mbed_official 133:d4dda5c437f0 774 /* Process unlocked */
mbed_official 133:d4dda5c437f0 775 __HAL_UNLOCK(hnand);
mbed_official 133:d4dda5c437f0 776
mbed_official 133:d4dda5c437f0 777 return HAL_OK;
mbed_official 133:d4dda5c437f0 778 }
mbed_official 133:d4dda5c437f0 779
mbed_official 133:d4dda5c437f0 780 /**
mbed_official 133:d4dda5c437f0 781 * @brief NAND memory Block erase
mbed_official 242:7074e42da0b2 782 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
mbed_official 242:7074e42da0b2 783 * the configuration information for NAND module.
mbed_official 133:d4dda5c437f0 784 * @param pAddress : pointer to NAND address structure
mbed_official 133:d4dda5c437f0 785 * @retval HAL status
mbed_official 133:d4dda5c437f0 786 */
mbed_official 133:d4dda5c437f0 787 HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, NAND_AddressTypedef *pAddress)
mbed_official 133:d4dda5c437f0 788 {
mbed_official 133:d4dda5c437f0 789 uint32_t DeviceAddress = 0;
mbed_official 133:d4dda5c437f0 790
mbed_official 133:d4dda5c437f0 791 /* Process Locked */
mbed_official 133:d4dda5c437f0 792 __HAL_LOCK(hnand);
mbed_official 133:d4dda5c437f0 793
mbed_official 133:d4dda5c437f0 794 /* Check the NAND controller state */
mbed_official 133:d4dda5c437f0 795 if(hnand->State == HAL_NAND_STATE_BUSY)
mbed_official 133:d4dda5c437f0 796 {
mbed_official 133:d4dda5c437f0 797 return HAL_BUSY;
mbed_official 133:d4dda5c437f0 798 }
mbed_official 133:d4dda5c437f0 799
mbed_official 133:d4dda5c437f0 800 /* Identify the device address */
mbed_official 133:d4dda5c437f0 801 if(hnand->Init.NandBank == FMC_NAND_BANK2)
mbed_official 133:d4dda5c437f0 802 {
mbed_official 133:d4dda5c437f0 803 DeviceAddress = NAND_DEVICE1;
mbed_official 133:d4dda5c437f0 804 }
mbed_official 133:d4dda5c437f0 805 else
mbed_official 133:d4dda5c437f0 806 {
mbed_official 133:d4dda5c437f0 807 DeviceAddress = NAND_DEVICE2;
mbed_official 133:d4dda5c437f0 808 }
mbed_official 133:d4dda5c437f0 809
mbed_official 133:d4dda5c437f0 810 /* Update the NAND controller state */
mbed_official 133:d4dda5c437f0 811 hnand->State = HAL_NAND_STATE_BUSY;
mbed_official 133:d4dda5c437f0 812
mbed_official 133:d4dda5c437f0 813 /* Send Erase block command sequence */
mbed_official 133:d4dda5c437f0 814 *(__IO uint8_t *)((uint32_t)(DeviceAddress | CMD_AREA)) = 0x60;
mbed_official 133:d4dda5c437f0 815
mbed_official 133:d4dda5c437f0 816 *(__IO uint8_t *)((uint32_t)(DeviceAddress | ADDR_AREA)) = ADDR_1st_CYCLE(ARRAY_ADDRESS(pAddress, hnand));
mbed_official 133:d4dda5c437f0 817 *(__IO uint8_t *)((uint32_t)(DeviceAddress | ADDR_AREA)) = ADDR_2nd_CYCLE(ARRAY_ADDRESS(pAddress, hnand));
mbed_official 133:d4dda5c437f0 818 *(__IO uint8_t *)((uint32_t)(DeviceAddress | ADDR_AREA)) = ADDR_3rd_CYCLE(ARRAY_ADDRESS(pAddress, hnand));
mbed_official 133:d4dda5c437f0 819
mbed_official 133:d4dda5c437f0 820 /* for 512 and 1 GB devices, 4th cycle is required */
mbed_official 133:d4dda5c437f0 821 if(hnand->Info.BlockNbr >= 1024)
mbed_official 133:d4dda5c437f0 822 {
mbed_official 133:d4dda5c437f0 823 *(__IO uint8_t *)((uint32_t)(DeviceAddress | ADDR_AREA)) = ADDR_4th_CYCLE(ARRAY_ADDRESS(pAddress, hnand));
mbed_official 133:d4dda5c437f0 824 }
mbed_official 133:d4dda5c437f0 825
mbed_official 133:d4dda5c437f0 826 *(__IO uint8_t *)((uint32_t)(DeviceAddress | CMD_AREA)) = 0xD0;
mbed_official 133:d4dda5c437f0 827
mbed_official 133:d4dda5c437f0 828 /* Update the NAND controller state */
mbed_official 133:d4dda5c437f0 829 hnand->State = HAL_NAND_STATE_READY;
mbed_official 133:d4dda5c437f0 830
mbed_official 133:d4dda5c437f0 831 /* Process unlocked */
mbed_official 133:d4dda5c437f0 832 __HAL_UNLOCK(hnand);
mbed_official 133:d4dda5c437f0 833
mbed_official 133:d4dda5c437f0 834 return HAL_OK;
mbed_official 133:d4dda5c437f0 835 }
mbed_official 133:d4dda5c437f0 836
mbed_official 133:d4dda5c437f0 837
mbed_official 133:d4dda5c437f0 838 /**
mbed_official 133:d4dda5c437f0 839 * @brief NAND memory read status
mbed_official 242:7074e42da0b2 840 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
mbed_official 242:7074e42da0b2 841 * the configuration information for NAND module.
mbed_official 133:d4dda5c437f0 842 * @retval NAND status
mbed_official 133:d4dda5c437f0 843 */
mbed_official 133:d4dda5c437f0 844 uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand)
mbed_official 133:d4dda5c437f0 845 {
mbed_official 133:d4dda5c437f0 846 uint32_t data = 0;
mbed_official 133:d4dda5c437f0 847 uint32_t DeviceAddress = 0;
mbed_official 133:d4dda5c437f0 848
mbed_official 133:d4dda5c437f0 849 /* Identify the device address */
mbed_official 133:d4dda5c437f0 850 if(hnand->Init.NandBank == FMC_NAND_BANK2)
mbed_official 133:d4dda5c437f0 851 {
mbed_official 133:d4dda5c437f0 852 DeviceAddress = NAND_DEVICE1;
mbed_official 133:d4dda5c437f0 853 }
mbed_official 133:d4dda5c437f0 854 else
mbed_official 133:d4dda5c437f0 855 {
mbed_official 133:d4dda5c437f0 856 DeviceAddress = NAND_DEVICE2;
mbed_official 133:d4dda5c437f0 857 }
mbed_official 133:d4dda5c437f0 858
mbed_official 133:d4dda5c437f0 859 /* Send Read status operation command */
mbed_official 133:d4dda5c437f0 860 *(__IO uint8_t *)((uint32_t)(DeviceAddress | CMD_AREA)) = 0x70;
mbed_official 133:d4dda5c437f0 861
mbed_official 133:d4dda5c437f0 862 /* Read status register data */
mbed_official 133:d4dda5c437f0 863 data = *(__IO uint8_t *)DeviceAddress;
mbed_official 133:d4dda5c437f0 864
mbed_official 133:d4dda5c437f0 865 /* Return the status */
mbed_official 133:d4dda5c437f0 866 if((data & NAND_ERROR) == NAND_ERROR)
mbed_official 133:d4dda5c437f0 867 {
mbed_official 133:d4dda5c437f0 868 return NAND_ERROR;
mbed_official 133:d4dda5c437f0 869 }
mbed_official 133:d4dda5c437f0 870 else if((data & NAND_READY) == NAND_READY)
mbed_official 133:d4dda5c437f0 871 {
mbed_official 133:d4dda5c437f0 872 return NAND_READY;
mbed_official 133:d4dda5c437f0 873 }
mbed_official 133:d4dda5c437f0 874
mbed_official 133:d4dda5c437f0 875 return NAND_BUSY;
mbed_official 133:d4dda5c437f0 876
mbed_official 133:d4dda5c437f0 877 }
mbed_official 133:d4dda5c437f0 878
mbed_official 133:d4dda5c437f0 879 /**
mbed_official 133:d4dda5c437f0 880 * @brief Increment the NAND memory address
mbed_official 242:7074e42da0b2 881 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
mbed_official 242:7074e42da0b2 882 * the configuration information for NAND module.
mbed_official 133:d4dda5c437f0 883 * @param pAddress: pointer to NAND adress structure
mbed_official 133:d4dda5c437f0 884 * @retval The new status of the increment address operation. It can be:
mbed_official 133:d4dda5c437f0 885 * - NAND_VALID_ADDRESS: When the new address is valid address
mbed_official 133:d4dda5c437f0 886 * - NAND_INVALID_ADDRESS: When the new address is invalid address
mbed_official 133:d4dda5c437f0 887 */
mbed_official 133:d4dda5c437f0 888 uint32_t HAL_NAND_Address_Inc(NAND_HandleTypeDef *hnand, NAND_AddressTypedef *pAddress)
mbed_official 133:d4dda5c437f0 889 {
mbed_official 133:d4dda5c437f0 890 uint32_t status = NAND_VALID_ADDRESS;
mbed_official 133:d4dda5c437f0 891
mbed_official 133:d4dda5c437f0 892 /* Increment page address */
mbed_official 133:d4dda5c437f0 893 pAddress->Page++;
mbed_official 133:d4dda5c437f0 894
mbed_official 133:d4dda5c437f0 895 /* Check NAND address is valid */
mbed_official 133:d4dda5c437f0 896 if(pAddress->Page == hnand->Info.BlockSize)
mbed_official 133:d4dda5c437f0 897 {
mbed_official 133:d4dda5c437f0 898 pAddress->Page = 0;
mbed_official 133:d4dda5c437f0 899 pAddress->Block++;
mbed_official 133:d4dda5c437f0 900
mbed_official 133:d4dda5c437f0 901 if(pAddress->Block == hnand->Info.ZoneSize)
mbed_official 133:d4dda5c437f0 902 {
mbed_official 133:d4dda5c437f0 903 pAddress->Block = 0;
mbed_official 133:d4dda5c437f0 904 pAddress->Zone++;
mbed_official 133:d4dda5c437f0 905
mbed_official 133:d4dda5c437f0 906 if(pAddress->Zone == (hnand->Info.ZoneSize/ hnand->Info.BlockNbr))
mbed_official 133:d4dda5c437f0 907 {
mbed_official 133:d4dda5c437f0 908 status = NAND_INVALID_ADDRESS;
mbed_official 133:d4dda5c437f0 909 }
mbed_official 133:d4dda5c437f0 910 }
mbed_official 133:d4dda5c437f0 911 }
mbed_official 133:d4dda5c437f0 912
mbed_official 133:d4dda5c437f0 913 return (status);
mbed_official 133:d4dda5c437f0 914 }
mbed_official 133:d4dda5c437f0 915
mbed_official 133:d4dda5c437f0 916
mbed_official 133:d4dda5c437f0 917 /**
mbed_official 133:d4dda5c437f0 918 * @}
mbed_official 133:d4dda5c437f0 919 */
mbed_official 133:d4dda5c437f0 920
mbed_official 133:d4dda5c437f0 921 /** @defgroup NAND_Group3 Control functions
mbed_official 133:d4dda5c437f0 922 * @brief management functions
mbed_official 133:d4dda5c437f0 923 *
mbed_official 133:d4dda5c437f0 924 @verbatim
mbed_official 133:d4dda5c437f0 925 ==============================================================================
mbed_official 133:d4dda5c437f0 926 ##### NAND Control functions #####
mbed_official 133:d4dda5c437f0 927 ==============================================================================
mbed_official 133:d4dda5c437f0 928 [..]
mbed_official 133:d4dda5c437f0 929 This subsection provides a set of functions allowing to control dynamically
mbed_official 133:d4dda5c437f0 930 the NAND interface.
mbed_official 133:d4dda5c437f0 931
mbed_official 133:d4dda5c437f0 932 @endverbatim
mbed_official 133:d4dda5c437f0 933 * @{
mbed_official 133:d4dda5c437f0 934 */
mbed_official 133:d4dda5c437f0 935
mbed_official 133:d4dda5c437f0 936
mbed_official 133:d4dda5c437f0 937 /**
mbed_official 133:d4dda5c437f0 938 * @brief Enables dynamically NAND ECC feature.
mbed_official 242:7074e42da0b2 939 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
mbed_official 242:7074e42da0b2 940 * the configuration information for NAND module.
mbed_official 133:d4dda5c437f0 941 * @retval HAL status
mbed_official 133:d4dda5c437f0 942 */
mbed_official 133:d4dda5c437f0 943 HAL_StatusTypeDef HAL_NAND_ECC_Enable(NAND_HandleTypeDef *hnand)
mbed_official 133:d4dda5c437f0 944 {
mbed_official 133:d4dda5c437f0 945 /* Check the NAND controller state */
mbed_official 133:d4dda5c437f0 946 if(hnand->State == HAL_NAND_STATE_BUSY)
mbed_official 133:d4dda5c437f0 947 {
mbed_official 133:d4dda5c437f0 948 return HAL_BUSY;
mbed_official 133:d4dda5c437f0 949 }
mbed_official 133:d4dda5c437f0 950
mbed_official 133:d4dda5c437f0 951 /* Update the NAND state */
mbed_official 133:d4dda5c437f0 952 hnand->State = HAL_NAND_STATE_BUSY;
mbed_official 133:d4dda5c437f0 953
mbed_official 133:d4dda5c437f0 954 /* Enable ECC feature */
mbed_official 133:d4dda5c437f0 955 FMC_NAND_ECC_Enable(hnand->Instance, hnand->Init.NandBank);
mbed_official 133:d4dda5c437f0 956
mbed_official 133:d4dda5c437f0 957 /* Update the NAND state */
mbed_official 133:d4dda5c437f0 958 hnand->State = HAL_NAND_STATE_READY;
mbed_official 133:d4dda5c437f0 959
mbed_official 133:d4dda5c437f0 960 return HAL_OK;
mbed_official 133:d4dda5c437f0 961 }
mbed_official 133:d4dda5c437f0 962
mbed_official 133:d4dda5c437f0 963
mbed_official 133:d4dda5c437f0 964 /**
mbed_official 133:d4dda5c437f0 965 * @brief Disables dynamically FMC_NAND ECC feature.
mbed_official 242:7074e42da0b2 966 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
mbed_official 242:7074e42da0b2 967 * the configuration information for NAND module.
mbed_official 133:d4dda5c437f0 968 * @retval HAL status
mbed_official 133:d4dda5c437f0 969 */
mbed_official 133:d4dda5c437f0 970 HAL_StatusTypeDef HAL_NAND_ECC_Disable(NAND_HandleTypeDef *hnand)
mbed_official 133:d4dda5c437f0 971 {
mbed_official 133:d4dda5c437f0 972 /* Check the NAND controller state */
mbed_official 133:d4dda5c437f0 973 if(hnand->State == HAL_NAND_STATE_BUSY)
mbed_official 133:d4dda5c437f0 974 {
mbed_official 133:d4dda5c437f0 975 return HAL_BUSY;
mbed_official 133:d4dda5c437f0 976 }
mbed_official 133:d4dda5c437f0 977
mbed_official 133:d4dda5c437f0 978 /* Update the NAND state */
mbed_official 133:d4dda5c437f0 979 hnand->State = HAL_NAND_STATE_BUSY;
mbed_official 133:d4dda5c437f0 980
mbed_official 133:d4dda5c437f0 981 /* Disable ECC feature */
mbed_official 133:d4dda5c437f0 982 FMC_NAND_ECC_Disable(hnand->Instance, hnand->Init.NandBank);
mbed_official 133:d4dda5c437f0 983
mbed_official 133:d4dda5c437f0 984 /* Update the NAND state */
mbed_official 133:d4dda5c437f0 985 hnand->State = HAL_NAND_STATE_READY;
mbed_official 133:d4dda5c437f0 986
mbed_official 133:d4dda5c437f0 987 return HAL_OK;
mbed_official 133:d4dda5c437f0 988 }
mbed_official 133:d4dda5c437f0 989
mbed_official 133:d4dda5c437f0 990 /**
mbed_official 133:d4dda5c437f0 991 * @brief Disables dynamically NAND ECC feature.
mbed_official 242:7074e42da0b2 992 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
mbed_official 242:7074e42da0b2 993 * the configuration information for NAND module.
mbed_official 133:d4dda5c437f0 994 * @param ECCval: pointer to ECC value
mbed_official 133:d4dda5c437f0 995 * @param Timeout: maximum timeout to wait
mbed_official 133:d4dda5c437f0 996 * @retval HAL status
mbed_official 133:d4dda5c437f0 997 */
mbed_official 133:d4dda5c437f0 998 HAL_StatusTypeDef HAL_NAND_GetECC(NAND_HandleTypeDef *hnand, uint32_t *ECCval, uint32_t Timeout)
mbed_official 133:d4dda5c437f0 999 {
mbed_official 133:d4dda5c437f0 1000 HAL_StatusTypeDef status = HAL_OK;
mbed_official 133:d4dda5c437f0 1001
mbed_official 133:d4dda5c437f0 1002 /* Check the NAND controller state */
mbed_official 133:d4dda5c437f0 1003 if(hnand->State == HAL_NAND_STATE_BUSY)
mbed_official 133:d4dda5c437f0 1004 {
mbed_official 133:d4dda5c437f0 1005 return HAL_BUSY;
mbed_official 133:d4dda5c437f0 1006 }
mbed_official 133:d4dda5c437f0 1007
mbed_official 133:d4dda5c437f0 1008 /* Update the NAND state */
mbed_official 133:d4dda5c437f0 1009 hnand->State = HAL_NAND_STATE_BUSY;
mbed_official 133:d4dda5c437f0 1010
mbed_official 133:d4dda5c437f0 1011 /* Get NAND ECC value */
mbed_official 133:d4dda5c437f0 1012 status = FMC_NAND_GetECC(hnand->Instance, ECCval, hnand->Init.NandBank, Timeout);
mbed_official 133:d4dda5c437f0 1013
mbed_official 133:d4dda5c437f0 1014 /* Update the NAND state */
mbed_official 133:d4dda5c437f0 1015 hnand->State = HAL_NAND_STATE_READY;
mbed_official 133:d4dda5c437f0 1016
mbed_official 133:d4dda5c437f0 1017 return status;
mbed_official 133:d4dda5c437f0 1018 }
mbed_official 133:d4dda5c437f0 1019
mbed_official 133:d4dda5c437f0 1020 /**
mbed_official 133:d4dda5c437f0 1021 * @}
mbed_official 133:d4dda5c437f0 1022 */
mbed_official 133:d4dda5c437f0 1023
mbed_official 133:d4dda5c437f0 1024
mbed_official 133:d4dda5c437f0 1025 /** @defgroup NAND_Group4 State functions
mbed_official 133:d4dda5c437f0 1026 * @brief Peripheral State functions
mbed_official 133:d4dda5c437f0 1027 *
mbed_official 133:d4dda5c437f0 1028 @verbatim
mbed_official 133:d4dda5c437f0 1029 ==============================================================================
mbed_official 133:d4dda5c437f0 1030 ##### NAND State functions #####
mbed_official 133:d4dda5c437f0 1031 ==============================================================================
mbed_official 133:d4dda5c437f0 1032 [..]
mbed_official 242:7074e42da0b2 1033 This subsection permits to get in run-time the status of the NAND controller
mbed_official 133:d4dda5c437f0 1034 and the data flow.
mbed_official 133:d4dda5c437f0 1035
mbed_official 133:d4dda5c437f0 1036 @endverbatim
mbed_official 133:d4dda5c437f0 1037 * @{
mbed_official 133:d4dda5c437f0 1038 */
mbed_official 133:d4dda5c437f0 1039
mbed_official 133:d4dda5c437f0 1040 /**
mbed_official 133:d4dda5c437f0 1041 * @brief return the NAND state
mbed_official 242:7074e42da0b2 1042 * @param hnand: pointer to a NAND_HandleTypeDef structure that contains
mbed_official 242:7074e42da0b2 1043 * the configuration information for NAND module.
mbed_official 133:d4dda5c437f0 1044 * @retval HAL state
mbed_official 133:d4dda5c437f0 1045 */
mbed_official 133:d4dda5c437f0 1046 HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand)
mbed_official 133:d4dda5c437f0 1047 {
mbed_official 133:d4dda5c437f0 1048 return hnand->State;
mbed_official 133:d4dda5c437f0 1049 }
mbed_official 133:d4dda5c437f0 1050
mbed_official 133:d4dda5c437f0 1051 /**
mbed_official 133:d4dda5c437f0 1052 * @}
mbed_official 133:d4dda5c437f0 1053 */
mbed_official 133:d4dda5c437f0 1054
mbed_official 133:d4dda5c437f0 1055 /**
mbed_official 133:d4dda5c437f0 1056 * @}
mbed_official 133:d4dda5c437f0 1057 */
mbed_official 133:d4dda5c437f0 1058 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
mbed_official 133:d4dda5c437f0 1059 #endif /* HAL_NAND_MODULE_ENABLED */
mbed_official 133:d4dda5c437f0 1060
mbed_official 133:d4dda5c437f0 1061 /**
mbed_official 133:d4dda5c437f0 1062 * @}
mbed_official 133:d4dda5c437f0 1063 */
mbed_official 133:d4dda5c437f0 1064
mbed_official 133:d4dda5c437f0 1065 /**
mbed_official 133:d4dda5c437f0 1066 * @}
mbed_official 133:d4dda5c437f0 1067 */
mbed_official 133:d4dda5c437f0 1068
mbed_official 133:d4dda5c437f0 1069 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/