shao ziyang / mbed-src-kl05

mbed library sources

Dependents:   frdm_kl05z_gpio_test

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targets/cmsis/TARGET_STM/TARGET_DISCO_F407VG/stm32f4xx_hal_nand.c@133:d4dda5c437f0, 2014-03-24 (annotated)

Committer:
mbed_official
Date:
Mon Mar 24 17:45:07 2014 +0000
Revision:
133:d4dda5c437f0
Child:
242:7074e42da0b2
Synchronized with git revision 47b961246bed973fe4cb8932781ffc8025b78a61



Full URL: https://github.com/mbedmicro/mbed/commit/47b961246bed973fe4cb8932781ffc8025b78a61/



[STM32F4-Discovery (STM32F407VG)] initial port

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 133:d4dda5c437f0 1 /**
mbed_official 133:d4dda5c437f0 2 ******************************************************************************
mbed_official 133:d4dda5c437f0 3 * @file stm32f4xx_hal_nand.c
mbed_official 133:d4dda5c437f0 4 * @author MCD Application Team
mbed_official 133:d4dda5c437f0 5 * @version V1.0.0
mbed_official 133:d4dda5c437f0 6 * @date 18-February-2014
mbed_official 133:d4dda5c437f0 7 * @brief NAND HAL module driver.
mbed_official 133:d4dda5c437f0 8 * This file provides a generic firmware to drive NAND memories mounted
mbed_official 133:d4dda5c437f0 9 * as external device.
mbed_official 133:d4dda5c437f0 10 *
mbed_official 133:d4dda5c437f0 11 @verbatim
mbed_official 133:d4dda5c437f0 12 ==============================================================================
mbed_official 133:d4dda5c437f0 13 ##### How to use this driver #####
mbed_official 133:d4dda5c437f0 14 ==============================================================================
mbed_official 133:d4dda5c437f0 15 [..]
mbed_official 133:d4dda5c437f0 16 This driver is a generic layered driver which contains a set of APIs used to
mbed_official 133:d4dda5c437f0 17 control NAND flash memories. It uses the FMC/FSMC layer functions to interface
mbed_official 133:d4dda5c437f0 18 with NAND devices. This driver is used as follows:
mbed_official 133:d4dda5c437f0 19
mbed_official 133:d4dda5c437f0 20 (+) NAND flash memory configuration sequence using the function HAL_NAND_Init()
mbed_official 133:d4dda5c437f0 21 with control and timing parameters for both common and attribute spaces.
mbed_official 133:d4dda5c437f0 22
mbed_official 133:d4dda5c437f0 23 (+) Read NAND flash memory maker and device IDs using the function
mbed_official 133:d4dda5c437f0 24 HAL_NAND_Read_ID(). The read information is stored in the NAND_ID_TypeDef
mbed_official 133:d4dda5c437f0 25 structure declared by the function caller.
mbed_official 133:d4dda5c437f0 26
mbed_official 133:d4dda5c437f0 27 (+) Access NAND flash memory by read/write operations using the functions
mbed_official 133:d4dda5c437f0 28 HAL_NAND_Read_Page()/HAL_NAND_Read_SpareArea(), HAL_NAND_Write_Page()/HAL_NAND_Write_SpareArea()
mbed_official 133:d4dda5c437f0 29 to read/write page(s)/spare area(s). These functions use specific device
mbed_official 133:d4dda5c437f0 30 information (Block, page size..) predefined by the user in the HAL_NAND_Info_TypeDef
mbed_official 133:d4dda5c437f0 31 structure. The read/write address information is contained by the Nand_Address_Typedef
mbed_official 133:d4dda5c437f0 32 structure passed as parameter.
mbed_official 133:d4dda5c437f0 33
mbed_official 133:d4dda5c437f0 34 (+) Perform NAND flash Reset chip operation using the function HAL_NAND_Reset().
mbed_official 133:d4dda5c437f0 35
mbed_official 133:d4dda5c437f0 36 (+) Perform NAND flash erase block operation using the function HAL_NAND_Erase_Block().
mbed_official 133:d4dda5c437f0 37 The erase block address information is contained in the Nand_Address_Typedef
mbed_official 133:d4dda5c437f0 38 structure passed as parameter.
mbed_official 133:d4dda5c437f0 39
mbed_official 133:d4dda5c437f0 40 (+) Read the NAND flash status operation using the function HAL_NAND_Read_Status().
mbed_official 133:d4dda5c437f0 41
mbed_official 133:d4dda5c437f0 42 (+) You can also control the NAND device by calling the control APIs HAL_NAND_ECC_Enable()/
mbed_official 133:d4dda5c437f0 43 HAL_NAND_ECC_Disable() to respectively enable/disable the ECC code correction
mbed_official 133:d4dda5c437f0 44 feature or the function HAL_NAND_GetECC() to get the ECC correction code.
mbed_official 133:d4dda5c437f0 45
mbed_official 133:d4dda5c437f0 46 (+) You can monitor the NAND device HAL state by calling the function
mbed_official 133:d4dda5c437f0 47 HAL_NAND_GetState()
mbed_official 133:d4dda5c437f0 48
mbed_official 133:d4dda5c437f0 49 [..]
mbed_official 133:d4dda5c437f0 50 (@) This driver is a set of generic APIs which handle standard NAND flash operations.
mbed_official 133:d4dda5c437f0 51 If a NAND flash device contains different operations and/or implementations,
mbed_official 133:d4dda5c437f0 52 it should be implemented separately.
mbed_official 133:d4dda5c437f0 53
mbed_official 133:d4dda5c437f0 54 @endverbatim
mbed_official 133:d4dda5c437f0 55 ******************************************************************************
mbed_official 133:d4dda5c437f0 56 * @attention
mbed_official 133:d4dda5c437f0 57 *
mbed_official 133:d4dda5c437f0 58 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 133:d4dda5c437f0 59 *
mbed_official 133:d4dda5c437f0 60 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 133:d4dda5c437f0 61 * are permitted provided that the following conditions are met:
mbed_official 133:d4dda5c437f0 62 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 133:d4dda5c437f0 63 * this list of conditions and the following disclaimer.
mbed_official 133:d4dda5c437f0 64 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 133:d4dda5c437f0 65 * this list of conditions and the following disclaimer in the documentation
mbed_official 133:d4dda5c437f0 66 * and/or other materials provided with the distribution.
mbed_official 133:d4dda5c437f0 67 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 133:d4dda5c437f0 68 * may be used to endorse or promote products derived from this software
mbed_official 133:d4dda5c437f0 69 * without specific prior written permission.
mbed_official 133:d4dda5c437f0 70 *
mbed_official 133:d4dda5c437f0 71 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 133:d4dda5c437f0 72 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 133:d4dda5c437f0 73 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 133:d4dda5c437f0 74 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 133:d4dda5c437f0 75 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 133:d4dda5c437f0 76 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 133:d4dda5c437f0 77 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 133:d4dda5c437f0 78 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 133:d4dda5c437f0 79 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 133:d4dda5c437f0 80 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 133:d4dda5c437f0 81 *
mbed_official 133:d4dda5c437f0 82 ******************************************************************************
mbed_official 133:d4dda5c437f0 83 */
mbed_official 133:d4dda5c437f0 84
mbed_official 133:d4dda5c437f0 85 /* Includes ------------------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 86 #include "stm32f4xx_hal.h"
mbed_official 133:d4dda5c437f0 87
mbed_official 133:d4dda5c437f0 88 /** @addtogroup STM32F4xx_HAL_Driver
mbed_official 133:d4dda5c437f0 89 * @{
mbed_official 133:d4dda5c437f0 90 */
mbed_official 133:d4dda5c437f0 91
mbed_official 133:d4dda5c437f0 92 /** @defgroup NAND
mbed_official 133:d4dda5c437f0 93 * @brief NAND driver modules
mbed_official 133:d4dda5c437f0 94 * @{
mbed_official 133:d4dda5c437f0 95 */
mbed_official 133:d4dda5c437f0 96 #ifdef HAL_NAND_MODULE_ENABLED
mbed_official 133:d4dda5c437f0 97
mbed_official 133:d4dda5c437f0 98 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
mbed_official 133:d4dda5c437f0 99
mbed_official 133:d4dda5c437f0 100 /* Private typedef -----------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 101 /* Private define ------------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 102 /* Private macro -------------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 103 /* Private variables ---------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 104 /* Private function prototypes -----------------------------------------------*/
mbed_official 133:d4dda5c437f0 105 /* Private functions ---------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 106
mbed_official 133:d4dda5c437f0 107 /** @defgroup NAND_Private_Functions
mbed_official 133:d4dda5c437f0 108 * @{
mbed_official 133:d4dda5c437f0 109 */
mbed_official 133:d4dda5c437f0 110
mbed_official 133:d4dda5c437f0 111 /** @defgroup NAND_Group1 Initialization and de-initialization functions
mbed_official 133:d4dda5c437f0 112 * @brief Initialization and Configuration functions
mbed_official 133:d4dda5c437f0 113 *
mbed_official 133:d4dda5c437f0 114 @verbatim
mbed_official 133:d4dda5c437f0 115 ==============================================================================
mbed_official 133:d4dda5c437f0 116 ##### NAND Initialization and de-initialization functions #####
mbed_official 133:d4dda5c437f0 117 ==============================================================================
mbed_official 133:d4dda5c437f0 118 [..]
mbed_official 133:d4dda5c437f0 119 This section provides functions allowing to initialize/de-initialize
mbed_official 133:d4dda5c437f0 120 the NAND memory
mbed_official 133:d4dda5c437f0 121
mbed_official 133:d4dda5c437f0 122 @endverbatim
mbed_official 133:d4dda5c437f0 123 * @{
mbed_official 133:d4dda5c437f0 124 */
mbed_official 133:d4dda5c437f0 125
mbed_official 133:d4dda5c437f0 126 /**
mbed_official 133:d4dda5c437f0 127 * @brief Perform NAND memory Initialization sequence
mbed_official 133:d4dda5c437f0 128 * @param hnand: pointer to NAND handle
mbed_official 133:d4dda5c437f0 129 * @param ComSpace_Timing: pointer to Common space timing structure
mbed_official 133:d4dda5c437f0 130 * @param AttSpace_Timing: pointer to Attribute space timing structure
mbed_official 133:d4dda5c437f0 131 * @retval HAL status
mbed_official 133:d4dda5c437f0 132 */
mbed_official 133:d4dda5c437f0 133 HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing)
mbed_official 133:d4dda5c437f0 134 {
mbed_official 133:d4dda5c437f0 135 /* Check the NAND handle state */
mbed_official 133:d4dda5c437f0 136 if(hnand == NULL)
mbed_official 133:d4dda5c437f0 137 {
mbed_official 133:d4dda5c437f0 138 return HAL_ERROR;
mbed_official 133:d4dda5c437f0 139 }
mbed_official 133:d4dda5c437f0 140
mbed_official 133:d4dda5c437f0 141 if(hnand->State == HAL_NAND_STATE_RESET)
mbed_official 133:d4dda5c437f0 142 {
mbed_official 133:d4dda5c437f0 143 /* Initialize the low level hardware (MSP) */
mbed_official 133:d4dda5c437f0 144 HAL_NAND_MspInit(hnand);
mbed_official 133:d4dda5c437f0 145 }
mbed_official 133:d4dda5c437f0 146
mbed_official 133:d4dda5c437f0 147 /* Initialize NAND control Interface */
mbed_official 133:d4dda5c437f0 148 FMC_NAND_Init(hnand->Instance, &(hnand->Init));
mbed_official 133:d4dda5c437f0 149
mbed_official 133:d4dda5c437f0 150 /* Initialize NAND common space timing Interface */
mbed_official 133:d4dda5c437f0 151 FMC_NAND_CommonSpace_Timing_Init(hnand->Instance, ComSpace_Timing, hnand->Init.NandBank);
mbed_official 133:d4dda5c437f0 152
mbed_official 133:d4dda5c437f0 153 /* Initialize NAND attribute space timing Interface */
mbed_official 133:d4dda5c437f0 154 FMC_NAND_AttributeSpace_Timing_Init(hnand->Instance, AttSpace_Timing, hnand->Init.NandBank);
mbed_official 133:d4dda5c437f0 155
mbed_official 133:d4dda5c437f0 156 /* Enable the NAND device */
mbed_official 133:d4dda5c437f0 157 __FMC_NAND_ENABLE(hnand->Instance, hnand->Init.NandBank);
mbed_official 133:d4dda5c437f0 158
mbed_official 133:d4dda5c437f0 159 /* Update the NAND controller state */
mbed_official 133:d4dda5c437f0 160 hnand->State = HAL_NAND_STATE_READY;
mbed_official 133:d4dda5c437f0 161
mbed_official 133:d4dda5c437f0 162 return HAL_OK;
mbed_official 133:d4dda5c437f0 163 }
mbed_official 133:d4dda5c437f0 164
mbed_official 133:d4dda5c437f0 165 /**
mbed_official 133:d4dda5c437f0 166 * @brief Perform NAND memory De-Initialization sequence
mbed_official 133:d4dda5c437f0 167 * @param hnand: pointer to NAND handle
mbed_official 133:d4dda5c437f0 168 * @retval HAL status
mbed_official 133:d4dda5c437f0 169 */
mbed_official 133:d4dda5c437f0 170 HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand)
mbed_official 133:d4dda5c437f0 171 {
mbed_official 133:d4dda5c437f0 172 /* Initialize the low level hardware (MSP) */
mbed_official 133:d4dda5c437f0 173 HAL_NAND_MspDeInit(hnand);
mbed_official 133:d4dda5c437f0 174
mbed_official 133:d4dda5c437f0 175 /* Configure the NAND registers with their reset values */
mbed_official 133:d4dda5c437f0 176 FMC_NAND_DeInit(hnand->Instance, hnand->Init.NandBank);
mbed_official 133:d4dda5c437f0 177
mbed_official 133:d4dda5c437f0 178 /* Reset the NAND controller state */
mbed_official 133:d4dda5c437f0 179 hnand->State = HAL_NAND_STATE_RESET;
mbed_official 133:d4dda5c437f0 180
mbed_official 133:d4dda5c437f0 181 /* Release Lock */
mbed_official 133:d4dda5c437f0 182 __HAL_UNLOCK(hnand);
mbed_official 133:d4dda5c437f0 183
mbed_official 133:d4dda5c437f0 184 return HAL_OK;
mbed_official 133:d4dda5c437f0 185 }
mbed_official 133:d4dda5c437f0 186
mbed_official 133:d4dda5c437f0 187 /**
mbed_official 133:d4dda5c437f0 188 * @brief NAND MSP Init
mbed_official 133:d4dda5c437f0 189 * @param hnand: pointer to NAND handle
mbed_official 133:d4dda5c437f0 190 * @retval None
mbed_official 133:d4dda5c437f0 191 */
mbed_official 133:d4dda5c437f0 192 __weak void HAL_NAND_MspInit(NAND_HandleTypeDef *hnand)
mbed_official 133:d4dda5c437f0 193 {
mbed_official 133:d4dda5c437f0 194 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 133:d4dda5c437f0 195 the HAL_NAND_MspInit could be implemented in the user file
mbed_official 133:d4dda5c437f0 196 */
mbed_official 133:d4dda5c437f0 197 }
mbed_official 133:d4dda5c437f0 198
mbed_official 133:d4dda5c437f0 199 /**
mbed_official 133:d4dda5c437f0 200 * @brief NAND MSP DeInit
mbed_official 133:d4dda5c437f0 201 * @param hnand: pointer to NAND handle
mbed_official 133:d4dda5c437f0 202 * @retval None
mbed_official 133:d4dda5c437f0 203 */
mbed_official 133:d4dda5c437f0 204 __weak void HAL_NAND_MspDeInit(NAND_HandleTypeDef *hnand)
mbed_official 133:d4dda5c437f0 205 {
mbed_official 133:d4dda5c437f0 206 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 133:d4dda5c437f0 207 the HAL_NAND_MspDeInit could be implemented in the user file
mbed_official 133:d4dda5c437f0 208 */
mbed_official 133:d4dda5c437f0 209 }
mbed_official 133:d4dda5c437f0 210
mbed_official 133:d4dda5c437f0 211
mbed_official 133:d4dda5c437f0 212 /**
mbed_official 133:d4dda5c437f0 213 * @brief This function handles NAND device interrupt request.
mbed_official 133:d4dda5c437f0 214 * @param hnand: pointer to NAND handle
mbed_official 133:d4dda5c437f0 215 * @retval HAL status
mbed_official 133:d4dda5c437f0 216 */
mbed_official 133:d4dda5c437f0 217 void HAL_NAND_IRQHandler(NAND_HandleTypeDef *hnand)
mbed_official 133:d4dda5c437f0 218 {
mbed_official 133:d4dda5c437f0 219 /* Check NAND interrupt Rising edge flag */
mbed_official 133:d4dda5c437f0 220 if(__FMC_NAND_GET_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_RISING_EDGE))
mbed_official 133:d4dda5c437f0 221 {
mbed_official 133:d4dda5c437f0 222 /* NAND interrupt callback*/
mbed_official 133:d4dda5c437f0 223 HAL_NAND_ITCallback(hnand);
mbed_official 133:d4dda5c437f0 224
mbed_official 133:d4dda5c437f0 225 /* Clear NAND interrupt Rising edge pending bit */
mbed_official 133:d4dda5c437f0 226 __FMC_NAND_CLEAR_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_RISING_EDGE);
mbed_official 133:d4dda5c437f0 227 }
mbed_official 133:d4dda5c437f0 228
mbed_official 133:d4dda5c437f0 229 /* Check NAND interrupt Level flag */
mbed_official 133:d4dda5c437f0 230 if(__FMC_NAND_GET_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_LEVEL))
mbed_official 133:d4dda5c437f0 231 {
mbed_official 133:d4dda5c437f0 232 /* NAND interrupt callback*/
mbed_official 133:d4dda5c437f0 233 HAL_NAND_ITCallback(hnand);
mbed_official 133:d4dda5c437f0 234
mbed_official 133:d4dda5c437f0 235 /* Clear NAND interrupt Level pending bit */
mbed_official 133:d4dda5c437f0 236 __FMC_NAND_CLEAR_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_LEVEL);
mbed_official 133:d4dda5c437f0 237 }
mbed_official 133:d4dda5c437f0 238
mbed_official 133:d4dda5c437f0 239 /* Check NAND interrupt Falling edge flag */
mbed_official 133:d4dda5c437f0 240 if(__FMC_NAND_GET_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_FALLING_EDGE))
mbed_official 133:d4dda5c437f0 241 {
mbed_official 133:d4dda5c437f0 242 /* NAND interrupt callback*/
mbed_official 133:d4dda5c437f0 243 HAL_NAND_ITCallback(hnand);
mbed_official 133:d4dda5c437f0 244
mbed_official 133:d4dda5c437f0 245 /* Clear NAND interrupt Falling edge pending bit */
mbed_official 133:d4dda5c437f0 246 __FMC_NAND_CLEAR_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_FALLING_EDGE);
mbed_official 133:d4dda5c437f0 247 }
mbed_official 133:d4dda5c437f0 248
mbed_official 133:d4dda5c437f0 249 /* Check NAND interrupt FIFO empty flag */
mbed_official 133:d4dda5c437f0 250 if(__FMC_NAND_GET_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_FEMPT))
mbed_official 133:d4dda5c437f0 251 {
mbed_official 133:d4dda5c437f0 252 /* NAND interrupt callback*/
mbed_official 133:d4dda5c437f0 253 HAL_NAND_ITCallback(hnand);
mbed_official 133:d4dda5c437f0 254
mbed_official 133:d4dda5c437f0 255 /* Clear NAND interrupt FIFO empty pending bit */
mbed_official 133:d4dda5c437f0 256 __FMC_NAND_CLEAR_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_FEMPT);
mbed_official 133:d4dda5c437f0 257 }
mbed_official 133:d4dda5c437f0 258
mbed_official 133:d4dda5c437f0 259 }
mbed_official 133:d4dda5c437f0 260
mbed_official 133:d4dda5c437f0 261 /**
mbed_official 133:d4dda5c437f0 262 * @brief NAND interrupt feature callback
mbed_official 133:d4dda5c437f0 263 * @param hnand: pointer to NAND handle
mbed_official 133:d4dda5c437f0 264 * @retval None
mbed_official 133:d4dda5c437f0 265 */
mbed_official 133:d4dda5c437f0 266 __weak void HAL_NAND_ITCallback(NAND_HandleTypeDef *hnand)
mbed_official 133:d4dda5c437f0 267 {
mbed_official 133:d4dda5c437f0 268 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 133:d4dda5c437f0 269 the HAL_NAND_ITCallback could be implemented in the user file
mbed_official 133:d4dda5c437f0 270 */
mbed_official 133:d4dda5c437f0 271 }
mbed_official 133:d4dda5c437f0 272
mbed_official 133:d4dda5c437f0 273 /**
mbed_official 133:d4dda5c437f0 274 * @}
mbed_official 133:d4dda5c437f0 275 */
mbed_official 133:d4dda5c437f0 276
mbed_official 133:d4dda5c437f0 277 /** @defgroup NAND_Group2 Input and Output functions
mbed_official 133:d4dda5c437f0 278 * @brief Input Output and memory control functions
mbed_official 133:d4dda5c437f0 279 *
mbed_official 133:d4dda5c437f0 280 @verbatim
mbed_official 133:d4dda5c437f0 281 ==============================================================================
mbed_official 133:d4dda5c437f0 282 ##### NAND Input and Output functions #####
mbed_official 133:d4dda5c437f0 283 ==============================================================================
mbed_official 133:d4dda5c437f0 284 [..]
mbed_official 133:d4dda5c437f0 285 This section provides functions allowing to use and control the NAND
mbed_official 133:d4dda5c437f0 286 memory
mbed_official 133:d4dda5c437f0 287
mbed_official 133:d4dda5c437f0 288 @endverbatim
mbed_official 133:d4dda5c437f0 289 * @{
mbed_official 133:d4dda5c437f0 290 */
mbed_official 133:d4dda5c437f0 291
mbed_official 133:d4dda5c437f0 292 /**
mbed_official 133:d4dda5c437f0 293 * @brief Read the NAND memory electronic signature
mbed_official 133:d4dda5c437f0 294 * @param hnand: pointer to NAND handle
mbed_official 133:d4dda5c437f0 295 * @param pNAND_ID: NAND ID structure
mbed_official 133:d4dda5c437f0 296 * @retval HAL status
mbed_official 133:d4dda5c437f0 297 */
mbed_official 133:d4dda5c437f0 298 HAL_StatusTypeDef HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID)
mbed_official 133:d4dda5c437f0 299 {
mbed_official 133:d4dda5c437f0 300 __IO uint32_t data = 0;
mbed_official 133:d4dda5c437f0 301 uint32_t deviceAddress = 0;
mbed_official 133:d4dda5c437f0 302
mbed_official 133:d4dda5c437f0 303 /* Process Locked */
mbed_official 133:d4dda5c437f0 304 __HAL_LOCK(hnand);
mbed_official 133:d4dda5c437f0 305
mbed_official 133:d4dda5c437f0 306 /* Check the NAND controller state */
mbed_official 133:d4dda5c437f0 307 if(hnand->State == HAL_NAND_STATE_BUSY)
mbed_official 133:d4dda5c437f0 308 {
mbed_official 133:d4dda5c437f0 309 return HAL_BUSY;
mbed_official 133:d4dda5c437f0 310 }
mbed_official 133:d4dda5c437f0 311
mbed_official 133:d4dda5c437f0 312 /* Identify the device address */
mbed_official 133:d4dda5c437f0 313 if(hnand->Init.NandBank == FMC_NAND_BANK2)
mbed_official 133:d4dda5c437f0 314 {
mbed_official 133:d4dda5c437f0 315 deviceAddress = NAND_DEVICE1;
mbed_official 133:d4dda5c437f0 316 }
mbed_official 133:d4dda5c437f0 317 else
mbed_official 133:d4dda5c437f0 318 {
mbed_official 133:d4dda5c437f0 319 deviceAddress = NAND_DEVICE2;
mbed_official 133:d4dda5c437f0 320 }
mbed_official 133:d4dda5c437f0 321
mbed_official 133:d4dda5c437f0 322 /* Update the NAND controller state */
mbed_official 133:d4dda5c437f0 323 hnand->State = HAL_NAND_STATE_BUSY;
mbed_official 133:d4dda5c437f0 324
mbed_official 133:d4dda5c437f0 325 /* Send Read ID command sequence */
mbed_official 133:d4dda5c437f0 326 *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = 0x90;
mbed_official 133:d4dda5c437f0 327 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00;
mbed_official 133:d4dda5c437f0 328
mbed_official 133:d4dda5c437f0 329 /* Read the electronic signature from NAND flash */
mbed_official 133:d4dda5c437f0 330 data = *(__IO uint32_t *)deviceAddress;
mbed_official 133:d4dda5c437f0 331
mbed_official 133:d4dda5c437f0 332 /* Return the data read */
mbed_official 133:d4dda5c437f0 333 pNAND_ID->Maker_Id = ADDR_1st_CYCLE(data);
mbed_official 133:d4dda5c437f0 334 pNAND_ID->Device_Id = ADDR_2nd_CYCLE(data);
mbed_official 133:d4dda5c437f0 335 pNAND_ID->Third_Id = ADDR_3rd_CYCLE(data);
mbed_official 133:d4dda5c437f0 336 pNAND_ID->Fourth_Id = ADDR_4th_CYCLE(data);
mbed_official 133:d4dda5c437f0 337
mbed_official 133:d4dda5c437f0 338 /* Update the NAND controller state */
mbed_official 133:d4dda5c437f0 339 hnand->State = HAL_NAND_STATE_READY;
mbed_official 133:d4dda5c437f0 340
mbed_official 133:d4dda5c437f0 341 /* Process unlocked */
mbed_official 133:d4dda5c437f0 342 __HAL_UNLOCK(hnand);
mbed_official 133:d4dda5c437f0 343
mbed_official 133:d4dda5c437f0 344 return HAL_OK;
mbed_official 133:d4dda5c437f0 345 }
mbed_official 133:d4dda5c437f0 346
mbed_official 133:d4dda5c437f0 347 /**
mbed_official 133:d4dda5c437f0 348 * @brief NAND memory reset
mbed_official 133:d4dda5c437f0 349 * @param hnand: pointer to NAND handle
mbed_official 133:d4dda5c437f0 350 * @retval HAL status
mbed_official 133:d4dda5c437f0 351 */
mbed_official 133:d4dda5c437f0 352 HAL_StatusTypeDef HAL_NAND_Reset(NAND_HandleTypeDef *hnand)
mbed_official 133:d4dda5c437f0 353 {
mbed_official 133:d4dda5c437f0 354 uint32_t deviceAddress = 0;
mbed_official 133:d4dda5c437f0 355
mbed_official 133:d4dda5c437f0 356 /* Process Locked */
mbed_official 133:d4dda5c437f0 357 __HAL_LOCK(hnand);
mbed_official 133:d4dda5c437f0 358
mbed_official 133:d4dda5c437f0 359 /* Check the NAND controller state */
mbed_official 133:d4dda5c437f0 360 if(hnand->State == HAL_NAND_STATE_BUSY)
mbed_official 133:d4dda5c437f0 361 {
mbed_official 133:d4dda5c437f0 362 return HAL_BUSY;
mbed_official 133:d4dda5c437f0 363 }
mbed_official 133:d4dda5c437f0 364
mbed_official 133:d4dda5c437f0 365 /* Identify the device address */
mbed_official 133:d4dda5c437f0 366 if(hnand->Init.NandBank == FMC_NAND_BANK2)
mbed_official 133:d4dda5c437f0 367 {
mbed_official 133:d4dda5c437f0 368 deviceAddress = NAND_DEVICE1;
mbed_official 133:d4dda5c437f0 369 }
mbed_official 133:d4dda5c437f0 370 else
mbed_official 133:d4dda5c437f0 371 {
mbed_official 133:d4dda5c437f0 372 deviceAddress = NAND_DEVICE2;
mbed_official 133:d4dda5c437f0 373 }
mbed_official 133:d4dda5c437f0 374
mbed_official 133:d4dda5c437f0 375 /* Update the NAND controller state */
mbed_official 133:d4dda5c437f0 376 hnand->State = HAL_NAND_STATE_BUSY;
mbed_official 133:d4dda5c437f0 377
mbed_official 133:d4dda5c437f0 378 /* Send NAND reset command */
mbed_official 133:d4dda5c437f0 379 *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = 0xFF;
mbed_official 133:d4dda5c437f0 380
mbed_official 133:d4dda5c437f0 381
mbed_official 133:d4dda5c437f0 382 /* Update the NAND controller state */
mbed_official 133:d4dda5c437f0 383 hnand->State = HAL_NAND_STATE_READY;
mbed_official 133:d4dda5c437f0 384
mbed_official 133:d4dda5c437f0 385 /* Process unlocked */
mbed_official 133:d4dda5c437f0 386 __HAL_UNLOCK(hnand);
mbed_official 133:d4dda5c437f0 387
mbed_official 133:d4dda5c437f0 388 return HAL_OK;
mbed_official 133:d4dda5c437f0 389
mbed_official 133:d4dda5c437f0 390 }
mbed_official 133:d4dda5c437f0 391
mbed_official 133:d4dda5c437f0 392
mbed_official 133:d4dda5c437f0 393 /**
mbed_official 133:d4dda5c437f0 394 * @brief Read Page(s) from NAND memory block
mbed_official 133:d4dda5c437f0 395 * @param hnand: pointer to NAND handle
mbed_official 133:d4dda5c437f0 396 * @param pAddress : pointer to NAND address structure
mbed_official 133:d4dda5c437f0 397 * @param pBuffer : pointer to destination read buffer
mbed_official 133:d4dda5c437f0 398 * @param NumPageToRead : number of pages to read from block
mbed_official 133:d4dda5c437f0 399 * @retval HAL status
mbed_official 133:d4dda5c437f0 400 */
mbed_official 133:d4dda5c437f0 401 HAL_StatusTypeDef HAL_NAND_Read_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypedef *pAddress, uint8_t *pBuffer, uint32_t NumPageToRead)
mbed_official 133:d4dda5c437f0 402 {
mbed_official 133:d4dda5c437f0 403 __IO uint32_t index = 0;
mbed_official 133:d4dda5c437f0 404 uint32_t deviceAddress = 0, size = 0, numPagesRead = 0, nandAddress = 0;
mbed_official 133:d4dda5c437f0 405
mbed_official 133:d4dda5c437f0 406 /* Process Locked */
mbed_official 133:d4dda5c437f0 407 __HAL_LOCK(hnand);
mbed_official 133:d4dda5c437f0 408
mbed_official 133:d4dda5c437f0 409 /* Check the NAND controller state */
mbed_official 133:d4dda5c437f0 410 if(hnand->State == HAL_NAND_STATE_BUSY)
mbed_official 133:d4dda5c437f0 411 {
mbed_official 133:d4dda5c437f0 412 return HAL_BUSY;
mbed_official 133:d4dda5c437f0 413 }
mbed_official 133:d4dda5c437f0 414
mbed_official 133:d4dda5c437f0 415 /* Identify the device address */
mbed_official 133:d4dda5c437f0 416 if(hnand->Init.NandBank == FMC_NAND_BANK2)
mbed_official 133:d4dda5c437f0 417 {
mbed_official 133:d4dda5c437f0 418 deviceAddress = NAND_DEVICE1;
mbed_official 133:d4dda5c437f0 419 }
mbed_official 133:d4dda5c437f0 420 else
mbed_official 133:d4dda5c437f0 421 {
mbed_official 133:d4dda5c437f0 422 deviceAddress = NAND_DEVICE2;
mbed_official 133:d4dda5c437f0 423 }
mbed_official 133:d4dda5c437f0 424
mbed_official 133:d4dda5c437f0 425 /* Update the NAND controller state */
mbed_official 133:d4dda5c437f0 426 hnand->State = HAL_NAND_STATE_BUSY;
mbed_official 133:d4dda5c437f0 427
mbed_official 133:d4dda5c437f0 428 /* NAND raw address calculation */
mbed_official 133:d4dda5c437f0 429 nandAddress = ARRAY_ADDRESS(pAddress, hnand);
mbed_official 133:d4dda5c437f0 430
mbed_official 133:d4dda5c437f0 431 /* Page(s) read loop */
mbed_official 133:d4dda5c437f0 432 while((NumPageToRead != 0) && (nandAddress < (hnand->Info.BlockSize) * (hnand->Info.PageSize)))
mbed_official 133:d4dda5c437f0 433 {
mbed_official 133:d4dda5c437f0 434 /* update the buffer size */
mbed_official 133:d4dda5c437f0 435 size = (hnand->Info.PageSize) + ((hnand->Info.PageSize) * numPagesRead);
mbed_official 133:d4dda5c437f0 436
mbed_official 133:d4dda5c437f0 437 /* Send read page command sequence */
mbed_official 133:d4dda5c437f0 438 *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = NAND_CMD_AREA_A;
mbed_official 133:d4dda5c437f0 439
mbed_official 133:d4dda5c437f0 440 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00;
mbed_official 133:d4dda5c437f0 441 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_1st_CYCLE(nandAddress);
mbed_official 133:d4dda5c437f0 442 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_2nd_CYCLE(nandAddress);
mbed_official 133:d4dda5c437f0 443 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_3rd_CYCLE(nandAddress);
mbed_official 133:d4dda5c437f0 444
mbed_official 133:d4dda5c437f0 445 /* for 512 and 1 GB devices, 4th cycle is required */
mbed_official 133:d4dda5c437f0 446 if(hnand->Info.BlockNbr >= 1024)
mbed_official 133:d4dda5c437f0 447 {
mbed_official 133:d4dda5c437f0 448 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_4th_CYCLE(nandAddress);
mbed_official 133:d4dda5c437f0 449 }
mbed_official 133:d4dda5c437f0 450
mbed_official 133:d4dda5c437f0 451 *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = 0x30;
mbed_official 133:d4dda5c437f0 452
mbed_official 133:d4dda5c437f0 453 /* Get Data into Buffer */
mbed_official 133:d4dda5c437f0 454 for(; index < size; index++)
mbed_official 133:d4dda5c437f0 455 {
mbed_official 133:d4dda5c437f0 456 *(uint8_t *)pBuffer++ = *(uint8_t *)deviceAddress;
mbed_official 133:d4dda5c437f0 457 }
mbed_official 133:d4dda5c437f0 458
mbed_official 133:d4dda5c437f0 459 /* Increment read pages number */
mbed_official 133:d4dda5c437f0 460 numPagesRead++;
mbed_official 133:d4dda5c437f0 461
mbed_official 133:d4dda5c437f0 462 /* Decrement pages to read */
mbed_official 133:d4dda5c437f0 463 NumPageToRead--;
mbed_official 133:d4dda5c437f0 464
mbed_official 133:d4dda5c437f0 465 /* Increment the NAND address */
mbed_official 133:d4dda5c437f0 466 nandAddress = (uint32_t)(nandAddress + (hnand->Info.PageSize * 8));
mbed_official 133:d4dda5c437f0 467
mbed_official 133:d4dda5c437f0 468 }
mbed_official 133:d4dda5c437f0 469
mbed_official 133:d4dda5c437f0 470 /* Update the NAND controller state */
mbed_official 133:d4dda5c437f0 471 hnand->State = HAL_NAND_STATE_READY;
mbed_official 133:d4dda5c437f0 472
mbed_official 133:d4dda5c437f0 473 /* Process unlocked */
mbed_official 133:d4dda5c437f0 474 __HAL_UNLOCK(hnand);
mbed_official 133:d4dda5c437f0 475
mbed_official 133:d4dda5c437f0 476 return HAL_OK;
mbed_official 133:d4dda5c437f0 477
mbed_official 133:d4dda5c437f0 478 }
mbed_official 133:d4dda5c437f0 479
mbed_official 133:d4dda5c437f0 480 /**
mbed_official 133:d4dda5c437f0 481 * @brief Write Page(s) to NAND memory block
mbed_official 133:d4dda5c437f0 482 * @param hnand: pointer to NAND handle
mbed_official 133:d4dda5c437f0 483 * @param pAddress : pointer to NAND address structure
mbed_official 133:d4dda5c437f0 484 * @param pBuffer : pointer to source buffer to write
mbed_official 133:d4dda5c437f0 485 * @param NumPageToWrite : number of pages to write to block
mbed_official 133:d4dda5c437f0 486 * @retval HAL status
mbed_official 133:d4dda5c437f0 487 */
mbed_official 133:d4dda5c437f0 488 HAL_StatusTypeDef HAL_NAND_Write_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypedef *pAddress, uint8_t *pBuffer, uint32_t NumPageToWrite)
mbed_official 133:d4dda5c437f0 489 {
mbed_official 133:d4dda5c437f0 490 __IO uint32_t index = 0;
mbed_official 133:d4dda5c437f0 491 uint32_t timeout = 0;
mbed_official 133:d4dda5c437f0 492 uint32_t deviceAddress = 0, size = 0 , numPagesWritten = 0, nandAddress = 0;
mbed_official 133:d4dda5c437f0 493
mbed_official 133:d4dda5c437f0 494 /* Process Locked */
mbed_official 133:d4dda5c437f0 495 __HAL_LOCK(hnand);
mbed_official 133:d4dda5c437f0 496
mbed_official 133:d4dda5c437f0 497 /* Check the NAND controller state */
mbed_official 133:d4dda5c437f0 498 if(hnand->State == HAL_NAND_STATE_BUSY)
mbed_official 133:d4dda5c437f0 499 {
mbed_official 133:d4dda5c437f0 500 return HAL_BUSY;
mbed_official 133:d4dda5c437f0 501 }
mbed_official 133:d4dda5c437f0 502
mbed_official 133:d4dda5c437f0 503 /* Identify the device address */
mbed_official 133:d4dda5c437f0 504 if(hnand->Init.NandBank == FMC_NAND_BANK2)
mbed_official 133:d4dda5c437f0 505 {
mbed_official 133:d4dda5c437f0 506 deviceAddress = NAND_DEVICE1;
mbed_official 133:d4dda5c437f0 507 }
mbed_official 133:d4dda5c437f0 508 else
mbed_official 133:d4dda5c437f0 509 {
mbed_official 133:d4dda5c437f0 510 deviceAddress = NAND_DEVICE2;
mbed_official 133:d4dda5c437f0 511 }
mbed_official 133:d4dda5c437f0 512
mbed_official 133:d4dda5c437f0 513 /* Update the NAND controller state */
mbed_official 133:d4dda5c437f0 514 hnand->State = HAL_NAND_STATE_BUSY;
mbed_official 133:d4dda5c437f0 515
mbed_official 133:d4dda5c437f0 516 /* NAND raw address calculation */
mbed_official 133:d4dda5c437f0 517 nandAddress = ARRAY_ADDRESS(pAddress, hnand);
mbed_official 133:d4dda5c437f0 518
mbed_official 133:d4dda5c437f0 519 /* Page(s) write loop */
mbed_official 133:d4dda5c437f0 520 while((NumPageToWrite != 0) && (nandAddress < (hnand->Info.BlockSize) * (hnand->Info.PageSize)))
mbed_official 133:d4dda5c437f0 521 {
mbed_official 133:d4dda5c437f0 522 /* update the buffer size */
mbed_official 133:d4dda5c437f0 523 size = (hnand->Info.PageSize) + ((hnand->Info.PageSize) * numPagesWritten);
mbed_official 133:d4dda5c437f0 524
mbed_official 133:d4dda5c437f0 525 /* Send write page command sequence */
mbed_official 133:d4dda5c437f0 526 *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = NAND_CMD_AREA_A;
mbed_official 133:d4dda5c437f0 527 *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = 0x80;
mbed_official 133:d4dda5c437f0 528
mbed_official 133:d4dda5c437f0 529 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00;
mbed_official 133:d4dda5c437f0 530 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_1st_CYCLE(nandAddress);
mbed_official 133:d4dda5c437f0 531 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_2nd_CYCLE(nandAddress);
mbed_official 133:d4dda5c437f0 532 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_3rd_CYCLE(nandAddress);
mbed_official 133:d4dda5c437f0 533
mbed_official 133:d4dda5c437f0 534 /* for 512 and 1 GB devices, 4th cycle is required */
mbed_official 133:d4dda5c437f0 535 if(hnand->Info.BlockNbr >= 1024)
mbed_official 133:d4dda5c437f0 536 {
mbed_official 133:d4dda5c437f0 537 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_4th_CYCLE(nandAddress);
mbed_official 133:d4dda5c437f0 538 }
mbed_official 133:d4dda5c437f0 539
mbed_official 133:d4dda5c437f0 540 /* Write data to memory */
mbed_official 133:d4dda5c437f0 541 for(; index < size; index++)
mbed_official 133:d4dda5c437f0 542 {
mbed_official 133:d4dda5c437f0 543 *(__IO uint8_t *)deviceAddress = *(uint8_t *)pBuffer++;
mbed_official 133:d4dda5c437f0 544 }
mbed_official 133:d4dda5c437f0 545
mbed_official 133:d4dda5c437f0 546 *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = 0x10;
mbed_official 133:d4dda5c437f0 547
mbed_official 133:d4dda5c437f0 548 /* Read status until NAND is ready */
mbed_official 133:d4dda5c437f0 549 while(HAL_NAND_Read_Status(hnand) != NAND_READY)
mbed_official 133:d4dda5c437f0 550 {
mbed_official 133:d4dda5c437f0 551 /* Check for timeout value */
mbed_official 133:d4dda5c437f0 552 timeout = HAL_GetTick() + NAND_WRITE_TIMEOUT;
mbed_official 133:d4dda5c437f0 553
mbed_official 133:d4dda5c437f0 554 if(HAL_GetTick() >= timeout)
mbed_official 133:d4dda5c437f0 555 {
mbed_official 133:d4dda5c437f0 556 return HAL_TIMEOUT;
mbed_official 133:d4dda5c437f0 557 }
mbed_official 133:d4dda5c437f0 558 }
mbed_official 133:d4dda5c437f0 559
mbed_official 133:d4dda5c437f0 560 /* Increment written pages number */
mbed_official 133:d4dda5c437f0 561 numPagesWritten++;
mbed_official 133:d4dda5c437f0 562
mbed_official 133:d4dda5c437f0 563 /* Decrement pages to write */
mbed_official 133:d4dda5c437f0 564 NumPageToWrite--;
mbed_official 133:d4dda5c437f0 565
mbed_official 133:d4dda5c437f0 566 /* Increment the NAND address */
mbed_official 133:d4dda5c437f0 567 nandAddress = (uint32_t)(nandAddress + (hnand->Info.PageSize * 8));
mbed_official 133:d4dda5c437f0 568
mbed_official 133:d4dda5c437f0 569 }
mbed_official 133:d4dda5c437f0 570
mbed_official 133:d4dda5c437f0 571 /* Update the NAND controller state */
mbed_official 133:d4dda5c437f0 572 hnand->State = HAL_NAND_STATE_READY;
mbed_official 133:d4dda5c437f0 573
mbed_official 133:d4dda5c437f0 574 /* Process unlocked */
mbed_official 133:d4dda5c437f0 575 __HAL_UNLOCK(hnand);
mbed_official 133:d4dda5c437f0 576
mbed_official 133:d4dda5c437f0 577 return HAL_OK;
mbed_official 133:d4dda5c437f0 578 }
mbed_official 133:d4dda5c437f0 579
mbed_official 133:d4dda5c437f0 580
mbed_official 133:d4dda5c437f0 581 /**
mbed_official 133:d4dda5c437f0 582 * @brief Read Spare area(s) from NAND memory
mbed_official 133:d4dda5c437f0 583 * @param hnand: pointer to NAND handle
mbed_official 133:d4dda5c437f0 584 * @param pAddress : pointer to NAND address structure
mbed_official 133:d4dda5c437f0 585 * @param pBuffer: pointer to source buffer to write
mbed_official 133:d4dda5c437f0 586 * @param NumSpareAreaToRead: Number of spare area to read
mbed_official 133:d4dda5c437f0 587 * @retval HAL status
mbed_official 133:d4dda5c437f0 588 */
mbed_official 133:d4dda5c437f0 589 HAL_StatusTypeDef HAL_NAND_Read_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypedef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaToRead)
mbed_official 133:d4dda5c437f0 590 {
mbed_official 133:d4dda5c437f0 591 __IO uint32_t index = 0;
mbed_official 133:d4dda5c437f0 592 uint32_t deviceAddress = 0, size = 0, numSpareAreaRead = 0, nandAddress = 0;
mbed_official 133:d4dda5c437f0 593
mbed_official 133:d4dda5c437f0 594 /* Process Locked */
mbed_official 133:d4dda5c437f0 595 __HAL_LOCK(hnand);
mbed_official 133:d4dda5c437f0 596
mbed_official 133:d4dda5c437f0 597 /* Check the NAND controller state */
mbed_official 133:d4dda5c437f0 598 if(hnand->State == HAL_NAND_STATE_BUSY)
mbed_official 133:d4dda5c437f0 599 {
mbed_official 133:d4dda5c437f0 600 return HAL_BUSY;
mbed_official 133:d4dda5c437f0 601 }
mbed_official 133:d4dda5c437f0 602
mbed_official 133:d4dda5c437f0 603 /* Identify the device address */
mbed_official 133:d4dda5c437f0 604 if(hnand->Init.NandBank == FMC_NAND_BANK2)
mbed_official 133:d4dda5c437f0 605 {
mbed_official 133:d4dda5c437f0 606 deviceAddress = NAND_DEVICE1;
mbed_official 133:d4dda5c437f0 607 }
mbed_official 133:d4dda5c437f0 608 else
mbed_official 133:d4dda5c437f0 609 {
mbed_official 133:d4dda5c437f0 610 deviceAddress = NAND_DEVICE2;
mbed_official 133:d4dda5c437f0 611 }
mbed_official 133:d4dda5c437f0 612
mbed_official 133:d4dda5c437f0 613 /* Update the NAND controller state */
mbed_official 133:d4dda5c437f0 614 hnand->State = HAL_NAND_STATE_BUSY;
mbed_official 133:d4dda5c437f0 615
mbed_official 133:d4dda5c437f0 616 /* NAND raw address calculation */
mbed_official 133:d4dda5c437f0 617 nandAddress = ARRAY_ADDRESS(pAddress, hnand);
mbed_official 133:d4dda5c437f0 618
mbed_official 133:d4dda5c437f0 619 /* Spare area(s) read loop */
mbed_official 133:d4dda5c437f0 620 while((NumSpareAreaToRead != 0) && (nandAddress < (hnand->Info.BlockSize) * (hnand->Info.SpareAreaSize)))
mbed_official 133:d4dda5c437f0 621 {
mbed_official 133:d4dda5c437f0 622
mbed_official 133:d4dda5c437f0 623 /* update the buffer size */
mbed_official 133:d4dda5c437f0 624 size = (hnand->Info.PageSize) + ((hnand->Info.PageSize) * numSpareAreaRead);
mbed_official 133:d4dda5c437f0 625
mbed_official 133:d4dda5c437f0 626 /* Send read spare area command sequence */
mbed_official 133:d4dda5c437f0 627 *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = NAND_CMD_AREA_C;
mbed_official 133:d4dda5c437f0 628
mbed_official 133:d4dda5c437f0 629 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00;
mbed_official 133:d4dda5c437f0 630 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_1st_CYCLE(nandAddress);
mbed_official 133:d4dda5c437f0 631 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_2nd_CYCLE(nandAddress);
mbed_official 133:d4dda5c437f0 632 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_3rd_CYCLE(nandAddress);
mbed_official 133:d4dda5c437f0 633
mbed_official 133:d4dda5c437f0 634 /* for 512 and 1 GB devices, 4th cycle is required */
mbed_official 133:d4dda5c437f0 635 if(hnand->Info.BlockNbr >= 1024)
mbed_official 133:d4dda5c437f0 636 {
mbed_official 133:d4dda5c437f0 637 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_4th_CYCLE(nandAddress);
mbed_official 133:d4dda5c437f0 638 }
mbed_official 133:d4dda5c437f0 639
mbed_official 133:d4dda5c437f0 640 *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = 0x30;
mbed_official 133:d4dda5c437f0 641
mbed_official 133:d4dda5c437f0 642 /* Get Data into Buffer */
mbed_official 133:d4dda5c437f0 643 for ( ;index < size; index++)
mbed_official 133:d4dda5c437f0 644 {
mbed_official 133:d4dda5c437f0 645 *(uint8_t *)pBuffer++ = *(uint8_t *)deviceAddress;
mbed_official 133:d4dda5c437f0 646 }
mbed_official 133:d4dda5c437f0 647
mbed_official 133:d4dda5c437f0 648 /* Increment read spare areas number */
mbed_official 133:d4dda5c437f0 649 numSpareAreaRead++;
mbed_official 133:d4dda5c437f0 650
mbed_official 133:d4dda5c437f0 651 /* Decrement spare areas to read */
mbed_official 133:d4dda5c437f0 652 NumSpareAreaToRead--;
mbed_official 133:d4dda5c437f0 653
mbed_official 133:d4dda5c437f0 654 /* Increment the NAND address */
mbed_official 133:d4dda5c437f0 655 nandAddress = (uint32_t)(nandAddress + (hnand->Info.SpareAreaSize));
mbed_official 133:d4dda5c437f0 656 }
mbed_official 133:d4dda5c437f0 657
mbed_official 133:d4dda5c437f0 658 /* Update the NAND controller state */
mbed_official 133:d4dda5c437f0 659 hnand->State = HAL_NAND_STATE_READY;
mbed_official 133:d4dda5c437f0 660
mbed_official 133:d4dda5c437f0 661 /* Process unlocked */
mbed_official 133:d4dda5c437f0 662 __HAL_UNLOCK(hnand);
mbed_official 133:d4dda5c437f0 663
mbed_official 133:d4dda5c437f0 664 return HAL_OK;
mbed_official 133:d4dda5c437f0 665 }
mbed_official 133:d4dda5c437f0 666
mbed_official 133:d4dda5c437f0 667 /**
mbed_official 133:d4dda5c437f0 668 * @brief Write Spare area(s) to NAND memory
mbed_official 133:d4dda5c437f0 669 * @param hnand: pointer to NAND handle
mbed_official 133:d4dda5c437f0 670 * @param pAddress : pointer to NAND address structure
mbed_official 133:d4dda5c437f0 671 * @param pBuffer : pointer to source buffer to write
mbed_official 133:d4dda5c437f0 672 * @param NumSpareAreaTowrite : number of spare areas to write to block
mbed_official 133:d4dda5c437f0 673 * @retval HAL status
mbed_official 133:d4dda5c437f0 674 */
mbed_official 133:d4dda5c437f0 675 HAL_StatusTypeDef HAL_NAND_Write_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypedef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaTowrite)
mbed_official 133:d4dda5c437f0 676 {
mbed_official 133:d4dda5c437f0 677 __IO uint32_t index = 0;
mbed_official 133:d4dda5c437f0 678 uint32_t timeout = 0;
mbed_official 133:d4dda5c437f0 679 uint32_t deviceAddress = 0, size = 0, numSpareAreaWritten = 0, nandAddress = 0;
mbed_official 133:d4dda5c437f0 680
mbed_official 133:d4dda5c437f0 681 /* Process Locked */
mbed_official 133:d4dda5c437f0 682 __HAL_LOCK(hnand);
mbed_official 133:d4dda5c437f0 683
mbed_official 133:d4dda5c437f0 684 /* Check the NAND controller state */
mbed_official 133:d4dda5c437f0 685 if(hnand->State == HAL_NAND_STATE_BUSY)
mbed_official 133:d4dda5c437f0 686 {
mbed_official 133:d4dda5c437f0 687 return HAL_BUSY;
mbed_official 133:d4dda5c437f0 688 }
mbed_official 133:d4dda5c437f0 689
mbed_official 133:d4dda5c437f0 690 /* Identify the device address */
mbed_official 133:d4dda5c437f0 691 if(hnand->Init.NandBank == FMC_NAND_BANK2)
mbed_official 133:d4dda5c437f0 692 {
mbed_official 133:d4dda5c437f0 693 deviceAddress = NAND_DEVICE1;
mbed_official 133:d4dda5c437f0 694 }
mbed_official 133:d4dda5c437f0 695 else
mbed_official 133:d4dda5c437f0 696 {
mbed_official 133:d4dda5c437f0 697 deviceAddress = NAND_DEVICE2;
mbed_official 133:d4dda5c437f0 698 }
mbed_official 133:d4dda5c437f0 699
mbed_official 133:d4dda5c437f0 700 /* Update the FMC_NAND controller state */
mbed_official 133:d4dda5c437f0 701 hnand->State = HAL_NAND_STATE_BUSY;
mbed_official 133:d4dda5c437f0 702
mbed_official 133:d4dda5c437f0 703 /* NAND raw address calculation */
mbed_official 133:d4dda5c437f0 704 nandAddress = ARRAY_ADDRESS(pAddress, hnand);
mbed_official 133:d4dda5c437f0 705
mbed_official 133:d4dda5c437f0 706 /* Spare area(s) write loop */
mbed_official 133:d4dda5c437f0 707 while((NumSpareAreaTowrite != 0) && (nandAddress < (hnand->Info.BlockSize) * (hnand->Info.SpareAreaSize)))
mbed_official 133:d4dda5c437f0 708 {
mbed_official 133:d4dda5c437f0 709 /* update the buffer size */
mbed_official 133:d4dda5c437f0 710 size = (hnand->Info.PageSize) + ((hnand->Info.PageSize) * numSpareAreaWritten);
mbed_official 133:d4dda5c437f0 711
mbed_official 133:d4dda5c437f0 712 /* Send write Spare area command sequence */
mbed_official 133:d4dda5c437f0 713 *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = NAND_CMD_AREA_C;
mbed_official 133:d4dda5c437f0 714 *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = 0x80;
mbed_official 133:d4dda5c437f0 715
mbed_official 133:d4dda5c437f0 716 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00;
mbed_official 133:d4dda5c437f0 717 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_1st_CYCLE(nandAddress);
mbed_official 133:d4dda5c437f0 718 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_2nd_CYCLE(nandAddress);
mbed_official 133:d4dda5c437f0 719 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_3rd_CYCLE(nandAddress);
mbed_official 133:d4dda5c437f0 720
mbed_official 133:d4dda5c437f0 721 /* for 512 and 1 GB devices, 4th cycle is required */
mbed_official 133:d4dda5c437f0 722 if(hnand->Info.BlockNbr >= 1024)
mbed_official 133:d4dda5c437f0 723 {
mbed_official 133:d4dda5c437f0 724 *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_4th_CYCLE(nandAddress);
mbed_official 133:d4dda5c437f0 725 }
mbed_official 133:d4dda5c437f0 726
mbed_official 133:d4dda5c437f0 727 /* Write data to memory */
mbed_official 133:d4dda5c437f0 728 for(; index < size; index++)
mbed_official 133:d4dda5c437f0 729 {
mbed_official 133:d4dda5c437f0 730 *(__IO uint8_t *)deviceAddress = *(uint8_t *)pBuffer++;
mbed_official 133:d4dda5c437f0 731 }
mbed_official 133:d4dda5c437f0 732
mbed_official 133:d4dda5c437f0 733 *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = 0x10;
mbed_official 133:d4dda5c437f0 734
mbed_official 133:d4dda5c437f0 735
mbed_official 133:d4dda5c437f0 736 /* Read status until NAND is ready */
mbed_official 133:d4dda5c437f0 737 while(HAL_NAND_Read_Status(hnand) != NAND_READY)
mbed_official 133:d4dda5c437f0 738 {
mbed_official 133:d4dda5c437f0 739 /* Check for timeout value */
mbed_official 133:d4dda5c437f0 740 timeout = HAL_GetTick() + NAND_WRITE_TIMEOUT;
mbed_official 133:d4dda5c437f0 741
mbed_official 133:d4dda5c437f0 742 if(HAL_GetTick() >= timeout)
mbed_official 133:d4dda5c437f0 743 {
mbed_official 133:d4dda5c437f0 744 return HAL_TIMEOUT;
mbed_official 133:d4dda5c437f0 745 }
mbed_official 133:d4dda5c437f0 746 }
mbed_official 133:d4dda5c437f0 747
mbed_official 133:d4dda5c437f0 748 /* Increment written spare areas number */
mbed_official 133:d4dda5c437f0 749 numSpareAreaWritten++;
mbed_official 133:d4dda5c437f0 750
mbed_official 133:d4dda5c437f0 751 /* Decrement spare areas to write */
mbed_official 133:d4dda5c437f0 752 NumSpareAreaTowrite--;
mbed_official 133:d4dda5c437f0 753
mbed_official 133:d4dda5c437f0 754 /* Increment the NAND address */
mbed_official 133:d4dda5c437f0 755 nandAddress = (uint32_t)(nandAddress + (hnand->Info.PageSize));
mbed_official 133:d4dda5c437f0 756
mbed_official 133:d4dda5c437f0 757 }
mbed_official 133:d4dda5c437f0 758
mbed_official 133:d4dda5c437f0 759 /* Update the NAND controller state */
mbed_official 133:d4dda5c437f0 760 hnand->State = HAL_NAND_STATE_READY;
mbed_official 133:d4dda5c437f0 761
mbed_official 133:d4dda5c437f0 762 /* Process unlocked */
mbed_official 133:d4dda5c437f0 763 __HAL_UNLOCK(hnand);
mbed_official 133:d4dda5c437f0 764
mbed_official 133:d4dda5c437f0 765 return HAL_OK;
mbed_official 133:d4dda5c437f0 766 }
mbed_official 133:d4dda5c437f0 767
mbed_official 133:d4dda5c437f0 768 /**
mbed_official 133:d4dda5c437f0 769 * @brief NAND memory Block erase
mbed_official 133:d4dda5c437f0 770 * @param hnand: pointer to NAND handle
mbed_official 133:d4dda5c437f0 771 * @param pAddress : pointer to NAND address structure
mbed_official 133:d4dda5c437f0 772 * @retval HAL status
mbed_official 133:d4dda5c437f0 773 */
mbed_official 133:d4dda5c437f0 774 HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, NAND_AddressTypedef *pAddress)
mbed_official 133:d4dda5c437f0 775 {
mbed_official 133:d4dda5c437f0 776 uint32_t DeviceAddress = 0;
mbed_official 133:d4dda5c437f0 777
mbed_official 133:d4dda5c437f0 778 /* Process Locked */
mbed_official 133:d4dda5c437f0 779 __HAL_LOCK(hnand);
mbed_official 133:d4dda5c437f0 780
mbed_official 133:d4dda5c437f0 781 /* Check the NAND controller state */
mbed_official 133:d4dda5c437f0 782 if(hnand->State == HAL_NAND_STATE_BUSY)
mbed_official 133:d4dda5c437f0 783 {
mbed_official 133:d4dda5c437f0 784 return HAL_BUSY;
mbed_official 133:d4dda5c437f0 785 }
mbed_official 133:d4dda5c437f0 786
mbed_official 133:d4dda5c437f0 787 /* Identify the device address */
mbed_official 133:d4dda5c437f0 788 if(hnand->Init.NandBank == FMC_NAND_BANK2)
mbed_official 133:d4dda5c437f0 789 {
mbed_official 133:d4dda5c437f0 790 DeviceAddress = NAND_DEVICE1;
mbed_official 133:d4dda5c437f0 791 }
mbed_official 133:d4dda5c437f0 792 else
mbed_official 133:d4dda5c437f0 793 {
mbed_official 133:d4dda5c437f0 794 DeviceAddress = NAND_DEVICE2;
mbed_official 133:d4dda5c437f0 795 }
mbed_official 133:d4dda5c437f0 796
mbed_official 133:d4dda5c437f0 797 /* Update the NAND controller state */
mbed_official 133:d4dda5c437f0 798 hnand->State = HAL_NAND_STATE_BUSY;
mbed_official 133:d4dda5c437f0 799
mbed_official 133:d4dda5c437f0 800 /* Send Erase block command sequence */
mbed_official 133:d4dda5c437f0 801 *(__IO uint8_t *)((uint32_t)(DeviceAddress | CMD_AREA)) = 0x60;
mbed_official 133:d4dda5c437f0 802
mbed_official 133:d4dda5c437f0 803 *(__IO uint8_t *)((uint32_t)(DeviceAddress | ADDR_AREA)) = ADDR_1st_CYCLE(ARRAY_ADDRESS(pAddress, hnand));
mbed_official 133:d4dda5c437f0 804 *(__IO uint8_t *)((uint32_t)(DeviceAddress | ADDR_AREA)) = ADDR_2nd_CYCLE(ARRAY_ADDRESS(pAddress, hnand));
mbed_official 133:d4dda5c437f0 805 *(__IO uint8_t *)((uint32_t)(DeviceAddress | ADDR_AREA)) = ADDR_3rd_CYCLE(ARRAY_ADDRESS(pAddress, hnand));
mbed_official 133:d4dda5c437f0 806
mbed_official 133:d4dda5c437f0 807 /* for 512 and 1 GB devices, 4th cycle is required */
mbed_official 133:d4dda5c437f0 808 if(hnand->Info.BlockNbr >= 1024)
mbed_official 133:d4dda5c437f0 809 {
mbed_official 133:d4dda5c437f0 810 *(__IO uint8_t *)((uint32_t)(DeviceAddress | ADDR_AREA)) = ADDR_4th_CYCLE(ARRAY_ADDRESS(pAddress, hnand));
mbed_official 133:d4dda5c437f0 811 }
mbed_official 133:d4dda5c437f0 812
mbed_official 133:d4dda5c437f0 813 *(__IO uint8_t *)((uint32_t)(DeviceAddress | CMD_AREA)) = 0xD0;
mbed_official 133:d4dda5c437f0 814
mbed_official 133:d4dda5c437f0 815 /* Update the NAND controller state */
mbed_official 133:d4dda5c437f0 816 hnand->State = HAL_NAND_STATE_READY;
mbed_official 133:d4dda5c437f0 817
mbed_official 133:d4dda5c437f0 818 /* Process unlocked */
mbed_official 133:d4dda5c437f0 819 __HAL_UNLOCK(hnand);
mbed_official 133:d4dda5c437f0 820
mbed_official 133:d4dda5c437f0 821 return HAL_OK;
mbed_official 133:d4dda5c437f0 822 }
mbed_official 133:d4dda5c437f0 823
mbed_official 133:d4dda5c437f0 824
mbed_official 133:d4dda5c437f0 825 /**
mbed_official 133:d4dda5c437f0 826 * @brief NAND memory read status
mbed_official 133:d4dda5c437f0 827 * @param hnand: pointer to NAND handle
mbed_official 133:d4dda5c437f0 828 * @retval NAND status
mbed_official 133:d4dda5c437f0 829 */
mbed_official 133:d4dda5c437f0 830 uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand)
mbed_official 133:d4dda5c437f0 831 {
mbed_official 133:d4dda5c437f0 832 uint32_t data = 0;
mbed_official 133:d4dda5c437f0 833 uint32_t DeviceAddress = 0;
mbed_official 133:d4dda5c437f0 834
mbed_official 133:d4dda5c437f0 835 /* Identify the device address */
mbed_official 133:d4dda5c437f0 836 if(hnand->Init.NandBank == FMC_NAND_BANK2)
mbed_official 133:d4dda5c437f0 837 {
mbed_official 133:d4dda5c437f0 838 DeviceAddress = NAND_DEVICE1;
mbed_official 133:d4dda5c437f0 839 }
mbed_official 133:d4dda5c437f0 840 else
mbed_official 133:d4dda5c437f0 841 {
mbed_official 133:d4dda5c437f0 842 DeviceAddress = NAND_DEVICE2;
mbed_official 133:d4dda5c437f0 843 }
mbed_official 133:d4dda5c437f0 844
mbed_official 133:d4dda5c437f0 845 /* Send Read status operation command */
mbed_official 133:d4dda5c437f0 846 *(__IO uint8_t *)((uint32_t)(DeviceAddress | CMD_AREA)) = 0x70;
mbed_official 133:d4dda5c437f0 847
mbed_official 133:d4dda5c437f0 848 /* Read status register data */
mbed_official 133:d4dda5c437f0 849 data = *(__IO uint8_t *)DeviceAddress;
mbed_official 133:d4dda5c437f0 850
mbed_official 133:d4dda5c437f0 851 /* Return the status */
mbed_official 133:d4dda5c437f0 852 if((data & NAND_ERROR) == NAND_ERROR)
mbed_official 133:d4dda5c437f0 853 {
mbed_official 133:d4dda5c437f0 854 return NAND_ERROR;
mbed_official 133:d4dda5c437f0 855 }
mbed_official 133:d4dda5c437f0 856 else if((data & NAND_READY) == NAND_READY)
mbed_official 133:d4dda5c437f0 857 {
mbed_official 133:d4dda5c437f0 858 return NAND_READY;
mbed_official 133:d4dda5c437f0 859 }
mbed_official 133:d4dda5c437f0 860
mbed_official 133:d4dda5c437f0 861 return NAND_BUSY;
mbed_official 133:d4dda5c437f0 862
mbed_official 133:d4dda5c437f0 863 }
mbed_official 133:d4dda5c437f0 864
mbed_official 133:d4dda5c437f0 865 /**
mbed_official 133:d4dda5c437f0 866 * @brief Increment the NAND memory address
mbed_official 133:d4dda5c437f0 867 * @param hnand: pointer to NAND handle
mbed_official 133:d4dda5c437f0 868 * @param pAddress: pointer to NAND adress structure
mbed_official 133:d4dda5c437f0 869 * @retval The new status of the increment address operation. It can be:
mbed_official 133:d4dda5c437f0 870 * - NAND_VALID_ADDRESS: When the new address is valid address
mbed_official 133:d4dda5c437f0 871 * - NAND_INVALID_ADDRESS: When the new address is invalid address
mbed_official 133:d4dda5c437f0 872 */
mbed_official 133:d4dda5c437f0 873 uint32_t HAL_NAND_Address_Inc(NAND_HandleTypeDef *hnand, NAND_AddressTypedef *pAddress)
mbed_official 133:d4dda5c437f0 874 {
mbed_official 133:d4dda5c437f0 875 uint32_t status = NAND_VALID_ADDRESS;
mbed_official 133:d4dda5c437f0 876
mbed_official 133:d4dda5c437f0 877 /* Increment page address */
mbed_official 133:d4dda5c437f0 878 pAddress->Page++;
mbed_official 133:d4dda5c437f0 879
mbed_official 133:d4dda5c437f0 880 /* Check NAND address is valid */
mbed_official 133:d4dda5c437f0 881 if(pAddress->Page == hnand->Info.BlockSize)
mbed_official 133:d4dda5c437f0 882 {
mbed_official 133:d4dda5c437f0 883 pAddress->Page = 0;
mbed_official 133:d4dda5c437f0 884 pAddress->Block++;
mbed_official 133:d4dda5c437f0 885
mbed_official 133:d4dda5c437f0 886 if(pAddress->Block == hnand->Info.ZoneSize)
mbed_official 133:d4dda5c437f0 887 {
mbed_official 133:d4dda5c437f0 888 pAddress->Block = 0;
mbed_official 133:d4dda5c437f0 889 pAddress->Zone++;
mbed_official 133:d4dda5c437f0 890
mbed_official 133:d4dda5c437f0 891 if(pAddress->Zone == (hnand->Info.ZoneSize/ hnand->Info.BlockNbr))
mbed_official 133:d4dda5c437f0 892 {
mbed_official 133:d4dda5c437f0 893 status = NAND_INVALID_ADDRESS;
mbed_official 133:d4dda5c437f0 894 }
mbed_official 133:d4dda5c437f0 895 }
mbed_official 133:d4dda5c437f0 896 }
mbed_official 133:d4dda5c437f0 897
mbed_official 133:d4dda5c437f0 898 return (status);
mbed_official 133:d4dda5c437f0 899 }
mbed_official 133:d4dda5c437f0 900
mbed_official 133:d4dda5c437f0 901
mbed_official 133:d4dda5c437f0 902 /**
mbed_official 133:d4dda5c437f0 903 * @}
mbed_official 133:d4dda5c437f0 904 */
mbed_official 133:d4dda5c437f0 905
mbed_official 133:d4dda5c437f0 906 /** @defgroup NAND_Group3 Control functions
mbed_official 133:d4dda5c437f0 907 * @brief management functions
mbed_official 133:d4dda5c437f0 908 *
mbed_official 133:d4dda5c437f0 909 @verbatim
mbed_official 133:d4dda5c437f0 910 ==============================================================================
mbed_official 133:d4dda5c437f0 911 ##### NAND Control functions #####
mbed_official 133:d4dda5c437f0 912 ==============================================================================
mbed_official 133:d4dda5c437f0 913 [..]
mbed_official 133:d4dda5c437f0 914 This subsection provides a set of functions allowing to control dynamically
mbed_official 133:d4dda5c437f0 915 the NAND interface.
mbed_official 133:d4dda5c437f0 916
mbed_official 133:d4dda5c437f0 917 @endverbatim
mbed_official 133:d4dda5c437f0 918 * @{
mbed_official 133:d4dda5c437f0 919 */
mbed_official 133:d4dda5c437f0 920
mbed_official 133:d4dda5c437f0 921
mbed_official 133:d4dda5c437f0 922 /**
mbed_official 133:d4dda5c437f0 923 * @brief Enables dynamically NAND ECC feature.
mbed_official 133:d4dda5c437f0 924 * @param hnand: pointer to NAND handle
mbed_official 133:d4dda5c437f0 925 * @retval HAL status
mbed_official 133:d4dda5c437f0 926 */
mbed_official 133:d4dda5c437f0 927 HAL_StatusTypeDef HAL_NAND_ECC_Enable(NAND_HandleTypeDef *hnand)
mbed_official 133:d4dda5c437f0 928 {
mbed_official 133:d4dda5c437f0 929 /* Check the NAND controller state */
mbed_official 133:d4dda5c437f0 930 if(hnand->State == HAL_NAND_STATE_BUSY)
mbed_official 133:d4dda5c437f0 931 {
mbed_official 133:d4dda5c437f0 932 return HAL_BUSY;
mbed_official 133:d4dda5c437f0 933 }
mbed_official 133:d4dda5c437f0 934
mbed_official 133:d4dda5c437f0 935 /* Update the NAND state */
mbed_official 133:d4dda5c437f0 936 hnand->State = HAL_NAND_STATE_BUSY;
mbed_official 133:d4dda5c437f0 937
mbed_official 133:d4dda5c437f0 938 /* Enable ECC feature */
mbed_official 133:d4dda5c437f0 939 FMC_NAND_ECC_Enable(hnand->Instance, hnand->Init.NandBank);
mbed_official 133:d4dda5c437f0 940
mbed_official 133:d4dda5c437f0 941 /* Update the NAND state */
mbed_official 133:d4dda5c437f0 942 hnand->State = HAL_NAND_STATE_READY;
mbed_official 133:d4dda5c437f0 943
mbed_official 133:d4dda5c437f0 944 return HAL_OK;
mbed_official 133:d4dda5c437f0 945 }
mbed_official 133:d4dda5c437f0 946
mbed_official 133:d4dda5c437f0 947
mbed_official 133:d4dda5c437f0 948 /**
mbed_official 133:d4dda5c437f0 949 * @brief Disables dynamically FMC_NAND ECC feature.
mbed_official 133:d4dda5c437f0 950 * @param hnand: pointer to NAND handle
mbed_official 133:d4dda5c437f0 951 * @retval HAL status
mbed_official 133:d4dda5c437f0 952 */
mbed_official 133:d4dda5c437f0 953 HAL_StatusTypeDef HAL_NAND_ECC_Disable(NAND_HandleTypeDef *hnand)
mbed_official 133:d4dda5c437f0 954 {
mbed_official 133:d4dda5c437f0 955 /* Check the NAND controller state */
mbed_official 133:d4dda5c437f0 956 if(hnand->State == HAL_NAND_STATE_BUSY)
mbed_official 133:d4dda5c437f0 957 {
mbed_official 133:d4dda5c437f0 958 return HAL_BUSY;
mbed_official 133:d4dda5c437f0 959 }
mbed_official 133:d4dda5c437f0 960
mbed_official 133:d4dda5c437f0 961 /* Update the NAND state */
mbed_official 133:d4dda5c437f0 962 hnand->State = HAL_NAND_STATE_BUSY;
mbed_official 133:d4dda5c437f0 963
mbed_official 133:d4dda5c437f0 964 /* Disable ECC feature */
mbed_official 133:d4dda5c437f0 965 FMC_NAND_ECC_Disable(hnand->Instance, hnand->Init.NandBank);
mbed_official 133:d4dda5c437f0 966
mbed_official 133:d4dda5c437f0 967 /* Update the NAND state */
mbed_official 133:d4dda5c437f0 968 hnand->State = HAL_NAND_STATE_READY;
mbed_official 133:d4dda5c437f0 969
mbed_official 133:d4dda5c437f0 970 return HAL_OK;
mbed_official 133:d4dda5c437f0 971 }
mbed_official 133:d4dda5c437f0 972
mbed_official 133:d4dda5c437f0 973 /**
mbed_official 133:d4dda5c437f0 974 * @brief Disables dynamically NAND ECC feature.
mbed_official 133:d4dda5c437f0 975 * @param hnand: pointer to NAND handle
mbed_official 133:d4dda5c437f0 976 * @param ECCval: pointer to ECC value
mbed_official 133:d4dda5c437f0 977 * @param Timeout: maximum timeout to wait
mbed_official 133:d4dda5c437f0 978 * @retval HAL status
mbed_official 133:d4dda5c437f0 979 */
mbed_official 133:d4dda5c437f0 980 HAL_StatusTypeDef HAL_NAND_GetECC(NAND_HandleTypeDef *hnand, uint32_t *ECCval, uint32_t Timeout)
mbed_official 133:d4dda5c437f0 981 {
mbed_official 133:d4dda5c437f0 982 HAL_StatusTypeDef status = HAL_OK;
mbed_official 133:d4dda5c437f0 983
mbed_official 133:d4dda5c437f0 984 /* Check the NAND controller state */
mbed_official 133:d4dda5c437f0 985 if(hnand->State == HAL_NAND_STATE_BUSY)
mbed_official 133:d4dda5c437f0 986 {
mbed_official 133:d4dda5c437f0 987 return HAL_BUSY;
mbed_official 133:d4dda5c437f0 988 }
mbed_official 133:d4dda5c437f0 989
mbed_official 133:d4dda5c437f0 990 /* Update the NAND state */
mbed_official 133:d4dda5c437f0 991 hnand->State = HAL_NAND_STATE_BUSY;
mbed_official 133:d4dda5c437f0 992
mbed_official 133:d4dda5c437f0 993 /* Get NAND ECC value */
mbed_official 133:d4dda5c437f0 994 status = FMC_NAND_GetECC(hnand->Instance, ECCval, hnand->Init.NandBank, Timeout);
mbed_official 133:d4dda5c437f0 995
mbed_official 133:d4dda5c437f0 996 /* Update the NAND state */
mbed_official 133:d4dda5c437f0 997 hnand->State = HAL_NAND_STATE_READY;
mbed_official 133:d4dda5c437f0 998
mbed_official 133:d4dda5c437f0 999 return status;
mbed_official 133:d4dda5c437f0 1000 }
mbed_official 133:d4dda5c437f0 1001
mbed_official 133:d4dda5c437f0 1002 /**
mbed_official 133:d4dda5c437f0 1003 * @}
mbed_official 133:d4dda5c437f0 1004 */
mbed_official 133:d4dda5c437f0 1005
mbed_official 133:d4dda5c437f0 1006
mbed_official 133:d4dda5c437f0 1007 /** @defgroup NAND_Group4 State functions
mbed_official 133:d4dda5c437f0 1008 * @brief Peripheral State functions
mbed_official 133:d4dda5c437f0 1009 *
mbed_official 133:d4dda5c437f0 1010 @verbatim
mbed_official 133:d4dda5c437f0 1011 ==============================================================================
mbed_official 133:d4dda5c437f0 1012 ##### NAND State functions #####
mbed_official 133:d4dda5c437f0 1013 ==============================================================================
mbed_official 133:d4dda5c437f0 1014 [..]
mbed_official 133:d4dda5c437f0 1015 This subsection permit to get in run-time the status of the NAND controller
mbed_official 133:d4dda5c437f0 1016 and the data flow.
mbed_official 133:d4dda5c437f0 1017
mbed_official 133:d4dda5c437f0 1018 @endverbatim
mbed_official 133:d4dda5c437f0 1019 * @{
mbed_official 133:d4dda5c437f0 1020 */
mbed_official 133:d4dda5c437f0 1021
mbed_official 133:d4dda5c437f0 1022 /**
mbed_official 133:d4dda5c437f0 1023 * @brief return the NAND state
mbed_official 133:d4dda5c437f0 1024 * @param hnand: pointer to NAND handle
mbed_official 133:d4dda5c437f0 1025 * @retval HAL state
mbed_official 133:d4dda5c437f0 1026 */
mbed_official 133:d4dda5c437f0 1027 HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand)
mbed_official 133:d4dda5c437f0 1028 {
mbed_official 133:d4dda5c437f0 1029 return hnand->State;
mbed_official 133:d4dda5c437f0 1030 }
mbed_official 133:d4dda5c437f0 1031
mbed_official 133:d4dda5c437f0 1032 /**
mbed_official 133:d4dda5c437f0 1033 * @}
mbed_official 133:d4dda5c437f0 1034 */
mbed_official 133:d4dda5c437f0 1035
mbed_official 133:d4dda5c437f0 1036 /**
mbed_official 133:d4dda5c437f0 1037 * @}
mbed_official 133:d4dda5c437f0 1038 */
mbed_official 133:d4dda5c437f0 1039 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
mbed_official 133:d4dda5c437f0 1040 #endif /* HAL_NAND_MODULE_ENABLED */
mbed_official 133:d4dda5c437f0 1041
mbed_official 133:d4dda5c437f0 1042 /**
mbed_official 133:d4dda5c437f0 1043 * @}
mbed_official 133:d4dda5c437f0 1044 */
mbed_official 133:d4dda5c437f0 1045
mbed_official 133:d4dda5c437f0 1046 /**
mbed_official 133:d4dda5c437f0 1047 * @}
mbed_official 133:d4dda5c437f0 1048 */
mbed_official 133:d4dda5c437f0 1049
mbed_official 133:d4dda5c437f0 1050 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/