shao ziyang / mbed-src-kl05

mbed library sources

Dependents:   frdm_kl05z_gpio_test

Fork of mbed-src by mbed official

targets/hal/TARGET_NXP/TARGET_LPC81X/serial_api.c@251:de9a1e4ffd79, 2014-07-08 (annotated)

Committer:
mbed_official
Date:
Tue Jul 08 14:15:07 2014 +0100
Revision:
251:de9a1e4ffd79
Parent:
250:a49055e7a707
Child:
285:31249416b6f9
Synchronized with git revision b0ac1e3485a9aa1cb98d1ca68df9d1cdbcd6ce63



Full URL: https://github.com/mbedmicro/mbed/commit/b0ac1e3485a9aa1cb98d1ca68df9d1cdbcd6ce63/



Revert "error.h -> mbed_error.h"

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 46:bebbbd80dd87 1 /* mbed Microcontroller Library
mbed_official 46:bebbbd80dd87 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 46:bebbbd80dd87 3 *
mbed_official 46:bebbbd80dd87 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 46:bebbbd80dd87 5 * you may not use this file except in compliance with the License.
mbed_official 46:bebbbd80dd87 6 * You may obtain a copy of the License at
mbed_official 46:bebbbd80dd87 7 *
mbed_official 46:bebbbd80dd87 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 46:bebbbd80dd87 9 *
mbed_official 46:bebbbd80dd87 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 46:bebbbd80dd87 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 46:bebbbd80dd87 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 46:bebbbd80dd87 13 * See the License for the specific language governing permissions and
mbed_official 46:bebbbd80dd87 14 * limitations under the License.
mbed_official 46:bebbbd80dd87 15 */
mbed_official 46:bebbbd80dd87 16 // math.h required for floating point operations for baud rate calculation
mbed_official 227:7bd0639b8911 17 #include "mbed_assert.h"
mbed_official 46:bebbbd80dd87 18 #include <math.h>
mbed_official 46:bebbbd80dd87 19 #include <string.h>
mbed_official 46:bebbbd80dd87 20
mbed_official 46:bebbbd80dd87 21 #include "serial_api.h"
mbed_official 46:bebbbd80dd87 22 #include "cmsis.h"
mbed_official 46:bebbbd80dd87 23 #include "pinmap.h"
mbed_official 251:de9a1e4ffd79 24 #include "error.h"
mbed_official 46:bebbbd80dd87 25
mbed_official 46:bebbbd80dd87 26 /******************************************************************************
mbed_official 46:bebbbd80dd87 27 * INITIALIZATION
mbed_official 46:bebbbd80dd87 28 ******************************************************************************/
mbed_official 46:bebbbd80dd87 29 #define UART_NUM 3
mbed_official 46:bebbbd80dd87 30
mbed_official 46:bebbbd80dd87 31 static const SWM_Map SWM_UART_TX[] = {
mbed_official 46:bebbbd80dd87 32 {0, 0},
mbed_official 46:bebbbd80dd87 33 {1, 8},
mbed_official 46:bebbbd80dd87 34 {2, 16},
mbed_official 46:bebbbd80dd87 35 };
mbed_official 46:bebbbd80dd87 36
mbed_official 46:bebbbd80dd87 37 static const SWM_Map SWM_UART_RX[] = {
mbed_official 46:bebbbd80dd87 38 {0, 8},
mbed_official 46:bebbbd80dd87 39 {1, 16},
mbed_official 46:bebbbd80dd87 40 {2, 24},
mbed_official 46:bebbbd80dd87 41 };
mbed_official 46:bebbbd80dd87 42
mbed_official 64:7b352733b00a 43 static const SWM_Map SWM_UART_RTS[] = {
mbed_official 64:7b352733b00a 44 {0, 16},
mbed_official 64:7b352733b00a 45 {1, 24},
mbed_official 64:7b352733b00a 46 {3, 0},
mbed_official 64:7b352733b00a 47 };
mbed_official 64:7b352733b00a 48
mbed_official 64:7b352733b00a 49 static const SWM_Map SWM_UART_CTS[] = {
mbed_official 64:7b352733b00a 50 {0, 24},
mbed_official 64:7b352733b00a 51 {2, 0},
mbed_official 64:7b352733b00a 52 {3, 8}
mbed_official 64:7b352733b00a 53 };
mbed_official 64:7b352733b00a 54
mbed_official 46:bebbbd80dd87 55 // bit flags for used UARTs
mbed_official 46:bebbbd80dd87 56 static unsigned char uart_used = 0;
mbed_official 46:bebbbd80dd87 57 static int get_available_uart(void) {
mbed_official 46:bebbbd80dd87 58 int i;
mbed_official 46:bebbbd80dd87 59 for (i=0; i<3; i++) {
mbed_official 46:bebbbd80dd87 60 if ((uart_used & (1 << i)) == 0)
mbed_official 46:bebbbd80dd87 61 return i;
mbed_official 46:bebbbd80dd87 62 }
mbed_official 46:bebbbd80dd87 63 return -1;
mbed_official 46:bebbbd80dd87 64 }
mbed_official 46:bebbbd80dd87 65
mbed_official 46:bebbbd80dd87 66 #define UART_EN (0x01<<0)
mbed_official 46:bebbbd80dd87 67
mbed_official 46:bebbbd80dd87 68 #define CTS_DELTA (0x01<<5)
mbed_official 46:bebbbd80dd87 69 #define RXBRK (0x01<<10)
mbed_official 46:bebbbd80dd87 70 #define DELTA_RXBRK (0x01<<11)
mbed_official 46:bebbbd80dd87 71
mbed_official 46:bebbbd80dd87 72 #define RXRDY (0x01<<0)
mbed_official 46:bebbbd80dd87 73 #define TXRDY (0x01<<2)
mbed_official 46:bebbbd80dd87 74
mbed_official 46:bebbbd80dd87 75 #define TXBRKEN (0x01<<1)
mbed_official 64:7b352733b00a 76 #define CTSEN (0x01<<9)
mbed_official 46:bebbbd80dd87 77
mbed_official 46:bebbbd80dd87 78 static uint32_t UARTSysClk;
mbed_official 46:bebbbd80dd87 79
mbed_official 46:bebbbd80dd87 80 static uint32_t serial_irq_ids[UART_NUM] = {0};
mbed_official 46:bebbbd80dd87 81 static uart_irq_handler irq_handler;
mbed_official 46:bebbbd80dd87 82
mbed_official 46:bebbbd80dd87 83 int stdio_uart_inited = 0;
mbed_official 46:bebbbd80dd87 84 serial_t stdio_uart;
mbed_official 46:bebbbd80dd87 85
mbed_official 46:bebbbd80dd87 86 void serial_init(serial_t *obj, PinName tx, PinName rx) {
mbed_official 46:bebbbd80dd87 87 int is_stdio_uart = 0;
mbed_official 46:bebbbd80dd87 88
mbed_official 46:bebbbd80dd87 89 int uart_n = get_available_uart();
mbed_official 46:bebbbd80dd87 90 if (uart_n == -1) {
mbed_official 46:bebbbd80dd87 91 error("No available UART");
mbed_official 46:bebbbd80dd87 92 }
mbed_official 46:bebbbd80dd87 93 obj->index = uart_n;
mbed_official 46:bebbbd80dd87 94 obj->uart = (LPC_USART_TypeDef *)(LPC_USART0_BASE + (0x4000 * uart_n));
mbed_official 46:bebbbd80dd87 95 uart_used |= (1 << uart_n);
mbed_official 46:bebbbd80dd87 96
mbed_official 46:bebbbd80dd87 97 const SWM_Map *swm;
mbed_official 46:bebbbd80dd87 98 uint32_t regVal;
mbed_official 46:bebbbd80dd87 99
mbed_official 46:bebbbd80dd87 100 swm = &SWM_UART_TX[uart_n];
mbed_official 46:bebbbd80dd87 101 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
mbed_official 46:bebbbd80dd87 102 LPC_SWM->PINASSIGN[swm->n] = regVal | (tx << swm->offset);
mbed_official 46:bebbbd80dd87 103
mbed_official 46:bebbbd80dd87 104 swm = &SWM_UART_RX[uart_n];
mbed_official 46:bebbbd80dd87 105 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
mbed_official 46:bebbbd80dd87 106 LPC_SWM->PINASSIGN[swm->n] = regVal | (rx << swm->offset);
mbed_official 46:bebbbd80dd87 107
mbed_official 46:bebbbd80dd87 108 /* uart clock divided by 1 */
mbed_official 46:bebbbd80dd87 109 LPC_SYSCON->UARTCLKDIV = 1;
mbed_official 46:bebbbd80dd87 110
mbed_official 46:bebbbd80dd87 111 /* disable uart interrupts */
mbed_official 46:bebbbd80dd87 112 NVIC_DisableIRQ((IRQn_Type)(UART0_IRQn + uart_n));
mbed_official 46:bebbbd80dd87 113
mbed_official 46:bebbbd80dd87 114 /* Enable UART clock */
mbed_official 46:bebbbd80dd87 115 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << (14 + uart_n));
mbed_official 46:bebbbd80dd87 116
mbed_official 46:bebbbd80dd87 117 /* Peripheral reset control to UART, a "1" bring it out of reset. */
mbed_official 46:bebbbd80dd87 118 LPC_SYSCON->PRESETCTRL &= ~(0x1 << (3 + uart_n));
mbed_official 46:bebbbd80dd87 119 LPC_SYSCON->PRESETCTRL |= (0x1 << (3 + uart_n));
mbed_official 46:bebbbd80dd87 120
mbed_official 46:bebbbd80dd87 121 UARTSysClk = SystemCoreClock / LPC_SYSCON->UARTCLKDIV;
mbed_official 46:bebbbd80dd87 122
mbed_official 46:bebbbd80dd87 123 // set default baud rate and format
mbed_official 46:bebbbd80dd87 124 serial_baud (obj, 9600);
mbed_official 46:bebbbd80dd87 125 serial_format(obj, 8, ParityNone, 1);
mbed_official 46:bebbbd80dd87 126
mbed_official 46:bebbbd80dd87 127 /* Clear all status bits. */
mbed_official 46:bebbbd80dd87 128 obj->uart->STAT = CTS_DELTA | DELTA_RXBRK;
mbed_official 46:bebbbd80dd87 129
mbed_official 46:bebbbd80dd87 130 /* enable uart interrupts */
mbed_official 46:bebbbd80dd87 131 NVIC_EnableIRQ((IRQn_Type)(UART0_IRQn + uart_n));
mbed_official 46:bebbbd80dd87 132
mbed_official 46:bebbbd80dd87 133 /* Enable UART interrupt */
mbed_official 46:bebbbd80dd87 134 // obj->uart->INTENSET = RXRDY | TXRDY | DELTA_RXBRK;
mbed_official 46:bebbbd80dd87 135
mbed_official 46:bebbbd80dd87 136 /* Enable UART */
mbed_official 46:bebbbd80dd87 137 obj->uart->CFG |= UART_EN;
mbed_official 46:bebbbd80dd87 138
mbed_official 46:bebbbd80dd87 139 is_stdio_uart = ((tx == USBTX) && (rx == USBRX));
mbed_official 46:bebbbd80dd87 140
mbed_official 46:bebbbd80dd87 141 if (is_stdio_uart) {
mbed_official 46:bebbbd80dd87 142 stdio_uart_inited = 1;
mbed_official 46:bebbbd80dd87 143 memcpy(&stdio_uart, obj, sizeof(serial_t));
mbed_official 46:bebbbd80dd87 144 }
mbed_official 46:bebbbd80dd87 145 }
mbed_official 46:bebbbd80dd87 146
mbed_official 46:bebbbd80dd87 147 void serial_free(serial_t *obj) {
mbed_official 46:bebbbd80dd87 148 uart_used &= ~(1 << obj->index);
mbed_official 46:bebbbd80dd87 149 serial_irq_ids[obj->index] = 0;
mbed_official 46:bebbbd80dd87 150 }
mbed_official 46:bebbbd80dd87 151
mbed_official 46:bebbbd80dd87 152 // serial_baud
mbed_official 46:bebbbd80dd87 153 // set the baud rate, taking in to account the current SystemFrequency
mbed_official 46:bebbbd80dd87 154 void serial_baud(serial_t *obj, int baudrate) {
mbed_official 46:bebbbd80dd87 155 /* Integer divider:
mbed_official 46:bebbbd80dd87 156 BRG = UARTSysClk/(Baudrate * 16) - 1
mbed_official 46:bebbbd80dd87 157
mbed_official 46:bebbbd80dd87 158 Frational divider:
mbed_official 46:bebbbd80dd87 159 FRG = ((UARTSysClk / (Baudrate * 16 * (BRG + 1))) - 1)
mbed_official 46:bebbbd80dd87 160
mbed_official 46:bebbbd80dd87 161 where
mbed_official 46:bebbbd80dd87 162 FRG = (LPC_SYSCON->UARTFRDADD + 1) / (LPC_SYSCON->UARTFRDSUB + 1)
mbed_official 46:bebbbd80dd87 163
mbed_official 46:bebbbd80dd87 164 (1) The easiest way is set SUB value to 256, -1 encoded, thus SUB
mbed_official 46:bebbbd80dd87 165 register is 0xFF.
mbed_official 46:bebbbd80dd87 166 (2) In ADD register value, depending on the value of UartSysClk,
mbed_official 46:bebbbd80dd87 167 baudrate, BRG register value, and SUB register value, be careful
mbed_official 46:bebbbd80dd87 168 about the order of multiplier and divider and make sure any
mbed_official 46:bebbbd80dd87 169 multiplier doesn't exceed 32-bit boundary and any divider doesn't get
mbed_official 46:bebbbd80dd87 170 down below one(integer 0).
mbed_official 46:bebbbd80dd87 171 (3) ADD should be always less than SUB.
mbed_official 46:bebbbd80dd87 172 */
mbed_official 46:bebbbd80dd87 173 obj->uart->BRG = UARTSysClk / 16 / baudrate - 1;
mbed_official 46:bebbbd80dd87 174
mbed_official 46:bebbbd80dd87 175 LPC_SYSCON->UARTFRGDIV = 0xFF;
mbed_official 46:bebbbd80dd87 176 LPC_SYSCON->UARTFRGMULT = ( ((UARTSysClk / 16) * (LPC_SYSCON->UARTFRGDIV + 1)) /
mbed_official 46:bebbbd80dd87 177 (baudrate * (obj->uart->BRG + 1))
mbed_official 46:bebbbd80dd87 178 ) - (LPC_SYSCON->UARTFRGDIV + 1);
mbed_official 46:bebbbd80dd87 179
mbed_official 46:bebbbd80dd87 180 }
mbed_official 46:bebbbd80dd87 181
mbed_official 46:bebbbd80dd87 182 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
mbed_official 46:bebbbd80dd87 183 // 0: 1 stop bits, 1: 2 stop bits
mbed_official 227:7bd0639b8911 184 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2));
mbed_official 227:7bd0639b8911 185 MBED_ASSERT((data_bits > 6) && (data_bits < 10)); // 0: 7 data bits ... 2: 9 data bits
mbed_official 227:7bd0639b8911 186 MBED_ASSERT((parity == ParityNone) || (parity == ParityEven) || (parity == ParityOdd));
mbed_official 46:bebbbd80dd87 187 stop_bits -= 1;
mbed_official 46:bebbbd80dd87 188 data_bits -= 7;
mbed_official 46:bebbbd80dd87 189
mbed_official 46:bebbbd80dd87 190 int paritysel;
mbed_official 46:bebbbd80dd87 191 switch (parity) {
mbed_official 46:bebbbd80dd87 192 case ParityNone: paritysel = 0; break;
mbed_official 46:bebbbd80dd87 193 case ParityEven: paritysel = 2; break;
mbed_official 46:bebbbd80dd87 194 case ParityOdd : paritysel = 3; break;
mbed_official 46:bebbbd80dd87 195 default:
mbed_official 227:7bd0639b8911 196 break;
mbed_official 46:bebbbd80dd87 197 }
mbed_official 46:bebbbd80dd87 198
mbed_official 46:bebbbd80dd87 199 obj->uart->CFG = (data_bits << 2)
mbed_official 46:bebbbd80dd87 200 | (paritysel << 4)
mbed_official 46:bebbbd80dd87 201 | (stop_bits << 6);
mbed_official 46:bebbbd80dd87 202 }
mbed_official 46:bebbbd80dd87 203
mbed_official 46:bebbbd80dd87 204 /******************************************************************************
mbed_official 46:bebbbd80dd87 205 * INTERRUPTS HANDLING
mbed_official 46:bebbbd80dd87 206 ******************************************************************************/
mbed_official 46:bebbbd80dd87 207 static inline void uart_irq(uint32_t iir, uint32_t index) {
mbed_official 46:bebbbd80dd87 208 // [Chapter 14] LPC17xx UART0/2/3: UARTn Interrupt Handling
mbed_official 46:bebbbd80dd87 209 SerialIrq irq_type;
mbed_official 46:bebbbd80dd87 210 switch (iir) {
mbed_official 46:bebbbd80dd87 211 case 1: irq_type = TxIrq; break;
mbed_official 46:bebbbd80dd87 212 case 2: irq_type = RxIrq; break;
mbed_official 46:bebbbd80dd87 213 default: return;
mbed_official 46:bebbbd80dd87 214 }
mbed_official 46:bebbbd80dd87 215
mbed_official 46:bebbbd80dd87 216 if (serial_irq_ids[index] != 0)
mbed_official 46:bebbbd80dd87 217 irq_handler(serial_irq_ids[index], irq_type);
mbed_official 46:bebbbd80dd87 218 }
mbed_official 46:bebbbd80dd87 219
mbed_official 46:bebbbd80dd87 220 void uart0_irq() {uart_irq((LPC_USART0->STAT & (1 << 2)) ? 2 : 1, 0);}
mbed_official 46:bebbbd80dd87 221 void uart1_irq() {uart_irq((LPC_USART1->STAT & (1 << 2)) ? 2 : 1, 1);}
mbed_official 46:bebbbd80dd87 222 void uart2_irq() {uart_irq((LPC_USART2->STAT & (1 << 2)) ? 2 : 1, 2);}
mbed_official 46:bebbbd80dd87 223
mbed_official 46:bebbbd80dd87 224 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
mbed_official 46:bebbbd80dd87 225 irq_handler = handler;
mbed_official 46:bebbbd80dd87 226 serial_irq_ids[obj->index] = id;
mbed_official 46:bebbbd80dd87 227 }
mbed_official 46:bebbbd80dd87 228
mbed_official 46:bebbbd80dd87 229 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
mbed_official 46:bebbbd80dd87 230 IRQn_Type irq_n = (IRQn_Type)0;
mbed_official 46:bebbbd80dd87 231 uint32_t vector = 0;
mbed_official 46:bebbbd80dd87 232 switch ((int)obj->uart) {
mbed_official 46:bebbbd80dd87 233 case LPC_USART0_BASE: irq_n=UART0_IRQn; vector = (uint32_t)&uart0_irq; break;
mbed_official 46:bebbbd80dd87 234 case LPC_USART1_BASE: irq_n=UART1_IRQn; vector = (uint32_t)&uart1_irq; break;
mbed_official 46:bebbbd80dd87 235 case LPC_USART2_BASE: irq_n=UART2_IRQn; vector = (uint32_t)&uart2_irq; break;
mbed_official 46:bebbbd80dd87 236 }
mbed_official 46:bebbbd80dd87 237
mbed_official 46:bebbbd80dd87 238 if (enable) {
mbed_official 46:bebbbd80dd87 239 obj->uart->INTENSET = (1 << ((irq == RxIrq) ? 0 : 2));
mbed_official 46:bebbbd80dd87 240 NVIC_SetVector(irq_n, vector);
mbed_official 46:bebbbd80dd87 241 NVIC_EnableIRQ(irq_n);
mbed_official 46:bebbbd80dd87 242 } else { // disable
mbed_official 46:bebbbd80dd87 243 int all_disabled = 0;
mbed_official 46:bebbbd80dd87 244 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
mbed_official 46:bebbbd80dd87 245 obj->uart->INTENSET &= ~(1 << ((irq == RxIrq) ? 0 : 2));
mbed_official 46:bebbbd80dd87 246 all_disabled = (obj->uart->INTENSET & (1 << ((other_irq == RxIrq) ? 0 : 2))) == 0;
mbed_official 46:bebbbd80dd87 247 if (all_disabled)
mbed_official 46:bebbbd80dd87 248 NVIC_DisableIRQ(irq_n);
mbed_official 46:bebbbd80dd87 249 }
mbed_official 46:bebbbd80dd87 250 }
mbed_official 46:bebbbd80dd87 251
mbed_official 46:bebbbd80dd87 252 /******************************************************************************
mbed_official 46:bebbbd80dd87 253 * READ/WRITE
mbed_official 46:bebbbd80dd87 254 ******************************************************************************/
mbed_official 46:bebbbd80dd87 255 int serial_getc(serial_t *obj) {
mbed_official 46:bebbbd80dd87 256 while (!serial_readable(obj));
mbed_official 46:bebbbd80dd87 257 return obj->uart->RXDATA;
mbed_official 46:bebbbd80dd87 258 }
mbed_official 46:bebbbd80dd87 259
mbed_official 46:bebbbd80dd87 260 void serial_putc(serial_t *obj, int c) {
mbed_official 46:bebbbd80dd87 261 while (!serial_writable(obj));
mbed_official 46:bebbbd80dd87 262 obj->uart->TXDATA = c;
mbed_official 46:bebbbd80dd87 263 }
mbed_official 46:bebbbd80dd87 264
mbed_official 46:bebbbd80dd87 265 int serial_readable(serial_t *obj) {
mbed_official 46:bebbbd80dd87 266 return obj->uart->STAT & RXRDY;
mbed_official 46:bebbbd80dd87 267 }
mbed_official 46:bebbbd80dd87 268
mbed_official 46:bebbbd80dd87 269 int serial_writable(serial_t *obj) {
mbed_official 46:bebbbd80dd87 270 return obj->uart->STAT & TXRDY;
mbed_official 46:bebbbd80dd87 271 }
mbed_official 46:bebbbd80dd87 272
mbed_official 46:bebbbd80dd87 273 void serial_clear(serial_t *obj) {
mbed_official 46:bebbbd80dd87 274 // [TODO]
mbed_official 46:bebbbd80dd87 275 }
mbed_official 46:bebbbd80dd87 276
mbed_official 46:bebbbd80dd87 277 void serial_pinout_tx(PinName tx) {
mbed_official 46:bebbbd80dd87 278
mbed_official 46:bebbbd80dd87 279 }
mbed_official 46:bebbbd80dd87 280
mbed_official 46:bebbbd80dd87 281 void serial_break_set(serial_t *obj) {
mbed_official 46:bebbbd80dd87 282 obj->uart->CTRL |= TXBRKEN;
mbed_official 46:bebbbd80dd87 283 }
mbed_official 46:bebbbd80dd87 284
mbed_official 46:bebbbd80dd87 285 void serial_break_clear(serial_t *obj) {
mbed_official 46:bebbbd80dd87 286 obj->uart->CTRL &= ~TXBRKEN;
mbed_official 46:bebbbd80dd87 287 }
mbed_official 46:bebbbd80dd87 288
mbed_official 64:7b352733b00a 289 void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow) {
mbed_official 64:7b352733b00a 290 const SWM_Map *swm_rts, *swm_cts;
mbed_official 64:7b352733b00a 291 uint32_t regVal_rts, regVal_cts;
mbed_official 64:7b352733b00a 292
mbed_official 64:7b352733b00a 293 swm_rts = &SWM_UART_RTS[obj->index];
mbed_official 227:7bd0639b8911 294 swm_cts = &SWM_UART_CTS[obj->index];
mbed_official 64:7b352733b00a 295 regVal_rts = LPC_SWM->PINASSIGN[swm_rts->n] & ~(0xFF << swm_rts->offset);
mbed_official 64:7b352733b00a 296 regVal_cts = LPC_SWM->PINASSIGN[swm_cts->n] & ~(0xFF << swm_cts->offset);
mbed_official 64:7b352733b00a 297
mbed_official 64:7b352733b00a 298 if (FlowControlNone == type) {
mbed_official 64:7b352733b00a 299 LPC_SWM->PINASSIGN[swm_rts->n] = regVal_rts | (0xFF << swm_rts->offset);
mbed_official 64:7b352733b00a 300 LPC_SWM->PINASSIGN[swm_cts->n] = regVal_cts | (0xFF << swm_cts->offset);
mbed_official 64:7b352733b00a 301 obj->uart->CFG &= ~CTSEN;
mbed_official 64:7b352733b00a 302 return;
mbed_official 64:7b352733b00a 303 }
mbed_official 64:7b352733b00a 304 if ((FlowControlRTS == type || FlowControlRTSCTS == type) && (rxflow != NC)) {
mbed_official 64:7b352733b00a 305 LPC_SWM->PINASSIGN[swm_rts->n] = regVal_rts | (rxflow << swm_rts->offset);
mbed_official 64:7b352733b00a 306 if (FlowControlRTS == type) {
mbed_official 64:7b352733b00a 307 LPC_SWM->PINASSIGN[swm_cts->n] = regVal_cts | (0xFF << swm_cts->offset);
mbed_official 227:7bd0639b8911 308 obj->uart->CFG &= ~CTSEN;
mbed_official 64:7b352733b00a 309 }
mbed_official 64:7b352733b00a 310 }
mbed_official 64:7b352733b00a 311 if ((FlowControlCTS == type || FlowControlRTSCTS == type) && (txflow != NC)) {
mbed_official 64:7b352733b00a 312 LPC_SWM->PINASSIGN[swm_cts->n] = regVal_cts | (txflow << swm_cts->offset);
mbed_official 64:7b352733b00a 313 obj->uart->CFG |= CTSEN;
mbed_official 64:7b352733b00a 314 if (FlowControlCTS == type) {
mbed_official 227:7bd0639b8911 315 LPC_SWM->PINASSIGN[swm_rts->n] = regVal_rts | (0xFF << swm_rts->offset);
mbed_official 64:7b352733b00a 316 }
mbed_official 227:7bd0639b8911 317 }
mbed_official 64:7b352733b00a 318 }
mbed_official 64:7b352733b00a 319