mbed library sources
Dependents: frdm_kl05z_gpio_test
Fork of mbed-src by
targets/hal/TARGET_NXP/TARGET_LPC81X/serial_api.c@64:7b352733b00a, 2013-12-19 (annotated)
- Committer:
- mbed_official
- Date:
- Thu Dec 19 13:15:07 2013 +0000
- Revision:
- 64:7b352733b00a
- Parent:
- 46:bebbbd80dd87
- Child:
- 227:7bd0639b8911
Synchronized with git revision 4b4b986cdb24f240f416b7538e9766bec33be31f
Full URL: https://github.com/mbedmicro/mbed/commit/4b4b986cdb24f240f416b7538e9766bec33be31f/
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 46:bebbbd80dd87 | 1 | /* mbed Microcontroller Library |
mbed_official | 46:bebbbd80dd87 | 2 | * Copyright (c) 2006-2013 ARM Limited |
mbed_official | 46:bebbbd80dd87 | 3 | * |
mbed_official | 46:bebbbd80dd87 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
mbed_official | 46:bebbbd80dd87 | 5 | * you may not use this file except in compliance with the License. |
mbed_official | 46:bebbbd80dd87 | 6 | * You may obtain a copy of the License at |
mbed_official | 46:bebbbd80dd87 | 7 | * |
mbed_official | 46:bebbbd80dd87 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
mbed_official | 46:bebbbd80dd87 | 9 | * |
mbed_official | 46:bebbbd80dd87 | 10 | * Unless required by applicable law or agreed to in writing, software |
mbed_official | 46:bebbbd80dd87 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
mbed_official | 46:bebbbd80dd87 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
mbed_official | 46:bebbbd80dd87 | 13 | * See the License for the specific language governing permissions and |
mbed_official | 46:bebbbd80dd87 | 14 | * limitations under the License. |
mbed_official | 46:bebbbd80dd87 | 15 | */ |
mbed_official | 46:bebbbd80dd87 | 16 | // math.h required for floating point operations for baud rate calculation |
mbed_official | 46:bebbbd80dd87 | 17 | #include <math.h> |
mbed_official | 46:bebbbd80dd87 | 18 | #include <string.h> |
mbed_official | 46:bebbbd80dd87 | 19 | |
mbed_official | 46:bebbbd80dd87 | 20 | #include "serial_api.h" |
mbed_official | 46:bebbbd80dd87 | 21 | #include "cmsis.h" |
mbed_official | 46:bebbbd80dd87 | 22 | #include "pinmap.h" |
mbed_official | 46:bebbbd80dd87 | 23 | #include "error.h" |
mbed_official | 46:bebbbd80dd87 | 24 | |
mbed_official | 46:bebbbd80dd87 | 25 | /****************************************************************************** |
mbed_official | 46:bebbbd80dd87 | 26 | * INITIALIZATION |
mbed_official | 46:bebbbd80dd87 | 27 | ******************************************************************************/ |
mbed_official | 46:bebbbd80dd87 | 28 | #define UART_NUM 3 |
mbed_official | 46:bebbbd80dd87 | 29 | |
mbed_official | 46:bebbbd80dd87 | 30 | static const SWM_Map SWM_UART_TX[] = { |
mbed_official | 46:bebbbd80dd87 | 31 | {0, 0}, |
mbed_official | 46:bebbbd80dd87 | 32 | {1, 8}, |
mbed_official | 46:bebbbd80dd87 | 33 | {2, 16}, |
mbed_official | 46:bebbbd80dd87 | 34 | }; |
mbed_official | 46:bebbbd80dd87 | 35 | |
mbed_official | 46:bebbbd80dd87 | 36 | static const SWM_Map SWM_UART_RX[] = { |
mbed_official | 46:bebbbd80dd87 | 37 | {0, 8}, |
mbed_official | 46:bebbbd80dd87 | 38 | {1, 16}, |
mbed_official | 46:bebbbd80dd87 | 39 | {2, 24}, |
mbed_official | 46:bebbbd80dd87 | 40 | }; |
mbed_official | 46:bebbbd80dd87 | 41 | |
mbed_official | 64:7b352733b00a | 42 | static const SWM_Map SWM_UART_RTS[] = { |
mbed_official | 64:7b352733b00a | 43 | {0, 16}, |
mbed_official | 64:7b352733b00a | 44 | {1, 24}, |
mbed_official | 64:7b352733b00a | 45 | {3, 0}, |
mbed_official | 64:7b352733b00a | 46 | }; |
mbed_official | 64:7b352733b00a | 47 | |
mbed_official | 64:7b352733b00a | 48 | static const SWM_Map SWM_UART_CTS[] = { |
mbed_official | 64:7b352733b00a | 49 | {0, 24}, |
mbed_official | 64:7b352733b00a | 50 | {2, 0}, |
mbed_official | 64:7b352733b00a | 51 | {3, 8} |
mbed_official | 64:7b352733b00a | 52 | }; |
mbed_official | 64:7b352733b00a | 53 | |
mbed_official | 46:bebbbd80dd87 | 54 | // bit flags for used UARTs |
mbed_official | 46:bebbbd80dd87 | 55 | static unsigned char uart_used = 0; |
mbed_official | 46:bebbbd80dd87 | 56 | static int get_available_uart(void) { |
mbed_official | 46:bebbbd80dd87 | 57 | int i; |
mbed_official | 46:bebbbd80dd87 | 58 | for (i=0; i<3; i++) { |
mbed_official | 46:bebbbd80dd87 | 59 | if ((uart_used & (1 << i)) == 0) |
mbed_official | 46:bebbbd80dd87 | 60 | return i; |
mbed_official | 46:bebbbd80dd87 | 61 | } |
mbed_official | 46:bebbbd80dd87 | 62 | return -1; |
mbed_official | 46:bebbbd80dd87 | 63 | } |
mbed_official | 46:bebbbd80dd87 | 64 | |
mbed_official | 46:bebbbd80dd87 | 65 | #define UART_EN (0x01<<0) |
mbed_official | 46:bebbbd80dd87 | 66 | |
mbed_official | 46:bebbbd80dd87 | 67 | #define CTS_DELTA (0x01<<5) |
mbed_official | 46:bebbbd80dd87 | 68 | #define RXBRK (0x01<<10) |
mbed_official | 46:bebbbd80dd87 | 69 | #define DELTA_RXBRK (0x01<<11) |
mbed_official | 46:bebbbd80dd87 | 70 | |
mbed_official | 46:bebbbd80dd87 | 71 | #define RXRDY (0x01<<0) |
mbed_official | 46:bebbbd80dd87 | 72 | #define TXRDY (0x01<<2) |
mbed_official | 46:bebbbd80dd87 | 73 | |
mbed_official | 46:bebbbd80dd87 | 74 | #define TXBRKEN (0x01<<1) |
mbed_official | 64:7b352733b00a | 75 | #define CTSEN (0x01<<9) |
mbed_official | 46:bebbbd80dd87 | 76 | |
mbed_official | 46:bebbbd80dd87 | 77 | static uint32_t UARTSysClk; |
mbed_official | 46:bebbbd80dd87 | 78 | |
mbed_official | 46:bebbbd80dd87 | 79 | static uint32_t serial_irq_ids[UART_NUM] = {0}; |
mbed_official | 46:bebbbd80dd87 | 80 | static uart_irq_handler irq_handler; |
mbed_official | 46:bebbbd80dd87 | 81 | |
mbed_official | 46:bebbbd80dd87 | 82 | int stdio_uart_inited = 0; |
mbed_official | 46:bebbbd80dd87 | 83 | serial_t stdio_uart; |
mbed_official | 46:bebbbd80dd87 | 84 | |
mbed_official | 46:bebbbd80dd87 | 85 | void serial_init(serial_t *obj, PinName tx, PinName rx) { |
mbed_official | 46:bebbbd80dd87 | 86 | int is_stdio_uart = 0; |
mbed_official | 46:bebbbd80dd87 | 87 | |
mbed_official | 46:bebbbd80dd87 | 88 | int uart_n = get_available_uart(); |
mbed_official | 46:bebbbd80dd87 | 89 | if (uart_n == -1) { |
mbed_official | 46:bebbbd80dd87 | 90 | error("No available UART"); |
mbed_official | 46:bebbbd80dd87 | 91 | } |
mbed_official | 46:bebbbd80dd87 | 92 | obj->index = uart_n; |
mbed_official | 46:bebbbd80dd87 | 93 | obj->uart = (LPC_USART_TypeDef *)(LPC_USART0_BASE + (0x4000 * uart_n)); |
mbed_official | 46:bebbbd80dd87 | 94 | uart_used |= (1 << uart_n); |
mbed_official | 46:bebbbd80dd87 | 95 | |
mbed_official | 46:bebbbd80dd87 | 96 | const SWM_Map *swm; |
mbed_official | 46:bebbbd80dd87 | 97 | uint32_t regVal; |
mbed_official | 46:bebbbd80dd87 | 98 | |
mbed_official | 46:bebbbd80dd87 | 99 | swm = &SWM_UART_TX[uart_n]; |
mbed_official | 46:bebbbd80dd87 | 100 | regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset); |
mbed_official | 46:bebbbd80dd87 | 101 | LPC_SWM->PINASSIGN[swm->n] = regVal | (tx << swm->offset); |
mbed_official | 46:bebbbd80dd87 | 102 | |
mbed_official | 46:bebbbd80dd87 | 103 | swm = &SWM_UART_RX[uart_n]; |
mbed_official | 46:bebbbd80dd87 | 104 | regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset); |
mbed_official | 46:bebbbd80dd87 | 105 | LPC_SWM->PINASSIGN[swm->n] = regVal | (rx << swm->offset); |
mbed_official | 46:bebbbd80dd87 | 106 | |
mbed_official | 46:bebbbd80dd87 | 107 | /* uart clock divided by 1 */ |
mbed_official | 46:bebbbd80dd87 | 108 | LPC_SYSCON->UARTCLKDIV = 1; |
mbed_official | 46:bebbbd80dd87 | 109 | |
mbed_official | 46:bebbbd80dd87 | 110 | /* disable uart interrupts */ |
mbed_official | 46:bebbbd80dd87 | 111 | NVIC_DisableIRQ((IRQn_Type)(UART0_IRQn + uart_n)); |
mbed_official | 46:bebbbd80dd87 | 112 | |
mbed_official | 46:bebbbd80dd87 | 113 | /* Enable UART clock */ |
mbed_official | 46:bebbbd80dd87 | 114 | LPC_SYSCON->SYSAHBCLKCTRL |= (1 << (14 + uart_n)); |
mbed_official | 46:bebbbd80dd87 | 115 | |
mbed_official | 46:bebbbd80dd87 | 116 | /* Peripheral reset control to UART, a "1" bring it out of reset. */ |
mbed_official | 46:bebbbd80dd87 | 117 | LPC_SYSCON->PRESETCTRL &= ~(0x1 << (3 + uart_n)); |
mbed_official | 46:bebbbd80dd87 | 118 | LPC_SYSCON->PRESETCTRL |= (0x1 << (3 + uart_n)); |
mbed_official | 46:bebbbd80dd87 | 119 | |
mbed_official | 46:bebbbd80dd87 | 120 | UARTSysClk = SystemCoreClock / LPC_SYSCON->UARTCLKDIV; |
mbed_official | 46:bebbbd80dd87 | 121 | |
mbed_official | 46:bebbbd80dd87 | 122 | // set default baud rate and format |
mbed_official | 46:bebbbd80dd87 | 123 | serial_baud (obj, 9600); |
mbed_official | 46:bebbbd80dd87 | 124 | serial_format(obj, 8, ParityNone, 1); |
mbed_official | 46:bebbbd80dd87 | 125 | |
mbed_official | 46:bebbbd80dd87 | 126 | /* Clear all status bits. */ |
mbed_official | 46:bebbbd80dd87 | 127 | obj->uart->STAT = CTS_DELTA | DELTA_RXBRK; |
mbed_official | 46:bebbbd80dd87 | 128 | |
mbed_official | 46:bebbbd80dd87 | 129 | /* enable uart interrupts */ |
mbed_official | 46:bebbbd80dd87 | 130 | NVIC_EnableIRQ((IRQn_Type)(UART0_IRQn + uart_n)); |
mbed_official | 46:bebbbd80dd87 | 131 | |
mbed_official | 46:bebbbd80dd87 | 132 | /* Enable UART interrupt */ |
mbed_official | 46:bebbbd80dd87 | 133 | // obj->uart->INTENSET = RXRDY | TXRDY | DELTA_RXBRK; |
mbed_official | 46:bebbbd80dd87 | 134 | |
mbed_official | 46:bebbbd80dd87 | 135 | /* Enable UART */ |
mbed_official | 46:bebbbd80dd87 | 136 | obj->uart->CFG |= UART_EN; |
mbed_official | 46:bebbbd80dd87 | 137 | |
mbed_official | 46:bebbbd80dd87 | 138 | is_stdio_uart = ((tx == USBTX) && (rx == USBRX)); |
mbed_official | 46:bebbbd80dd87 | 139 | |
mbed_official | 46:bebbbd80dd87 | 140 | if (is_stdio_uart) { |
mbed_official | 46:bebbbd80dd87 | 141 | stdio_uart_inited = 1; |
mbed_official | 46:bebbbd80dd87 | 142 | memcpy(&stdio_uart, obj, sizeof(serial_t)); |
mbed_official | 46:bebbbd80dd87 | 143 | } |
mbed_official | 46:bebbbd80dd87 | 144 | } |
mbed_official | 46:bebbbd80dd87 | 145 | |
mbed_official | 46:bebbbd80dd87 | 146 | void serial_free(serial_t *obj) { |
mbed_official | 46:bebbbd80dd87 | 147 | uart_used &= ~(1 << obj->index); |
mbed_official | 46:bebbbd80dd87 | 148 | serial_irq_ids[obj->index] = 0; |
mbed_official | 46:bebbbd80dd87 | 149 | } |
mbed_official | 46:bebbbd80dd87 | 150 | |
mbed_official | 46:bebbbd80dd87 | 151 | // serial_baud |
mbed_official | 46:bebbbd80dd87 | 152 | // set the baud rate, taking in to account the current SystemFrequency |
mbed_official | 46:bebbbd80dd87 | 153 | void serial_baud(serial_t *obj, int baudrate) { |
mbed_official | 46:bebbbd80dd87 | 154 | /* Integer divider: |
mbed_official | 46:bebbbd80dd87 | 155 | BRG = UARTSysClk/(Baudrate * 16) - 1 |
mbed_official | 46:bebbbd80dd87 | 156 | |
mbed_official | 46:bebbbd80dd87 | 157 | Frational divider: |
mbed_official | 46:bebbbd80dd87 | 158 | FRG = ((UARTSysClk / (Baudrate * 16 * (BRG + 1))) - 1) |
mbed_official | 46:bebbbd80dd87 | 159 | |
mbed_official | 46:bebbbd80dd87 | 160 | where |
mbed_official | 46:bebbbd80dd87 | 161 | FRG = (LPC_SYSCON->UARTFRDADD + 1) / (LPC_SYSCON->UARTFRDSUB + 1) |
mbed_official | 46:bebbbd80dd87 | 162 | |
mbed_official | 46:bebbbd80dd87 | 163 | (1) The easiest way is set SUB value to 256, -1 encoded, thus SUB |
mbed_official | 46:bebbbd80dd87 | 164 | register is 0xFF. |
mbed_official | 46:bebbbd80dd87 | 165 | (2) In ADD register value, depending on the value of UartSysClk, |
mbed_official | 46:bebbbd80dd87 | 166 | baudrate, BRG register value, and SUB register value, be careful |
mbed_official | 46:bebbbd80dd87 | 167 | about the order of multiplier and divider and make sure any |
mbed_official | 46:bebbbd80dd87 | 168 | multiplier doesn't exceed 32-bit boundary and any divider doesn't get |
mbed_official | 46:bebbbd80dd87 | 169 | down below one(integer 0). |
mbed_official | 46:bebbbd80dd87 | 170 | (3) ADD should be always less than SUB. |
mbed_official | 46:bebbbd80dd87 | 171 | */ |
mbed_official | 46:bebbbd80dd87 | 172 | obj->uart->BRG = UARTSysClk / 16 / baudrate - 1; |
mbed_official | 46:bebbbd80dd87 | 173 | |
mbed_official | 46:bebbbd80dd87 | 174 | LPC_SYSCON->UARTFRGDIV = 0xFF; |
mbed_official | 46:bebbbd80dd87 | 175 | LPC_SYSCON->UARTFRGMULT = ( ((UARTSysClk / 16) * (LPC_SYSCON->UARTFRGDIV + 1)) / |
mbed_official | 46:bebbbd80dd87 | 176 | (baudrate * (obj->uart->BRG + 1)) |
mbed_official | 46:bebbbd80dd87 | 177 | ) - (LPC_SYSCON->UARTFRGDIV + 1); |
mbed_official | 46:bebbbd80dd87 | 178 | |
mbed_official | 46:bebbbd80dd87 | 179 | } |
mbed_official | 46:bebbbd80dd87 | 180 | |
mbed_official | 46:bebbbd80dd87 | 181 | void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) { |
mbed_official | 46:bebbbd80dd87 | 182 | // 0: 1 stop bits, 1: 2 stop bits |
mbed_official | 46:bebbbd80dd87 | 183 | if (stop_bits != 1 && stop_bits != 2) { |
mbed_official | 46:bebbbd80dd87 | 184 | error("Invalid stop bits specified"); |
mbed_official | 46:bebbbd80dd87 | 185 | } |
mbed_official | 46:bebbbd80dd87 | 186 | stop_bits -= 1; |
mbed_official | 46:bebbbd80dd87 | 187 | |
mbed_official | 46:bebbbd80dd87 | 188 | // 0: 7 data bits ... 2: 9 data bits |
mbed_official | 46:bebbbd80dd87 | 189 | if (data_bits < 7 || data_bits > 9) { |
mbed_official | 46:bebbbd80dd87 | 190 | error("Invalid number of bits (%d) in serial format, should be 7..9", data_bits); |
mbed_official | 46:bebbbd80dd87 | 191 | } |
mbed_official | 46:bebbbd80dd87 | 192 | data_bits -= 7; |
mbed_official | 46:bebbbd80dd87 | 193 | |
mbed_official | 46:bebbbd80dd87 | 194 | int paritysel; |
mbed_official | 46:bebbbd80dd87 | 195 | switch (parity) { |
mbed_official | 46:bebbbd80dd87 | 196 | case ParityNone: paritysel = 0; break; |
mbed_official | 46:bebbbd80dd87 | 197 | case ParityEven: paritysel = 2; break; |
mbed_official | 46:bebbbd80dd87 | 198 | case ParityOdd : paritysel = 3; break; |
mbed_official | 46:bebbbd80dd87 | 199 | default: |
mbed_official | 46:bebbbd80dd87 | 200 | error("Invalid serial parity setting"); |
mbed_official | 46:bebbbd80dd87 | 201 | return; |
mbed_official | 46:bebbbd80dd87 | 202 | } |
mbed_official | 46:bebbbd80dd87 | 203 | |
mbed_official | 46:bebbbd80dd87 | 204 | obj->uart->CFG = (data_bits << 2) |
mbed_official | 46:bebbbd80dd87 | 205 | | (paritysel << 4) |
mbed_official | 46:bebbbd80dd87 | 206 | | (stop_bits << 6); |
mbed_official | 46:bebbbd80dd87 | 207 | } |
mbed_official | 46:bebbbd80dd87 | 208 | |
mbed_official | 46:bebbbd80dd87 | 209 | /****************************************************************************** |
mbed_official | 46:bebbbd80dd87 | 210 | * INTERRUPTS HANDLING |
mbed_official | 46:bebbbd80dd87 | 211 | ******************************************************************************/ |
mbed_official | 46:bebbbd80dd87 | 212 | static inline void uart_irq(uint32_t iir, uint32_t index) { |
mbed_official | 46:bebbbd80dd87 | 213 | // [Chapter 14] LPC17xx UART0/2/3: UARTn Interrupt Handling |
mbed_official | 46:bebbbd80dd87 | 214 | SerialIrq irq_type; |
mbed_official | 46:bebbbd80dd87 | 215 | switch (iir) { |
mbed_official | 46:bebbbd80dd87 | 216 | case 1: irq_type = TxIrq; break; |
mbed_official | 46:bebbbd80dd87 | 217 | case 2: irq_type = RxIrq; break; |
mbed_official | 46:bebbbd80dd87 | 218 | default: return; |
mbed_official | 46:bebbbd80dd87 | 219 | } |
mbed_official | 46:bebbbd80dd87 | 220 | |
mbed_official | 46:bebbbd80dd87 | 221 | if (serial_irq_ids[index] != 0) |
mbed_official | 46:bebbbd80dd87 | 222 | irq_handler(serial_irq_ids[index], irq_type); |
mbed_official | 46:bebbbd80dd87 | 223 | } |
mbed_official | 46:bebbbd80dd87 | 224 | |
mbed_official | 46:bebbbd80dd87 | 225 | void uart0_irq() {uart_irq((LPC_USART0->STAT & (1 << 2)) ? 2 : 1, 0);} |
mbed_official | 46:bebbbd80dd87 | 226 | void uart1_irq() {uart_irq((LPC_USART1->STAT & (1 << 2)) ? 2 : 1, 1);} |
mbed_official | 46:bebbbd80dd87 | 227 | void uart2_irq() {uart_irq((LPC_USART2->STAT & (1 << 2)) ? 2 : 1, 2);} |
mbed_official | 46:bebbbd80dd87 | 228 | |
mbed_official | 46:bebbbd80dd87 | 229 | void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) { |
mbed_official | 46:bebbbd80dd87 | 230 | irq_handler = handler; |
mbed_official | 46:bebbbd80dd87 | 231 | serial_irq_ids[obj->index] = id; |
mbed_official | 46:bebbbd80dd87 | 232 | } |
mbed_official | 46:bebbbd80dd87 | 233 | |
mbed_official | 46:bebbbd80dd87 | 234 | void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) { |
mbed_official | 46:bebbbd80dd87 | 235 | IRQn_Type irq_n = (IRQn_Type)0; |
mbed_official | 46:bebbbd80dd87 | 236 | uint32_t vector = 0; |
mbed_official | 46:bebbbd80dd87 | 237 | switch ((int)obj->uart) { |
mbed_official | 46:bebbbd80dd87 | 238 | case LPC_USART0_BASE: irq_n=UART0_IRQn; vector = (uint32_t)&uart0_irq; break; |
mbed_official | 46:bebbbd80dd87 | 239 | case LPC_USART1_BASE: irq_n=UART1_IRQn; vector = (uint32_t)&uart1_irq; break; |
mbed_official | 46:bebbbd80dd87 | 240 | case LPC_USART2_BASE: irq_n=UART2_IRQn; vector = (uint32_t)&uart2_irq; break; |
mbed_official | 46:bebbbd80dd87 | 241 | } |
mbed_official | 46:bebbbd80dd87 | 242 | |
mbed_official | 46:bebbbd80dd87 | 243 | if (enable) { |
mbed_official | 46:bebbbd80dd87 | 244 | obj->uart->INTENSET = (1 << ((irq == RxIrq) ? 0 : 2)); |
mbed_official | 46:bebbbd80dd87 | 245 | NVIC_SetVector(irq_n, vector); |
mbed_official | 46:bebbbd80dd87 | 246 | NVIC_EnableIRQ(irq_n); |
mbed_official | 46:bebbbd80dd87 | 247 | } else { // disable |
mbed_official | 46:bebbbd80dd87 | 248 | int all_disabled = 0; |
mbed_official | 46:bebbbd80dd87 | 249 | SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq); |
mbed_official | 46:bebbbd80dd87 | 250 | obj->uart->INTENSET &= ~(1 << ((irq == RxIrq) ? 0 : 2)); |
mbed_official | 46:bebbbd80dd87 | 251 | all_disabled = (obj->uart->INTENSET & (1 << ((other_irq == RxIrq) ? 0 : 2))) == 0; |
mbed_official | 46:bebbbd80dd87 | 252 | if (all_disabled) |
mbed_official | 46:bebbbd80dd87 | 253 | NVIC_DisableIRQ(irq_n); |
mbed_official | 46:bebbbd80dd87 | 254 | } |
mbed_official | 46:bebbbd80dd87 | 255 | } |
mbed_official | 46:bebbbd80dd87 | 256 | |
mbed_official | 46:bebbbd80dd87 | 257 | /****************************************************************************** |
mbed_official | 46:bebbbd80dd87 | 258 | * READ/WRITE |
mbed_official | 46:bebbbd80dd87 | 259 | ******************************************************************************/ |
mbed_official | 46:bebbbd80dd87 | 260 | int serial_getc(serial_t *obj) { |
mbed_official | 46:bebbbd80dd87 | 261 | while (!serial_readable(obj)); |
mbed_official | 46:bebbbd80dd87 | 262 | return obj->uart->RXDATA; |
mbed_official | 46:bebbbd80dd87 | 263 | } |
mbed_official | 46:bebbbd80dd87 | 264 | |
mbed_official | 46:bebbbd80dd87 | 265 | void serial_putc(serial_t *obj, int c) { |
mbed_official | 46:bebbbd80dd87 | 266 | while (!serial_writable(obj)); |
mbed_official | 46:bebbbd80dd87 | 267 | obj->uart->TXDATA = c; |
mbed_official | 46:bebbbd80dd87 | 268 | } |
mbed_official | 46:bebbbd80dd87 | 269 | |
mbed_official | 46:bebbbd80dd87 | 270 | int serial_readable(serial_t *obj) { |
mbed_official | 46:bebbbd80dd87 | 271 | return obj->uart->STAT & RXRDY; |
mbed_official | 46:bebbbd80dd87 | 272 | } |
mbed_official | 46:bebbbd80dd87 | 273 | |
mbed_official | 46:bebbbd80dd87 | 274 | int serial_writable(serial_t *obj) { |
mbed_official | 46:bebbbd80dd87 | 275 | return obj->uart->STAT & TXRDY; |
mbed_official | 46:bebbbd80dd87 | 276 | } |
mbed_official | 46:bebbbd80dd87 | 277 | |
mbed_official | 46:bebbbd80dd87 | 278 | void serial_clear(serial_t *obj) { |
mbed_official | 46:bebbbd80dd87 | 279 | // [TODO] |
mbed_official | 46:bebbbd80dd87 | 280 | } |
mbed_official | 46:bebbbd80dd87 | 281 | |
mbed_official | 46:bebbbd80dd87 | 282 | void serial_pinout_tx(PinName tx) { |
mbed_official | 46:bebbbd80dd87 | 283 | |
mbed_official | 46:bebbbd80dd87 | 284 | } |
mbed_official | 46:bebbbd80dd87 | 285 | |
mbed_official | 46:bebbbd80dd87 | 286 | void serial_break_set(serial_t *obj) { |
mbed_official | 46:bebbbd80dd87 | 287 | obj->uart->CTRL |= TXBRKEN; |
mbed_official | 46:bebbbd80dd87 | 288 | } |
mbed_official | 46:bebbbd80dd87 | 289 | |
mbed_official | 46:bebbbd80dd87 | 290 | void serial_break_clear(serial_t *obj) { |
mbed_official | 46:bebbbd80dd87 | 291 | obj->uart->CTRL &= ~TXBRKEN; |
mbed_official | 46:bebbbd80dd87 | 292 | } |
mbed_official | 46:bebbbd80dd87 | 293 | |
mbed_official | 64:7b352733b00a | 294 | void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow) { |
mbed_official | 64:7b352733b00a | 295 | const SWM_Map *swm_rts, *swm_cts; |
mbed_official | 64:7b352733b00a | 296 | uint32_t regVal_rts, regVal_cts; |
mbed_official | 64:7b352733b00a | 297 | |
mbed_official | 64:7b352733b00a | 298 | swm_rts = &SWM_UART_RTS[obj->index]; |
mbed_official | 64:7b352733b00a | 299 | swm_cts = &SWM_UART_CTS[obj->index]; |
mbed_official | 64:7b352733b00a | 300 | regVal_rts = LPC_SWM->PINASSIGN[swm_rts->n] & ~(0xFF << swm_rts->offset); |
mbed_official | 64:7b352733b00a | 301 | regVal_cts = LPC_SWM->PINASSIGN[swm_cts->n] & ~(0xFF << swm_cts->offset); |
mbed_official | 64:7b352733b00a | 302 | |
mbed_official | 64:7b352733b00a | 303 | if (FlowControlNone == type) { |
mbed_official | 64:7b352733b00a | 304 | LPC_SWM->PINASSIGN[swm_rts->n] = regVal_rts | (0xFF << swm_rts->offset); |
mbed_official | 64:7b352733b00a | 305 | LPC_SWM->PINASSIGN[swm_cts->n] = regVal_cts | (0xFF << swm_cts->offset); |
mbed_official | 64:7b352733b00a | 306 | obj->uart->CFG &= ~CTSEN; |
mbed_official | 64:7b352733b00a | 307 | return; |
mbed_official | 64:7b352733b00a | 308 | } |
mbed_official | 64:7b352733b00a | 309 | if ((FlowControlRTS == type || FlowControlRTSCTS == type) && (rxflow != NC)) { |
mbed_official | 64:7b352733b00a | 310 | LPC_SWM->PINASSIGN[swm_rts->n] = regVal_rts | (rxflow << swm_rts->offset); |
mbed_official | 64:7b352733b00a | 311 | if (FlowControlRTS == type) { |
mbed_official | 64:7b352733b00a | 312 | LPC_SWM->PINASSIGN[swm_cts->n] = regVal_cts | (0xFF << swm_cts->offset); |
mbed_official | 64:7b352733b00a | 313 | obj->uart->CFG &= ~CTSEN; |
mbed_official | 64:7b352733b00a | 314 | } |
mbed_official | 64:7b352733b00a | 315 | } |
mbed_official | 64:7b352733b00a | 316 | if ((FlowControlCTS == type || FlowControlRTSCTS == type) && (txflow != NC)) { |
mbed_official | 64:7b352733b00a | 317 | LPC_SWM->PINASSIGN[swm_cts->n] = regVal_cts | (txflow << swm_cts->offset); |
mbed_official | 64:7b352733b00a | 318 | obj->uart->CFG |= CTSEN; |
mbed_official | 64:7b352733b00a | 319 | if (FlowControlCTS == type) { |
mbed_official | 64:7b352733b00a | 320 | LPC_SWM->PINASSIGN[swm_rts->n] = regVal_rts | (0xFF << swm_rts->offset); |
mbed_official | 64:7b352733b00a | 321 | } |
mbed_official | 64:7b352733b00a | 322 | } |
mbed_official | 64:7b352733b00a | 323 | } |
mbed_official | 64:7b352733b00a | 324 |