shao ziyang / mbed-src-kl05

mbed library sources

Dependents:   frdm_kl05z_gpio_test

Fork of mbed-src by mbed official

targets/cmsis/TARGET_STM/TARGET_DISCO_F407VG/system_stm32f4xx.c@133:d4dda5c437f0, 2014-03-24 (annotated)

Committer:
mbed_official
Date:
Mon Mar 24 17:45:07 2014 +0000
Revision:
133:d4dda5c437f0
Child:
242:7074e42da0b2
Synchronized with git revision 47b961246bed973fe4cb8932781ffc8025b78a61



Full URL: https://github.com/mbedmicro/mbed/commit/47b961246bed973fe4cb8932781ffc8025b78a61/



[STM32F4-Discovery (STM32F407VG)] initial port

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 133:d4dda5c437f0 1 /**
mbed_official 133:d4dda5c437f0 2 ******************************************************************************
mbed_official 133:d4dda5c437f0 3 * @file system_stm32f4xx.c
mbed_official 133:d4dda5c437f0 4 * @author MCD Application Team
mbed_official 133:d4dda5c437f0 5 * @version V1.0.0
mbed_official 133:d4dda5c437f0 6 * @date 18-February-2014
mbed_official 133:d4dda5c437f0 7 * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
mbed_official 133:d4dda5c437f0 8 *
mbed_official 133:d4dda5c437f0 9 * This file provides two functions and one global variable to be called from
mbed_official 133:d4dda5c437f0 10 * user application:
mbed_official 133:d4dda5c437f0 11 * - SystemInit(): This function is called at startup just after reset and
mbed_official 133:d4dda5c437f0 12 * before branch to main program. This call is made inside
mbed_official 133:d4dda5c437f0 13 * the "startup_stm32f4xx.s" file.
mbed_official 133:d4dda5c437f0 14 *
mbed_official 133:d4dda5c437f0 15 * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
mbed_official 133:d4dda5c437f0 16 * by the user application to setup the SysTick
mbed_official 133:d4dda5c437f0 17 * timer or configure other parameters.
mbed_official 133:d4dda5c437f0 18 *
mbed_official 133:d4dda5c437f0 19 * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
mbed_official 133:d4dda5c437f0 20 * be called whenever the core clock is changed
mbed_official 133:d4dda5c437f0 21 * during program execution.
mbed_official 133:d4dda5c437f0 22 *
mbed_official 133:d4dda5c437f0 23 *
mbed_official 133:d4dda5c437f0 24 ******************************************************************************
mbed_official 133:d4dda5c437f0 25 * @attention
mbed_official 133:d4dda5c437f0 26 *
mbed_official 133:d4dda5c437f0 27 * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
mbed_official 133:d4dda5c437f0 28 *
mbed_official 133:d4dda5c437f0 29 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 133:d4dda5c437f0 30 * are permitted provided that the following conditions are met:
mbed_official 133:d4dda5c437f0 31 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 133:d4dda5c437f0 32 * this list of conditions and the following disclaimer.
mbed_official 133:d4dda5c437f0 33 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 133:d4dda5c437f0 34 * this list of conditions and the following disclaimer in the documentation
mbed_official 133:d4dda5c437f0 35 * and/or other materials provided with the distribution.
mbed_official 133:d4dda5c437f0 36 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 133:d4dda5c437f0 37 * may be used to endorse or promote products derived from this software
mbed_official 133:d4dda5c437f0 38 * without specific prior written permission.
mbed_official 133:d4dda5c437f0 39 *
mbed_official 133:d4dda5c437f0 40 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 133:d4dda5c437f0 41 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 133:d4dda5c437f0 42 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 133:d4dda5c437f0 43 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 133:d4dda5c437f0 44 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 133:d4dda5c437f0 45 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 133:d4dda5c437f0 46 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 133:d4dda5c437f0 47 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 133:d4dda5c437f0 48 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 133:d4dda5c437f0 49 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 133:d4dda5c437f0 50 *
mbed_official 133:d4dda5c437f0 51 ******************************************************************************
mbed_official 133:d4dda5c437f0 52 */
mbed_official 133:d4dda5c437f0 53
mbed_official 133:d4dda5c437f0 54 /** @addtogroup CMSIS
mbed_official 133:d4dda5c437f0 55 * @{
mbed_official 133:d4dda5c437f0 56 */
mbed_official 133:d4dda5c437f0 57
mbed_official 133:d4dda5c437f0 58 /** @addtogroup stm32f4xx_system
mbed_official 133:d4dda5c437f0 59 * @{
mbed_official 133:d4dda5c437f0 60 */
mbed_official 133:d4dda5c437f0 61
mbed_official 133:d4dda5c437f0 62 /** @addtogroup STM32F4xx_System_Private_Includes
mbed_official 133:d4dda5c437f0 63 * @{
mbed_official 133:d4dda5c437f0 64 */
mbed_official 133:d4dda5c437f0 65
mbed_official 133:d4dda5c437f0 66 #include "stm32f4xx_hal.h"
mbed_official 133:d4dda5c437f0 67
mbed_official 133:d4dda5c437f0 68 /**
mbed_official 133:d4dda5c437f0 69 * @}
mbed_official 133:d4dda5c437f0 70 */
mbed_official 133:d4dda5c437f0 71
mbed_official 133:d4dda5c437f0 72 /** @addtogroup STM32F4xx_System_Private_TypesDefinitions
mbed_official 133:d4dda5c437f0 73 * @{
mbed_official 133:d4dda5c437f0 74 */
mbed_official 133:d4dda5c437f0 75
mbed_official 133:d4dda5c437f0 76 /**
mbed_official 133:d4dda5c437f0 77 * @}
mbed_official 133:d4dda5c437f0 78 */
mbed_official 133:d4dda5c437f0 79
mbed_official 133:d4dda5c437f0 80 /** @addtogroup STM32F4xx_System_Private_Defines
mbed_official 133:d4dda5c437f0 81 * @{
mbed_official 133:d4dda5c437f0 82 */
mbed_official 133:d4dda5c437f0 83
mbed_official 133:d4dda5c437f0 84 /************************* Miscellaneous Configuration ************************/
mbed_official 133:d4dda5c437f0 85
mbed_official 133:d4dda5c437f0 86 /*!< Uncomment the following line if you need to relocate your vector Table in
mbed_official 133:d4dda5c437f0 87 Internal SRAM. */
mbed_official 133:d4dda5c437f0 88 /* #define VECT_TAB_SRAM */
mbed_official 133:d4dda5c437f0 89 #define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
mbed_official 133:d4dda5c437f0 90 This value must be a multiple of 0x200. */
mbed_official 133:d4dda5c437f0 91 /******************************************************************************/
mbed_official 133:d4dda5c437f0 92
mbed_official 133:d4dda5c437f0 93 /**
mbed_official 133:d4dda5c437f0 94 * @}
mbed_official 133:d4dda5c437f0 95 */
mbed_official 133:d4dda5c437f0 96
mbed_official 133:d4dda5c437f0 97 /** @addtogroup STM32F4xx_System_Private_Macros
mbed_official 133:d4dda5c437f0 98 * @{
mbed_official 133:d4dda5c437f0 99 */
mbed_official 133:d4dda5c437f0 100
mbed_official 133:d4dda5c437f0 101 /**
mbed_official 133:d4dda5c437f0 102 * @}
mbed_official 133:d4dda5c437f0 103 */
mbed_official 133:d4dda5c437f0 104
mbed_official 133:d4dda5c437f0 105 /** @addtogroup STM32F4xx_System_Private_Variables
mbed_official 133:d4dda5c437f0 106 * @{
mbed_official 133:d4dda5c437f0 107 */
mbed_official 133:d4dda5c437f0 108 /* This variable is updated in three ways:
mbed_official 133:d4dda5c437f0 109 1) by calling CMSIS function SystemCoreClockUpdate()
mbed_official 133:d4dda5c437f0 110 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
mbed_official 133:d4dda5c437f0 111 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
mbed_official 133:d4dda5c437f0 112 Note: If you use this function to configure the system clock; then there
mbed_official 133:d4dda5c437f0 113 is no need to call the 2 first functions listed above, since SystemCoreClock
mbed_official 133:d4dda5c437f0 114 variable is updated automatically.
mbed_official 133:d4dda5c437f0 115 */
mbed_official 133:d4dda5c437f0 116 uint32_t SystemCoreClock = 168000000; /* [CHANGED FOR MBED] */
mbed_official 133:d4dda5c437f0 117 __I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
mbed_official 133:d4dda5c437f0 118
mbed_official 133:d4dda5c437f0 119 /**
mbed_official 133:d4dda5c437f0 120 * @}
mbed_official 133:d4dda5c437f0 121 */
mbed_official 133:d4dda5c437f0 122
mbed_official 133:d4dda5c437f0 123 /** @addtogroup STM32F4xx_System_Private_FunctionPrototypes
mbed_official 133:d4dda5c437f0 124 * @{
mbed_official 133:d4dda5c437f0 125 */
mbed_official 133:d4dda5c437f0 126
mbed_official 133:d4dda5c437f0 127 /* [ADDED FOR MBED] */
mbed_official 133:d4dda5c437f0 128 void SystemClock_Config(void);
mbed_official 133:d4dda5c437f0 129
mbed_official 133:d4dda5c437f0 130 /**
mbed_official 133:d4dda5c437f0 131 * @}
mbed_official 133:d4dda5c437f0 132 */
mbed_official 133:d4dda5c437f0 133
mbed_official 133:d4dda5c437f0 134 /** @addtogroup STM32F4xx_System_Private_Functions
mbed_official 133:d4dda5c437f0 135 * @{
mbed_official 133:d4dda5c437f0 136 */
mbed_official 133:d4dda5c437f0 137
mbed_official 133:d4dda5c437f0 138 /**
mbed_official 133:d4dda5c437f0 139 * @brief Setup the microcontroller system
mbed_official 133:d4dda5c437f0 140 * Initialize the FPU setting, vector table location and External memory
mbed_official 133:d4dda5c437f0 141 * configuration.
mbed_official 133:d4dda5c437f0 142 * @param None
mbed_official 133:d4dda5c437f0 143 * @retval None
mbed_official 133:d4dda5c437f0 144 */
mbed_official 133:d4dda5c437f0 145 void SystemInit(void)
mbed_official 133:d4dda5c437f0 146 {
mbed_official 133:d4dda5c437f0 147 /* FPU settings ------------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 148 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
mbed_official 133:d4dda5c437f0 149 SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
mbed_official 133:d4dda5c437f0 150 #endif
mbed_official 133:d4dda5c437f0 151 /* Reset the RCC clock configuration to the default reset state ------------*/
mbed_official 133:d4dda5c437f0 152 /* Set HSION bit */
mbed_official 133:d4dda5c437f0 153 RCC->CR |= (uint32_t)0x00000001;
mbed_official 133:d4dda5c437f0 154
mbed_official 133:d4dda5c437f0 155 /* Reset CFGR register */
mbed_official 133:d4dda5c437f0 156 RCC->CFGR = 0x00000000;
mbed_official 133:d4dda5c437f0 157
mbed_official 133:d4dda5c437f0 158 /* Reset HSEON, CSSON and PLLON bits */
mbed_official 133:d4dda5c437f0 159 RCC->CR &= (uint32_t)0xFEF6FFFF;
mbed_official 133:d4dda5c437f0 160
mbed_official 133:d4dda5c437f0 161 /* Reset PLLCFGR register */
mbed_official 133:d4dda5c437f0 162 RCC->PLLCFGR = 0x24003010;
mbed_official 133:d4dda5c437f0 163
mbed_official 133:d4dda5c437f0 164 /* Reset HSEBYP bit */
mbed_official 133:d4dda5c437f0 165 RCC->CR &= (uint32_t)0xFFFBFFFF;
mbed_official 133:d4dda5c437f0 166
mbed_official 133:d4dda5c437f0 167 /* Disable all interrupts */
mbed_official 133:d4dda5c437f0 168 RCC->CIR = 0x00000000;
mbed_official 133:d4dda5c437f0 169
mbed_official 133:d4dda5c437f0 170 /* Configure the Vector Table location add offset address ------------------*/
mbed_official 133:d4dda5c437f0 171 #ifdef VECT_TAB_SRAM
mbed_official 133:d4dda5c437f0 172 SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
mbed_official 133:d4dda5c437f0 173 #else
mbed_official 133:d4dda5c437f0 174 SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
mbed_official 133:d4dda5c437f0 175 #endif
mbed_official 133:d4dda5c437f0 176
mbed_official 133:d4dda5c437f0 177 /* [ADDED FOR MBED] */
mbed_official 133:d4dda5c437f0 178 HAL_Init();
mbed_official 133:d4dda5c437f0 179 SystemClock_Config();
mbed_official 133:d4dda5c437f0 180 }
mbed_official 133:d4dda5c437f0 181
mbed_official 133:d4dda5c437f0 182 /**
mbed_official 133:d4dda5c437f0 183 * @brief Update SystemCoreClock variable according to Clock Register Values.
mbed_official 133:d4dda5c437f0 184 * The SystemCoreClock variable contains the core clock (HCLK), it can
mbed_official 133:d4dda5c437f0 185 * be used by the user application to setup the SysTick timer or configure
mbed_official 133:d4dda5c437f0 186 * other parameters.
mbed_official 133:d4dda5c437f0 187 *
mbed_official 133:d4dda5c437f0 188 * @note Each time the core clock (HCLK) changes, this function must be called
mbed_official 133:d4dda5c437f0 189 * to update SystemCoreClock variable value. Otherwise, any configuration
mbed_official 133:d4dda5c437f0 190 * based on this variable will be incorrect.
mbed_official 133:d4dda5c437f0 191 *
mbed_official 133:d4dda5c437f0 192 * @note - The system frequency computed by this function is not the real
mbed_official 133:d4dda5c437f0 193 * frequency in the chip. It is calculated based on the predefined
mbed_official 133:d4dda5c437f0 194 * constant and the selected clock source:
mbed_official 133:d4dda5c437f0 195 *
mbed_official 133:d4dda5c437f0 196 * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
mbed_official 133:d4dda5c437f0 197 *
mbed_official 133:d4dda5c437f0 198 * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
mbed_official 133:d4dda5c437f0 199 *
mbed_official 133:d4dda5c437f0 200 * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
mbed_official 133:d4dda5c437f0 201 * or HSI_VALUE(*) multiplied/divided by the PLL factors.
mbed_official 133:d4dda5c437f0 202 *
mbed_official 133:d4dda5c437f0 203 * (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
mbed_official 133:d4dda5c437f0 204 * 16 MHz) but the real value may vary depending on the variations
mbed_official 133:d4dda5c437f0 205 * in voltage and temperature.
mbed_official 133:d4dda5c437f0 206 *
mbed_official 133:d4dda5c437f0 207 * (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (its value
mbed_official 133:d4dda5c437f0 208 * depends on the application requirements), user has to ensure that HSE_VALUE
mbed_official 133:d4dda5c437f0 209 * is same as the real frequency of the crystal used. Otherwise, this function
mbed_official 133:d4dda5c437f0 210 * may have wrong result.
mbed_official 133:d4dda5c437f0 211 *
mbed_official 133:d4dda5c437f0 212 * - The result of this function could be not correct when using fractional
mbed_official 133:d4dda5c437f0 213 * value for HSE crystal.
mbed_official 133:d4dda5c437f0 214 *
mbed_official 133:d4dda5c437f0 215 * @param None
mbed_official 133:d4dda5c437f0 216 * @retval None
mbed_official 133:d4dda5c437f0 217 */
mbed_official 133:d4dda5c437f0 218 void SystemCoreClockUpdate(void)
mbed_official 133:d4dda5c437f0 219 {
mbed_official 133:d4dda5c437f0 220 uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
mbed_official 133:d4dda5c437f0 221
mbed_official 133:d4dda5c437f0 222 /* Get SYSCLK source -------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 223 tmp = RCC->CFGR & RCC_CFGR_SWS;
mbed_official 133:d4dda5c437f0 224
mbed_official 133:d4dda5c437f0 225 switch (tmp)
mbed_official 133:d4dda5c437f0 226 {
mbed_official 133:d4dda5c437f0 227 case 0x00: /* HSI used as system clock source */
mbed_official 133:d4dda5c437f0 228 SystemCoreClock = HSI_VALUE;
mbed_official 133:d4dda5c437f0 229 break;
mbed_official 133:d4dda5c437f0 230 case 0x04: /* HSE used as system clock source */
mbed_official 133:d4dda5c437f0 231 SystemCoreClock = HSE_VALUE;
mbed_official 133:d4dda5c437f0 232 break;
mbed_official 133:d4dda5c437f0 233 case 0x08: /* PLL used as system clock source */
mbed_official 133:d4dda5c437f0 234
mbed_official 133:d4dda5c437f0 235 /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
mbed_official 133:d4dda5c437f0 236 SYSCLK = PLL_VCO / PLL_P
mbed_official 133:d4dda5c437f0 237 */
mbed_official 133:d4dda5c437f0 238 pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
mbed_official 133:d4dda5c437f0 239 pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
mbed_official 133:d4dda5c437f0 240
mbed_official 133:d4dda5c437f0 241 if (pllsource != 0)
mbed_official 133:d4dda5c437f0 242 {
mbed_official 133:d4dda5c437f0 243 /* HSE used as PLL clock source */
mbed_official 133:d4dda5c437f0 244 pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
mbed_official 133:d4dda5c437f0 245 }
mbed_official 133:d4dda5c437f0 246 else
mbed_official 133:d4dda5c437f0 247 {
mbed_official 133:d4dda5c437f0 248 /* HSI used as PLL clock source */
mbed_official 133:d4dda5c437f0 249 pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
mbed_official 133:d4dda5c437f0 250 }
mbed_official 133:d4dda5c437f0 251
mbed_official 133:d4dda5c437f0 252 pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
mbed_official 133:d4dda5c437f0 253 SystemCoreClock = pllvco/pllp;
mbed_official 133:d4dda5c437f0 254 break;
mbed_official 133:d4dda5c437f0 255 default:
mbed_official 133:d4dda5c437f0 256 SystemCoreClock = HSI_VALUE;
mbed_official 133:d4dda5c437f0 257 break;
mbed_official 133:d4dda5c437f0 258 }
mbed_official 133:d4dda5c437f0 259 /* Compute HCLK frequency --------------------------------------------------*/
mbed_official 133:d4dda5c437f0 260 /* Get HCLK prescaler */
mbed_official 133:d4dda5c437f0 261 tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
mbed_official 133:d4dda5c437f0 262 /* HCLK frequency */
mbed_official 133:d4dda5c437f0 263 SystemCoreClock >>= tmp;
mbed_official 133:d4dda5c437f0 264 }
mbed_official 133:d4dda5c437f0 265
mbed_official 133:d4dda5c437f0 266 /* [ADDED FOR MBED]
mbed_official 133:d4dda5c437f0 267 Configure the System clock to 84 MHz (max value) using the internal HSI 16 MHz clock */
mbed_official 133:d4dda5c437f0 268 void SystemClock_Config(void)
mbed_official 133:d4dda5c437f0 269 {
mbed_official 133:d4dda5c437f0 270 RCC_ClkInitTypeDef RCC_ClkInitStruct;
mbed_official 133:d4dda5c437f0 271 RCC_OscInitTypeDef RCC_OscInitStruct;
mbed_official 133:d4dda5c437f0 272
mbed_official 133:d4dda5c437f0 273 /* The voltage scaling allows optimizing the power consumption when the device is
mbed_official 133:d4dda5c437f0 274 clocked below the maximum system frequency, to update the voltage scaling value
mbed_official 133:d4dda5c437f0 275 regarding system frequency refer to product datasheet. */
mbed_official 133:d4dda5c437f0 276 __PWR_CLK_ENABLE();
mbed_official 133:d4dda5c437f0 277 __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
mbed_official 133:d4dda5c437f0 278
mbed_official 133:d4dda5c437f0 279 /* Enable HSI Oscillator and activate PLL with HSI as source */
mbed_official 133:d4dda5c437f0 280 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
mbed_official 133:d4dda5c437f0 281 RCC_OscInitStruct.HSEState = RCC_HSE_ON;
mbed_official 133:d4dda5c437f0 282 RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
mbed_official 133:d4dda5c437f0 283 RCC_OscInitStruct.LSEState = RCC_LSE_OFF;
mbed_official 133:d4dda5c437f0 284 RCC_OscInitStruct.LSIState = RCC_LSI_OFF;
mbed_official 133:d4dda5c437f0 285 RCC_OscInitStruct.HSICalibrationValue = 16;
mbed_official 133:d4dda5c437f0 286 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
mbed_official 133:d4dda5c437f0 287 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
mbed_official 133:d4dda5c437f0 288 RCC_OscInitStruct.PLL.PLLM = 8;
mbed_official 133:d4dda5c437f0 289 RCC_OscInitStruct.PLL.PLLN = 336;
mbed_official 133:d4dda5c437f0 290 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
mbed_official 133:d4dda5c437f0 291 RCC_OscInitStruct.PLL.PLLQ = 7;
mbed_official 133:d4dda5c437f0 292 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
mbed_official 133:d4dda5c437f0 293 {
mbed_official 133:d4dda5c437f0 294 // System clock initialization failed
mbed_official 133:d4dda5c437f0 295 while(1)
mbed_official 133:d4dda5c437f0 296 {
mbed_official 133:d4dda5c437f0 297 // [TODO] Put something here to tell the user that a problem occured...
mbed_official 133:d4dda5c437f0 298 }
mbed_official 133:d4dda5c437f0 299 }
mbed_official 133:d4dda5c437f0 300
mbed_official 133:d4dda5c437f0 301 /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
mbed_official 133:d4dda5c437f0 302 RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
mbed_official 133:d4dda5c437f0 303 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
mbed_official 133:d4dda5c437f0 304 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 168 MHz
mbed_official 133:d4dda5c437f0 305 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; // 42 MHz
mbed_official 133:d4dda5c437f0 306 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; // 84 MHz (SPI1 clock...)
mbed_official 133:d4dda5c437f0 307 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
mbed_official 133:d4dda5c437f0 308 {
mbed_official 133:d4dda5c437f0 309 // System clock initialization failed
mbed_official 133:d4dda5c437f0 310 while(1)
mbed_official 133:d4dda5c437f0 311 {
mbed_official 133:d4dda5c437f0 312 // [TODO] Put something here to tell the user that a problem occured...
mbed_official 133:d4dda5c437f0 313 }
mbed_official 133:d4dda5c437f0 314 }
mbed_official 133:d4dda5c437f0 315
mbed_official 133:d4dda5c437f0 316 /* Update the SystemCoreClock variable
mbed_official 133:d4dda5c437f0 317 - Not needed because the variable is already set on top of this file.
mbed_official 133:d4dda5c437f0 318 - Warning: this function call is removed by the compiler with -O3/-Otime options. */
mbed_official 133:d4dda5c437f0 319 //SystemCoreClockUpdate();
mbed_official 133:d4dda5c437f0 320
mbed_official 133:d4dda5c437f0 321 /* Output SYSCLK on MCO2 pin(PC9) for debugging purpose */
mbed_official 133:d4dda5c437f0 322 //HAL_RCC_MCOConfig(RCC_MCO2, RCC_MCO2SOURCE_SYSCLK, RCC_MCODIV_4); // 168 MHz / 4 = 42 MHz
mbed_official 133:d4dda5c437f0 323 }
mbed_official 133:d4dda5c437f0 324
mbed_official 133:d4dda5c437f0 325 /* [ADDED FOR MBED]
mbed_official 133:d4dda5c437f0 326 Used for the different timeouts in the HAL */
mbed_official 133:d4dda5c437f0 327 void SysTick_Handler(void)
mbed_official 133:d4dda5c437f0 328 {
mbed_official 133:d4dda5c437f0 329 HAL_IncTick();
mbed_official 133:d4dda5c437f0 330 }
mbed_official 133:d4dda5c437f0 331
mbed_official 133:d4dda5c437f0 332 /**
mbed_official 133:d4dda5c437f0 333 * @}
mbed_official 133:d4dda5c437f0 334 */
mbed_official 133:d4dda5c437f0 335
mbed_official 133:d4dda5c437f0 336 /**
mbed_official 133:d4dda5c437f0 337 * @}
mbed_official 133:d4dda5c437f0 338 */
mbed_official 133:d4dda5c437f0 339
mbed_official 133:d4dda5c437f0 340 /**
mbed_official 133:d4dda5c437f0 341 * @}
mbed_official 133:d4dda5c437f0 342 */
mbed_official 133:d4dda5c437f0 343 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/