shao ziyang / mbed-src-kl05

mbed library sources

Dependents:   frdm_kl05z_gpio_test

Fork of mbed-src by mbed official

targets/hal/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/gpio_irq_api.c@323:9e901b0a5aa1, 2014-09-13 (annotated)

Committer:
shaoziyang
Date:
Sat Sep 13 14:25:46 2014 +0000
Revision:
323:9e901b0a5aa1
Parent:
285:31249416b6f9 
test with CLOCK_SETUP = 0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 31:42176bc3c368 1 /* mbed Microcontroller Library
mbed_official 31:42176bc3c368 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 31:42176bc3c368 3 *
mbed_official 31:42176bc3c368 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 31:42176bc3c368 5 * you may not use this file except in compliance with the License.
mbed_official 31:42176bc3c368 6 * You may obtain a copy of the License at
mbed_official 31:42176bc3c368 7 *
mbed_official 31:42176bc3c368 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 31:42176bc3c368 9 *
mbed_official 31:42176bc3c368 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 31:42176bc3c368 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 31:42176bc3c368 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 31:42176bc3c368 13 * See the License for the specific language governing permissions and
mbed_official 31:42176bc3c368 14 * limitations under the License.
mbed_official 31:42176bc3c368 15 */
mbed_official 31:42176bc3c368 16 #include <stddef.h>
mbed_official 31:42176bc3c368 17 #include "cmsis.h"
mbed_official 31:42176bc3c368 18
mbed_official 31:42176bc3c368 19 #include "gpio_irq_api.h"
mbed_official 113:65a335a675de 20 #include "gpio_api.h"
mbed_official 285:31249416b6f9 21 #include "mbed_error.h"
mbed_official 31:42176bc3c368 22
mbed_official 69:49e45cb70de1 23 #define CHANNEL_NUM 96
mbed_official 31:42176bc3c368 24
mbed_official 31:42176bc3c368 25 static uint32_t channel_ids[CHANNEL_NUM] = {0};
mbed_official 31:42176bc3c368 26 static gpio_irq_handler irq_handler;
mbed_official 31:42176bc3c368 27
mbed_official 31:42176bc3c368 28 #define IRQ_DISABLED (0)
mbed_official 31:42176bc3c368 29 #define IRQ_RAISING_EDGE PORT_PCR_IRQC(9)
mbed_official 31:42176bc3c368 30 #define IRQ_FALLING_EDGE PORT_PCR_IRQC(10)
mbed_official 31:42176bc3c368 31 #define IRQ_EITHER_EDGE PORT_PCR_IRQC(11)
mbed_official 31:42176bc3c368 32
mbed_official 254:181b5e179739 33 const uint32_t search_bits[] = {0x0000FFFF, 0x000000FF, 0x0000000F, 0x00000003, 0x00000001};
mbed_official 254:181b5e179739 34
mbed_official 31:42176bc3c368 35 static void handle_interrupt_in(PORT_Type *port, int ch_base) {
mbed_official 254:181b5e179739 36 uint32_t isfr;
mbed_official 254:181b5e179739 37 uint8_t location;
mbed_official 31:42176bc3c368 38
mbed_official 254:181b5e179739 39 while((isfr = port->ISFR) != 0) {
mbed_official 254:181b5e179739 40 location = 0;
mbed_official 254:181b5e179739 41 for (int i = 0; i < 5; i++) {
mbed_official 254:181b5e179739 42 if (!(isfr & (search_bits[i] << location)))
mbed_official 254:181b5e179739 43 location += 1 << (4 - i);
mbed_official 254:181b5e179739 44 }
mbed_official 254:181b5e179739 45
mbed_official 254:181b5e179739 46 uint32_t id = channel_ids[ch_base + location];
mbed_official 254:181b5e179739 47 if (id == 0) {
mbed_official 254:181b5e179739 48 continue;
mbed_official 254:181b5e179739 49 }
mbed_official 31:42176bc3c368 50
mbed_official 254:181b5e179739 51 FGPIO_Type *gpio;
mbed_official 254:181b5e179739 52 gpio_irq_event event = IRQ_NONE;
mbed_official 254:181b5e179739 53 switch (port->PCR[location] & PORT_PCR_IRQC_MASK) {
mbed_official 254:181b5e179739 54 case IRQ_RAISING_EDGE:
mbed_official 254:181b5e179739 55 event = IRQ_RISE;
mbed_official 254:181b5e179739 56 break;
mbed_official 254:181b5e179739 57
mbed_official 254:181b5e179739 58 case IRQ_FALLING_EDGE:
mbed_official 254:181b5e179739 59 event = IRQ_FALL;
mbed_official 254:181b5e179739 60 break;
mbed_official 31:42176bc3c368 61
mbed_official 254:181b5e179739 62 case IRQ_EITHER_EDGE:
mbed_official 254:181b5e179739 63 if (port == PORTA) {
mbed_official 254:181b5e179739 64 gpio = FPTA;
mbed_official 254:181b5e179739 65 } else if (port == PORTC) {
mbed_official 254:181b5e179739 66 gpio = FPTC;
mbed_official 254:181b5e179739 67 } else {
mbed_official 254:181b5e179739 68 gpio = FPTD;
mbed_official 254:181b5e179739 69 }
mbed_official 254:181b5e179739 70 event = (gpio->PDIR & (1<<location)) ? (IRQ_RISE) : (IRQ_FALL);
mbed_official 254:181b5e179739 71 break;
mbed_official 31:42176bc3c368 72 }
mbed_official 254:181b5e179739 73 if (event != IRQ_NONE) {
mbed_official 254:181b5e179739 74 irq_handler(id, event);
mbed_official 254:181b5e179739 75 }
mbed_official 254:181b5e179739 76 port->ISFR = 1 << location;
mbed_official 31:42176bc3c368 77 }
mbed_official 31:42176bc3c368 78 }
mbed_official 31:42176bc3c368 79
mbed_official 69:49e45cb70de1 80 void gpio_irqA(void) {
mbed_official 69:49e45cb70de1 81 handle_interrupt_in(PORTA, 0);
mbed_official 69:49e45cb70de1 82 }
mbed_official 69:49e45cb70de1 83
mbed_official 69:49e45cb70de1 84 /* PORTC and PORTD share same vector */
mbed_official 69:49e45cb70de1 85 void gpio_irqCD(void) {
mbed_official 69:49e45cb70de1 86 if ((SIM->SCGC5 & SIM_SCGC5_PORTC_MASK) && (PORTC->ISFR)) {
mbed_official 69:49e45cb70de1 87 handle_interrupt_in(PORTC, 32);
mbed_official 69:49e45cb70de1 88 } else if ((SIM->SCGC5 & SIM_SCGC5_PORTD_MASK) && (PORTD->ISFR)) {
mbed_official 69:49e45cb70de1 89 handle_interrupt_in(PORTD, 64);
mbed_official 69:49e45cb70de1 90 }
mbed_official 69:49e45cb70de1 91 }
mbed_official 31:42176bc3c368 92
mbed_official 31:42176bc3c368 93 int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) {
mbed_official 69:49e45cb70de1 94 if (pin == NC)
mbed_official 69:49e45cb70de1 95 return -1;
mbed_official 31:42176bc3c368 96
mbed_official 31:42176bc3c368 97 irq_handler = handler;
mbed_official 31:42176bc3c368 98
mbed_official 31:42176bc3c368 99 obj->port = pin >> PORT_SHIFT;
mbed_official 31:42176bc3c368 100 obj->pin = (pin & 0x7F) >> 2;
mbed_official 31:42176bc3c368 101
mbed_official 31:42176bc3c368 102 uint32_t ch_base, vector;
mbed_official 31:42176bc3c368 103 IRQn_Type irq_n;
mbed_official 31:42176bc3c368 104 switch (obj->port) {
mbed_official 31:42176bc3c368 105 case PortA:
mbed_official 31:42176bc3c368 106 ch_base = 0; irq_n = PORTA_IRQn; vector = (uint32_t)gpio_irqA;
mbed_official 31:42176bc3c368 107 break;
mbed_official 31:42176bc3c368 108
mbed_official 69:49e45cb70de1 109 case PortC:
mbed_official 69:49e45cb70de1 110 ch_base = 32; irq_n = PORTC_PORTD_IRQn; vector = (uint32_t)gpio_irqCD;
mbed_official 69:49e45cb70de1 111 break;
mbed_official 69:49e45cb70de1 112
mbed_official 31:42176bc3c368 113 case PortD:
mbed_official 69:49e45cb70de1 114 ch_base = 64; irq_n = PORTC_PORTD_IRQn; vector = (uint32_t)gpio_irqCD;
mbed_official 31:42176bc3c368 115 break;
mbed_official 31:42176bc3c368 116
mbed_official 31:42176bc3c368 117 default:
mbed_official 158:3121b9889f7b 118 error("gpio_irq only supported on port A,C and D");
mbed_official 31:42176bc3c368 119 break;
mbed_official 31:42176bc3c368 120 }
mbed_official 31:42176bc3c368 121 NVIC_SetVector(irq_n, vector);
mbed_official 31:42176bc3c368 122 NVIC_EnableIRQ(irq_n);
mbed_official 31:42176bc3c368 123
mbed_official 31:42176bc3c368 124 obj->ch = ch_base + obj->pin;
mbed_official 31:42176bc3c368 125 channel_ids[obj->ch] = id;
mbed_official 31:42176bc3c368 126
mbed_official 31:42176bc3c368 127 return 0;
mbed_official 31:42176bc3c368 128 }
mbed_official 31:42176bc3c368 129
mbed_official 31:42176bc3c368 130 void gpio_irq_free(gpio_irq_t *obj) {
mbed_official 31:42176bc3c368 131 channel_ids[obj->ch] = 0;
mbed_official 31:42176bc3c368 132 }
mbed_official 31:42176bc3c368 133
mbed_official 31:42176bc3c368 134 void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) {
mbed_official 31:42176bc3c368 135 PORT_Type *port = (PORT_Type *)(PORTA_BASE + 0x1000 * obj->port);
mbed_official 31:42176bc3c368 136
mbed_official 31:42176bc3c368 137 uint32_t irq_settings = IRQ_DISABLED;
mbed_official 31:42176bc3c368 138
mbed_official 31:42176bc3c368 139 switch (port->PCR[obj->pin] & PORT_PCR_IRQC_MASK) {
mbed_official 31:42176bc3c368 140 case IRQ_DISABLED:
mbed_official 31:42176bc3c368 141 if (enable) {
mbed_official 31:42176bc3c368 142 irq_settings = (event == IRQ_RISE) ? (IRQ_RAISING_EDGE) : (IRQ_FALLING_EDGE);
mbed_official 31:42176bc3c368 143 }
mbed_official 31:42176bc3c368 144 break;
mbed_official 31:42176bc3c368 145
mbed_official 31:42176bc3c368 146 case IRQ_RAISING_EDGE:
mbed_official 31:42176bc3c368 147 if (enable) {
mbed_official 31:42176bc3c368 148 irq_settings = (event == IRQ_RISE) ? (IRQ_RAISING_EDGE) : (IRQ_EITHER_EDGE);
mbed_official 31:42176bc3c368 149 } else {
mbed_official 31:42176bc3c368 150 if (event == IRQ_FALL)
mbed_official 31:42176bc3c368 151 irq_settings = IRQ_RAISING_EDGE;
mbed_official 31:42176bc3c368 152 }
mbed_official 31:42176bc3c368 153 break;
mbed_official 31:42176bc3c368 154
mbed_official 31:42176bc3c368 155 case IRQ_FALLING_EDGE:
mbed_official 31:42176bc3c368 156 if (enable) {
mbed_official 31:42176bc3c368 157 irq_settings = (event == IRQ_FALL) ? (IRQ_FALLING_EDGE) : (IRQ_EITHER_EDGE);
mbed_official 31:42176bc3c368 158 } else {
mbed_official 31:42176bc3c368 159 if (event == IRQ_RISE)
mbed_official 31:42176bc3c368 160 irq_settings = IRQ_FALLING_EDGE;
mbed_official 31:42176bc3c368 161 }
mbed_official 31:42176bc3c368 162 break;
mbed_official 31:42176bc3c368 163
mbed_official 31:42176bc3c368 164 case IRQ_EITHER_EDGE:
mbed_official 31:42176bc3c368 165 if (enable) {
mbed_official 31:42176bc3c368 166 irq_settings = IRQ_EITHER_EDGE;
mbed_official 31:42176bc3c368 167 } else {
mbed_official 31:42176bc3c368 168 irq_settings = (event == IRQ_RISE) ? (IRQ_FALLING_EDGE) : (IRQ_RAISING_EDGE);
mbed_official 31:42176bc3c368 169 }
mbed_official 31:42176bc3c368 170 break;
mbed_official 31:42176bc3c368 171 }
mbed_official 31:42176bc3c368 172
mbed_official 31:42176bc3c368 173 // Interrupt configuration and clear interrupt
mbed_official 31:42176bc3c368 174 port->PCR[obj->pin] = (port->PCR[obj->pin] & ~PORT_PCR_IRQC_MASK) | irq_settings | PORT_PCR_ISF_MASK;
mbed_official 31:42176bc3c368 175 }
mbed_official 35:371630885ad6 176
mbed_official 35:371630885ad6 177 void gpio_irq_enable(gpio_irq_t *obj) {
mbed_official 35:371630885ad6 178 if (obj->port == PortA) {
mbed_official 35:371630885ad6 179 NVIC_EnableIRQ(PORTA_IRQn);
mbed_official 69:49e45cb70de1 180 } else {
mbed_official 69:49e45cb70de1 181 NVIC_EnableIRQ(PORTC_PORTD_IRQn);
mbed_official 35:371630885ad6 182 }
mbed_official 35:371630885ad6 183 }
mbed_official 35:371630885ad6 184
mbed_official 35:371630885ad6 185 void gpio_irq_disable(gpio_irq_t *obj) {
mbed_official 35:371630885ad6 186 if (obj->port == PortA) {
mbed_official 35:371630885ad6 187 NVIC_DisableIRQ(PORTA_IRQn);
mbed_official 69:49e45cb70de1 188 } else {
mbed_official 69:49e45cb70de1 189 NVIC_DisableIRQ(PORTC_PORTD_IRQn);
mbed_official 35:371630885ad6 190 }
mbed_official 35:371630885ad6 191 }